2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright SUSE Linux Products GmbH 2009
17 * Authors: Alexander Graf <agraf@suse.de>
20 #include <asm/ppc_asm.h>
21 #include <asm/kvm_asm.h>
24 #include <asm/asm-offsets.h>
25 #include <asm/exception-64s.h>
27 #if defined(CONFIG_PPC_BOOK3S_64)
30 #define FUNC(name) GLUE(.,name)
32 #define GET_SHADOW_VCPU(reg) \
33 addi reg, r13, PACA_KVM_SVCPU
35 #define DISABLE_INTERRUPTS \
41 #elif defined(CONFIG_PPC_BOOK3S_32)
44 #define FUNC(name) name
46 #define GET_SHADOW_VCPU(reg) \
47 lwz reg, (THREAD + THREAD_KVM_SVCPU)(r2)
49 #define DISABLE_INTERRUPTS \
51 rlwinm r0,r0,0,17,15; \
54 #endif /* CONFIG_PPC_BOOK3S_XX */
57 #define VCPU_GPR(n) (VCPU_GPRS + (n * ULONG_SIZE))
58 #define VCPU_LOAD_NVGPRS(vcpu) \
59 PPC_LL r14, VCPU_GPR(r14)(vcpu); \
60 PPC_LL r15, VCPU_GPR(r15)(vcpu); \
61 PPC_LL r16, VCPU_GPR(r16)(vcpu); \
62 PPC_LL r17, VCPU_GPR(r17)(vcpu); \
63 PPC_LL r18, VCPU_GPR(r18)(vcpu); \
64 PPC_LL r19, VCPU_GPR(r19)(vcpu); \
65 PPC_LL r20, VCPU_GPR(r20)(vcpu); \
66 PPC_LL r21, VCPU_GPR(r21)(vcpu); \
67 PPC_LL r22, VCPU_GPR(r22)(vcpu); \
68 PPC_LL r23, VCPU_GPR(r23)(vcpu); \
69 PPC_LL r24, VCPU_GPR(r24)(vcpu); \
70 PPC_LL r25, VCPU_GPR(r25)(vcpu); \
71 PPC_LL r26, VCPU_GPR(r26)(vcpu); \
72 PPC_LL r27, VCPU_GPR(r27)(vcpu); \
73 PPC_LL r28, VCPU_GPR(r28)(vcpu); \
74 PPC_LL r29, VCPU_GPR(r29)(vcpu); \
75 PPC_LL r30, VCPU_GPR(r30)(vcpu); \
76 PPC_LL r31, VCPU_GPR(r31)(vcpu); \
78 /*****************************************************************************
80 * Guest entry / exit code that is in kernel module memory (highmem) *
82 ****************************************************************************/
88 _GLOBAL(__kvmppc_vcpu_entry)
91 /* Write correct stack frame */
93 PPC_STL r0,PPC_LR_STKOFF(r1)
95 /* Save host state to the stack */
96 PPC_STLU r1, -SWITCH_FRAME_SIZE(r1)
98 /* Save r3 (kvm_run) and r4 (vcpu) */
101 /* Save non-volatile registers (r14 - r31) */
105 PPC_STL r0, _LINK(r1)
107 /* Load non-volatile guest state from the vcpu */
112 /* Save R1/R2 in the PACA */
113 PPC_STL r1, SVCPU_HOST_R1(r5)
114 PPC_STL r2, SVCPU_HOST_R2(r5)
116 /* XXX swap in/out on load? */
117 PPC_LL r3, VCPU_HIGHMEM_HANDLER(r4)
118 PPC_STL r3, SVCPU_VMHANDLER(r5)
120 kvm_start_lightweight:
122 PPC_LL r10, VCPU_SHADOW_MSR(r4) /* r10 = vcpu->arch.shadow_msr */
126 #ifdef CONFIG_PPC_BOOK3S_64
127 /* Some guests may need to have dcbz set to 32 byte length.
129 * Usually we ensure that by patching the guest's instructions
130 * to trap on dcbz and emulate it in the hypervisor.
132 * If we can, we should tell the CPU to use 32 byte dcbz though,
133 * because that's a lot faster.
136 PPC_LL r3, VCPU_HFLAGS(r4)
137 rldicl. r3, r3, 0, 63 /* CR = ((r3 & 1) == 0) */
141 ori r3, r3, 0x80 /* XXX HID5_dcbz32 = 0x80 */
146 #endif /* CONFIG_PPC_BOOK3S_64 */
148 PPC_LL r6, VCPU_RMCALL(r4)
151 PPC_LL r3, VCPU_TRAMPOLINE_ENTER(r4)
152 LOAD_REG_IMMEDIATE(r4, MSR_KERNEL & ~(MSR_IR | MSR_DR))
154 /* Jump to segment patching handler and into our guest */
158 * This is the handler in module memory. It gets jumped at from the
159 * lowmem trampoline code, so it's basically the guest exit code.
163 .global kvmppc_handler_highmem
164 kvmppc_handler_highmem:
167 * Register usage at this point:
171 * R12 = exit handler id
180 #ifdef CONFIG_PPC_BOOK3S_64
182 PPC_LL r5, VCPU_HFLAGS(r7)
183 rldicl. r5, r5, 0, 63 /* CR = ((r5 & 1) == 0) */
193 #endif /* CONFIG_PPC_BOOK3S_64 */
195 PPC_STL r14, VCPU_GPR(r14)(r7)
196 PPC_STL r15, VCPU_GPR(r15)(r7)
197 PPC_STL r16, VCPU_GPR(r16)(r7)
198 PPC_STL r17, VCPU_GPR(r17)(r7)
199 PPC_STL r18, VCPU_GPR(r18)(r7)
200 PPC_STL r19, VCPU_GPR(r19)(r7)
201 PPC_STL r20, VCPU_GPR(r20)(r7)
202 PPC_STL r21, VCPU_GPR(r21)(r7)
203 PPC_STL r22, VCPU_GPR(r22)(r7)
204 PPC_STL r23, VCPU_GPR(r23)(r7)
205 PPC_STL r24, VCPU_GPR(r24)(r7)
206 PPC_STL r25, VCPU_GPR(r25)(r7)
207 PPC_STL r26, VCPU_GPR(r26)(r7)
208 PPC_STL r27, VCPU_GPR(r27)(r7)
209 PPC_STL r28, VCPU_GPR(r28)(r7)
210 PPC_STL r29, VCPU_GPR(r29)(r7)
211 PPC_STL r30, VCPU_GPR(r30)(r7)
212 PPC_STL r31, VCPU_GPR(r31)(r7)
214 /* Restore host msr -> SRR1 */
215 PPC_LL r6, VCPU_HOST_MSR(r7)
218 * For some interrupts, we need to call the real Linux
219 * handler, so it can do work for us. This has to happen
220 * as if the interrupt arrived from the kernel though,
221 * so let's fake it here where most state is restored.
223 * Call Linux for hardware interrupts/decrementer
224 * r3 = address of interrupt handler (exit reason)
227 cmpwi r12, BOOK3S_INTERRUPT_EXTERNAL
228 beq call_linux_handler
229 cmpwi r12, BOOK3S_INTERRUPT_DECREMENTER
230 beq call_linux_handler
231 cmpwi r12, BOOK3S_INTERRUPT_PERFMON
232 beq call_linux_handler
242 * If we land here we need to jump back to the handler we
245 * We have a page that we can access from real mode, so let's
246 * jump back to that and use it as a trampoline to get back into the
249 * R3 still contains the exit code,
250 * R5 VCPU_HOST_RETIP and
254 /* Restore host IP -> SRR0 */
255 PPC_LL r5, VCPU_HOST_RETIP(r7)
257 /* XXX Better move to a safe function?
258 * What if we get an HTAB flush in between mtsrr0 and mtsrr1? */
262 PPC_LL r4, VCPU_TRAMPOLINE_LOWMEM(r7)
264 LOAD_REG_IMMEDIATE(r3, MSR_KERNEL & ~(MSR_IR | MSR_DR))
269 .global kvm_return_point
272 /* Jump back to lightweight entry if we're supposed to */
273 /* go back into the guest */
275 /* Pass the exit number as 3rd argument to kvmppc_handle_exit */
278 /* Restore r3 (kvm_run) and r4 (vcpu) */
280 bl FUNC(kvmppc_handle_exit)
282 /* If RESUME_GUEST, get back in the loop */
283 cmpwi r3, RESUME_GUEST
284 beq kvm_loop_lightweight
286 cmpwi r3, RESUME_GUEST_NV
287 beq kvm_loop_heavyweight
294 /* Restore non-volatile host registers (r14 - r31) */
297 addi r1, r1, SWITCH_FRAME_SIZE
300 kvm_loop_heavyweight:
303 PPC_STL r4, (PPC_LR_STKOFF + SWITCH_FRAME_SIZE)(r1)
305 /* Load vcpu and cpu_run */
308 /* Load non-volatile guest state from the vcpu */
311 /* Jump back into the beginning of this function */
312 b kvm_start_lightweight
314 kvm_loop_lightweight:
316 /* We'll need the vcpu pointer */
319 /* Jump back into the beginning of this function */
320 b kvm_start_lightweight