2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright SUSE Linux Products GmbH 2009
17 * Authors: Alexander Graf <agraf@suse.de>
20 #include <asm/ppc_asm.h>
21 #include <asm/kvm_asm.h>
24 #include <asm/asm-offsets.h>
26 #ifdef CONFIG_PPC_BOOK3S_64
27 #include <asm/exception-64s.h>
30 /*****************************************************************************
32 * Real Mode handlers that need to be in low physical memory *
34 ****************************************************************************/
36 #if defined(CONFIG_PPC_BOOK3S_64)
38 #define LOAD_SHADOW_VCPU(reg) GET_PACA(reg)
39 #define SHADOW_VCPU_OFF PACA_KVM_SVCPU
40 #define MSR_NOIRQ MSR_KERNEL & ~(MSR_IR | MSR_DR)
41 #define FUNC(name) GLUE(.,name)
43 #elif defined(CONFIG_PPC_BOOK3S_32)
45 #define LOAD_SHADOW_VCPU(reg) \
46 mfspr reg, SPRN_SPRG_THREAD; \
47 lwz reg, THREAD_KVM_SVCPU(reg); \
48 /* PPC32 can have a NULL pointer - let's check for that */ \
49 mtspr SPRN_SPRG_SCRATCH1, r12; /* Save r12 */ \
53 mfspr reg, SPRN_SPRG_SCRATCH0; \
55 mfspr r12, SPRN_SPRG_SCRATCH1; \
56 b kvmppc_resume_\intno; \
59 mfspr r12, SPRN_SPRG_SCRATCH1; \
62 #define SHADOW_VCPU_OFF 0
63 #define MSR_NOIRQ MSR_KERNEL
64 #define FUNC(name) name
68 .macro INTERRUPT_TRAMPOLINE intno
70 .global kvmppc_trampoline_\intno
71 kvmppc_trampoline_\intno:
73 SET_SCRATCH0(r13) /* Save r13 */
76 * First thing to do is to find out if we're coming
77 * from a KVM guest or a Linux process.
79 * To distinguish, we check a magic byte in the PACA/current
82 PPC_STL r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13)
84 stw r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13)
85 lbz r12, (SHADOW_VCPU_OFF + SVCPU_IN_GUEST)(r13)
86 cmpwi r12, KVM_GUEST_MODE_NONE
87 bne ..kvmppc_handler_hasmagic_\intno
88 /* No KVM guest? Then jump back to the Linux handler! */
89 lwz r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13)
91 PPC_LL r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13)
92 GET_SCRATCH0(r13) /* r13 = original r13 */
93 b kvmppc_resume_\intno /* Get back original handler */
95 /* Now we know we're handling a KVM guest */
96 ..kvmppc_handler_hasmagic_\intno:
98 /* Should we just skip the faulting instruction? */
99 cmpwi r12, KVM_GUEST_MODE_SKIP
100 beq kvmppc_handler_skip_ins
102 /* Let's store which interrupt we're handling */
105 /* Jump into the SLB exit code that goes to the highmem handler */
106 b kvmppc_handler_trampoline_exit
110 INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_SYSTEM_RESET
111 INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_MACHINE_CHECK
112 INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_DATA_STORAGE
113 INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_INST_STORAGE
114 INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_EXTERNAL
115 #ifdef CONFIG_PPC_BOOK3S_64
116 INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_EXTERNAL_HV
118 INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_ALIGNMENT
119 INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_PROGRAM
120 INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_FP_UNAVAIL
121 INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_DECREMENTER
122 INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_SYSCALL
123 INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_TRACE
124 INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_PERFMON
125 INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_ALTIVEC
127 /* Those are only available on 64 bit machines */
129 #ifdef CONFIG_PPC_BOOK3S_64
130 INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_DATA_SEGMENT
131 INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_INST_SEGMENT
132 INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_VSX
136 * Bring us back to the faulting code, but skip the
137 * faulting instruction.
139 * This is a generic exit path from the interrupt
145 * R13 = Shadow VCPU (PACA)
146 * SVCPU.SCRATCH0 = guest R12
147 * SVCPU.SCRATCH1 = guest CR
148 * SPRG_SCRATCH0 = guest R13
151 kvmppc_handler_skip_ins:
153 /* Patch the IP to the next instruction */
158 /* Clean up all state */
159 lwz r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13)
161 PPC_LL r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13)
164 /* And get back into the code */
168 * This trampoline brings us back to a real mode handler
177 .global kvmppc_handler_lowmem_trampoline
178 kvmppc_handler_lowmem_trampoline:
183 kvmppc_handler_lowmem_trampoline_end:
186 * Call a function in real mode
192 * R5 = scratch register
195 _GLOBAL(kvmppc_rmcall)
196 LOAD_REG_IMMEDIATE(r5, MSR_NOIRQ)
197 mtmsr r5 /* Disable relocation and interrupts, so mtsrr
198 doesn't get interrupted */
204 #if defined(CONFIG_PPC_BOOK3S_32)
205 #define STACK_LR INT_FRAME_SIZE+4
207 /* load_up_xxx have to run with MSR_DR=0 on Book3S_32 */
208 #define MSR_EXT_START \
209 PPC_STL r20, _NIP(r1); \
211 LOAD_REG_IMMEDIATE(r3, MSR_DR|MSR_EE); \
212 andc r3,r20,r3; /* Disable DR,EE */ \
216 #define MSR_EXT_END \
217 mtmsr r20; /* Enable DR,EE */ \
221 #elif defined(CONFIG_PPC_BOOK3S_64)
222 #define STACK_LR _LINK
223 #define MSR_EXT_START
228 * Activate current's external feature (FPU/Altivec/VSX)
230 #define define_load_up(what) \
232 _GLOBAL(kvmppc_load_up_ ## what); \
233 PPC_STLU r1, -INT_FRAME_SIZE(r1); \
235 PPC_STL r3, STACK_LR(r1); \
238 bl FUNC(load_up_ ## what); \
241 PPC_LL r3, STACK_LR(r1); \
243 addi r1, r1, INT_FRAME_SIZE; \
247 #ifdef CONFIG_ALTIVEC
248 define_load_up(altivec)
254 .global kvmppc_trampoline_lowmem
255 kvmppc_trampoline_lowmem:
256 PPC_LONG kvmppc_handler_lowmem_trampoline - CONFIG_KERNEL_START
258 .global kvmppc_trampoline_enter
259 kvmppc_trampoline_enter:
260 PPC_LONG kvmppc_handler_trampoline_enter - CONFIG_KERNEL_START
262 #include "book3s_segment.S"