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[linux-2.6/next.git] / arch / powerpc / platforms / cell / spu_base.c
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1 /*
2 * Low-level SPU handling
4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
6 * Author: Arnd Bergmann <arndb@de.ibm.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
11 * any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #undef DEBUG
25 #include <linux/interrupt.h>
26 #include <linux/list.h>
27 #include <linux/module.h>
28 #include <linux/ptrace.h>
29 #include <linux/slab.h>
30 #include <linux/wait.h>
31 #include <linux/mm.h>
32 #include <linux/io.h>
33 #include <linux/mutex.h>
34 #include <linux/linux_logo.h>
35 #include <linux/syscore_ops.h>
36 #include <asm/spu.h>
37 #include <asm/spu_priv1.h>
38 #include <asm/spu_csa.h>
39 #include <asm/xmon.h>
40 #include <asm/prom.h>
41 #include <asm/kexec.h>
43 const struct spu_management_ops *spu_management_ops;
44 EXPORT_SYMBOL_GPL(spu_management_ops);
46 const struct spu_priv1_ops *spu_priv1_ops;
47 EXPORT_SYMBOL_GPL(spu_priv1_ops);
49 struct cbe_spu_info cbe_spu_info[MAX_NUMNODES];
50 EXPORT_SYMBOL_GPL(cbe_spu_info);
53 * The spufs fault-handling code needs to call force_sig_info to raise signals
54 * on DMA errors. Export it here to avoid general kernel-wide access to this
55 * function
57 EXPORT_SYMBOL_GPL(force_sig_info);
60 * Protects cbe_spu_info and spu->number.
62 static DEFINE_SPINLOCK(spu_lock);
65 * List of all spus in the system.
67 * This list is iterated by callers from irq context and callers that
68 * want to sleep. Thus modifications need to be done with both
69 * spu_full_list_lock and spu_full_list_mutex held, while iterating
70 * through it requires either of these locks.
72 * In addition spu_full_list_lock protects all assignmens to
73 * spu->mm.
75 static LIST_HEAD(spu_full_list);
76 static DEFINE_SPINLOCK(spu_full_list_lock);
77 static DEFINE_MUTEX(spu_full_list_mutex);
79 struct spu_slb {
80 u64 esid, vsid;
83 void spu_invalidate_slbs(struct spu *spu)
85 struct spu_priv2 __iomem *priv2 = spu->priv2;
86 unsigned long flags;
88 spin_lock_irqsave(&spu->register_lock, flags);
89 if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK)
90 out_be64(&priv2->slb_invalidate_all_W, 0UL);
91 spin_unlock_irqrestore(&spu->register_lock, flags);
93 EXPORT_SYMBOL_GPL(spu_invalidate_slbs);
95 /* This is called by the MM core when a segment size is changed, to
96 * request a flush of all the SPEs using a given mm
98 void spu_flush_all_slbs(struct mm_struct *mm)
100 struct spu *spu;
101 unsigned long flags;
103 spin_lock_irqsave(&spu_full_list_lock, flags);
104 list_for_each_entry(spu, &spu_full_list, full_list) {
105 if (spu->mm == mm)
106 spu_invalidate_slbs(spu);
108 spin_unlock_irqrestore(&spu_full_list_lock, flags);
111 /* The hack below stinks... try to do something better one of
112 * these days... Does it even work properly with NR_CPUS == 1 ?
114 static inline void mm_needs_global_tlbie(struct mm_struct *mm)
116 int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1;
118 /* Global TLBIE broadcast required with SPEs. */
119 bitmap_fill(cpumask_bits(mm_cpumask(mm)), nr);
122 void spu_associate_mm(struct spu *spu, struct mm_struct *mm)
124 unsigned long flags;
126 spin_lock_irqsave(&spu_full_list_lock, flags);
127 spu->mm = mm;
128 spin_unlock_irqrestore(&spu_full_list_lock, flags);
129 if (mm)
130 mm_needs_global_tlbie(mm);
132 EXPORT_SYMBOL_GPL(spu_associate_mm);
134 int spu_64k_pages_available(void)
136 return mmu_psize_defs[MMU_PAGE_64K].shift != 0;
138 EXPORT_SYMBOL_GPL(spu_64k_pages_available);
140 static void spu_restart_dma(struct spu *spu)
142 struct spu_priv2 __iomem *priv2 = spu->priv2;
144 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
145 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
146 else {
147 set_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
148 mb();
152 static inline void spu_load_slb(struct spu *spu, int slbe, struct spu_slb *slb)
154 struct spu_priv2 __iomem *priv2 = spu->priv2;
156 pr_debug("%s: adding SLB[%d] 0x%016llx 0x%016llx\n",
157 __func__, slbe, slb->vsid, slb->esid);
159 out_be64(&priv2->slb_index_W, slbe);
160 /* set invalid before writing vsid */
161 out_be64(&priv2->slb_esid_RW, 0);
162 /* now it's safe to write the vsid */
163 out_be64(&priv2->slb_vsid_RW, slb->vsid);
164 /* setting the new esid makes the entry valid again */
165 out_be64(&priv2->slb_esid_RW, slb->esid);
168 static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
170 struct mm_struct *mm = spu->mm;
171 struct spu_slb slb;
172 int psize;
174 pr_debug("%s\n", __func__);
176 slb.esid = (ea & ESID_MASK) | SLB_ESID_V;
178 switch(REGION_ID(ea)) {
179 case USER_REGION_ID:
180 #ifdef CONFIG_PPC_MM_SLICES
181 psize = get_slice_psize(mm, ea);
182 #else
183 psize = mm->context.user_psize;
184 #endif
185 slb.vsid = (get_vsid(mm->context.id, ea, MMU_SEGSIZE_256M)
186 << SLB_VSID_SHIFT) | SLB_VSID_USER;
187 break;
188 case VMALLOC_REGION_ID:
189 if (ea < VMALLOC_END)
190 psize = mmu_vmalloc_psize;
191 else
192 psize = mmu_io_psize;
193 slb.vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M)
194 << SLB_VSID_SHIFT) | SLB_VSID_KERNEL;
195 break;
196 case KERNEL_REGION_ID:
197 psize = mmu_linear_psize;
198 slb.vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M)
199 << SLB_VSID_SHIFT) | SLB_VSID_KERNEL;
200 break;
201 default:
202 /* Future: support kernel segments so that drivers
203 * can use SPUs.
205 pr_debug("invalid region access at %016lx\n", ea);
206 return 1;
208 slb.vsid |= mmu_psize_defs[psize].sllp;
210 spu_load_slb(spu, spu->slb_replace, &slb);
212 spu->slb_replace++;
213 if (spu->slb_replace >= 8)
214 spu->slb_replace = 0;
216 spu_restart_dma(spu);
217 spu->stats.slb_flt++;
218 return 0;
221 extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX
222 static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
224 int ret;
226 pr_debug("%s, %llx, %lx\n", __func__, dsisr, ea);
229 * Handle kernel space hash faults immediately. User hash
230 * faults need to be deferred to process context.
232 if ((dsisr & MFC_DSISR_PTE_NOT_FOUND) &&
233 (REGION_ID(ea) != USER_REGION_ID)) {
235 spin_unlock(&spu->register_lock);
236 ret = hash_page(ea, _PAGE_PRESENT, 0x300);
237 spin_lock(&spu->register_lock);
239 if (!ret) {
240 spu_restart_dma(spu);
241 return 0;
245 spu->class_1_dar = ea;
246 spu->class_1_dsisr = dsisr;
248 spu->stop_callback(spu, 1);
250 spu->class_1_dar = 0;
251 spu->class_1_dsisr = 0;
253 return 0;
256 static void __spu_kernel_slb(void *addr, struct spu_slb *slb)
258 unsigned long ea = (unsigned long)addr;
259 u64 llp;
261 if (REGION_ID(ea) == KERNEL_REGION_ID)
262 llp = mmu_psize_defs[mmu_linear_psize].sllp;
263 else
264 llp = mmu_psize_defs[mmu_virtual_psize].sllp;
266 slb->vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
267 SLB_VSID_KERNEL | llp;
268 slb->esid = (ea & ESID_MASK) | SLB_ESID_V;
272 * Given an array of @nr_slbs SLB entries, @slbs, return non-zero if the
273 * address @new_addr is present.
275 static inline int __slb_present(struct spu_slb *slbs, int nr_slbs,
276 void *new_addr)
278 unsigned long ea = (unsigned long)new_addr;
279 int i;
281 for (i = 0; i < nr_slbs; i++)
282 if (!((slbs[i].esid ^ ea) & ESID_MASK))
283 return 1;
285 return 0;
289 * Setup the SPU kernel SLBs, in preparation for a context save/restore. We
290 * need to map both the context save area, and the save/restore code.
292 * Because the lscsa and code may cross segment boundaires, we check to see
293 * if mappings are required for the start and end of each range. We currently
294 * assume that the mappings are smaller that one segment - if not, something
295 * is seriously wrong.
297 void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa,
298 void *code, int code_size)
300 struct spu_slb slbs[4];
301 int i, nr_slbs = 0;
302 /* start and end addresses of both mappings */
303 void *addrs[] = {
304 lscsa, (void *)lscsa + sizeof(*lscsa) - 1,
305 code, code + code_size - 1
308 /* check the set of addresses, and create a new entry in the slbs array
309 * if there isn't already a SLB for that address */
310 for (i = 0; i < ARRAY_SIZE(addrs); i++) {
311 if (__slb_present(slbs, nr_slbs, addrs[i]))
312 continue;
314 __spu_kernel_slb(addrs[i], &slbs[nr_slbs]);
315 nr_slbs++;
318 spin_lock_irq(&spu->register_lock);
319 /* Add the set of SLBs */
320 for (i = 0; i < nr_slbs; i++)
321 spu_load_slb(spu, i, &slbs[i]);
322 spin_unlock_irq(&spu->register_lock);
324 EXPORT_SYMBOL_GPL(spu_setup_kernel_slbs);
326 static irqreturn_t
327 spu_irq_class_0(int irq, void *data)
329 struct spu *spu;
330 unsigned long stat, mask;
332 spu = data;
334 spin_lock(&spu->register_lock);
335 mask = spu_int_mask_get(spu, 0);
336 stat = spu_int_stat_get(spu, 0) & mask;
338 spu->class_0_pending |= stat;
339 spu->class_0_dar = spu_mfc_dar_get(spu);
340 spu->stop_callback(spu, 0);
341 spu->class_0_pending = 0;
342 spu->class_0_dar = 0;
344 spu_int_stat_clear(spu, 0, stat);
345 spin_unlock(&spu->register_lock);
347 return IRQ_HANDLED;
350 static irqreturn_t
351 spu_irq_class_1(int irq, void *data)
353 struct spu *spu;
354 unsigned long stat, mask, dar, dsisr;
356 spu = data;
358 /* atomically read & clear class1 status. */
359 spin_lock(&spu->register_lock);
360 mask = spu_int_mask_get(spu, 1);
361 stat = spu_int_stat_get(spu, 1) & mask;
362 dar = spu_mfc_dar_get(spu);
363 dsisr = spu_mfc_dsisr_get(spu);
364 if (stat & CLASS1_STORAGE_FAULT_INTR)
365 spu_mfc_dsisr_set(spu, 0ul);
366 spu_int_stat_clear(spu, 1, stat);
368 pr_debug("%s: %lx %lx %lx %lx\n", __func__, mask, stat,
369 dar, dsisr);
371 if (stat & CLASS1_SEGMENT_FAULT_INTR)
372 __spu_trap_data_seg(spu, dar);
374 if (stat & CLASS1_STORAGE_FAULT_INTR)
375 __spu_trap_data_map(spu, dar, dsisr);
377 if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_GET_INTR)
380 if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR)
383 spu->class_1_dsisr = 0;
384 spu->class_1_dar = 0;
386 spin_unlock(&spu->register_lock);
388 return stat ? IRQ_HANDLED : IRQ_NONE;
391 static irqreturn_t
392 spu_irq_class_2(int irq, void *data)
394 struct spu *spu;
395 unsigned long stat;
396 unsigned long mask;
397 const int mailbox_intrs =
398 CLASS2_MAILBOX_THRESHOLD_INTR | CLASS2_MAILBOX_INTR;
400 spu = data;
401 spin_lock(&spu->register_lock);
402 stat = spu_int_stat_get(spu, 2);
403 mask = spu_int_mask_get(spu, 2);
404 /* ignore interrupts we're not waiting for */
405 stat &= mask;
406 /* mailbox interrupts are level triggered. mask them now before
407 * acknowledging */
408 if (stat & mailbox_intrs)
409 spu_int_mask_and(spu, 2, ~(stat & mailbox_intrs));
410 /* acknowledge all interrupts before the callbacks */
411 spu_int_stat_clear(spu, 2, stat);
413 pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
415 if (stat & CLASS2_MAILBOX_INTR)
416 spu->ibox_callback(spu);
418 if (stat & CLASS2_SPU_STOP_INTR)
419 spu->stop_callback(spu, 2);
421 if (stat & CLASS2_SPU_HALT_INTR)
422 spu->stop_callback(spu, 2);
424 if (stat & CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR)
425 spu->mfc_callback(spu);
427 if (stat & CLASS2_MAILBOX_THRESHOLD_INTR)
428 spu->wbox_callback(spu);
430 spu->stats.class2_intr++;
432 spin_unlock(&spu->register_lock);
434 return stat ? IRQ_HANDLED : IRQ_NONE;
437 static int spu_request_irqs(struct spu *spu)
439 int ret = 0;
441 if (spu->irqs[0] != NO_IRQ) {
442 snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
443 spu->number);
444 ret = request_irq(spu->irqs[0], spu_irq_class_0,
445 IRQF_DISABLED,
446 spu->irq_c0, spu);
447 if (ret)
448 goto bail0;
450 if (spu->irqs[1] != NO_IRQ) {
451 snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
452 spu->number);
453 ret = request_irq(spu->irqs[1], spu_irq_class_1,
454 IRQF_DISABLED,
455 spu->irq_c1, spu);
456 if (ret)
457 goto bail1;
459 if (spu->irqs[2] != NO_IRQ) {
460 snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
461 spu->number);
462 ret = request_irq(spu->irqs[2], spu_irq_class_2,
463 IRQF_DISABLED,
464 spu->irq_c2, spu);
465 if (ret)
466 goto bail2;
468 return 0;
470 bail2:
471 if (spu->irqs[1] != NO_IRQ)
472 free_irq(spu->irqs[1], spu);
473 bail1:
474 if (spu->irqs[0] != NO_IRQ)
475 free_irq(spu->irqs[0], spu);
476 bail0:
477 return ret;
480 static void spu_free_irqs(struct spu *spu)
482 if (spu->irqs[0] != NO_IRQ)
483 free_irq(spu->irqs[0], spu);
484 if (spu->irqs[1] != NO_IRQ)
485 free_irq(spu->irqs[1], spu);
486 if (spu->irqs[2] != NO_IRQ)
487 free_irq(spu->irqs[2], spu);
490 void spu_init_channels(struct spu *spu)
492 static const struct {
493 unsigned channel;
494 unsigned count;
495 } zero_list[] = {
496 { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
497 { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
498 }, count_list[] = {
499 { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
500 { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
501 { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
503 struct spu_priv2 __iomem *priv2;
504 int i;
506 priv2 = spu->priv2;
508 /* initialize all channel data to zero */
509 for (i = 0; i < ARRAY_SIZE(zero_list); i++) {
510 int count;
512 out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel);
513 for (count = 0; count < zero_list[i].count; count++)
514 out_be64(&priv2->spu_chnldata_RW, 0);
517 /* initialize channel counts to meaningful values */
518 for (i = 0; i < ARRAY_SIZE(count_list); i++) {
519 out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel);
520 out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count);
523 EXPORT_SYMBOL_GPL(spu_init_channels);
525 static struct sysdev_class spu_sysdev_class = {
526 .name = "spu",
529 int spu_add_sysdev_attr(struct sysdev_attribute *attr)
531 struct spu *spu;
533 mutex_lock(&spu_full_list_mutex);
534 list_for_each_entry(spu, &spu_full_list, full_list)
535 sysdev_create_file(&spu->sysdev, attr);
536 mutex_unlock(&spu_full_list_mutex);
538 return 0;
540 EXPORT_SYMBOL_GPL(spu_add_sysdev_attr);
542 int spu_add_sysdev_attr_group(struct attribute_group *attrs)
544 struct spu *spu;
545 int rc = 0;
547 mutex_lock(&spu_full_list_mutex);
548 list_for_each_entry(spu, &spu_full_list, full_list) {
549 rc = sysfs_create_group(&spu->sysdev.kobj, attrs);
551 /* we're in trouble here, but try unwinding anyway */
552 if (rc) {
553 printk(KERN_ERR "%s: can't create sysfs group '%s'\n",
554 __func__, attrs->name);
556 list_for_each_entry_continue_reverse(spu,
557 &spu_full_list, full_list)
558 sysfs_remove_group(&spu->sysdev.kobj, attrs);
559 break;
563 mutex_unlock(&spu_full_list_mutex);
565 return rc;
567 EXPORT_SYMBOL_GPL(spu_add_sysdev_attr_group);
570 void spu_remove_sysdev_attr(struct sysdev_attribute *attr)
572 struct spu *spu;
574 mutex_lock(&spu_full_list_mutex);
575 list_for_each_entry(spu, &spu_full_list, full_list)
576 sysdev_remove_file(&spu->sysdev, attr);
577 mutex_unlock(&spu_full_list_mutex);
579 EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr);
581 void spu_remove_sysdev_attr_group(struct attribute_group *attrs)
583 struct spu *spu;
585 mutex_lock(&spu_full_list_mutex);
586 list_for_each_entry(spu, &spu_full_list, full_list)
587 sysfs_remove_group(&spu->sysdev.kobj, attrs);
588 mutex_unlock(&spu_full_list_mutex);
590 EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr_group);
592 static int spu_create_sysdev(struct spu *spu)
594 int ret;
596 spu->sysdev.id = spu->number;
597 spu->sysdev.cls = &spu_sysdev_class;
598 ret = sysdev_register(&spu->sysdev);
599 if (ret) {
600 printk(KERN_ERR "Can't register SPU %d with sysfs\n",
601 spu->number);
602 return ret;
605 sysfs_add_device_to_node(&spu->sysdev, spu->node);
607 return 0;
610 static int __init create_spu(void *data)
612 struct spu *spu;
613 int ret;
614 static int number;
615 unsigned long flags;
616 struct timespec ts;
618 ret = -ENOMEM;
619 spu = kzalloc(sizeof (*spu), GFP_KERNEL);
620 if (!spu)
621 goto out;
623 spu->alloc_state = SPU_FREE;
625 spin_lock_init(&spu->register_lock);
626 spin_lock(&spu_lock);
627 spu->number = number++;
628 spin_unlock(&spu_lock);
630 ret = spu_create_spu(spu, data);
632 if (ret)
633 goto out_free;
635 spu_mfc_sdr_setup(spu);
636 spu_mfc_sr1_set(spu, 0x33);
637 ret = spu_request_irqs(spu);
638 if (ret)
639 goto out_destroy;
641 ret = spu_create_sysdev(spu);
642 if (ret)
643 goto out_free_irqs;
645 mutex_lock(&cbe_spu_info[spu->node].list_mutex);
646 list_add(&spu->cbe_list, &cbe_spu_info[spu->node].spus);
647 cbe_spu_info[spu->node].n_spus++;
648 mutex_unlock(&cbe_spu_info[spu->node].list_mutex);
650 mutex_lock(&spu_full_list_mutex);
651 spin_lock_irqsave(&spu_full_list_lock, flags);
652 list_add(&spu->full_list, &spu_full_list);
653 spin_unlock_irqrestore(&spu_full_list_lock, flags);
654 mutex_unlock(&spu_full_list_mutex);
656 spu->stats.util_state = SPU_UTIL_IDLE_LOADED;
657 ktime_get_ts(&ts);
658 spu->stats.tstamp = timespec_to_ns(&ts);
660 INIT_LIST_HEAD(&spu->aff_list);
662 goto out;
664 out_free_irqs:
665 spu_free_irqs(spu);
666 out_destroy:
667 spu_destroy_spu(spu);
668 out_free:
669 kfree(spu);
670 out:
671 return ret;
674 static const char *spu_state_names[] = {
675 "user", "system", "iowait", "idle"
678 static unsigned long long spu_acct_time(struct spu *spu,
679 enum spu_utilization_state state)
681 struct timespec ts;
682 unsigned long long time = spu->stats.times[state];
685 * If the spu is idle or the context is stopped, utilization
686 * statistics are not updated. Apply the time delta from the
687 * last recorded state of the spu.
689 if (spu->stats.util_state == state) {
690 ktime_get_ts(&ts);
691 time += timespec_to_ns(&ts) - spu->stats.tstamp;
694 return time / NSEC_PER_MSEC;
698 static ssize_t spu_stat_show(struct sys_device *sysdev,
699 struct sysdev_attribute *attr, char *buf)
701 struct spu *spu = container_of(sysdev, struct spu, sysdev);
703 return sprintf(buf, "%s %llu %llu %llu %llu "
704 "%llu %llu %llu %llu %llu %llu %llu %llu\n",
705 spu_state_names[spu->stats.util_state],
706 spu_acct_time(spu, SPU_UTIL_USER),
707 spu_acct_time(spu, SPU_UTIL_SYSTEM),
708 spu_acct_time(spu, SPU_UTIL_IOWAIT),
709 spu_acct_time(spu, SPU_UTIL_IDLE_LOADED),
710 spu->stats.vol_ctx_switch,
711 spu->stats.invol_ctx_switch,
712 spu->stats.slb_flt,
713 spu->stats.hash_flt,
714 spu->stats.min_flt,
715 spu->stats.maj_flt,
716 spu->stats.class2_intr,
717 spu->stats.libassist);
720 static SYSDEV_ATTR(stat, 0644, spu_stat_show, NULL);
722 #ifdef CONFIG_KEXEC
724 struct crash_spu_info {
725 struct spu *spu;
726 u32 saved_spu_runcntl_RW;
727 u32 saved_spu_status_R;
728 u32 saved_spu_npc_RW;
729 u64 saved_mfc_sr1_RW;
730 u64 saved_mfc_dar;
731 u64 saved_mfc_dsisr;
734 #define CRASH_NUM_SPUS 16 /* Enough for current hardware */
735 static struct crash_spu_info crash_spu_info[CRASH_NUM_SPUS];
737 static void crash_kexec_stop_spus(void)
739 struct spu *spu;
740 int i;
741 u64 tmp;
743 for (i = 0; i < CRASH_NUM_SPUS; i++) {
744 if (!crash_spu_info[i].spu)
745 continue;
747 spu = crash_spu_info[i].spu;
749 crash_spu_info[i].saved_spu_runcntl_RW =
750 in_be32(&spu->problem->spu_runcntl_RW);
751 crash_spu_info[i].saved_spu_status_R =
752 in_be32(&spu->problem->spu_status_R);
753 crash_spu_info[i].saved_spu_npc_RW =
754 in_be32(&spu->problem->spu_npc_RW);
756 crash_spu_info[i].saved_mfc_dar = spu_mfc_dar_get(spu);
757 crash_spu_info[i].saved_mfc_dsisr = spu_mfc_dsisr_get(spu);
758 tmp = spu_mfc_sr1_get(spu);
759 crash_spu_info[i].saved_mfc_sr1_RW = tmp;
761 tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
762 spu_mfc_sr1_set(spu, tmp);
764 __delay(200);
768 static void crash_register_spus(struct list_head *list)
770 struct spu *spu;
771 int ret;
773 list_for_each_entry(spu, list, full_list) {
774 if (WARN_ON(spu->number >= CRASH_NUM_SPUS))
775 continue;
777 crash_spu_info[spu->number].spu = spu;
780 ret = crash_shutdown_register(&crash_kexec_stop_spus);
781 if (ret)
782 printk(KERN_ERR "Could not register SPU crash handler");
785 #else
786 static inline void crash_register_spus(struct list_head *list)
789 #endif
791 static void spu_shutdown(void)
793 struct spu *spu;
795 mutex_lock(&spu_full_list_mutex);
796 list_for_each_entry(spu, &spu_full_list, full_list) {
797 spu_free_irqs(spu);
798 spu_destroy_spu(spu);
800 mutex_unlock(&spu_full_list_mutex);
803 static struct syscore_ops spu_syscore_ops = {
804 .shutdown = spu_shutdown,
807 static int __init init_spu_base(void)
809 int i, ret = 0;
811 for (i = 0; i < MAX_NUMNODES; i++) {
812 mutex_init(&cbe_spu_info[i].list_mutex);
813 INIT_LIST_HEAD(&cbe_spu_info[i].spus);
816 if (!spu_management_ops)
817 goto out;
819 /* create sysdev class for spus */
820 ret = sysdev_class_register(&spu_sysdev_class);
821 if (ret)
822 goto out;
824 ret = spu_enumerate_spus(create_spu);
826 if (ret < 0) {
827 printk(KERN_WARNING "%s: Error initializing spus\n",
828 __func__);
829 goto out_unregister_sysdev_class;
832 if (ret > 0)
833 fb_append_extra_logo(&logo_spe_clut224, ret);
835 mutex_lock(&spu_full_list_mutex);
836 xmon_register_spus(&spu_full_list);
837 crash_register_spus(&spu_full_list);
838 mutex_unlock(&spu_full_list_mutex);
839 spu_add_sysdev_attr(&attr_stat);
840 register_syscore_ops(&spu_syscore_ops);
842 spu_init_affinity();
844 return 0;
846 out_unregister_sysdev_class:
847 sysdev_class_unregister(&spu_sysdev_class);
848 out:
849 return ret;
851 module_init(init_spu_base);
853 MODULE_LICENSE("GPL");
854 MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");