2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <trace/events/kvm.h>
49 #define CREATE_TRACE_POINTS
52 #include <asm/debugreg.h>
59 #include <asm/pvclock.h>
60 #include <asm/div64.h>
62 #define MAX_IO_MSRS 256
63 #define KVM_MAX_MCE_BANKS 32
64 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
66 #define emul_to_vcpu(ctxt) \
67 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
70 * - enable syscall per default because its emulated by KVM
71 * - enable LME and LMA per default on 64 bit KVM
75 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
77 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
83 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
85 struct kvm_cpuid_entry2 __user
*entries
);
87 struct kvm_x86_ops
*kvm_x86_ops
;
88 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
91 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
93 bool kvm_has_tsc_control
;
94 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
95 u32 kvm_max_guest_tsc_khz
;
96 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
98 #define KVM_NR_SHARED_MSRS 16
100 struct kvm_shared_msrs_global
{
102 u32 msrs
[KVM_NR_SHARED_MSRS
];
105 struct kvm_shared_msrs
{
106 struct user_return_notifier urn
;
108 struct kvm_shared_msr_values
{
111 } values
[KVM_NR_SHARED_MSRS
];
114 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
115 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
117 struct kvm_stats_debugfs_item debugfs_entries
[] = {
118 { "pf_fixed", VCPU_STAT(pf_fixed
) },
119 { "pf_guest", VCPU_STAT(pf_guest
) },
120 { "tlb_flush", VCPU_STAT(tlb_flush
) },
121 { "invlpg", VCPU_STAT(invlpg
) },
122 { "exits", VCPU_STAT(exits
) },
123 { "io_exits", VCPU_STAT(io_exits
) },
124 { "mmio_exits", VCPU_STAT(mmio_exits
) },
125 { "signal_exits", VCPU_STAT(signal_exits
) },
126 { "irq_window", VCPU_STAT(irq_window_exits
) },
127 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
128 { "halt_exits", VCPU_STAT(halt_exits
) },
129 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
130 { "hypercalls", VCPU_STAT(hypercalls
) },
131 { "request_irq", VCPU_STAT(request_irq_exits
) },
132 { "irq_exits", VCPU_STAT(irq_exits
) },
133 { "host_state_reload", VCPU_STAT(host_state_reload
) },
134 { "efer_reload", VCPU_STAT(efer_reload
) },
135 { "fpu_reload", VCPU_STAT(fpu_reload
) },
136 { "insn_emulation", VCPU_STAT(insn_emulation
) },
137 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
138 { "irq_injections", VCPU_STAT(irq_injections
) },
139 { "nmi_injections", VCPU_STAT(nmi_injections
) },
140 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
141 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
142 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
143 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
144 { "mmu_flooded", VM_STAT(mmu_flooded
) },
145 { "mmu_recycled", VM_STAT(mmu_recycled
) },
146 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
147 { "mmu_unsync", VM_STAT(mmu_unsync
) },
148 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
149 { "largepages", VM_STAT(lpages
) },
153 u64 __read_mostly host_xcr0
;
155 int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
157 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
160 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
161 vcpu
->arch
.apf
.gfns
[i
] = ~0;
164 static void kvm_on_user_return(struct user_return_notifier
*urn
)
167 struct kvm_shared_msrs
*locals
168 = container_of(urn
, struct kvm_shared_msrs
, urn
);
169 struct kvm_shared_msr_values
*values
;
171 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
172 values
= &locals
->values
[slot
];
173 if (values
->host
!= values
->curr
) {
174 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
175 values
->curr
= values
->host
;
178 locals
->registered
= false;
179 user_return_notifier_unregister(urn
);
182 static void shared_msr_update(unsigned slot
, u32 msr
)
184 struct kvm_shared_msrs
*smsr
;
187 smsr
= &__get_cpu_var(shared_msrs
);
188 /* only read, and nobody should modify it at this time,
189 * so don't need lock */
190 if (slot
>= shared_msrs_global
.nr
) {
191 printk(KERN_ERR
"kvm: invalid MSR slot!");
194 rdmsrl_safe(msr
, &value
);
195 smsr
->values
[slot
].host
= value
;
196 smsr
->values
[slot
].curr
= value
;
199 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
201 if (slot
>= shared_msrs_global
.nr
)
202 shared_msrs_global
.nr
= slot
+ 1;
203 shared_msrs_global
.msrs
[slot
] = msr
;
204 /* we need ensured the shared_msr_global have been updated */
207 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
209 static void kvm_shared_msr_cpu_online(void)
213 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
214 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
217 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
219 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
221 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
223 smsr
->values
[slot
].curr
= value
;
224 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
225 if (!smsr
->registered
) {
226 smsr
->urn
.on_user_return
= kvm_on_user_return
;
227 user_return_notifier_register(&smsr
->urn
);
228 smsr
->registered
= true;
231 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
233 static void drop_user_return_notifiers(void *ignore
)
235 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
237 if (smsr
->registered
)
238 kvm_on_user_return(&smsr
->urn
);
241 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
243 if (irqchip_in_kernel(vcpu
->kvm
))
244 return vcpu
->arch
.apic_base
;
246 return vcpu
->arch
.apic_base
;
248 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
250 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
252 /* TODO: reserve bits check */
253 if (irqchip_in_kernel(vcpu
->kvm
))
254 kvm_lapic_set_base(vcpu
, data
);
256 vcpu
->arch
.apic_base
= data
;
258 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
260 #define EXCPT_BENIGN 0
261 #define EXCPT_CONTRIBUTORY 1
264 static int exception_class(int vector
)
274 return EXCPT_CONTRIBUTORY
;
281 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
282 unsigned nr
, bool has_error
, u32 error_code
,
288 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
290 if (!vcpu
->arch
.exception
.pending
) {
292 vcpu
->arch
.exception
.pending
= true;
293 vcpu
->arch
.exception
.has_error_code
= has_error
;
294 vcpu
->arch
.exception
.nr
= nr
;
295 vcpu
->arch
.exception
.error_code
= error_code
;
296 vcpu
->arch
.exception
.reinject
= reinject
;
300 /* to check exception */
301 prev_nr
= vcpu
->arch
.exception
.nr
;
302 if (prev_nr
== DF_VECTOR
) {
303 /* triple fault -> shutdown */
304 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
307 class1
= exception_class(prev_nr
);
308 class2
= exception_class(nr
);
309 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
310 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
311 /* generate double fault per SDM Table 5-5 */
312 vcpu
->arch
.exception
.pending
= true;
313 vcpu
->arch
.exception
.has_error_code
= true;
314 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
315 vcpu
->arch
.exception
.error_code
= 0;
317 /* replace previous exception with a new one in a hope
318 that instruction re-execution will regenerate lost
323 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
325 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
327 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
329 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
331 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
333 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
335 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
338 kvm_inject_gp(vcpu
, 0);
340 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
342 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
344 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
346 ++vcpu
->stat
.pf_guest
;
347 vcpu
->arch
.cr2
= fault
->address
;
348 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
351 void kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
353 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
354 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
356 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
359 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
361 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
362 vcpu
->arch
.nmi_pending
= 1;
364 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
366 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
368 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
370 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
372 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
374 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
376 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
379 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
380 * a #GP and return false.
382 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
384 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
386 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
389 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
392 * This function will be used to read from the physical memory of the currently
393 * running guest. The difference to kvm_read_guest_page is that this function
394 * can read from guest physical or from the guest's guest physical memory.
396 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
397 gfn_t ngfn
, void *data
, int offset
, int len
,
403 ngpa
= gfn_to_gpa(ngfn
);
404 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
405 if (real_gfn
== UNMAPPED_GVA
)
408 real_gfn
= gpa_to_gfn(real_gfn
);
410 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
412 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
414 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
415 void *data
, int offset
, int len
, u32 access
)
417 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
418 data
, offset
, len
, access
);
422 * Load the pae pdptrs. Return true is they are all valid.
424 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
426 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
427 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
430 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
432 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
433 offset
* sizeof(u64
), sizeof(pdpte
),
434 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
439 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
440 if (is_present_gpte(pdpte
[i
]) &&
441 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
448 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
449 __set_bit(VCPU_EXREG_PDPTR
,
450 (unsigned long *)&vcpu
->arch
.regs_avail
);
451 __set_bit(VCPU_EXREG_PDPTR
,
452 (unsigned long *)&vcpu
->arch
.regs_dirty
);
457 EXPORT_SYMBOL_GPL(load_pdptrs
);
459 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
461 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
467 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
470 if (!test_bit(VCPU_EXREG_PDPTR
,
471 (unsigned long *)&vcpu
->arch
.regs_avail
))
474 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
475 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
476 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
477 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
480 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
486 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
488 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
489 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
490 X86_CR0_CD
| X86_CR0_NW
;
495 if (cr0
& 0xffffffff00000000UL
)
499 cr0
&= ~CR0_RESERVED_BITS
;
501 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
504 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
507 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
509 if ((vcpu
->arch
.efer
& EFER_LME
)) {
514 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
519 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
524 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
526 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
527 kvm_clear_async_pf_completion_queue(vcpu
);
528 kvm_async_pf_hash_reset(vcpu
);
531 if ((cr0
^ old_cr0
) & update_bits
)
532 kvm_mmu_reset_context(vcpu
);
535 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
537 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
539 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
541 EXPORT_SYMBOL_GPL(kvm_lmsw
);
543 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
547 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
548 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
551 if (kvm_x86_ops
->get_cpl(vcpu
) != 0)
553 if (!(xcr0
& XSTATE_FP
))
555 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
557 if (xcr0
& ~host_xcr0
)
559 vcpu
->arch
.xcr0
= xcr0
;
560 vcpu
->guest_xcr0_loaded
= 0;
564 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
566 if (__kvm_set_xcr(vcpu
, index
, xcr
)) {
567 kvm_inject_gp(vcpu
, 0);
572 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
574 static bool guest_cpuid_has_xsave(struct kvm_vcpu
*vcpu
)
576 struct kvm_cpuid_entry2
*best
;
578 best
= kvm_find_cpuid_entry(vcpu
, 1, 0);
579 return best
&& (best
->ecx
& bit(X86_FEATURE_XSAVE
));
582 static void update_cpuid(struct kvm_vcpu
*vcpu
)
584 struct kvm_cpuid_entry2
*best
;
586 best
= kvm_find_cpuid_entry(vcpu
, 1, 0);
590 /* Update OSXSAVE bit */
591 if (cpu_has_xsave
&& best
->function
== 0x1) {
592 best
->ecx
&= ~(bit(X86_FEATURE_OSXSAVE
));
593 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
))
594 best
->ecx
|= bit(X86_FEATURE_OSXSAVE
);
598 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
600 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
601 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
603 if (cr4
& CR4_RESERVED_BITS
)
606 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
609 if (is_long_mode(vcpu
)) {
610 if (!(cr4
& X86_CR4_PAE
))
612 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
613 && ((cr4
^ old_cr4
) & pdptr_bits
)
614 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
618 if (cr4
& X86_CR4_VMXE
)
621 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
623 if ((cr4
^ old_cr4
) & pdptr_bits
)
624 kvm_mmu_reset_context(vcpu
);
626 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
631 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
633 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
635 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
636 kvm_mmu_sync_roots(vcpu
);
637 kvm_mmu_flush_tlb(vcpu
);
641 if (is_long_mode(vcpu
)) {
642 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
646 if (cr3
& CR3_PAE_RESERVED_BITS
)
648 if (is_paging(vcpu
) &&
649 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
653 * We don't check reserved bits in nonpae mode, because
654 * this isn't enforced, and VMware depends on this.
659 * Does the new cr3 value map to physical memory? (Note, we
660 * catch an invalid cr3 even in real-mode, because it would
661 * cause trouble later on when we turn on paging anyway.)
663 * A real CPU would silently accept an invalid cr3 and would
664 * attempt to use it - with largely undefined (and often hard
665 * to debug) behavior on the guest side.
667 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
669 vcpu
->arch
.cr3
= cr3
;
670 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
671 vcpu
->arch
.mmu
.new_cr3(vcpu
);
674 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
676 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
678 if (cr8
& CR8_RESERVED_BITS
)
680 if (irqchip_in_kernel(vcpu
->kvm
))
681 kvm_lapic_set_tpr(vcpu
, cr8
);
683 vcpu
->arch
.cr8
= cr8
;
686 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
688 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
690 if (irqchip_in_kernel(vcpu
->kvm
))
691 return kvm_lapic_get_cr8(vcpu
);
693 return vcpu
->arch
.cr8
;
695 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
697 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
701 vcpu
->arch
.db
[dr
] = val
;
702 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
703 vcpu
->arch
.eff_db
[dr
] = val
;
706 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
710 if (val
& 0xffffffff00000000ULL
)
712 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
715 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
719 if (val
& 0xffffffff00000000ULL
)
721 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
722 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
723 kvm_x86_ops
->set_dr7(vcpu
, vcpu
->arch
.dr7
);
724 vcpu
->arch
.switch_db_regs
= (val
& DR7_BP_EN_MASK
);
732 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
736 res
= __kvm_set_dr(vcpu
, dr
, val
);
738 kvm_queue_exception(vcpu
, UD_VECTOR
);
740 kvm_inject_gp(vcpu
, 0);
744 EXPORT_SYMBOL_GPL(kvm_set_dr
);
746 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
750 *val
= vcpu
->arch
.db
[dr
];
753 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
757 *val
= vcpu
->arch
.dr6
;
760 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
764 *val
= vcpu
->arch
.dr7
;
771 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
773 if (_kvm_get_dr(vcpu
, dr
, val
)) {
774 kvm_queue_exception(vcpu
, UD_VECTOR
);
779 EXPORT_SYMBOL_GPL(kvm_get_dr
);
782 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
783 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
785 * This list is modified at module load time to reflect the
786 * capabilities of the host cpu. This capabilities test skips MSRs that are
787 * kvm-specific. Those are put in the beginning of the list.
790 #define KVM_SAVE_MSRS_BEGIN 8
791 static u32 msrs_to_save
[] = {
792 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
793 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
794 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
795 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
,
796 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
799 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
801 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
804 static unsigned num_msrs_to_save
;
806 static u32 emulated_msrs
[] = {
807 MSR_IA32_MISC_ENABLE
,
812 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
814 u64 old_efer
= vcpu
->arch
.efer
;
816 if (efer
& efer_reserved_bits
)
820 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
823 if (efer
& EFER_FFXSR
) {
824 struct kvm_cpuid_entry2
*feat
;
826 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
827 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
831 if (efer
& EFER_SVME
) {
832 struct kvm_cpuid_entry2
*feat
;
834 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
835 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
840 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
842 kvm_x86_ops
->set_efer(vcpu
, efer
);
844 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
846 /* Update reserved bits */
847 if ((efer
^ old_efer
) & EFER_NX
)
848 kvm_mmu_reset_context(vcpu
);
853 void kvm_enable_efer_bits(u64 mask
)
855 efer_reserved_bits
&= ~mask
;
857 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
861 * Writes msr value into into the appropriate "register".
862 * Returns 0 on success, non-0 otherwise.
863 * Assumes vcpu_load() was already called.
865 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
867 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
871 * Adapt set_msr() to msr_io()'s calling convention
873 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
875 return kvm_set_msr(vcpu
, index
, *data
);
878 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
882 struct pvclock_wall_clock wc
;
883 struct timespec boot
;
888 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
893 ++version
; /* first time write, random junk */
897 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
900 * The guest calculates current wall clock time by adding
901 * system time (updated by kvm_guest_time_update below) to the
902 * wall clock specified here. guest system time equals host
903 * system time for us, thus we must fill in host boot time here.
907 wc
.sec
= boot
.tv_sec
;
908 wc
.nsec
= boot
.tv_nsec
;
909 wc
.version
= version
;
911 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
914 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
917 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
919 uint32_t quotient
, remainder
;
921 /* Don't try to replace with do_div(), this one calculates
922 * "(dividend << 32) / divisor" */
924 : "=a" (quotient
), "=d" (remainder
)
925 : "0" (0), "1" (dividend
), "r" (divisor
) );
929 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
930 s8
*pshift
, u32
*pmultiplier
)
937 tps64
= base_khz
* 1000LL;
938 scaled64
= scaled_khz
* 1000LL;
939 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
944 tps32
= (uint32_t)tps64
;
945 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
946 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
954 *pmultiplier
= div_frac(scaled64
, tps32
);
956 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
957 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
960 static inline u64
get_kernel_ns(void)
964 WARN_ON(preemptible());
966 monotonic_to_bootbased(&ts
);
967 return timespec_to_ns(&ts
);
970 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
971 unsigned long max_tsc_khz
;
973 static inline int kvm_tsc_changes_freq(void)
976 int ret
= !boot_cpu_has(X86_FEATURE_CONSTANT_TSC
) &&
977 cpufreq_quick_get(cpu
) != 0;
982 static u64
vcpu_tsc_khz(struct kvm_vcpu
*vcpu
)
984 if (vcpu
->arch
.virtual_tsc_khz
)
985 return vcpu
->arch
.virtual_tsc_khz
;
987 return __this_cpu_read(cpu_tsc_khz
);
990 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
994 WARN_ON(preemptible());
995 if (kvm_tsc_changes_freq())
996 printk_once(KERN_WARNING
997 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
998 ret
= nsec
* vcpu_tsc_khz(vcpu
);
999 do_div(ret
, USEC_PER_SEC
);
1003 static void kvm_init_tsc_catchup(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1005 /* Compute a scale to convert nanoseconds in TSC cycles */
1006 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1007 &vcpu
->arch
.tsc_catchup_shift
,
1008 &vcpu
->arch
.tsc_catchup_mult
);
1011 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1013 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.last_tsc_nsec
,
1014 vcpu
->arch
.tsc_catchup_mult
,
1015 vcpu
->arch
.tsc_catchup_shift
);
1016 tsc
+= vcpu
->arch
.last_tsc_write
;
1020 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
1022 struct kvm
*kvm
= vcpu
->kvm
;
1023 u64 offset
, ns
, elapsed
;
1024 unsigned long flags
;
1027 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1028 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1029 ns
= get_kernel_ns();
1030 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1031 sdiff
= data
- kvm
->arch
.last_tsc_write
;
1036 * Special case: close write to TSC within 5 seconds of
1037 * another CPU is interpreted as an attempt to synchronize
1038 * The 5 seconds is to accommodate host load / swapping as
1039 * well as any reset of TSC during the boot process.
1041 * In that case, for a reliable TSC, we can match TSC offsets,
1042 * or make a best guest using elapsed value.
1044 if (sdiff
< nsec_to_cycles(vcpu
, 5ULL * NSEC_PER_SEC
) &&
1045 elapsed
< 5ULL * NSEC_PER_SEC
) {
1046 if (!check_tsc_unstable()) {
1047 offset
= kvm
->arch
.last_tsc_offset
;
1048 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1050 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1052 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1054 ns
= kvm
->arch
.last_tsc_nsec
;
1056 kvm
->arch
.last_tsc_nsec
= ns
;
1057 kvm
->arch
.last_tsc_write
= data
;
1058 kvm
->arch
.last_tsc_offset
= offset
;
1059 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1060 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1062 /* Reset of TSC must disable overshoot protection below */
1063 vcpu
->arch
.hv_clock
.tsc_timestamp
= 0;
1064 vcpu
->arch
.last_tsc_write
= data
;
1065 vcpu
->arch
.last_tsc_nsec
= ns
;
1067 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1069 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1071 unsigned long flags
;
1072 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1074 unsigned long this_tsc_khz
;
1075 s64 kernel_ns
, max_kernel_ns
;
1078 /* Keep irq disabled to prevent changes to the clock */
1079 local_irq_save(flags
);
1080 kvm_get_msr(v
, MSR_IA32_TSC
, &tsc_timestamp
);
1081 kernel_ns
= get_kernel_ns();
1082 this_tsc_khz
= vcpu_tsc_khz(v
);
1083 if (unlikely(this_tsc_khz
== 0)) {
1084 local_irq_restore(flags
);
1085 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1090 * We may have to catch up the TSC to match elapsed wall clock
1091 * time for two reasons, even if kvmclock is used.
1092 * 1) CPU could have been running below the maximum TSC rate
1093 * 2) Broken TSC compensation resets the base at each VCPU
1094 * entry to avoid unknown leaps of TSC even when running
1095 * again on the same CPU. This may cause apparent elapsed
1096 * time to disappear, and the guest to stand still or run
1099 if (vcpu
->tsc_catchup
) {
1100 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1101 if (tsc
> tsc_timestamp
) {
1102 kvm_x86_ops
->adjust_tsc_offset(v
, tsc
- tsc_timestamp
);
1103 tsc_timestamp
= tsc
;
1107 local_irq_restore(flags
);
1109 if (!vcpu
->time_page
)
1113 * Time as measured by the TSC may go backwards when resetting the base
1114 * tsc_timestamp. The reason for this is that the TSC resolution is
1115 * higher than the resolution of the other clock scales. Thus, many
1116 * possible measurments of the TSC correspond to one measurement of any
1117 * other clock, and so a spread of values is possible. This is not a
1118 * problem for the computation of the nanosecond clock; with TSC rates
1119 * around 1GHZ, there can only be a few cycles which correspond to one
1120 * nanosecond value, and any path through this code will inevitably
1121 * take longer than that. However, with the kernel_ns value itself,
1122 * the precision may be much lower, down to HZ granularity. If the
1123 * first sampling of TSC against kernel_ns ends in the low part of the
1124 * range, and the second in the high end of the range, we can get:
1126 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1128 * As the sampling errors potentially range in the thousands of cycles,
1129 * it is possible such a time value has already been observed by the
1130 * guest. To protect against this, we must compute the system time as
1131 * observed by the guest and ensure the new system time is greater.
1134 if (vcpu
->hv_clock
.tsc_timestamp
&& vcpu
->last_guest_tsc
) {
1135 max_kernel_ns
= vcpu
->last_guest_tsc
-
1136 vcpu
->hv_clock
.tsc_timestamp
;
1137 max_kernel_ns
= pvclock_scale_delta(max_kernel_ns
,
1138 vcpu
->hv_clock
.tsc_to_system_mul
,
1139 vcpu
->hv_clock
.tsc_shift
);
1140 max_kernel_ns
+= vcpu
->last_kernel_ns
;
1143 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1144 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1145 &vcpu
->hv_clock
.tsc_shift
,
1146 &vcpu
->hv_clock
.tsc_to_system_mul
);
1147 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1150 if (max_kernel_ns
> kernel_ns
)
1151 kernel_ns
= max_kernel_ns
;
1153 /* With all the info we got, fill in the values */
1154 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1155 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1156 vcpu
->last_kernel_ns
= kernel_ns
;
1157 vcpu
->last_guest_tsc
= tsc_timestamp
;
1158 vcpu
->hv_clock
.flags
= 0;
1161 * The interface expects us to write an even number signaling that the
1162 * update is finished. Since the guest won't see the intermediate
1163 * state, we just increase by 2 at the end.
1165 vcpu
->hv_clock
.version
+= 2;
1167 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
1169 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
1170 sizeof(vcpu
->hv_clock
));
1172 kunmap_atomic(shared_kaddr
, KM_USER0
);
1174 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
1178 static bool msr_mtrr_valid(unsigned msr
)
1181 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1182 case MSR_MTRRfix64K_00000
:
1183 case MSR_MTRRfix16K_80000
:
1184 case MSR_MTRRfix16K_A0000
:
1185 case MSR_MTRRfix4K_C0000
:
1186 case MSR_MTRRfix4K_C8000
:
1187 case MSR_MTRRfix4K_D0000
:
1188 case MSR_MTRRfix4K_D8000
:
1189 case MSR_MTRRfix4K_E0000
:
1190 case MSR_MTRRfix4K_E8000
:
1191 case MSR_MTRRfix4K_F0000
:
1192 case MSR_MTRRfix4K_F8000
:
1193 case MSR_MTRRdefType
:
1194 case MSR_IA32_CR_PAT
:
1202 static bool valid_pat_type(unsigned t
)
1204 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1207 static bool valid_mtrr_type(unsigned t
)
1209 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1212 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1216 if (!msr_mtrr_valid(msr
))
1219 if (msr
== MSR_IA32_CR_PAT
) {
1220 for (i
= 0; i
< 8; i
++)
1221 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1224 } else if (msr
== MSR_MTRRdefType
) {
1227 return valid_mtrr_type(data
& 0xff);
1228 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1229 for (i
= 0; i
< 8 ; i
++)
1230 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1235 /* variable MTRRs */
1236 return valid_mtrr_type(data
& 0xff);
1239 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1241 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1243 if (!mtrr_valid(vcpu
, msr
, data
))
1246 if (msr
== MSR_MTRRdefType
) {
1247 vcpu
->arch
.mtrr_state
.def_type
= data
;
1248 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1249 } else if (msr
== MSR_MTRRfix64K_00000
)
1251 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1252 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1253 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1254 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1255 else if (msr
== MSR_IA32_CR_PAT
)
1256 vcpu
->arch
.pat
= data
;
1257 else { /* Variable MTRRs */
1258 int idx
, is_mtrr_mask
;
1261 idx
= (msr
- 0x200) / 2;
1262 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1265 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1268 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1272 kvm_mmu_reset_context(vcpu
);
1276 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1278 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1279 unsigned bank_num
= mcg_cap
& 0xff;
1282 case MSR_IA32_MCG_STATUS
:
1283 vcpu
->arch
.mcg_status
= data
;
1285 case MSR_IA32_MCG_CTL
:
1286 if (!(mcg_cap
& MCG_CTL_P
))
1288 if (data
!= 0 && data
!= ~(u64
)0)
1290 vcpu
->arch
.mcg_ctl
= data
;
1293 if (msr
>= MSR_IA32_MC0_CTL
&&
1294 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1295 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1296 /* only 0 or all 1s can be written to IA32_MCi_CTL
1297 * some Linux kernels though clear bit 10 in bank 4 to
1298 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1299 * this to avoid an uncatched #GP in the guest
1301 if ((offset
& 0x3) == 0 &&
1302 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1304 vcpu
->arch
.mce_banks
[offset
] = data
;
1312 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1314 struct kvm
*kvm
= vcpu
->kvm
;
1315 int lm
= is_long_mode(vcpu
);
1316 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1317 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1318 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1319 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1320 u32 page_num
= data
& ~PAGE_MASK
;
1321 u64 page_addr
= data
& PAGE_MASK
;
1326 if (page_num
>= blob_size
)
1329 page
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
1333 if (copy_from_user(page
, blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
))
1335 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1344 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1346 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1349 static bool kvm_hv_msr_partition_wide(u32 msr
)
1353 case HV_X64_MSR_GUEST_OS_ID
:
1354 case HV_X64_MSR_HYPERCALL
:
1362 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1364 struct kvm
*kvm
= vcpu
->kvm
;
1367 case HV_X64_MSR_GUEST_OS_ID
:
1368 kvm
->arch
.hv_guest_os_id
= data
;
1369 /* setting guest os id to zero disables hypercall page */
1370 if (!kvm
->arch
.hv_guest_os_id
)
1371 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1373 case HV_X64_MSR_HYPERCALL
: {
1378 /* if guest os id is not set hypercall should remain disabled */
1379 if (!kvm
->arch
.hv_guest_os_id
)
1381 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1382 kvm
->arch
.hv_hypercall
= data
;
1385 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1386 addr
= gfn_to_hva(kvm
, gfn
);
1387 if (kvm_is_error_hva(addr
))
1389 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1390 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1391 if (copy_to_user((void __user
*)addr
, instructions
, 4))
1393 kvm
->arch
.hv_hypercall
= data
;
1397 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1398 "data 0x%llx\n", msr
, data
);
1404 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1407 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1410 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1411 vcpu
->arch
.hv_vapic
= data
;
1414 addr
= gfn_to_hva(vcpu
->kvm
, data
>>
1415 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
);
1416 if (kvm_is_error_hva(addr
))
1418 if (clear_user((void __user
*)addr
, PAGE_SIZE
))
1420 vcpu
->arch
.hv_vapic
= data
;
1423 case HV_X64_MSR_EOI
:
1424 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1425 case HV_X64_MSR_ICR
:
1426 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1427 case HV_X64_MSR_TPR
:
1428 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1430 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1431 "data 0x%llx\n", msr
, data
);
1438 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1440 gpa_t gpa
= data
& ~0x3f;
1442 /* Bits 2:5 are resrved, Should be zero */
1446 vcpu
->arch
.apf
.msr_val
= data
;
1448 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1449 kvm_clear_async_pf_completion_queue(vcpu
);
1450 kvm_async_pf_hash_reset(vcpu
);
1454 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
))
1457 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1458 kvm_async_pf_wakeup_all(vcpu
);
1462 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
1464 if (vcpu
->arch
.time_page
) {
1465 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1466 vcpu
->arch
.time_page
= NULL
;
1470 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1474 return set_efer(vcpu
, data
);
1476 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1477 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1479 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1484 case MSR_FAM10H_MMIO_CONF_BASE
:
1486 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1491 case MSR_AMD64_NB_CFG
:
1493 case MSR_IA32_DEBUGCTLMSR
:
1495 /* We support the non-activated case already */
1497 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1498 /* Values other than LBR and BTF are vendor-specific,
1499 thus reserved and should throw a #GP */
1502 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1505 case MSR_IA32_UCODE_REV
:
1506 case MSR_IA32_UCODE_WRITE
:
1507 case MSR_VM_HSAVE_PA
:
1508 case MSR_AMD64_PATCH_LOADER
:
1510 case 0x200 ... 0x2ff:
1511 return set_msr_mtrr(vcpu
, msr
, data
);
1512 case MSR_IA32_APICBASE
:
1513 kvm_set_apic_base(vcpu
, data
);
1515 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1516 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1517 case MSR_IA32_MISC_ENABLE
:
1518 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1520 case MSR_KVM_WALL_CLOCK_NEW
:
1521 case MSR_KVM_WALL_CLOCK
:
1522 vcpu
->kvm
->arch
.wall_clock
= data
;
1523 kvm_write_wall_clock(vcpu
->kvm
, data
);
1525 case MSR_KVM_SYSTEM_TIME_NEW
:
1526 case MSR_KVM_SYSTEM_TIME
: {
1527 kvmclock_reset(vcpu
);
1529 vcpu
->arch
.time
= data
;
1530 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1532 /* we verify if the enable bit is set... */
1536 /* ...but clean it before doing the actual write */
1537 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1539 vcpu
->arch
.time_page
=
1540 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1542 if (is_error_page(vcpu
->arch
.time_page
)) {
1543 kvm_release_page_clean(vcpu
->arch
.time_page
);
1544 vcpu
->arch
.time_page
= NULL
;
1548 case MSR_KVM_ASYNC_PF_EN
:
1549 if (kvm_pv_enable_async_pf(vcpu
, data
))
1552 case MSR_IA32_MCG_CTL
:
1553 case MSR_IA32_MCG_STATUS
:
1554 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1555 return set_msr_mce(vcpu
, msr
, data
);
1557 /* Performance counters are not protected by a CPUID bit,
1558 * so we should check all of them in the generic path for the sake of
1559 * cross vendor migration.
1560 * Writing a zero into the event select MSRs disables them,
1561 * which we perfectly emulate ;-). Any other value should be at least
1562 * reported, some guests depend on them.
1564 case MSR_P6_EVNTSEL0
:
1565 case MSR_P6_EVNTSEL1
:
1566 case MSR_K7_EVNTSEL0
:
1567 case MSR_K7_EVNTSEL1
:
1568 case MSR_K7_EVNTSEL2
:
1569 case MSR_K7_EVNTSEL3
:
1571 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1572 "0x%x data 0x%llx\n", msr
, data
);
1574 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1575 * so we ignore writes to make it happy.
1577 case MSR_P6_PERFCTR0
:
1578 case MSR_P6_PERFCTR1
:
1579 case MSR_K7_PERFCTR0
:
1580 case MSR_K7_PERFCTR1
:
1581 case MSR_K7_PERFCTR2
:
1582 case MSR_K7_PERFCTR3
:
1583 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1584 "0x%x data 0x%llx\n", msr
, data
);
1586 case MSR_K7_CLK_CTL
:
1588 * Ignore all writes to this no longer documented MSR.
1589 * Writes are only relevant for old K7 processors,
1590 * all pre-dating SVM, but a recommended workaround from
1591 * AMD for these chips. It is possible to speicify the
1592 * affected processor models on the command line, hence
1593 * the need to ignore the workaround.
1596 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1597 if (kvm_hv_msr_partition_wide(msr
)) {
1599 mutex_lock(&vcpu
->kvm
->lock
);
1600 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
1601 mutex_unlock(&vcpu
->kvm
->lock
);
1604 return set_msr_hyperv(vcpu
, msr
, data
);
1606 case MSR_IA32_BBL_CR_CTL3
:
1607 /* Drop writes to this legacy MSR -- see rdmsr
1608 * counterpart for further detail.
1610 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
1613 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1614 return xen_hvm_config(vcpu
, data
);
1616 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1620 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1627 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1631 * Reads an msr value (of 'msr_index') into 'pdata'.
1632 * Returns 0 on success, non-0 otherwise.
1633 * Assumes vcpu_load() was already called.
1635 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1637 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1640 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1642 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1644 if (!msr_mtrr_valid(msr
))
1647 if (msr
== MSR_MTRRdefType
)
1648 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1649 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1650 else if (msr
== MSR_MTRRfix64K_00000
)
1652 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1653 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1654 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1655 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1656 else if (msr
== MSR_IA32_CR_PAT
)
1657 *pdata
= vcpu
->arch
.pat
;
1658 else { /* Variable MTRRs */
1659 int idx
, is_mtrr_mask
;
1662 idx
= (msr
- 0x200) / 2;
1663 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1666 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1669 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1676 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1679 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1680 unsigned bank_num
= mcg_cap
& 0xff;
1683 case MSR_IA32_P5_MC_ADDR
:
1684 case MSR_IA32_P5_MC_TYPE
:
1687 case MSR_IA32_MCG_CAP
:
1688 data
= vcpu
->arch
.mcg_cap
;
1690 case MSR_IA32_MCG_CTL
:
1691 if (!(mcg_cap
& MCG_CTL_P
))
1693 data
= vcpu
->arch
.mcg_ctl
;
1695 case MSR_IA32_MCG_STATUS
:
1696 data
= vcpu
->arch
.mcg_status
;
1699 if (msr
>= MSR_IA32_MC0_CTL
&&
1700 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1701 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1702 data
= vcpu
->arch
.mce_banks
[offset
];
1711 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1714 struct kvm
*kvm
= vcpu
->kvm
;
1717 case HV_X64_MSR_GUEST_OS_ID
:
1718 data
= kvm
->arch
.hv_guest_os_id
;
1720 case HV_X64_MSR_HYPERCALL
:
1721 data
= kvm
->arch
.hv_hypercall
;
1724 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1732 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1737 case HV_X64_MSR_VP_INDEX
: {
1740 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
1745 case HV_X64_MSR_EOI
:
1746 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
1747 case HV_X64_MSR_ICR
:
1748 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
1749 case HV_X64_MSR_TPR
:
1750 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
1752 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1759 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1764 case MSR_IA32_PLATFORM_ID
:
1765 case MSR_IA32_UCODE_REV
:
1766 case MSR_IA32_EBL_CR_POWERON
:
1767 case MSR_IA32_DEBUGCTLMSR
:
1768 case MSR_IA32_LASTBRANCHFROMIP
:
1769 case MSR_IA32_LASTBRANCHTOIP
:
1770 case MSR_IA32_LASTINTFROMIP
:
1771 case MSR_IA32_LASTINTTOIP
:
1774 case MSR_VM_HSAVE_PA
:
1775 case MSR_P6_PERFCTR0
:
1776 case MSR_P6_PERFCTR1
:
1777 case MSR_P6_EVNTSEL0
:
1778 case MSR_P6_EVNTSEL1
:
1779 case MSR_K7_EVNTSEL0
:
1780 case MSR_K7_PERFCTR0
:
1781 case MSR_K8_INT_PENDING_MSG
:
1782 case MSR_AMD64_NB_CFG
:
1783 case MSR_FAM10H_MMIO_CONF_BASE
:
1787 data
= 0x500 | KVM_NR_VAR_MTRR
;
1789 case 0x200 ... 0x2ff:
1790 return get_msr_mtrr(vcpu
, msr
, pdata
);
1791 case 0xcd: /* fsb frequency */
1795 * MSR_EBC_FREQUENCY_ID
1796 * Conservative value valid for even the basic CPU models.
1797 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1798 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1799 * and 266MHz for model 3, or 4. Set Core Clock
1800 * Frequency to System Bus Frequency Ratio to 1 (bits
1801 * 31:24) even though these are only valid for CPU
1802 * models > 2, however guests may end up dividing or
1803 * multiplying by zero otherwise.
1805 case MSR_EBC_FREQUENCY_ID
:
1808 case MSR_IA32_APICBASE
:
1809 data
= kvm_get_apic_base(vcpu
);
1811 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1812 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1814 case MSR_IA32_MISC_ENABLE
:
1815 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1817 case MSR_IA32_PERF_STATUS
:
1818 /* TSC increment by tick */
1820 /* CPU multiplier */
1821 data
|= (((uint64_t)4ULL) << 40);
1824 data
= vcpu
->arch
.efer
;
1826 case MSR_KVM_WALL_CLOCK
:
1827 case MSR_KVM_WALL_CLOCK_NEW
:
1828 data
= vcpu
->kvm
->arch
.wall_clock
;
1830 case MSR_KVM_SYSTEM_TIME
:
1831 case MSR_KVM_SYSTEM_TIME_NEW
:
1832 data
= vcpu
->arch
.time
;
1834 case MSR_KVM_ASYNC_PF_EN
:
1835 data
= vcpu
->arch
.apf
.msr_val
;
1837 case MSR_IA32_P5_MC_ADDR
:
1838 case MSR_IA32_P5_MC_TYPE
:
1839 case MSR_IA32_MCG_CAP
:
1840 case MSR_IA32_MCG_CTL
:
1841 case MSR_IA32_MCG_STATUS
:
1842 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1843 return get_msr_mce(vcpu
, msr
, pdata
);
1844 case MSR_K7_CLK_CTL
:
1846 * Provide expected ramp-up count for K7. All other
1847 * are set to zero, indicating minimum divisors for
1850 * This prevents guest kernels on AMD host with CPU
1851 * type 6, model 8 and higher from exploding due to
1852 * the rdmsr failing.
1856 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1857 if (kvm_hv_msr_partition_wide(msr
)) {
1859 mutex_lock(&vcpu
->kvm
->lock
);
1860 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
1861 mutex_unlock(&vcpu
->kvm
->lock
);
1864 return get_msr_hyperv(vcpu
, msr
, pdata
);
1866 case MSR_IA32_BBL_CR_CTL3
:
1867 /* This legacy MSR exists but isn't fully documented in current
1868 * silicon. It is however accessed by winxp in very narrow
1869 * scenarios where it sets bit #19, itself documented as
1870 * a "reserved" bit. Best effort attempt to source coherent
1871 * read data here should the balance of the register be
1872 * interpreted by the guest:
1874 * L2 cache control register 3: 64GB range, 256KB size,
1875 * enabled, latency 0x1, configured
1881 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1884 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1892 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1895 * Read or write a bunch of msrs. All parameters are kernel addresses.
1897 * @return number of msrs set successfully.
1899 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1900 struct kvm_msr_entry
*entries
,
1901 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1902 unsigned index
, u64
*data
))
1906 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
1907 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1908 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1910 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
1916 * Read or write a bunch of msrs. Parameters are user addresses.
1918 * @return number of msrs set successfully.
1920 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1921 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1922 unsigned index
, u64
*data
),
1925 struct kvm_msrs msrs
;
1926 struct kvm_msr_entry
*entries
;
1931 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1935 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1939 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1940 entries
= kmalloc(size
, GFP_KERNEL
);
1945 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1948 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1953 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1964 int kvm_dev_ioctl_check_extension(long ext
)
1969 case KVM_CAP_IRQCHIP
:
1971 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1972 case KVM_CAP_SET_TSS_ADDR
:
1973 case KVM_CAP_EXT_CPUID
:
1974 case KVM_CAP_CLOCKSOURCE
:
1976 case KVM_CAP_NOP_IO_DELAY
:
1977 case KVM_CAP_MP_STATE
:
1978 case KVM_CAP_SYNC_MMU
:
1979 case KVM_CAP_USER_NMI
:
1980 case KVM_CAP_REINJECT_CONTROL
:
1981 case KVM_CAP_IRQ_INJECT_STATUS
:
1982 case KVM_CAP_ASSIGN_DEV_IRQ
:
1984 case KVM_CAP_IOEVENTFD
:
1986 case KVM_CAP_PIT_STATE2
:
1987 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1988 case KVM_CAP_XEN_HVM
:
1989 case KVM_CAP_ADJUST_CLOCK
:
1990 case KVM_CAP_VCPU_EVENTS
:
1991 case KVM_CAP_HYPERV
:
1992 case KVM_CAP_HYPERV_VAPIC
:
1993 case KVM_CAP_HYPERV_SPIN
:
1994 case KVM_CAP_PCI_SEGMENT
:
1995 case KVM_CAP_DEBUGREGS
:
1996 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
1998 case KVM_CAP_ASYNC_PF
:
1999 case KVM_CAP_GET_TSC_KHZ
:
2002 case KVM_CAP_COALESCED_MMIO
:
2003 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2006 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2008 case KVM_CAP_NR_VCPUS
:
2011 case KVM_CAP_NR_MEMSLOTS
:
2012 r
= KVM_MEMORY_SLOTS
;
2014 case KVM_CAP_PV_MMU
: /* obsolete */
2021 r
= KVM_MAX_MCE_BANKS
;
2026 case KVM_CAP_TSC_CONTROL
:
2027 r
= kvm_has_tsc_control
;
2037 long kvm_arch_dev_ioctl(struct file
*filp
,
2038 unsigned int ioctl
, unsigned long arg
)
2040 void __user
*argp
= (void __user
*)arg
;
2044 case KVM_GET_MSR_INDEX_LIST
: {
2045 struct kvm_msr_list __user
*user_msr_list
= argp
;
2046 struct kvm_msr_list msr_list
;
2050 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2053 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2054 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2057 if (n
< msr_list
.nmsrs
)
2060 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2061 num_msrs_to_save
* sizeof(u32
)))
2063 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2065 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2070 case KVM_GET_SUPPORTED_CPUID
: {
2071 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2072 struct kvm_cpuid2 cpuid
;
2075 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2077 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
2078 cpuid_arg
->entries
);
2083 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2088 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2091 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2093 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2105 static void wbinvd_ipi(void *garbage
)
2110 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2112 return vcpu
->kvm
->arch
.iommu_domain
&&
2113 !(vcpu
->kvm
->arch
.iommu_flags
& KVM_IOMMU_CACHE_COHERENCY
);
2116 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2118 /* Address WBINVD may be executed by guest */
2119 if (need_emulate_wbinvd(vcpu
)) {
2120 if (kvm_x86_ops
->has_wbinvd_exit())
2121 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2122 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2123 smp_call_function_single(vcpu
->cpu
,
2124 wbinvd_ipi
, NULL
, 1);
2127 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2128 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2129 /* Make sure TSC doesn't go backwards */
2133 kvm_get_msr(vcpu
, MSR_IA32_TSC
, &tsc
);
2134 tsc_delta
= !vcpu
->arch
.last_guest_tsc
? 0 :
2135 tsc
- vcpu
->arch
.last_guest_tsc
;
2138 mark_tsc_unstable("KVM discovered backwards TSC");
2139 if (check_tsc_unstable()) {
2140 kvm_x86_ops
->adjust_tsc_offset(vcpu
, -tsc_delta
);
2141 vcpu
->arch
.tsc_catchup
= 1;
2143 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2144 if (vcpu
->cpu
!= cpu
)
2145 kvm_migrate_timers(vcpu
);
2150 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2152 kvm_x86_ops
->vcpu_put(vcpu
);
2153 kvm_put_guest_fpu(vcpu
);
2154 kvm_get_msr(vcpu
, MSR_IA32_TSC
, &vcpu
->arch
.last_guest_tsc
);
2157 static int is_efer_nx(void)
2159 unsigned long long efer
= 0;
2161 rdmsrl_safe(MSR_EFER
, &efer
);
2162 return efer
& EFER_NX
;
2165 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
2168 struct kvm_cpuid_entry2
*e
, *entry
;
2171 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
2172 e
= &vcpu
->arch
.cpuid_entries
[i
];
2173 if (e
->function
== 0x80000001) {
2178 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
2179 entry
->edx
&= ~(1 << 20);
2180 printk(KERN_INFO
"kvm: guest NX capability removed\n");
2184 /* when an old userspace process fills a new kernel module */
2185 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
2186 struct kvm_cpuid
*cpuid
,
2187 struct kvm_cpuid_entry __user
*entries
)
2190 struct kvm_cpuid_entry
*cpuid_entries
;
2193 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2196 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
2200 if (copy_from_user(cpuid_entries
, entries
,
2201 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
2203 for (i
= 0; i
< cpuid
->nent
; i
++) {
2204 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
2205 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
2206 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
2207 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
2208 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
2209 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
2210 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
2211 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
2212 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
2213 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
2215 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
2216 cpuid_fix_nx_cap(vcpu
);
2218 kvm_apic_set_version(vcpu
);
2219 kvm_x86_ops
->cpuid_update(vcpu
);
2223 vfree(cpuid_entries
);
2228 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
2229 struct kvm_cpuid2
*cpuid
,
2230 struct kvm_cpuid_entry2 __user
*entries
)
2235 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2238 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
2239 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
2241 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
2242 kvm_apic_set_version(vcpu
);
2243 kvm_x86_ops
->cpuid_update(vcpu
);
2251 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
2252 struct kvm_cpuid2
*cpuid
,
2253 struct kvm_cpuid_entry2 __user
*entries
)
2258 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
2261 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
2262 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
2267 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
2271 static void cpuid_mask(u32
*word
, int wordnum
)
2273 *word
&= boot_cpu_data
.x86_capability
[wordnum
];
2276 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
2279 entry
->function
= function
;
2280 entry
->index
= index
;
2281 cpuid_count(entry
->function
, entry
->index
,
2282 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
2286 #define F(x) bit(X86_FEATURE_##x)
2288 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
2289 u32 index
, int *nent
, int maxnent
)
2291 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
2292 #ifdef CONFIG_X86_64
2293 unsigned f_gbpages
= (kvm_x86_ops
->get_lpage_level() == PT_PDPE_LEVEL
)
2295 unsigned f_lm
= F(LM
);
2297 unsigned f_gbpages
= 0;
2300 unsigned f_rdtscp
= kvm_x86_ops
->rdtscp_supported() ? F(RDTSCP
) : 0;
2303 const u32 kvm_supported_word0_x86_features
=
2304 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
2305 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
2306 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
2307 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
2308 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
2309 0 /* Reserved, DS, ACPI */ | F(MMX
) |
2310 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
2311 0 /* HTT, TM, Reserved, PBE */;
2312 /* cpuid 0x80000001.edx */
2313 const u32 kvm_supported_word1_x86_features
=
2314 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
2315 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
2316 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
2317 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
2318 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
2319 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
2320 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| f_rdtscp
|
2321 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
2323 const u32 kvm_supported_word4_x86_features
=
2324 F(XMM3
) | F(PCLMULQDQ
) | 0 /* DTES64, MONITOR */ |
2325 0 /* DS-CPL, VMX, SMX, EST */ |
2326 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2327 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
2328 0 /* Reserved, DCA */ | F(XMM4_1
) |
2329 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
2330 0 /* Reserved*/ | F(AES
) | F(XSAVE
) | 0 /* OSXSAVE */ | F(AVX
) |
2332 /* cpuid 0x80000001.ecx */
2333 const u32 kvm_supported_word6_x86_features
=
2334 F(LAHF_LM
) | F(CMP_LEGACY
) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2335 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
2336 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP
) |
2337 0 /* SKINIT, WDT, LWP */ | F(FMA4
) | F(TBM
);
2339 /* cpuid 0xC0000001.edx */
2340 const u32 kvm_supported_word5_x86_features
=
2341 F(XSTORE
) | F(XSTORE_EN
) | F(XCRYPT
) | F(XCRYPT_EN
) |
2342 F(ACE2
) | F(ACE2_EN
) | F(PHE
) | F(PHE_EN
) |
2345 /* all calls to cpuid_count() should be made on the same cpu */
2347 do_cpuid_1_ent(entry
, function
, index
);
2352 entry
->eax
= min(entry
->eax
, (u32
)0xd);
2355 entry
->edx
&= kvm_supported_word0_x86_features
;
2356 cpuid_mask(&entry
->edx
, 0);
2357 entry
->ecx
&= kvm_supported_word4_x86_features
;
2358 cpuid_mask(&entry
->ecx
, 4);
2359 /* we support x2apic emulation even if host does not support
2360 * it since we emulate x2apic in software */
2361 entry
->ecx
|= F(X2APIC
);
2363 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2364 * may return different values. This forces us to get_cpu() before
2365 * issuing the first command, and also to emulate this annoying behavior
2366 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2368 int t
, times
= entry
->eax
& 0xff;
2370 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
2371 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
2372 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
2373 do_cpuid_1_ent(&entry
[t
], function
, 0);
2374 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
2379 /* function 4 and 0xb have additional index. */
2383 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2384 /* read more entries until cache_type is zero */
2385 for (i
= 1; *nent
< maxnent
; ++i
) {
2386 cache_type
= entry
[i
- 1].eax
& 0x1f;
2389 do_cpuid_1_ent(&entry
[i
], function
, i
);
2391 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2399 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2400 /* read more entries until level_type is zero */
2401 for (i
= 1; *nent
< maxnent
; ++i
) {
2402 level_type
= entry
[i
- 1].ecx
& 0xff00;
2405 do_cpuid_1_ent(&entry
[i
], function
, i
);
2407 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2415 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2416 for (i
= 1; *nent
< maxnent
&& i
< 64; ++i
) {
2417 if (entry
[i
].eax
== 0)
2419 do_cpuid_1_ent(&entry
[i
], function
, i
);
2421 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2426 case KVM_CPUID_SIGNATURE
: {
2427 char signature
[12] = "KVMKVMKVM\0\0";
2428 u32
*sigptr
= (u32
*)signature
;
2430 entry
->ebx
= sigptr
[0];
2431 entry
->ecx
= sigptr
[1];
2432 entry
->edx
= sigptr
[2];
2435 case KVM_CPUID_FEATURES
:
2436 entry
->eax
= (1 << KVM_FEATURE_CLOCKSOURCE
) |
2437 (1 << KVM_FEATURE_NOP_IO_DELAY
) |
2438 (1 << KVM_FEATURE_CLOCKSOURCE2
) |
2439 (1 << KVM_FEATURE_ASYNC_PF
) |
2440 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT
);
2446 entry
->eax
= min(entry
->eax
, 0x8000001a);
2449 entry
->edx
&= kvm_supported_word1_x86_features
;
2450 cpuid_mask(&entry
->edx
, 1);
2451 entry
->ecx
&= kvm_supported_word6_x86_features
;
2452 cpuid_mask(&entry
->ecx
, 6);
2454 /*Add support for Centaur's CPUID instruction*/
2456 /*Just support up to 0xC0000004 now*/
2457 entry
->eax
= min(entry
->eax
, 0xC0000004);
2460 entry
->edx
&= kvm_supported_word5_x86_features
;
2461 cpuid_mask(&entry
->edx
, 5);
2466 /*Now nothing to do, reserved for the future*/
2470 kvm_x86_ops
->set_supported_cpuid(function
, entry
);
2477 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
2478 struct kvm_cpuid_entry2 __user
*entries
)
2480 struct kvm_cpuid_entry2
*cpuid_entries
;
2481 int limit
, nent
= 0, r
= -E2BIG
;
2484 if (cpuid
->nent
< 1)
2486 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2487 cpuid
->nent
= KVM_MAX_CPUID_ENTRIES
;
2489 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
2493 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
2494 limit
= cpuid_entries
[0].eax
;
2495 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2496 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2497 &nent
, cpuid
->nent
);
2499 if (nent
>= cpuid
->nent
)
2502 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
2503 limit
= cpuid_entries
[nent
- 1].eax
;
2504 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2505 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2506 &nent
, cpuid
->nent
);
2511 if (nent
>= cpuid
->nent
)
2514 /* Add support for Centaur's CPUID instruction. */
2515 if (boot_cpu_data
.x86_vendor
== X86_VENDOR_CENTAUR
) {
2516 do_cpuid_ent(&cpuid_entries
[nent
], 0xC0000000, 0,
2517 &nent
, cpuid
->nent
);
2520 if (nent
>= cpuid
->nent
)
2523 limit
= cpuid_entries
[nent
- 1].eax
;
2524 for (func
= 0xC0000001;
2525 func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2526 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2527 &nent
, cpuid
->nent
);
2530 if (nent
>= cpuid
->nent
)
2534 do_cpuid_ent(&cpuid_entries
[nent
], KVM_CPUID_SIGNATURE
, 0, &nent
,
2538 if (nent
>= cpuid
->nent
)
2541 do_cpuid_ent(&cpuid_entries
[nent
], KVM_CPUID_FEATURES
, 0, &nent
,
2545 if (nent
>= cpuid
->nent
)
2549 if (copy_to_user(entries
, cpuid_entries
,
2550 nent
* sizeof(struct kvm_cpuid_entry2
)))
2556 vfree(cpuid_entries
);
2561 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2562 struct kvm_lapic_state
*s
)
2564 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2569 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2570 struct kvm_lapic_state
*s
)
2572 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
2573 kvm_apic_post_state_restore(vcpu
);
2574 update_cr8_intercept(vcpu
);
2579 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2580 struct kvm_interrupt
*irq
)
2582 if (irq
->irq
< 0 || irq
->irq
>= 256)
2584 if (irqchip_in_kernel(vcpu
->kvm
))
2587 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2588 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2593 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2595 kvm_inject_nmi(vcpu
);
2600 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2601 struct kvm_tpr_access_ctl
*tac
)
2605 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2609 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2613 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2616 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2618 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2621 vcpu
->arch
.mcg_cap
= mcg_cap
;
2622 /* Init IA32_MCG_CTL to all 1s */
2623 if (mcg_cap
& MCG_CTL_P
)
2624 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2625 /* Init IA32_MCi_CTL to all 1s */
2626 for (bank
= 0; bank
< bank_num
; bank
++)
2627 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2632 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2633 struct kvm_x86_mce
*mce
)
2635 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2636 unsigned bank_num
= mcg_cap
& 0xff;
2637 u64
*banks
= vcpu
->arch
.mce_banks
;
2639 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2642 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2643 * reporting is disabled
2645 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2646 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2648 banks
+= 4 * mce
->bank
;
2650 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2651 * reporting is disabled for the bank
2653 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2655 if (mce
->status
& MCI_STATUS_UC
) {
2656 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2657 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2658 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2661 if (banks
[1] & MCI_STATUS_VAL
)
2662 mce
->status
|= MCI_STATUS_OVER
;
2663 banks
[2] = mce
->addr
;
2664 banks
[3] = mce
->misc
;
2665 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2666 banks
[1] = mce
->status
;
2667 kvm_queue_exception(vcpu
, MC_VECTOR
);
2668 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2669 || !(banks
[1] & MCI_STATUS_UC
)) {
2670 if (banks
[1] & MCI_STATUS_VAL
)
2671 mce
->status
|= MCI_STATUS_OVER
;
2672 banks
[2] = mce
->addr
;
2673 banks
[3] = mce
->misc
;
2674 banks
[1] = mce
->status
;
2676 banks
[1] |= MCI_STATUS_OVER
;
2680 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2681 struct kvm_vcpu_events
*events
)
2683 events
->exception
.injected
=
2684 vcpu
->arch
.exception
.pending
&&
2685 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2686 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2687 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2688 events
->exception
.pad
= 0;
2689 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2691 events
->interrupt
.injected
=
2692 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2693 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2694 events
->interrupt
.soft
= 0;
2695 events
->interrupt
.shadow
=
2696 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2697 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2699 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2700 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
;
2701 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2702 events
->nmi
.pad
= 0;
2704 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
2706 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2707 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2708 | KVM_VCPUEVENT_VALID_SHADOW
);
2709 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2712 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2713 struct kvm_vcpu_events
*events
)
2715 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2716 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2717 | KVM_VCPUEVENT_VALID_SHADOW
))
2720 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2721 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2722 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2723 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2725 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2726 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2727 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2728 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2729 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2730 events
->interrupt
.shadow
);
2732 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2733 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2734 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2735 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2737 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
2738 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
2740 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2745 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2746 struct kvm_debugregs
*dbgregs
)
2748 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2749 dbgregs
->dr6
= vcpu
->arch
.dr6
;
2750 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2752 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
2755 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2756 struct kvm_debugregs
*dbgregs
)
2761 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2762 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2763 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2768 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
2769 struct kvm_xsave
*guest_xsave
)
2772 memcpy(guest_xsave
->region
,
2773 &vcpu
->arch
.guest_fpu
.state
->xsave
,
2776 memcpy(guest_xsave
->region
,
2777 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
2778 sizeof(struct i387_fxsave_struct
));
2779 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
2784 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
2785 struct kvm_xsave
*guest_xsave
)
2788 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
2791 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
2792 guest_xsave
->region
, xstate_size
);
2794 if (xstate_bv
& ~XSTATE_FPSSE
)
2796 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
2797 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
2802 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
2803 struct kvm_xcrs
*guest_xcrs
)
2805 if (!cpu_has_xsave
) {
2806 guest_xcrs
->nr_xcrs
= 0;
2810 guest_xcrs
->nr_xcrs
= 1;
2811 guest_xcrs
->flags
= 0;
2812 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
2813 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
2816 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
2817 struct kvm_xcrs
*guest_xcrs
)
2824 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
2827 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
2828 /* Only support XCR0 currently */
2829 if (guest_xcrs
->xcrs
[0].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
2830 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
2831 guest_xcrs
->xcrs
[0].value
);
2839 long kvm_arch_vcpu_ioctl(struct file
*filp
,
2840 unsigned int ioctl
, unsigned long arg
)
2842 struct kvm_vcpu
*vcpu
= filp
->private_data
;
2843 void __user
*argp
= (void __user
*)arg
;
2846 struct kvm_lapic_state
*lapic
;
2847 struct kvm_xsave
*xsave
;
2848 struct kvm_xcrs
*xcrs
;
2854 case KVM_GET_LAPIC
: {
2856 if (!vcpu
->arch
.apic
)
2858 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2863 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
2867 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
2872 case KVM_SET_LAPIC
: {
2874 if (!vcpu
->arch
.apic
)
2876 u
.lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2881 if (copy_from_user(u
.lapic
, argp
, sizeof(struct kvm_lapic_state
)))
2883 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
2889 case KVM_INTERRUPT
: {
2890 struct kvm_interrupt irq
;
2893 if (copy_from_user(&irq
, argp
, sizeof irq
))
2895 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2902 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2908 case KVM_SET_CPUID
: {
2909 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2910 struct kvm_cpuid cpuid
;
2913 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2915 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2920 case KVM_SET_CPUID2
: {
2921 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2922 struct kvm_cpuid2 cpuid
;
2925 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2927 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2928 cpuid_arg
->entries
);
2933 case KVM_GET_CPUID2
: {
2934 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2935 struct kvm_cpuid2 cpuid
;
2938 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2940 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2941 cpuid_arg
->entries
);
2945 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2951 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2954 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2956 case KVM_TPR_ACCESS_REPORTING
: {
2957 struct kvm_tpr_access_ctl tac
;
2960 if (copy_from_user(&tac
, argp
, sizeof tac
))
2962 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2966 if (copy_to_user(argp
, &tac
, sizeof tac
))
2971 case KVM_SET_VAPIC_ADDR
: {
2972 struct kvm_vapic_addr va
;
2975 if (!irqchip_in_kernel(vcpu
->kvm
))
2978 if (copy_from_user(&va
, argp
, sizeof va
))
2981 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
2984 case KVM_X86_SETUP_MCE
: {
2988 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
2990 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
2993 case KVM_X86_SET_MCE
: {
2994 struct kvm_x86_mce mce
;
2997 if (copy_from_user(&mce
, argp
, sizeof mce
))
2999 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3002 case KVM_GET_VCPU_EVENTS
: {
3003 struct kvm_vcpu_events events
;
3005 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3008 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3013 case KVM_SET_VCPU_EVENTS
: {
3014 struct kvm_vcpu_events events
;
3017 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3020 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3023 case KVM_GET_DEBUGREGS
: {
3024 struct kvm_debugregs dbgregs
;
3026 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3029 if (copy_to_user(argp
, &dbgregs
,
3030 sizeof(struct kvm_debugregs
)))
3035 case KVM_SET_DEBUGREGS
: {
3036 struct kvm_debugregs dbgregs
;
3039 if (copy_from_user(&dbgregs
, argp
,
3040 sizeof(struct kvm_debugregs
)))
3043 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3046 case KVM_GET_XSAVE
: {
3047 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3052 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3055 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3060 case KVM_SET_XSAVE
: {
3061 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3067 if (copy_from_user(u
.xsave
, argp
, sizeof(struct kvm_xsave
)))
3070 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3073 case KVM_GET_XCRS
: {
3074 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3079 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3082 if (copy_to_user(argp
, u
.xcrs
,
3083 sizeof(struct kvm_xcrs
)))
3088 case KVM_SET_XCRS
: {
3089 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3095 if (copy_from_user(u
.xcrs
, argp
,
3096 sizeof(struct kvm_xcrs
)))
3099 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3102 case KVM_SET_TSC_KHZ
: {
3106 if (!kvm_has_tsc_control
)
3109 user_tsc_khz
= (u32
)arg
;
3111 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3114 kvm_x86_ops
->set_tsc_khz(vcpu
, user_tsc_khz
);
3119 case KVM_GET_TSC_KHZ
: {
3121 if (check_tsc_unstable())
3124 r
= vcpu_tsc_khz(vcpu
);
3136 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3140 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3142 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3146 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3149 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3153 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3154 u32 kvm_nr_mmu_pages
)
3156 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3159 mutex_lock(&kvm
->slots_lock
);
3160 spin_lock(&kvm
->mmu_lock
);
3162 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3163 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3165 spin_unlock(&kvm
->mmu_lock
);
3166 mutex_unlock(&kvm
->slots_lock
);
3170 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3172 return kvm
->arch
.n_max_mmu_pages
;
3175 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3180 switch (chip
->chip_id
) {
3181 case KVM_IRQCHIP_PIC_MASTER
:
3182 memcpy(&chip
->chip
.pic
,
3183 &pic_irqchip(kvm
)->pics
[0],
3184 sizeof(struct kvm_pic_state
));
3186 case KVM_IRQCHIP_PIC_SLAVE
:
3187 memcpy(&chip
->chip
.pic
,
3188 &pic_irqchip(kvm
)->pics
[1],
3189 sizeof(struct kvm_pic_state
));
3191 case KVM_IRQCHIP_IOAPIC
:
3192 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3201 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3206 switch (chip
->chip_id
) {
3207 case KVM_IRQCHIP_PIC_MASTER
:
3208 spin_lock(&pic_irqchip(kvm
)->lock
);
3209 memcpy(&pic_irqchip(kvm
)->pics
[0],
3211 sizeof(struct kvm_pic_state
));
3212 spin_unlock(&pic_irqchip(kvm
)->lock
);
3214 case KVM_IRQCHIP_PIC_SLAVE
:
3215 spin_lock(&pic_irqchip(kvm
)->lock
);
3216 memcpy(&pic_irqchip(kvm
)->pics
[1],
3218 sizeof(struct kvm_pic_state
));
3219 spin_unlock(&pic_irqchip(kvm
)->lock
);
3221 case KVM_IRQCHIP_IOAPIC
:
3222 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3228 kvm_pic_update_irq(pic_irqchip(kvm
));
3232 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3236 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3237 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3238 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3242 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3246 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3247 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3248 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3249 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3253 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3257 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3258 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3259 sizeof(ps
->channels
));
3260 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3261 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3262 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3266 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3268 int r
= 0, start
= 0;
3269 u32 prev_legacy
, cur_legacy
;
3270 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3271 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3272 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3273 if (!prev_legacy
&& cur_legacy
)
3275 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3276 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3277 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3278 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3279 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3283 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3284 struct kvm_reinject_control
*control
)
3286 if (!kvm
->arch
.vpit
)
3288 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3289 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
3290 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3295 * Get (and clear) the dirty memory log for a memory slot.
3297 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
3298 struct kvm_dirty_log
*log
)
3301 struct kvm_memory_slot
*memslot
;
3303 unsigned long is_dirty
= 0;
3305 mutex_lock(&kvm
->slots_lock
);
3308 if (log
->slot
>= KVM_MEMORY_SLOTS
)
3311 memslot
= &kvm
->memslots
->memslots
[log
->slot
];
3313 if (!memslot
->dirty_bitmap
)
3316 n
= kvm_dirty_bitmap_bytes(memslot
);
3318 for (i
= 0; !is_dirty
&& i
< n
/sizeof(long); i
++)
3319 is_dirty
= memslot
->dirty_bitmap
[i
];
3321 /* If nothing is dirty, don't bother messing with page tables. */
3323 struct kvm_memslots
*slots
, *old_slots
;
3324 unsigned long *dirty_bitmap
;
3326 dirty_bitmap
= memslot
->dirty_bitmap_head
;
3327 if (memslot
->dirty_bitmap
== dirty_bitmap
)
3328 dirty_bitmap
+= n
/ sizeof(long);
3329 memset(dirty_bitmap
, 0, n
);
3332 slots
= kzalloc(sizeof(struct kvm_memslots
), GFP_KERNEL
);
3335 memcpy(slots
, kvm
->memslots
, sizeof(struct kvm_memslots
));
3336 slots
->memslots
[log
->slot
].dirty_bitmap
= dirty_bitmap
;
3337 slots
->generation
++;
3339 old_slots
= kvm
->memslots
;
3340 rcu_assign_pointer(kvm
->memslots
, slots
);
3341 synchronize_srcu_expedited(&kvm
->srcu
);
3342 dirty_bitmap
= old_slots
->memslots
[log
->slot
].dirty_bitmap
;
3345 spin_lock(&kvm
->mmu_lock
);
3346 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
3347 spin_unlock(&kvm
->mmu_lock
);
3350 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap
, n
))
3354 if (clear_user(log
->dirty_bitmap
, n
))
3360 mutex_unlock(&kvm
->slots_lock
);
3364 long kvm_arch_vm_ioctl(struct file
*filp
,
3365 unsigned int ioctl
, unsigned long arg
)
3367 struct kvm
*kvm
= filp
->private_data
;
3368 void __user
*argp
= (void __user
*)arg
;
3371 * This union makes it completely explicit to gcc-3.x
3372 * that these two variables' stack usage should be
3373 * combined, not added together.
3376 struct kvm_pit_state ps
;
3377 struct kvm_pit_state2 ps2
;
3378 struct kvm_pit_config pit_config
;
3382 case KVM_SET_TSS_ADDR
:
3383 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3387 case KVM_SET_IDENTITY_MAP_ADDR
: {
3391 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3393 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3398 case KVM_SET_NR_MMU_PAGES
:
3399 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3403 case KVM_GET_NR_MMU_PAGES
:
3404 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3406 case KVM_CREATE_IRQCHIP
: {
3407 struct kvm_pic
*vpic
;
3409 mutex_lock(&kvm
->lock
);
3412 goto create_irqchip_unlock
;
3414 vpic
= kvm_create_pic(kvm
);
3416 r
= kvm_ioapic_init(kvm
);
3418 mutex_lock(&kvm
->slots_lock
);
3419 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3421 mutex_unlock(&kvm
->slots_lock
);
3423 goto create_irqchip_unlock
;
3426 goto create_irqchip_unlock
;
3428 kvm
->arch
.vpic
= vpic
;
3430 r
= kvm_setup_default_irq_routing(kvm
);
3432 mutex_lock(&kvm
->slots_lock
);
3433 mutex_lock(&kvm
->irq_lock
);
3434 kvm_ioapic_destroy(kvm
);
3435 kvm_destroy_pic(kvm
);
3436 mutex_unlock(&kvm
->irq_lock
);
3437 mutex_unlock(&kvm
->slots_lock
);
3439 create_irqchip_unlock
:
3440 mutex_unlock(&kvm
->lock
);
3443 case KVM_CREATE_PIT
:
3444 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3446 case KVM_CREATE_PIT2
:
3448 if (copy_from_user(&u
.pit_config
, argp
,
3449 sizeof(struct kvm_pit_config
)))
3452 mutex_lock(&kvm
->slots_lock
);
3455 goto create_pit_unlock
;
3457 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3461 mutex_unlock(&kvm
->slots_lock
);
3463 case KVM_IRQ_LINE_STATUS
:
3464 case KVM_IRQ_LINE
: {
3465 struct kvm_irq_level irq_event
;
3468 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
3471 if (irqchip_in_kernel(kvm
)) {
3473 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3474 irq_event
.irq
, irq_event
.level
);
3475 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
3477 irq_event
.status
= status
;
3478 if (copy_to_user(argp
, &irq_event
,
3486 case KVM_GET_IRQCHIP
: {
3487 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3488 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
3494 if (copy_from_user(chip
, argp
, sizeof *chip
))
3495 goto get_irqchip_out
;
3497 if (!irqchip_in_kernel(kvm
))
3498 goto get_irqchip_out
;
3499 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3501 goto get_irqchip_out
;
3503 if (copy_to_user(argp
, chip
, sizeof *chip
))
3504 goto get_irqchip_out
;
3512 case KVM_SET_IRQCHIP
: {
3513 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3514 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
3520 if (copy_from_user(chip
, argp
, sizeof *chip
))
3521 goto set_irqchip_out
;
3523 if (!irqchip_in_kernel(kvm
))
3524 goto set_irqchip_out
;
3525 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3527 goto set_irqchip_out
;
3537 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3540 if (!kvm
->arch
.vpit
)
3542 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3546 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3553 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3556 if (!kvm
->arch
.vpit
)
3558 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3564 case KVM_GET_PIT2
: {
3566 if (!kvm
->arch
.vpit
)
3568 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3572 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3577 case KVM_SET_PIT2
: {
3579 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3582 if (!kvm
->arch
.vpit
)
3584 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3590 case KVM_REINJECT_CONTROL
: {
3591 struct kvm_reinject_control control
;
3593 if (copy_from_user(&control
, argp
, sizeof(control
)))
3595 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3601 case KVM_XEN_HVM_CONFIG
: {
3603 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3604 sizeof(struct kvm_xen_hvm_config
)))
3607 if (kvm
->arch
.xen_hvm_config
.flags
)
3612 case KVM_SET_CLOCK
: {
3613 struct kvm_clock_data user_ns
;
3618 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3626 local_irq_disable();
3627 now_ns
= get_kernel_ns();
3628 delta
= user_ns
.clock
- now_ns
;
3630 kvm
->arch
.kvmclock_offset
= delta
;
3633 case KVM_GET_CLOCK
: {
3634 struct kvm_clock_data user_ns
;
3637 local_irq_disable();
3638 now_ns
= get_kernel_ns();
3639 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3642 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3645 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3658 static void kvm_init_msr_list(void)
3663 /* skip the first msrs in the list. KVM-specific */
3664 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3665 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3668 msrs_to_save
[j
] = msrs_to_save
[i
];
3671 num_msrs_to_save
= j
;
3674 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3682 if (!(vcpu
->arch
.apic
&&
3683 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3684 && kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3695 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3702 if (!(vcpu
->arch
.apic
&&
3703 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3704 && kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3706 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
3716 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3717 struct kvm_segment
*var
, int seg
)
3719 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3722 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3723 struct kvm_segment
*var
, int seg
)
3725 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3728 static gpa_t
translate_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3733 static gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3736 struct x86_exception exception
;
3738 BUG_ON(!mmu_is_nested(vcpu
));
3740 /* NPT walks are always user-walks */
3741 access
|= PFERR_USER_MASK
;
3742 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, &exception
);
3747 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
3748 struct x86_exception
*exception
)
3750 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3751 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3754 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
3755 struct x86_exception
*exception
)
3757 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3758 access
|= PFERR_FETCH_MASK
;
3759 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3762 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
3763 struct x86_exception
*exception
)
3765 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3766 access
|= PFERR_WRITE_MASK
;
3767 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3770 /* uses this to access any guest's mapped memory without checking CPL */
3771 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
3772 struct x86_exception
*exception
)
3774 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
3777 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
3778 struct kvm_vcpu
*vcpu
, u32 access
,
3779 struct x86_exception
*exception
)
3782 int r
= X86EMUL_CONTINUE
;
3785 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
3787 unsigned offset
= addr
& (PAGE_SIZE
-1);
3788 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3791 if (gpa
== UNMAPPED_GVA
)
3792 return X86EMUL_PROPAGATE_FAULT
;
3793 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
3795 r
= X86EMUL_IO_NEEDED
;
3807 /* used for instruction fetching */
3808 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
3809 gva_t addr
, void *val
, unsigned int bytes
,
3810 struct x86_exception
*exception
)
3812 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3813 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3815 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
3816 access
| PFERR_FETCH_MASK
,
3820 static int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
3821 gva_t addr
, void *val
, unsigned int bytes
,
3822 struct x86_exception
*exception
)
3824 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3825 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3827 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
3831 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
3832 gva_t addr
, void *val
, unsigned int bytes
,
3833 struct x86_exception
*exception
)
3835 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3836 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
3839 static int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
3840 gva_t addr
, void *val
,
3842 struct x86_exception
*exception
)
3844 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3846 int r
= X86EMUL_CONTINUE
;
3849 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
3852 unsigned offset
= addr
& (PAGE_SIZE
-1);
3853 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3856 if (gpa
== UNMAPPED_GVA
)
3857 return X86EMUL_PROPAGATE_FAULT
;
3858 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
3860 r
= X86EMUL_IO_NEEDED
;
3872 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
3876 struct x86_exception
*exception
)
3878 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3882 if (vcpu
->mmio_read_completed
) {
3883 memcpy(val
, vcpu
->mmio_data
, bytes
);
3884 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
3885 vcpu
->mmio_phys_addr
, *(u64
*)val
);
3886 vcpu
->mmio_read_completed
= 0;
3887 return X86EMUL_CONTINUE
;
3890 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, addr
, exception
);
3892 if (gpa
== UNMAPPED_GVA
)
3893 return X86EMUL_PROPAGATE_FAULT
;
3895 /* For APIC access vmexit */
3896 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3899 if (kvm_read_guest_virt(ctxt
, addr
, val
, bytes
, exception
)
3900 == X86EMUL_CONTINUE
)
3901 return X86EMUL_CONTINUE
;
3905 * Is this MMIO handled locally?
3907 handled
= vcpu_mmio_read(vcpu
, gpa
, bytes
, val
);
3909 if (handled
== bytes
)
3910 return X86EMUL_CONTINUE
;
3916 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
3918 vcpu
->mmio_needed
= 1;
3919 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3920 vcpu
->run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
= gpa
;
3921 vcpu
->mmio_size
= bytes
;
3922 vcpu
->run
->mmio
.len
= min(vcpu
->mmio_size
, 8);
3923 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= 0;
3924 vcpu
->mmio_index
= 0;
3926 return X86EMUL_IO_NEEDED
;
3929 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3930 const void *val
, int bytes
)
3934 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3937 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
3941 static int emulator_write_emulated_onepage(unsigned long addr
,
3944 struct x86_exception
*exception
,
3945 struct kvm_vcpu
*vcpu
)
3950 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, exception
);
3952 if (gpa
== UNMAPPED_GVA
)
3953 return X86EMUL_PROPAGATE_FAULT
;
3955 /* For APIC access vmexit */
3956 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3959 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
3960 return X86EMUL_CONTINUE
;
3963 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
3965 * Is this MMIO handled locally?
3967 handled
= vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
3968 if (handled
== bytes
)
3969 return X86EMUL_CONTINUE
;
3975 vcpu
->mmio_needed
= 1;
3976 memcpy(vcpu
->mmio_data
, val
, bytes
);
3977 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3978 vcpu
->run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
= gpa
;
3979 vcpu
->mmio_size
= bytes
;
3980 vcpu
->run
->mmio
.len
= min(vcpu
->mmio_size
, 8);
3981 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= 1;
3982 memcpy(vcpu
->run
->mmio
.data
, vcpu
->mmio_data
, 8);
3983 vcpu
->mmio_index
= 0;
3985 return X86EMUL_CONTINUE
;
3988 int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
3992 struct x86_exception
*exception
)
3994 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3996 /* Crossing a page boundary? */
3997 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4000 now
= -addr
& ~PAGE_MASK
;
4001 rc
= emulator_write_emulated_onepage(addr
, val
, now
, exception
,
4003 if (rc
!= X86EMUL_CONTINUE
)
4009 return emulator_write_emulated_onepage(addr
, val
, bytes
, exception
,
4013 #define CMPXCHG_TYPE(t, ptr, old, new) \
4014 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4016 #ifdef CONFIG_X86_64
4017 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4019 # define CMPXCHG64(ptr, old, new) \
4020 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4023 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4028 struct x86_exception
*exception
)
4030 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4036 /* guests cmpxchg8b have to be emulated atomically */
4037 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4040 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4042 if (gpa
== UNMAPPED_GVA
||
4043 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4046 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4049 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4050 if (is_error_page(page
)) {
4051 kvm_release_page_clean(page
);
4055 kaddr
= kmap_atomic(page
, KM_USER0
);
4056 kaddr
+= offset_in_page(gpa
);
4059 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4062 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4065 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4068 exchanged
= CMPXCHG64(kaddr
, old
, new);
4073 kunmap_atomic(kaddr
, KM_USER0
);
4074 kvm_release_page_dirty(page
);
4077 return X86EMUL_CMPXCHG_FAILED
;
4079 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
, 1);
4081 return X86EMUL_CONTINUE
;
4084 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4086 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4089 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4091 /* TODO: String I/O for in kernel device */
4094 if (vcpu
->arch
.pio
.in
)
4095 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4096 vcpu
->arch
.pio
.size
, pd
);
4098 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
4099 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4105 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4106 int size
, unsigned short port
, void *val
,
4109 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4111 if (vcpu
->arch
.pio
.count
)
4114 trace_kvm_pio(0, port
, size
, count
);
4116 vcpu
->arch
.pio
.port
= port
;
4117 vcpu
->arch
.pio
.in
= 1;
4118 vcpu
->arch
.pio
.count
= count
;
4119 vcpu
->arch
.pio
.size
= size
;
4121 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4123 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4124 vcpu
->arch
.pio
.count
= 0;
4128 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4129 vcpu
->run
->io
.direction
= KVM_EXIT_IO_IN
;
4130 vcpu
->run
->io
.size
= size
;
4131 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4132 vcpu
->run
->io
.count
= count
;
4133 vcpu
->run
->io
.port
= port
;
4138 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4139 int size
, unsigned short port
,
4140 const void *val
, unsigned int count
)
4142 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4144 trace_kvm_pio(1, port
, size
, count
);
4146 vcpu
->arch
.pio
.port
= port
;
4147 vcpu
->arch
.pio
.in
= 0;
4148 vcpu
->arch
.pio
.count
= count
;
4149 vcpu
->arch
.pio
.size
= size
;
4151 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4153 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4154 vcpu
->arch
.pio
.count
= 0;
4158 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4159 vcpu
->run
->io
.direction
= KVM_EXIT_IO_OUT
;
4160 vcpu
->run
->io
.size
= size
;
4161 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4162 vcpu
->run
->io
.count
= count
;
4163 vcpu
->run
->io
.port
= port
;
4168 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4170 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4173 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4175 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4178 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4180 if (!need_emulate_wbinvd(vcpu
))
4181 return X86EMUL_CONTINUE
;
4183 if (kvm_x86_ops
->has_wbinvd_exit()) {
4184 int cpu
= get_cpu();
4186 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4187 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4188 wbinvd_ipi
, NULL
, 1);
4190 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4193 return X86EMUL_CONTINUE
;
4195 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4197 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4199 kvm_emulate_wbinvd(emul_to_vcpu(ctxt
));
4202 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
4204 return _kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4207 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
4210 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4213 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4215 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4218 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4220 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4221 unsigned long value
;
4225 value
= kvm_read_cr0(vcpu
);
4228 value
= vcpu
->arch
.cr2
;
4231 value
= kvm_read_cr3(vcpu
);
4234 value
= kvm_read_cr4(vcpu
);
4237 value
= kvm_get_cr8(vcpu
);
4240 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
4247 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4249 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4254 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4257 vcpu
->arch
.cr2
= val
;
4260 res
= kvm_set_cr3(vcpu
, val
);
4263 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4266 res
= kvm_set_cr8(vcpu
, val
);
4269 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
4276 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4278 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4281 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4283 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4286 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4288 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4291 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4293 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4296 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4298 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4301 static unsigned long emulator_get_cached_segment_base(
4302 struct x86_emulate_ctxt
*ctxt
, int seg
)
4304 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4307 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4308 struct desc_struct
*desc
, u32
*base3
,
4311 struct kvm_segment var
;
4313 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4314 *selector
= var
.selector
;
4321 set_desc_limit(desc
, var
.limit
);
4322 set_desc_base(desc
, (unsigned long)var
.base
);
4323 #ifdef CONFIG_X86_64
4325 *base3
= var
.base
>> 32;
4327 desc
->type
= var
.type
;
4329 desc
->dpl
= var
.dpl
;
4330 desc
->p
= var
.present
;
4331 desc
->avl
= var
.avl
;
4339 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4340 struct desc_struct
*desc
, u32 base3
,
4343 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4344 struct kvm_segment var
;
4346 var
.selector
= selector
;
4347 var
.base
= get_desc_base(desc
);
4348 #ifdef CONFIG_X86_64
4349 var
.base
|= ((u64
)base3
) << 32;
4351 var
.limit
= get_desc_limit(desc
);
4353 var
.limit
= (var
.limit
<< 12) | 0xfff;
4354 var
.type
= desc
->type
;
4355 var
.present
= desc
->p
;
4356 var
.dpl
= desc
->dpl
;
4361 var
.avl
= desc
->avl
;
4362 var
.present
= desc
->p
;
4363 var
.unusable
= !var
.present
;
4366 kvm_set_segment(vcpu
, &var
, seg
);
4370 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4371 u32 msr_index
, u64
*pdata
)
4373 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
4376 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4377 u32 msr_index
, u64 data
)
4379 return kvm_set_msr(emul_to_vcpu(ctxt
), msr_index
, data
);
4382 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4384 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4387 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4390 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4392 * CR0.TS may reference the host fpu state, not the guest fpu state,
4393 * so it may be clear at this point.
4398 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4403 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4404 struct x86_instruction_info
*info
,
4405 enum x86_intercept_stage stage
)
4407 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4410 static struct x86_emulate_ops emulate_ops
= {
4411 .read_std
= kvm_read_guest_virt_system
,
4412 .write_std
= kvm_write_guest_virt_system
,
4413 .fetch
= kvm_fetch_guest_virt
,
4414 .read_emulated
= emulator_read_emulated
,
4415 .write_emulated
= emulator_write_emulated
,
4416 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4417 .invlpg
= emulator_invlpg
,
4418 .pio_in_emulated
= emulator_pio_in_emulated
,
4419 .pio_out_emulated
= emulator_pio_out_emulated
,
4420 .get_segment
= emulator_get_segment
,
4421 .set_segment
= emulator_set_segment
,
4422 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4423 .get_gdt
= emulator_get_gdt
,
4424 .get_idt
= emulator_get_idt
,
4425 .set_gdt
= emulator_set_gdt
,
4426 .set_idt
= emulator_set_idt
,
4427 .get_cr
= emulator_get_cr
,
4428 .set_cr
= emulator_set_cr
,
4429 .cpl
= emulator_get_cpl
,
4430 .get_dr
= emulator_get_dr
,
4431 .set_dr
= emulator_set_dr
,
4432 .set_msr
= emulator_set_msr
,
4433 .get_msr
= emulator_get_msr
,
4434 .halt
= emulator_halt
,
4435 .wbinvd
= emulator_wbinvd
,
4436 .fix_hypercall
= emulator_fix_hypercall
,
4437 .get_fpu
= emulator_get_fpu
,
4438 .put_fpu
= emulator_put_fpu
,
4439 .intercept
= emulator_intercept
,
4442 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
4444 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4445 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4446 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
4447 vcpu
->arch
.regs_dirty
= ~0;
4450 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4452 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
, mask
);
4454 * an sti; sti; sequence only disable interrupts for the first
4455 * instruction. So, if the last instruction, be it emulated or
4456 * not, left the system with the INT_STI flag enabled, it
4457 * means that the last instruction is an sti. We should not
4458 * leave the flag on in this case. The same goes for mov ss
4460 if (!(int_shadow
& mask
))
4461 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4464 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4466 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4467 if (ctxt
->exception
.vector
== PF_VECTOR
)
4468 kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4469 else if (ctxt
->exception
.error_code_valid
)
4470 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4471 ctxt
->exception
.error_code
);
4473 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4476 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4478 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4482 * TODO: fix emulate.c to use guest_read/write_register
4483 * instead of direct ->regs accesses, can save hundred cycles
4484 * on Intel for instructions that don't read/change RSP, for
4487 cache_all_regs(vcpu
);
4489 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4491 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_get_rflags(vcpu
);
4492 vcpu
->arch
.emulate_ctxt
.eip
= kvm_rip_read(vcpu
);
4493 vcpu
->arch
.emulate_ctxt
.mode
=
4494 (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4495 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
4496 ? X86EMUL_MODE_VM86
: cs_l
4497 ? X86EMUL_MODE_PROT64
: cs_db
4498 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
4499 vcpu
->arch
.emulate_ctxt
.guest_mode
= is_guest_mode(vcpu
);
4500 memset(c
, 0, sizeof(struct decode_cache
));
4501 memcpy(c
->regs
, vcpu
->arch
.regs
, sizeof c
->regs
);
4502 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4505 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
4507 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4510 init_emulate_ctxt(vcpu
);
4512 vcpu
->arch
.emulate_ctxt
.decode
.op_bytes
= 2;
4513 vcpu
->arch
.emulate_ctxt
.decode
.ad_bytes
= 2;
4514 vcpu
->arch
.emulate_ctxt
.decode
.eip
= vcpu
->arch
.emulate_ctxt
.eip
+
4516 ret
= emulate_int_real(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
, irq
);
4518 if (ret
!= X86EMUL_CONTINUE
)
4519 return EMULATE_FAIL
;
4521 vcpu
->arch
.emulate_ctxt
.eip
= c
->eip
;
4522 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
4523 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
4524 kvm_set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
4526 if (irq
== NMI_VECTOR
)
4527 vcpu
->arch
.nmi_pending
= false;
4529 vcpu
->arch
.interrupt
.pending
= false;
4531 return EMULATE_DONE
;
4533 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4535 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4537 int r
= EMULATE_DONE
;
4539 ++vcpu
->stat
.insn_emulation_fail
;
4540 trace_kvm_emulate_insn_failed(vcpu
);
4541 if (!is_guest_mode(vcpu
)) {
4542 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4543 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4544 vcpu
->run
->internal
.ndata
= 0;
4547 kvm_queue_exception(vcpu
, UD_VECTOR
);
4552 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t gva
)
4560 * if emulation was due to access to shadowed page table
4561 * and it failed try to unshadow page and re-entetr the
4562 * guest to let CPU execute the instruction.
4564 if (kvm_mmu_unprotect_page_virt(vcpu
, gva
))
4567 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, gva
, NULL
);
4569 if (gpa
== UNMAPPED_GVA
)
4570 return true; /* let cpu generate fault */
4572 if (!kvm_is_error_hva(gfn_to_hva(vcpu
->kvm
, gpa
>> PAGE_SHIFT
)))
4578 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
4585 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4586 bool writeback
= true;
4588 kvm_clear_exception_queue(vcpu
);
4590 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
4591 init_emulate_ctxt(vcpu
);
4592 vcpu
->arch
.emulate_ctxt
.interruptibility
= 0;
4593 vcpu
->arch
.emulate_ctxt
.have_exception
= false;
4594 vcpu
->arch
.emulate_ctxt
.perm_ok
= false;
4596 vcpu
->arch
.emulate_ctxt
.only_vendor_specific_insn
4597 = emulation_type
& EMULTYPE_TRAP_UD
;
4599 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
, insn
, insn_len
);
4601 trace_kvm_emulate_insn_start(vcpu
);
4602 ++vcpu
->stat
.insn_emulation
;
4604 if (emulation_type
& EMULTYPE_TRAP_UD
)
4605 return EMULATE_FAIL
;
4606 if (reexecute_instruction(vcpu
, cr2
))
4607 return EMULATE_DONE
;
4608 if (emulation_type
& EMULTYPE_SKIP
)
4609 return EMULATE_FAIL
;
4610 return handle_emulation_failure(vcpu
);
4614 if (emulation_type
& EMULTYPE_SKIP
) {
4615 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
4616 return EMULATE_DONE
;
4619 /* this is needed for vmware backdoor interface to work since it
4620 changes registers values during IO operation */
4621 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
4622 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4623 memcpy(c
->regs
, vcpu
->arch
.regs
, sizeof c
->regs
);
4627 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
);
4629 if (r
== EMULATION_INTERCEPTED
)
4630 return EMULATE_DONE
;
4632 if (r
== EMULATION_FAILED
) {
4633 if (reexecute_instruction(vcpu
, cr2
))
4634 return EMULATE_DONE
;
4636 return handle_emulation_failure(vcpu
);
4639 if (vcpu
->arch
.emulate_ctxt
.have_exception
) {
4640 inject_emulated_exception(vcpu
);
4642 } else if (vcpu
->arch
.pio
.count
) {
4643 if (!vcpu
->arch
.pio
.in
)
4644 vcpu
->arch
.pio
.count
= 0;
4647 r
= EMULATE_DO_MMIO
;
4648 } else if (vcpu
->mmio_needed
) {
4649 if (!vcpu
->mmio_is_write
)
4651 r
= EMULATE_DO_MMIO
;
4652 } else if (r
== EMULATION_RESTART
)
4658 toggle_interruptibility(vcpu
,
4659 vcpu
->arch
.emulate_ctxt
.interruptibility
);
4660 kvm_set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
4661 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4662 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
4663 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
4664 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
4666 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
4670 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
4672 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
4674 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4675 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
4676 size
, port
, &val
, 1);
4677 /* do not return to emulator after return from userspace */
4678 vcpu
->arch
.pio
.count
= 0;
4681 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
4683 static void tsc_bad(void *info
)
4685 __this_cpu_write(cpu_tsc_khz
, 0);
4688 static void tsc_khz_changed(void *data
)
4690 struct cpufreq_freqs
*freq
= data
;
4691 unsigned long khz
= 0;
4695 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4696 khz
= cpufreq_quick_get(raw_smp_processor_id());
4699 __this_cpu_write(cpu_tsc_khz
, khz
);
4702 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
4705 struct cpufreq_freqs
*freq
= data
;
4707 struct kvm_vcpu
*vcpu
;
4708 int i
, send_ipi
= 0;
4711 * We allow guests to temporarily run on slowing clocks,
4712 * provided we notify them after, or to run on accelerating
4713 * clocks, provided we notify them before. Thus time never
4716 * However, we have a problem. We can't atomically update
4717 * the frequency of a given CPU from this function; it is
4718 * merely a notifier, which can be called from any CPU.
4719 * Changing the TSC frequency at arbitrary points in time
4720 * requires a recomputation of local variables related to
4721 * the TSC for each VCPU. We must flag these local variables
4722 * to be updated and be sure the update takes place with the
4723 * new frequency before any guests proceed.
4725 * Unfortunately, the combination of hotplug CPU and frequency
4726 * change creates an intractable locking scenario; the order
4727 * of when these callouts happen is undefined with respect to
4728 * CPU hotplug, and they can race with each other. As such,
4729 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4730 * undefined; you can actually have a CPU frequency change take
4731 * place in between the computation of X and the setting of the
4732 * variable. To protect against this problem, all updates of
4733 * the per_cpu tsc_khz variable are done in an interrupt
4734 * protected IPI, and all callers wishing to update the value
4735 * must wait for a synchronous IPI to complete (which is trivial
4736 * if the caller is on the CPU already). This establishes the
4737 * necessary total order on variable updates.
4739 * Note that because a guest time update may take place
4740 * anytime after the setting of the VCPU's request bit, the
4741 * correct TSC value must be set before the request. However,
4742 * to ensure the update actually makes it to any guest which
4743 * starts running in hardware virtualization between the set
4744 * and the acquisition of the spinlock, we must also ping the
4745 * CPU after setting the request bit.
4749 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
4751 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
4754 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4756 raw_spin_lock(&kvm_lock
);
4757 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4758 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
4759 if (vcpu
->cpu
!= freq
->cpu
)
4761 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4762 if (vcpu
->cpu
!= smp_processor_id())
4766 raw_spin_unlock(&kvm_lock
);
4768 if (freq
->old
< freq
->new && send_ipi
) {
4770 * We upscale the frequency. Must make the guest
4771 * doesn't see old kvmclock values while running with
4772 * the new frequency, otherwise we risk the guest sees
4773 * time go backwards.
4775 * In case we update the frequency for another cpu
4776 * (which might be in guest context) send an interrupt
4777 * to kick the cpu out of guest context. Next time
4778 * guest context is entered kvmclock will be updated,
4779 * so the guest will not see stale values.
4781 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4786 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
4787 .notifier_call
= kvmclock_cpufreq_notifier
4790 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
4791 unsigned long action
, void *hcpu
)
4793 unsigned int cpu
= (unsigned long)hcpu
;
4797 case CPU_DOWN_FAILED
:
4798 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4800 case CPU_DOWN_PREPARE
:
4801 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
4807 static struct notifier_block kvmclock_cpu_notifier_block
= {
4808 .notifier_call
= kvmclock_cpu_notifier
,
4809 .priority
= -INT_MAX
4812 static void kvm_timer_init(void)
4816 max_tsc_khz
= tsc_khz
;
4817 register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4818 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
4819 #ifdef CONFIG_CPU_FREQ
4820 struct cpufreq_policy policy
;
4821 memset(&policy
, 0, sizeof(policy
));
4823 cpufreq_get_policy(&policy
, cpu
);
4824 if (policy
.cpuinfo
.max_freq
)
4825 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
4828 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
4829 CPUFREQ_TRANSITION_NOTIFIER
);
4831 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
4832 for_each_online_cpu(cpu
)
4833 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4836 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
4838 static int kvm_is_in_guest(void)
4840 return percpu_read(current_vcpu
) != NULL
;
4843 static int kvm_is_user_mode(void)
4847 if (percpu_read(current_vcpu
))
4848 user_mode
= kvm_x86_ops
->get_cpl(percpu_read(current_vcpu
));
4850 return user_mode
!= 0;
4853 static unsigned long kvm_get_guest_ip(void)
4855 unsigned long ip
= 0;
4857 if (percpu_read(current_vcpu
))
4858 ip
= kvm_rip_read(percpu_read(current_vcpu
));
4863 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
4864 .is_in_guest
= kvm_is_in_guest
,
4865 .is_user_mode
= kvm_is_user_mode
,
4866 .get_guest_ip
= kvm_get_guest_ip
,
4869 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
4871 percpu_write(current_vcpu
, vcpu
);
4873 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
4875 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
4877 percpu_write(current_vcpu
, NULL
);
4879 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
4881 int kvm_arch_init(void *opaque
)
4884 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
4887 printk(KERN_ERR
"kvm: already loaded the other module\n");
4892 if (!ops
->cpu_has_kvm_support()) {
4893 printk(KERN_ERR
"kvm: no hardware support\n");
4897 if (ops
->disabled_by_bios()) {
4898 printk(KERN_ERR
"kvm: disabled by bios\n");
4903 r
= kvm_mmu_module_init();
4907 kvm_init_msr_list();
4910 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4911 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
4912 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
4916 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
4919 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
4927 void kvm_arch_exit(void)
4929 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
4931 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4932 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
4933 CPUFREQ_TRANSITION_NOTIFIER
);
4934 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4936 kvm_mmu_module_exit();
4939 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
4941 ++vcpu
->stat
.halt_exits
;
4942 if (irqchip_in_kernel(vcpu
->kvm
)) {
4943 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
4946 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
4950 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
4952 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
4955 if (is_long_mode(vcpu
))
4958 return a0
| ((gpa_t
)a1
<< 32);
4961 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
4963 u64 param
, ingpa
, outgpa
, ret
;
4964 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
4965 bool fast
, longmode
;
4969 * hypercall generates UD from non zero cpl and real mode
4972 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
4973 kvm_queue_exception(vcpu
, UD_VECTOR
);
4977 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4978 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
4981 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
4982 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
4983 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
4984 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
4985 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
4986 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
4988 #ifdef CONFIG_X86_64
4990 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4991 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4992 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
4996 code
= param
& 0xffff;
4997 fast
= (param
>> 16) & 0x1;
4998 rep_cnt
= (param
>> 32) & 0xfff;
4999 rep_idx
= (param
>> 48) & 0xfff;
5001 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
5004 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
5005 kvm_vcpu_on_spin(vcpu
);
5008 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
5012 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
5014 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5016 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
5017 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
5023 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5025 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5028 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5029 return kvm_hv_hypercall(vcpu
);
5031 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5032 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5033 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5034 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5035 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5037 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5039 if (!is_long_mode(vcpu
)) {
5047 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5053 case KVM_HC_VAPIC_POLL_IRQ
:
5057 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
5064 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5065 ++vcpu
->stat
.hypercalls
;
5068 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5070 int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5072 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5073 char instruction
[3];
5074 unsigned long rip
= kvm_rip_read(vcpu
);
5077 * Blow out the MMU to ensure that no other VCPU has an active mapping
5078 * to ensure that the updated hypercall appears atomically across all
5081 kvm_mmu_zap_all(vcpu
->kvm
);
5083 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5085 return emulator_write_emulated(&vcpu
->arch
.emulate_ctxt
,
5086 rip
, instruction
, 3, NULL
);
5089 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
5091 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
5092 int j
, nent
= vcpu
->arch
.cpuid_nent
;
5094 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
5095 /* when no next entry is found, the current entry[i] is reselected */
5096 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
5097 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
5098 if (ej
->function
== e
->function
) {
5099 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
5103 return 0; /* silence gcc, even though control never reaches here */
5106 /* find an entry with matching function, matching index (if needed), and that
5107 * should be read next (if it's stateful) */
5108 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
5109 u32 function
, u32 index
)
5111 if (e
->function
!= function
)
5113 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
5115 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
5116 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
5121 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
5122 u32 function
, u32 index
)
5125 struct kvm_cpuid_entry2
*best
= NULL
;
5127 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
5128 struct kvm_cpuid_entry2
*e
;
5130 e
= &vcpu
->arch
.cpuid_entries
[i
];
5131 if (is_matching_cpuid_entry(e
, function
, index
)) {
5132 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
5133 move_to_next_stateful_cpuid_entry(vcpu
, i
);
5140 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry
);
5142 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
5144 struct kvm_cpuid_entry2
*best
;
5146 best
= kvm_find_cpuid_entry(vcpu
, 0x80000000, 0);
5147 if (!best
|| best
->eax
< 0x80000008)
5149 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
5151 return best
->eax
& 0xff;
5157 * If no match is found, check whether we exceed the vCPU's limit
5158 * and return the content of the highest valid _standard_ leaf instead.
5159 * This is to satisfy the CPUID specification.
5161 static struct kvm_cpuid_entry2
* check_cpuid_limit(struct kvm_vcpu
*vcpu
,
5162 u32 function
, u32 index
)
5164 struct kvm_cpuid_entry2
*maxlevel
;
5166 maxlevel
= kvm_find_cpuid_entry(vcpu
, function
& 0x80000000, 0);
5167 if (!maxlevel
|| maxlevel
->eax
>= function
)
5169 if (function
& 0x80000000) {
5170 maxlevel
= kvm_find_cpuid_entry(vcpu
, 0, 0);
5174 return kvm_find_cpuid_entry(vcpu
, maxlevel
->eax
, index
);
5177 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
5179 u32 function
, index
;
5180 struct kvm_cpuid_entry2
*best
;
5182 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5183 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5184 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
5185 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
5186 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
5187 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
5188 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
5191 best
= check_cpuid_limit(vcpu
, function
, index
);
5194 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
5195 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
5196 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
5197 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
5199 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5200 trace_kvm_cpuid(function
,
5201 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
5202 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
5203 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
5204 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
5206 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
5209 * Check if userspace requested an interrupt window, and that the
5210 * interrupt window is open.
5212 * No need to exit to userspace if we already have an interrupt queued.
5214 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5216 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5217 vcpu
->run
->request_interrupt_window
&&
5218 kvm_arch_interrupt_allowed(vcpu
));
5221 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5223 struct kvm_run
*kvm_run
= vcpu
->run
;
5225 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5226 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5227 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5228 if (irqchip_in_kernel(vcpu
->kvm
))
5229 kvm_run
->ready_for_interrupt_injection
= 1;
5231 kvm_run
->ready_for_interrupt_injection
=
5232 kvm_arch_interrupt_allowed(vcpu
) &&
5233 !kvm_cpu_has_interrupt(vcpu
) &&
5234 !kvm_event_needs_reinjection(vcpu
);
5237 static void vapic_enter(struct kvm_vcpu
*vcpu
)
5239 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5242 if (!apic
|| !apic
->vapic_addr
)
5245 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5247 vcpu
->arch
.apic
->vapic_page
= page
;
5250 static void vapic_exit(struct kvm_vcpu
*vcpu
)
5252 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5255 if (!apic
|| !apic
->vapic_addr
)
5258 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5259 kvm_release_page_dirty(apic
->vapic_page
);
5260 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5261 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5264 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5268 if (!kvm_x86_ops
->update_cr8_intercept
)
5271 if (!vcpu
->arch
.apic
)
5274 if (!vcpu
->arch
.apic
->vapic_addr
)
5275 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5282 tpr
= kvm_lapic_get_cr8(vcpu
);
5284 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5287 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
5289 /* try to reinject previous events if any */
5290 if (vcpu
->arch
.exception
.pending
) {
5291 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5292 vcpu
->arch
.exception
.has_error_code
,
5293 vcpu
->arch
.exception
.error_code
);
5294 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5295 vcpu
->arch
.exception
.has_error_code
,
5296 vcpu
->arch
.exception
.error_code
,
5297 vcpu
->arch
.exception
.reinject
);
5301 if (vcpu
->arch
.nmi_injected
) {
5302 kvm_x86_ops
->set_nmi(vcpu
);
5306 if (vcpu
->arch
.interrupt
.pending
) {
5307 kvm_x86_ops
->set_irq(vcpu
);
5311 /* try to inject new event if pending */
5312 if (vcpu
->arch
.nmi_pending
) {
5313 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5314 vcpu
->arch
.nmi_pending
= false;
5315 vcpu
->arch
.nmi_injected
= true;
5316 kvm_x86_ops
->set_nmi(vcpu
);
5318 } else if (kvm_cpu_has_interrupt(vcpu
)) {
5319 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5320 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5322 kvm_x86_ops
->set_irq(vcpu
);
5327 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
5329 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
5330 !vcpu
->guest_xcr0_loaded
) {
5331 /* kvm_set_xcr() also depends on this */
5332 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
5333 vcpu
->guest_xcr0_loaded
= 1;
5337 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
5339 if (vcpu
->guest_xcr0_loaded
) {
5340 if (vcpu
->arch
.xcr0
!= host_xcr0
)
5341 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
5342 vcpu
->guest_xcr0_loaded
= 0;
5346 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
5350 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
5351 vcpu
->run
->request_interrupt_window
;
5353 if (vcpu
->requests
) {
5354 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
5355 kvm_mmu_unload(vcpu
);
5356 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
5357 __kvm_migrate_timers(vcpu
);
5358 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
5359 r
= kvm_guest_time_update(vcpu
);
5363 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
5364 kvm_mmu_sync_roots(vcpu
);
5365 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
5366 kvm_x86_ops
->tlb_flush(vcpu
);
5367 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
5368 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
5372 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
5373 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
5377 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
5378 vcpu
->fpu_active
= 0;
5379 kvm_x86_ops
->fpu_deactivate(vcpu
);
5381 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
5382 /* Page is swapped out. Do synthetic halt */
5383 vcpu
->arch
.apf
.halted
= true;
5389 r
= kvm_mmu_reload(vcpu
);
5394 * An NMI can be injected between local nmi_pending read and
5395 * vcpu->arch.nmi_pending read inside inject_pending_event().
5396 * But in that case, KVM_REQ_EVENT will be set, which makes
5397 * the race described above benign.
5399 nmi_pending
= ACCESS_ONCE(vcpu
->arch
.nmi_pending
);
5401 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
5402 inject_pending_event(vcpu
);
5404 /* enable NMI/IRQ window open exits if needed */
5406 kvm_x86_ops
->enable_nmi_window(vcpu
);
5407 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
5408 kvm_x86_ops
->enable_irq_window(vcpu
);
5410 if (kvm_lapic_enabled(vcpu
)) {
5411 update_cr8_intercept(vcpu
);
5412 kvm_lapic_sync_to_vapic(vcpu
);
5418 kvm_x86_ops
->prepare_guest_switch(vcpu
);
5419 if (vcpu
->fpu_active
)
5420 kvm_load_guest_fpu(vcpu
);
5421 kvm_load_guest_xcr0(vcpu
);
5423 vcpu
->mode
= IN_GUEST_MODE
;
5425 /* We should set ->mode before check ->requests,
5426 * see the comment in make_all_cpus_request.
5430 local_irq_disable();
5432 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
5433 || need_resched() || signal_pending(current
)) {
5434 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5438 kvm_x86_ops
->cancel_injection(vcpu
);
5443 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5447 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
5449 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
5450 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
5451 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
5452 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
5455 trace_kvm_entry(vcpu
->vcpu_id
);
5456 kvm_x86_ops
->run(vcpu
);
5459 * If the guest has used debug registers, at least dr7
5460 * will be disabled while returning to the host.
5461 * If we don't have active breakpoints in the host, we don't
5462 * care about the messed up debug address registers. But if
5463 * we have some of them active, restore the old state.
5465 if (hw_breakpoint_active())
5466 hw_breakpoint_restore();
5468 kvm_get_msr(vcpu
, MSR_IA32_TSC
, &vcpu
->arch
.last_guest_tsc
);
5470 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5477 * We must have an instruction between local_irq_enable() and
5478 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5479 * the interrupt shadow. The stat.exits increment will do nicely.
5480 * But we need to prevent reordering, hence this barrier():
5488 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5491 * Profile KVM exit RIPs:
5493 if (unlikely(prof_on
== KVM_PROFILING
)) {
5494 unsigned long rip
= kvm_rip_read(vcpu
);
5495 profile_hit(KVM_PROFILING
, (void *)rip
);
5499 kvm_lapic_sync_from_vapic(vcpu
);
5501 r
= kvm_x86_ops
->handle_exit(vcpu
);
5507 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
5510 struct kvm
*kvm
= vcpu
->kvm
;
5512 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
5513 pr_debug("vcpu %d received sipi with vector # %x\n",
5514 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
5515 kvm_lapic_reset(vcpu
);
5516 r
= kvm_arch_vcpu_reset(vcpu
);
5519 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5522 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5527 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
5528 !vcpu
->arch
.apf
.halted
)
5529 r
= vcpu_enter_guest(vcpu
);
5531 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5532 kvm_vcpu_block(vcpu
);
5533 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5534 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
5536 switch(vcpu
->arch
.mp_state
) {
5537 case KVM_MP_STATE_HALTED
:
5538 vcpu
->arch
.mp_state
=
5539 KVM_MP_STATE_RUNNABLE
;
5540 case KVM_MP_STATE_RUNNABLE
:
5541 vcpu
->arch
.apf
.halted
= false;
5543 case KVM_MP_STATE_SIPI_RECEIVED
:
5554 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
5555 if (kvm_cpu_has_pending_timer(vcpu
))
5556 kvm_inject_pending_timer_irqs(vcpu
);
5558 if (dm_request_for_irq_injection(vcpu
)) {
5560 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5561 ++vcpu
->stat
.request_irq_exits
;
5564 kvm_check_async_pf_completion(vcpu
);
5566 if (signal_pending(current
)) {
5568 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5569 ++vcpu
->stat
.signal_exits
;
5571 if (need_resched()) {
5572 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5574 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5578 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5585 static int complete_mmio(struct kvm_vcpu
*vcpu
)
5587 struct kvm_run
*run
= vcpu
->run
;
5590 if (!(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
))
5593 if (vcpu
->mmio_needed
) {
5594 vcpu
->mmio_needed
= 0;
5595 if (!vcpu
->mmio_is_write
)
5596 memcpy(vcpu
->mmio_data
+ vcpu
->mmio_index
,
5598 vcpu
->mmio_index
+= 8;
5599 if (vcpu
->mmio_index
< vcpu
->mmio_size
) {
5600 run
->exit_reason
= KVM_EXIT_MMIO
;
5601 run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
+ vcpu
->mmio_index
;
5602 memcpy(run
->mmio
.data
, vcpu
->mmio_data
+ vcpu
->mmio_index
, 8);
5603 run
->mmio
.len
= min(vcpu
->mmio_size
- vcpu
->mmio_index
, 8);
5604 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
5605 vcpu
->mmio_needed
= 1;
5608 if (vcpu
->mmio_is_write
)
5610 vcpu
->mmio_read_completed
= 1;
5612 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5613 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
5614 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5615 if (r
!= EMULATE_DONE
)
5620 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
5625 if (!tsk_used_math(current
) && init_fpu(current
))
5628 if (vcpu
->sigset_active
)
5629 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
5631 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
5632 kvm_vcpu_block(vcpu
);
5633 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
5638 /* re-sync apic's tpr */
5639 if (!irqchip_in_kernel(vcpu
->kvm
)) {
5640 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
5646 r
= complete_mmio(vcpu
);
5650 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
5651 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
5652 kvm_run
->hypercall
.ret
);
5654 r
= __vcpu_run(vcpu
);
5657 post_kvm_run_save(vcpu
);
5658 if (vcpu
->sigset_active
)
5659 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
5664 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5666 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
5668 * We are here if userspace calls get_regs() in the middle of
5669 * instruction emulation. Registers state needs to be copied
5670 * back from emulation context to vcpu. Usrapace shouldn't do
5671 * that usually, but some bad designed PV devices (vmware
5672 * backdoor interface) need this to work
5674 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
5675 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
5676 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5678 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5679 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5680 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5681 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5682 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5683 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
5684 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
5685 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
5686 #ifdef CONFIG_X86_64
5687 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5688 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
5689 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
5690 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
5691 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
5692 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
5693 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
5694 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
5697 regs
->rip
= kvm_rip_read(vcpu
);
5698 regs
->rflags
= kvm_get_rflags(vcpu
);
5703 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5705 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
5706 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5708 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
5709 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
5710 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
5711 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
5712 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
5713 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
5714 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
5715 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
5716 #ifdef CONFIG_X86_64
5717 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
5718 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
5719 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
5720 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
5721 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
5722 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
5723 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
5724 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
5727 kvm_rip_write(vcpu
, regs
->rip
);
5728 kvm_set_rflags(vcpu
, regs
->rflags
);
5730 vcpu
->arch
.exception
.pending
= false;
5732 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5737 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
5739 struct kvm_segment cs
;
5741 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
5745 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
5747 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
5748 struct kvm_sregs
*sregs
)
5752 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5753 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5754 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5755 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5756 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5757 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5759 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5760 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5762 kvm_x86_ops
->get_idt(vcpu
, &dt
);
5763 sregs
->idt
.limit
= dt
.size
;
5764 sregs
->idt
.base
= dt
.address
;
5765 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
5766 sregs
->gdt
.limit
= dt
.size
;
5767 sregs
->gdt
.base
= dt
.address
;
5769 sregs
->cr0
= kvm_read_cr0(vcpu
);
5770 sregs
->cr2
= vcpu
->arch
.cr2
;
5771 sregs
->cr3
= kvm_read_cr3(vcpu
);
5772 sregs
->cr4
= kvm_read_cr4(vcpu
);
5773 sregs
->cr8
= kvm_get_cr8(vcpu
);
5774 sregs
->efer
= vcpu
->arch
.efer
;
5775 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
5777 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
5779 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
5780 set_bit(vcpu
->arch
.interrupt
.nr
,
5781 (unsigned long *)sregs
->interrupt_bitmap
);
5786 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
5787 struct kvm_mp_state
*mp_state
)
5789 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
5793 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
5794 struct kvm_mp_state
*mp_state
)
5796 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
5797 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5801 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
,
5802 bool has_error_code
, u32 error_code
)
5804 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
5807 init_emulate_ctxt(vcpu
);
5809 ret
= emulator_task_switch(&vcpu
->arch
.emulate_ctxt
,
5810 tss_selector
, reason
, has_error_code
,
5814 return EMULATE_FAIL
;
5816 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
5817 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
5818 kvm_set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
5819 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5820 return EMULATE_DONE
;
5822 EXPORT_SYMBOL_GPL(kvm_task_switch
);
5824 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
5825 struct kvm_sregs
*sregs
)
5827 int mmu_reset_needed
= 0;
5828 int pending_vec
, max_bits
, idx
;
5831 dt
.size
= sregs
->idt
.limit
;
5832 dt
.address
= sregs
->idt
.base
;
5833 kvm_x86_ops
->set_idt(vcpu
, &dt
);
5834 dt
.size
= sregs
->gdt
.limit
;
5835 dt
.address
= sregs
->gdt
.base
;
5836 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
5838 vcpu
->arch
.cr2
= sregs
->cr2
;
5839 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
5840 vcpu
->arch
.cr3
= sregs
->cr3
;
5841 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
5843 kvm_set_cr8(vcpu
, sregs
->cr8
);
5845 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
5846 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
5847 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
5849 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
5850 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
5851 vcpu
->arch
.cr0
= sregs
->cr0
;
5853 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
5854 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
5855 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
5858 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5859 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
5860 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
5861 mmu_reset_needed
= 1;
5863 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5865 if (mmu_reset_needed
)
5866 kvm_mmu_reset_context(vcpu
);
5868 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
5869 pending_vec
= find_first_bit(
5870 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
5871 if (pending_vec
< max_bits
) {
5872 kvm_queue_interrupt(vcpu
, pending_vec
, false);
5873 pr_debug("Set back pending irq %d\n", pending_vec
);
5876 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5877 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5878 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5879 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5880 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5881 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5883 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5884 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5886 update_cr8_intercept(vcpu
);
5888 /* Older userspace won't unhalt the vcpu on reset. */
5889 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
5890 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
5892 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5894 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5899 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
5900 struct kvm_guest_debug
*dbg
)
5902 unsigned long rflags
;
5905 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
5907 if (vcpu
->arch
.exception
.pending
)
5909 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
5910 kvm_queue_exception(vcpu
, DB_VECTOR
);
5912 kvm_queue_exception(vcpu
, BP_VECTOR
);
5916 * Read rflags as long as potentially injected trace flags are still
5919 rflags
= kvm_get_rflags(vcpu
);
5921 vcpu
->guest_debug
= dbg
->control
;
5922 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
5923 vcpu
->guest_debug
= 0;
5925 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
5926 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
5927 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
5928 vcpu
->arch
.switch_db_regs
=
5929 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
5931 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
5932 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
5933 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
5936 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5937 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
5938 get_segment_base(vcpu
, VCPU_SREG_CS
);
5941 * Trigger an rflags update that will inject or remove the trace
5944 kvm_set_rflags(vcpu
, rflags
);
5946 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
5956 * Translate a guest virtual address to a guest physical address.
5958 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
5959 struct kvm_translation
*tr
)
5961 unsigned long vaddr
= tr
->linear_address
;
5965 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5966 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
5967 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5968 tr
->physical_address
= gpa
;
5969 tr
->valid
= gpa
!= UNMAPPED_GVA
;
5976 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5978 struct i387_fxsave_struct
*fxsave
=
5979 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5981 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
5982 fpu
->fcw
= fxsave
->cwd
;
5983 fpu
->fsw
= fxsave
->swd
;
5984 fpu
->ftwx
= fxsave
->twd
;
5985 fpu
->last_opcode
= fxsave
->fop
;
5986 fpu
->last_ip
= fxsave
->rip
;
5987 fpu
->last_dp
= fxsave
->rdp
;
5988 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
5993 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5995 struct i387_fxsave_struct
*fxsave
=
5996 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5998 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
5999 fxsave
->cwd
= fpu
->fcw
;
6000 fxsave
->swd
= fpu
->fsw
;
6001 fxsave
->twd
= fpu
->ftwx
;
6002 fxsave
->fop
= fpu
->last_opcode
;
6003 fxsave
->rip
= fpu
->last_ip
;
6004 fxsave
->rdp
= fpu
->last_dp
;
6005 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
6010 int fx_init(struct kvm_vcpu
*vcpu
)
6014 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
6018 fpu_finit(&vcpu
->arch
.guest_fpu
);
6021 * Ensure guest xcr0 is valid for loading
6023 vcpu
->arch
.xcr0
= XSTATE_FP
;
6025 vcpu
->arch
.cr0
|= X86_CR0_ET
;
6029 EXPORT_SYMBOL_GPL(fx_init
);
6031 static void fx_free(struct kvm_vcpu
*vcpu
)
6033 fpu_free(&vcpu
->arch
.guest_fpu
);
6036 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
6038 if (vcpu
->guest_fpu_loaded
)
6042 * Restore all possible states in the guest,
6043 * and assume host would use all available bits.
6044 * Guest xcr0 would be loaded later.
6046 kvm_put_guest_xcr0(vcpu
);
6047 vcpu
->guest_fpu_loaded
= 1;
6048 unlazy_fpu(current
);
6049 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
6053 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
6055 kvm_put_guest_xcr0(vcpu
);
6057 if (!vcpu
->guest_fpu_loaded
)
6060 vcpu
->guest_fpu_loaded
= 0;
6061 fpu_save_init(&vcpu
->arch
.guest_fpu
);
6062 ++vcpu
->stat
.fpu_reload
;
6063 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
6067 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
6069 kvmclock_reset(vcpu
);
6071 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
6073 kvm_x86_ops
->vcpu_free(vcpu
);
6076 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
6079 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
6080 printk_once(KERN_WARNING
6081 "kvm: SMP vm created on host with unstable TSC; "
6082 "guest TSC will not be reliable\n");
6083 return kvm_x86_ops
->vcpu_create(kvm
, id
);
6086 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
6090 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
6092 r
= kvm_arch_vcpu_reset(vcpu
);
6094 r
= kvm_mmu_setup(vcpu
);
6101 kvm_x86_ops
->vcpu_free(vcpu
);
6105 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
6107 vcpu
->arch
.apf
.msr_val
= 0;
6110 kvm_mmu_unload(vcpu
);
6114 kvm_x86_ops
->vcpu_free(vcpu
);
6117 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
6119 vcpu
->arch
.nmi_pending
= false;
6120 vcpu
->arch
.nmi_injected
= false;
6122 vcpu
->arch
.switch_db_regs
= 0;
6123 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
6124 vcpu
->arch
.dr6
= DR6_FIXED_1
;
6125 vcpu
->arch
.dr7
= DR7_FIXED_1
;
6127 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6128 vcpu
->arch
.apf
.msr_val
= 0;
6130 kvmclock_reset(vcpu
);
6132 kvm_clear_async_pf_completion_queue(vcpu
);
6133 kvm_async_pf_hash_reset(vcpu
);
6134 vcpu
->arch
.apf
.halted
= false;
6136 return kvm_x86_ops
->vcpu_reset(vcpu
);
6139 int kvm_arch_hardware_enable(void *garbage
)
6142 struct kvm_vcpu
*vcpu
;
6145 kvm_shared_msr_cpu_online();
6146 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6147 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6148 if (vcpu
->cpu
== smp_processor_id())
6149 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6150 return kvm_x86_ops
->hardware_enable(garbage
);
6153 void kvm_arch_hardware_disable(void *garbage
)
6155 kvm_x86_ops
->hardware_disable(garbage
);
6156 drop_user_return_notifiers(garbage
);
6159 int kvm_arch_hardware_setup(void)
6161 return kvm_x86_ops
->hardware_setup();
6164 void kvm_arch_hardware_unsetup(void)
6166 kvm_x86_ops
->hardware_unsetup();
6169 void kvm_arch_check_processor_compat(void *rtn
)
6171 kvm_x86_ops
->check_processor_compatibility(rtn
);
6174 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
6180 BUG_ON(vcpu
->kvm
== NULL
);
6183 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
6184 vcpu
->arch
.walk_mmu
= &vcpu
->arch
.mmu
;
6185 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
6186 vcpu
->arch
.mmu
.translate_gpa
= translate_gpa
;
6187 vcpu
->arch
.nested_mmu
.translate_gpa
= translate_nested_gpa
;
6188 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
6189 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6191 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
6193 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
6198 vcpu
->arch
.pio_data
= page_address(page
);
6200 kvm_init_tsc_catchup(vcpu
, max_tsc_khz
);
6202 r
= kvm_mmu_create(vcpu
);
6204 goto fail_free_pio_data
;
6206 if (irqchip_in_kernel(kvm
)) {
6207 r
= kvm_create_lapic(vcpu
);
6209 goto fail_mmu_destroy
;
6212 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
6214 if (!vcpu
->arch
.mce_banks
) {
6216 goto fail_free_lapic
;
6218 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
6220 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
))
6221 goto fail_free_mce_banks
;
6223 kvm_async_pf_hash_reset(vcpu
);
6226 fail_free_mce_banks
:
6227 kfree(vcpu
->arch
.mce_banks
);
6229 kvm_free_lapic(vcpu
);
6231 kvm_mmu_destroy(vcpu
);
6233 free_page((unsigned long)vcpu
->arch
.pio_data
);
6238 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
6242 kfree(vcpu
->arch
.mce_banks
);
6243 kvm_free_lapic(vcpu
);
6244 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6245 kvm_mmu_destroy(vcpu
);
6246 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6247 free_page((unsigned long)vcpu
->arch
.pio_data
);
6250 int kvm_arch_init_vm(struct kvm
*kvm
)
6252 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
6253 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
6255 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6256 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
6258 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
6263 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
6266 kvm_mmu_unload(vcpu
);
6270 static void kvm_free_vcpus(struct kvm
*kvm
)
6273 struct kvm_vcpu
*vcpu
;
6276 * Unpin any mmu pages first.
6278 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6279 kvm_clear_async_pf_completion_queue(vcpu
);
6280 kvm_unload_vcpu_mmu(vcpu
);
6282 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6283 kvm_arch_vcpu_free(vcpu
);
6285 mutex_lock(&kvm
->lock
);
6286 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
6287 kvm
->vcpus
[i
] = NULL
;
6289 atomic_set(&kvm
->online_vcpus
, 0);
6290 mutex_unlock(&kvm
->lock
);
6293 void kvm_arch_sync_events(struct kvm
*kvm
)
6295 kvm_free_all_assigned_devices(kvm
);
6299 void kvm_arch_destroy_vm(struct kvm
*kvm
)
6301 kvm_iommu_unmap_guest(kvm
);
6302 kfree(kvm
->arch
.vpic
);
6303 kfree(kvm
->arch
.vioapic
);
6304 kvm_free_vcpus(kvm
);
6305 if (kvm
->arch
.apic_access_page
)
6306 put_page(kvm
->arch
.apic_access_page
);
6307 if (kvm
->arch
.ept_identity_pagetable
)
6308 put_page(kvm
->arch
.ept_identity_pagetable
);
6311 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
6312 struct kvm_memory_slot
*memslot
,
6313 struct kvm_memory_slot old
,
6314 struct kvm_userspace_memory_region
*mem
,
6317 int npages
= memslot
->npages
;
6318 int map_flags
= MAP_PRIVATE
| MAP_ANONYMOUS
;
6320 /* Prevent internal slot pages from being moved by fork()/COW. */
6321 if (memslot
->id
>= KVM_MEMORY_SLOTS
)
6322 map_flags
= MAP_SHARED
| MAP_ANONYMOUS
;
6324 /*To keep backward compatibility with older userspace,
6325 *x86 needs to hanlde !user_alloc case.
6328 if (npages
&& !old
.rmap
) {
6329 unsigned long userspace_addr
;
6331 down_write(¤t
->mm
->mmap_sem
);
6332 userspace_addr
= do_mmap(NULL
, 0,
6334 PROT_READ
| PROT_WRITE
,
6337 up_write(¤t
->mm
->mmap_sem
);
6339 if (IS_ERR((void *)userspace_addr
))
6340 return PTR_ERR((void *)userspace_addr
);
6342 memslot
->userspace_addr
= userspace_addr
;
6350 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
6351 struct kvm_userspace_memory_region
*mem
,
6352 struct kvm_memory_slot old
,
6356 int nr_mmu_pages
= 0, npages
= mem
->memory_size
>> PAGE_SHIFT
;
6358 if (!user_alloc
&& !old
.user_alloc
&& old
.rmap
&& !npages
) {
6361 down_write(¤t
->mm
->mmap_sem
);
6362 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
6363 old
.npages
* PAGE_SIZE
);
6364 up_write(¤t
->mm
->mmap_sem
);
6367 "kvm_vm_ioctl_set_memory_region: "
6368 "failed to munmap memory\n");
6371 if (!kvm
->arch
.n_requested_mmu_pages
)
6372 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
6374 spin_lock(&kvm
->mmu_lock
);
6376 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
6377 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
6378 spin_unlock(&kvm
->mmu_lock
);
6381 void kvm_arch_flush_shadow(struct kvm
*kvm
)
6383 kvm_mmu_zap_all(kvm
);
6384 kvm_reload_remote_mmus(kvm
);
6387 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
6389 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6390 !vcpu
->arch
.apf
.halted
)
6391 || !list_empty_careful(&vcpu
->async_pf
.done
)
6392 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
6393 || vcpu
->arch
.nmi_pending
||
6394 (kvm_arch_interrupt_allowed(vcpu
) &&
6395 kvm_cpu_has_interrupt(vcpu
));
6398 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
6401 int cpu
= vcpu
->cpu
;
6403 if (waitqueue_active(&vcpu
->wq
)) {
6404 wake_up_interruptible(&vcpu
->wq
);
6405 ++vcpu
->stat
.halt_wakeup
;
6409 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
6410 if (kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
)
6411 smp_send_reschedule(cpu
);
6415 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
6417 return kvm_x86_ops
->interrupt_allowed(vcpu
);
6420 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
6422 unsigned long current_rip
= kvm_rip_read(vcpu
) +
6423 get_segment_base(vcpu
, VCPU_SREG_CS
);
6425 return current_rip
== linear_rip
;
6427 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
6429 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
6431 unsigned long rflags
;
6433 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
6434 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6435 rflags
&= ~X86_EFLAGS_TF
;
6438 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
6440 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
6442 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
6443 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
6444 rflags
|= X86_EFLAGS_TF
;
6445 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
6446 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6448 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
6450 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
6454 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
6455 is_error_page(work
->page
))
6458 r
= kvm_mmu_reload(vcpu
);
6462 if (!vcpu
->arch
.mmu
.direct_map
&&
6463 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
6466 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
6469 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
6471 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
6474 static inline u32
kvm_async_pf_next_probe(u32 key
)
6476 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
6479 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6481 u32 key
= kvm_async_pf_hash_fn(gfn
);
6483 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
6484 key
= kvm_async_pf_next_probe(key
);
6486 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
6489 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6492 u32 key
= kvm_async_pf_hash_fn(gfn
);
6494 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
6495 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
6496 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
6497 key
= kvm_async_pf_next_probe(key
);
6502 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6504 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
6507 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6511 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
6513 vcpu
->arch
.apf
.gfns
[i
] = ~0;
6515 j
= kvm_async_pf_next_probe(j
);
6516 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
6518 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
6520 * k lies cyclically in ]i,j]
6522 * |....j i.k.| or |.k..j i...|
6524 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
6525 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
6530 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
6533 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
6537 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
6538 struct kvm_async_pf
*work
)
6540 struct x86_exception fault
;
6542 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
6543 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6545 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
6546 (vcpu
->arch
.apf
.send_user_only
&&
6547 kvm_x86_ops
->get_cpl(vcpu
) == 0))
6548 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
6549 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
6550 fault
.vector
= PF_VECTOR
;
6551 fault
.error_code_valid
= true;
6552 fault
.error_code
= 0;
6553 fault
.nested_page_fault
= false;
6554 fault
.address
= work
->arch
.token
;
6555 kvm_inject_page_fault(vcpu
, &fault
);
6559 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
6560 struct kvm_async_pf
*work
)
6562 struct x86_exception fault
;
6564 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
6565 if (is_error_page(work
->page
))
6566 work
->arch
.token
= ~0; /* broadcast wakeup */
6568 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6570 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
6571 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
6572 fault
.vector
= PF_VECTOR
;
6573 fault
.error_code_valid
= true;
6574 fault
.error_code
= 0;
6575 fault
.nested_page_fault
= false;
6576 fault
.address
= work
->arch
.token
;
6577 kvm_inject_page_fault(vcpu
, &fault
);
6579 vcpu
->arch
.apf
.halted
= false;
6582 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
6584 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
6587 return !kvm_event_needs_reinjection(vcpu
) &&
6588 kvm_x86_ops
->interrupt_allowed(vcpu
);
6591 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
6592 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
6593 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
6594 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
6595 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
6596 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
6597 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
6598 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
6599 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
6600 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
6601 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
6602 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);