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[linux-2.6/next.git] / include / linux / dma-mapping.h
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1 #ifndef _LINUX_DMA_MAPPING_H
2 #define _LINUX_DMA_MAPPING_H
4 #include <linux/device.h>
5 #include <linux/err.h>
6 #include <linux/dma-attrs.h>
7 #include <linux/scatterlist.h>
9 /* These definitions mirror those in pci.h, so they can be used
10 * interchangeably with their PCI_ counterparts */
11 enum dma_data_direction {
12 DMA_BIDIRECTIONAL = 0,
13 DMA_TO_DEVICE = 1,
14 DMA_FROM_DEVICE = 2,
15 DMA_NONE = 3,
18 struct dma_map_ops {
19 void* (*alloc_coherent)(struct device *dev, size_t size,
20 dma_addr_t *dma_handle, gfp_t gfp);
21 void (*free_coherent)(struct device *dev, size_t size,
22 void *vaddr, dma_addr_t dma_handle);
23 dma_addr_t (*map_page)(struct device *dev, struct page *page,
24 unsigned long offset, size_t size,
25 enum dma_data_direction dir,
26 struct dma_attrs *attrs);
27 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
28 size_t size, enum dma_data_direction dir,
29 struct dma_attrs *attrs);
30 int (*map_sg)(struct device *dev, struct scatterlist *sg,
31 int nents, enum dma_data_direction dir,
32 struct dma_attrs *attrs);
33 void (*unmap_sg)(struct device *dev,
34 struct scatterlist *sg, int nents,
35 enum dma_data_direction dir,
36 struct dma_attrs *attrs);
37 void (*sync_single_for_cpu)(struct device *dev,
38 dma_addr_t dma_handle, size_t size,
39 enum dma_data_direction dir);
40 void (*sync_single_for_device)(struct device *dev,
41 dma_addr_t dma_handle, size_t size,
42 enum dma_data_direction dir);
43 void (*sync_sg_for_cpu)(struct device *dev,
44 struct scatterlist *sg, int nents,
45 enum dma_data_direction dir);
46 void (*sync_sg_for_device)(struct device *dev,
47 struct scatterlist *sg, int nents,
48 enum dma_data_direction dir);
49 int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
50 int (*dma_supported)(struct device *dev, u64 mask);
51 int (*set_dma_mask)(struct device *dev, u64 mask);
52 int is_phys;
55 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
57 typedef u64 DMA_nnBIT_MASK __deprecated;
60 * NOTE: do not use the below macros in new code and do not add new definitions
61 * here.
63 * Instead, just open-code DMA_BIT_MASK(n) within your driver
65 #define DMA_64BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(64)
66 #define DMA_48BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(48)
67 #define DMA_47BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(47)
68 #define DMA_40BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(40)
69 #define DMA_39BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(39)
70 #define DMA_35BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(35)
71 #define DMA_32BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(32)
72 #define DMA_31BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(31)
73 #define DMA_30BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(30)
74 #define DMA_29BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(29)
75 #define DMA_28BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(28)
76 #define DMA_24BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(24)
78 #define DMA_MASK_NONE 0x0ULL
80 static inline int valid_dma_direction(int dma_direction)
82 return ((dma_direction == DMA_BIDIRECTIONAL) ||
83 (dma_direction == DMA_TO_DEVICE) ||
84 (dma_direction == DMA_FROM_DEVICE));
87 static inline int is_device_dma_capable(struct device *dev)
89 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
92 #ifdef CONFIG_HAS_DMA
93 #include <asm/dma-mapping.h>
94 #else
95 #include <asm-generic/dma-mapping-broken.h>
96 #endif
98 static inline u64 dma_get_mask(struct device *dev)
100 if (dev && dev->dma_mask && *dev->dma_mask)
101 return *dev->dma_mask;
102 return DMA_BIT_MASK(32);
105 #ifdef ARCH_HAS_DMA_SET_COHERENT_MASK
106 int dma_set_coherent_mask(struct device *dev, u64 mask);
107 #else
108 static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
110 if (!dma_supported(dev, mask))
111 return -EIO;
112 dev->coherent_dma_mask = mask;
113 return 0;
115 #endif
117 extern u64 dma_get_required_mask(struct device *dev);
119 static inline unsigned int dma_get_max_seg_size(struct device *dev)
121 return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
124 static inline unsigned int dma_set_max_seg_size(struct device *dev,
125 unsigned int size)
127 if (dev->dma_parms) {
128 dev->dma_parms->max_segment_size = size;
129 return 0;
130 } else
131 return -EIO;
134 static inline unsigned long dma_get_seg_boundary(struct device *dev)
136 return dev->dma_parms ?
137 dev->dma_parms->segment_boundary_mask : 0xffffffff;
140 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
142 if (dev->dma_parms) {
143 dev->dma_parms->segment_boundary_mask = mask;
144 return 0;
145 } else
146 return -EIO;
149 #ifdef CONFIG_HAS_DMA
150 static inline int dma_get_cache_alignment(void)
152 #ifdef ARCH_DMA_MINALIGN
153 return ARCH_DMA_MINALIGN;
154 #endif
155 return 1;
157 #endif
159 /* flags for the coherent memory api */
160 #define DMA_MEMORY_MAP 0x01
161 #define DMA_MEMORY_IO 0x02
162 #define DMA_MEMORY_INCLUDES_CHILDREN 0x04
163 #define DMA_MEMORY_EXCLUSIVE 0x08
165 #ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
166 static inline int
167 dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
168 dma_addr_t device_addr, size_t size, int flags)
170 return 0;
173 static inline void
174 dma_release_declared_memory(struct device *dev)
178 static inline void *
179 dma_mark_declared_memory_occupied(struct device *dev,
180 dma_addr_t device_addr, size_t size)
182 return ERR_PTR(-EBUSY);
184 #endif
187 * Managed DMA API
189 extern void *dmam_alloc_coherent(struct device *dev, size_t size,
190 dma_addr_t *dma_handle, gfp_t gfp);
191 extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
192 dma_addr_t dma_handle);
193 extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
194 dma_addr_t *dma_handle, gfp_t gfp);
195 extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
196 dma_addr_t dma_handle);
197 #ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
198 extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
199 dma_addr_t device_addr, size_t size,
200 int flags);
201 extern void dmam_release_declared_memory(struct device *dev);
202 #else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
203 static inline int dmam_declare_coherent_memory(struct device *dev,
204 dma_addr_t bus_addr, dma_addr_t device_addr,
205 size_t size, gfp_t gfp)
207 return 0;
210 static inline void dmam_release_declared_memory(struct device *dev)
213 #endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
215 #ifndef CONFIG_HAVE_DMA_ATTRS
216 struct dma_attrs;
218 #define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \
219 dma_map_single(dev, cpu_addr, size, dir)
221 #define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \
222 dma_unmap_single(dev, dma_addr, size, dir)
224 #define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \
225 dma_map_sg(dev, sgl, nents, dir)
227 #define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \
228 dma_unmap_sg(dev, sgl, nents, dir)
230 #endif /* CONFIG_HAVE_DMA_ATTRS */
232 #ifdef CONFIG_NEED_DMA_MAP_STATE
233 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME
234 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME
235 #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
236 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
237 #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
238 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
239 #else
240 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
241 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
242 #define dma_unmap_addr(PTR, ADDR_NAME) (0)
243 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
244 #define dma_unmap_len(PTR, LEN_NAME) (0)
245 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
246 #endif
248 #endif