2 * Author: Andy Fleming <afleming@freescale.com>
3 * Kumar Gala <galak@kernel.crashing.org>
5 * Copyright 2006-2008 Freescale Semiconductor Inc.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
13 #include <linux/stddef.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
19 #include <asm/machdep.h>
20 #include <asm/pgtable.h>
23 #include <asm/cacheflush.h>
24 #include <asm/dbell.h>
26 #include <sysdev/fsl_soc.h>
28 extern void __early_start(void);
30 #define BOOT_ENTRY_ADDR_UPPER 0
31 #define BOOT_ENTRY_ADDR_LOWER 1
32 #define BOOT_ENTRY_R3_UPPER 2
33 #define BOOT_ENTRY_R3_LOWER 3
34 #define BOOT_ENTRY_RESV 4
35 #define BOOT_ENTRY_PIR 5
36 #define BOOT_ENTRY_R6_UPPER 6
37 #define BOOT_ENTRY_R6_LOWER 7
38 #define NUM_BOOT_ENTRY 8
39 #define SIZE_BOOT_ENTRY (NUM_BOOT_ENTRY * sizeof(u32))
42 smp_85xx_kick_cpu(int nr
)
45 const u64
*cpu_rel_addr
;
46 __iomem u32
*bptr_vaddr
;
47 struct device_node
*np
;
51 WARN_ON (nr
< 0 || nr
>= NR_CPUS
);
53 pr_debug("smp_85xx_kick_cpu: kick CPU #%d\n", nr
);
55 np
= of_get_cpu_node(nr
, NULL
);
56 cpu_rel_addr
= of_get_property(np
, "cpu-release-addr", NULL
);
58 if (cpu_rel_addr
== NULL
) {
59 printk(KERN_ERR
"No cpu-release-addr for cpu %d\n", nr
);
64 * A secondary core could be in a spinloop in the bootpage
65 * (0xfffff000), somewhere in highmem, or somewhere in lowmem.
66 * The bootpage and highmem can be accessed via ioremap(), but
67 * we need to directly access the spinloop if its in lowmem.
69 ioremappable
= *cpu_rel_addr
> virt_to_phys(high_memory
);
71 /* Map the spin table */
73 bptr_vaddr
= ioremap(*cpu_rel_addr
, SIZE_BOOT_ENTRY
);
75 bptr_vaddr
= phys_to_virt(*cpu_rel_addr
);
77 local_irq_save(flags
);
79 out_be32(bptr_vaddr
+ BOOT_ENTRY_PIR
, nr
);
80 out_be32(bptr_vaddr
+ BOOT_ENTRY_ADDR_LOWER
, __pa(__early_start
));
83 flush_dcache_range((ulong
)bptr_vaddr
,
84 (ulong
)(bptr_vaddr
+ SIZE_BOOT_ENTRY
));
86 /* Wait a bit for the CPU to ack. */
87 while ((__secondary_hold_acknowledge
!= nr
) && (++n
< 1000))
90 local_irq_restore(flags
);
95 pr_debug("waited %d msecs for CPU #%d.\n", n
, nr
);
99 smp_85xx_setup_cpu(int cpu_nr
)
101 mpic_setup_this_cpu();
104 struct smp_ops_t smp_85xx_ops
= {
105 .kick_cpu
= smp_85xx_kick_cpu
,
108 void __init
mpc85xx_smp_init(void)
110 struct device_node
*np
;
112 np
= of_find_node_by_type(NULL
, "open-pic");
114 smp_85xx_ops
.probe
= smp_mpic_probe
;
115 smp_85xx_ops
.setup_cpu
= smp_85xx_setup_cpu
;
116 smp_85xx_ops
.message_pass
= smp_mpic_message_pass
;
119 if (cpu_has_feature(CPU_FTR_DBELL
))
120 smp_85xx_ops
.message_pass
= smp_dbell_message_pass
;
122 BUG_ON(!smp_85xx_ops
.message_pass
);
124 smp_ops
= &smp_85xx_ops
;