This client driver allows you to use a GPIO pin as a source for PPS
[linux-2.6/next.git] / arch / arm / mach-omap1 / board-h3.c
blob8f5b6af7ed592498efd46a2a30f42f04681a79dc
1 /*
2 * linux/arch/arm/mach-omap1/board-h3.c
4 * This file contains OMAP1710 H3 specific code.
6 * Copyright (C) 2004 Texas Instruments, Inc.
7 * Copyright (C) 2002 MontaVista Software, Inc.
8 * Copyright (C) 2001 RidgeRun, Inc.
9 * Author: RidgeRun, Inc.
10 * Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
16 #include <linux/gpio.h>
17 #include <linux/types.h>
18 #include <linux/init.h>
19 #include <linux/major.h>
20 #include <linux/kernel.h>
21 #include <linux/platform_device.h>
22 #include <linux/errno.h>
23 #include <linux/workqueue.h>
24 #include <linux/i2c.h>
25 #include <linux/mtd/mtd.h>
26 #include <linux/mtd/nand.h>
27 #include <linux/mtd/partitions.h>
28 #include <linux/mtd/physmap.h>
29 #include <linux/input.h>
30 #include <linux/spi/spi.h>
31 #include <linux/i2c/tps65010.h>
32 #include <linux/smc91x.h>
34 #include <asm/setup.h>
35 #include <asm/page.h>
36 #include <mach/hardware.h>
38 #include <asm/mach-types.h>
39 #include <asm/mach/arch.h>
40 #include <asm/mach/map.h>
42 #include <mach/irqs.h>
43 #include <plat/mux.h>
44 #include <plat/tc.h>
45 #include <plat/usb.h>
46 #include <plat/keypad.h>
47 #include <plat/dma.h>
48 #include <plat/common.h>
49 #include <plat/flash.h>
51 #include "board-h3.h"
53 /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
54 #define OMAP1710_ETHR_START 0x04000300
56 #define H3_TS_GPIO 48
58 static const unsigned int h3_keymap[] = {
59 KEY(0, 0, KEY_LEFT),
60 KEY(1, 0, KEY_RIGHT),
61 KEY(2, 0, KEY_3),
62 KEY(3, 0, KEY_F10),
63 KEY(4, 0, KEY_F5),
64 KEY(5, 0, KEY_9),
65 KEY(0, 1, KEY_DOWN),
66 KEY(1, 1, KEY_UP),
67 KEY(2, 1, KEY_2),
68 KEY(3, 1, KEY_F9),
69 KEY(4, 1, KEY_F7),
70 KEY(5, 1, KEY_0),
71 KEY(0, 2, KEY_ENTER),
72 KEY(1, 2, KEY_6),
73 KEY(2, 2, KEY_1),
74 KEY(3, 2, KEY_F2),
75 KEY(4, 2, KEY_F6),
76 KEY(5, 2, KEY_HOME),
77 KEY(0, 3, KEY_8),
78 KEY(1, 3, KEY_5),
79 KEY(2, 3, KEY_F12),
80 KEY(3, 3, KEY_F3),
81 KEY(4, 3, KEY_F8),
82 KEY(5, 3, KEY_END),
83 KEY(0, 4, KEY_7),
84 KEY(1, 4, KEY_4),
85 KEY(2, 4, KEY_F11),
86 KEY(3, 4, KEY_F1),
87 KEY(4, 4, KEY_F4),
88 KEY(5, 4, KEY_ESC),
89 KEY(0, 5, KEY_F13),
90 KEY(1, 5, KEY_F14),
91 KEY(2, 5, KEY_F15),
92 KEY(3, 5, KEY_F16),
93 KEY(4, 5, KEY_SLEEP),
97 static struct mtd_partition nor_partitions[] = {
98 /* bootloader (U-Boot, etc) in first sector */
100 .name = "bootloader",
101 .offset = 0,
102 .size = SZ_128K,
103 .mask_flags = MTD_WRITEABLE, /* force read-only */
105 /* bootloader params in the next sector */
107 .name = "params",
108 .offset = MTDPART_OFS_APPEND,
109 .size = SZ_128K,
110 .mask_flags = 0,
112 /* kernel */
114 .name = "kernel",
115 .offset = MTDPART_OFS_APPEND,
116 .size = SZ_2M,
117 .mask_flags = 0
119 /* file system */
121 .name = "filesystem",
122 .offset = MTDPART_OFS_APPEND,
123 .size = MTDPART_SIZ_FULL,
124 .mask_flags = 0
128 static struct physmap_flash_data nor_data = {
129 .width = 2,
130 .set_vpp = omap1_set_vpp,
131 .parts = nor_partitions,
132 .nr_parts = ARRAY_SIZE(nor_partitions),
135 static struct resource nor_resource = {
136 /* This is on CS3, wherever it's mapped */
137 .flags = IORESOURCE_MEM,
140 static struct platform_device nor_device = {
141 .name = "physmap-flash",
142 .id = 0,
143 .dev = {
144 .platform_data = &nor_data,
146 .num_resources = 1,
147 .resource = &nor_resource,
150 static struct mtd_partition nand_partitions[] = {
151 #if 0
152 /* REVISIT: enable these partitions if you make NAND BOOT work */
154 .name = "xloader",
155 .offset = 0,
156 .size = 64 * 1024,
157 .mask_flags = MTD_WRITEABLE, /* force read-only */
160 .name = "bootloader",
161 .offset = MTDPART_OFS_APPEND,
162 .size = 256 * 1024,
163 .mask_flags = MTD_WRITEABLE, /* force read-only */
166 .name = "params",
167 .offset = MTDPART_OFS_APPEND,
168 .size = 192 * 1024,
171 .name = "kernel",
172 .offset = MTDPART_OFS_APPEND,
173 .size = 2 * SZ_1M,
175 #endif
177 .name = "filesystem",
178 .size = MTDPART_SIZ_FULL,
179 .offset = MTDPART_OFS_APPEND,
183 static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
185 struct nand_chip *this = mtd->priv;
186 unsigned long mask;
188 if (cmd == NAND_CMD_NONE)
189 return;
191 mask = (ctrl & NAND_CLE) ? 0x02 : 0;
192 if (ctrl & NAND_ALE)
193 mask |= 0x04;
194 writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
197 #define H3_NAND_RB_GPIO_PIN 10
199 static int nand_dev_ready(struct mtd_info *mtd)
201 return gpio_get_value(H3_NAND_RB_GPIO_PIN);
204 static const char *part_probes[] = { "cmdlinepart", NULL };
206 static struct platform_nand_data nand_platdata = {
207 .chip = {
208 .nr_chips = 1,
209 .chip_offset = 0,
210 .nr_partitions = ARRAY_SIZE(nand_partitions),
211 .partitions = nand_partitions,
212 .options = NAND_SAMSUNG_LP_OPTIONS,
213 .part_probe_types = part_probes,
215 .ctrl = {
216 .cmd_ctrl = nand_cmd_ctl,
217 .dev_ready = nand_dev_ready,
222 static struct resource nand_resource = {
223 .flags = IORESOURCE_MEM,
226 static struct platform_device nand_device = {
227 .name = "gen_nand",
228 .id = 0,
229 .dev = {
230 .platform_data = &nand_platdata,
232 .num_resources = 1,
233 .resource = &nand_resource,
236 static struct smc91x_platdata smc91x_info = {
237 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
238 .leda = RPC_LED_100_10,
239 .ledb = RPC_LED_TX_RX,
242 static struct resource smc91x_resources[] = {
243 [0] = {
244 .start = OMAP1710_ETHR_START, /* Physical */
245 .end = OMAP1710_ETHR_START + 0xf,
246 .flags = IORESOURCE_MEM,
248 [1] = {
249 .start = OMAP_GPIO_IRQ(40),
250 .end = OMAP_GPIO_IRQ(40),
251 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
255 static struct platform_device smc91x_device = {
256 .name = "smc91x",
257 .id = 0,
258 .dev = {
259 .platform_data = &smc91x_info,
261 .num_resources = ARRAY_SIZE(smc91x_resources),
262 .resource = smc91x_resources,
265 static void __init h3_init_smc91x(void)
267 omap_cfg_reg(W15_1710_GPIO40);
268 if (gpio_request(40, "SMC91x irq") < 0) {
269 printk("Error requesting gpio 40 for smc91x irq\n");
270 return;
274 #define GPTIMER_BASE 0xFFFB1400
275 #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
276 #define GPTIMER_REGS_SIZE 0x46
278 static struct resource intlat_resources[] = {
279 [0] = {
280 .start = GPTIMER_REGS(0), /* Physical */
281 .end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
282 .flags = IORESOURCE_MEM,
284 [1] = {
285 .start = INT_1610_GPTIMER1,
286 .end = INT_1610_GPTIMER1,
287 .flags = IORESOURCE_IRQ,
291 static struct platform_device intlat_device = {
292 .name = "omap_intlat",
293 .id = 0,
294 .num_resources = ARRAY_SIZE(intlat_resources),
295 .resource = intlat_resources,
298 static struct resource h3_kp_resources[] = {
299 [0] = {
300 .start = INT_KEYBOARD,
301 .end = INT_KEYBOARD,
302 .flags = IORESOURCE_IRQ,
306 static const struct matrix_keymap_data h3_keymap_data = {
307 .keymap = h3_keymap,
308 .keymap_size = ARRAY_SIZE(h3_keymap),
311 static struct omap_kp_platform_data h3_kp_data = {
312 .rows = 8,
313 .cols = 8,
314 .keymap_data = &h3_keymap_data,
315 .rep = true,
316 .delay = 9,
317 .dbounce = true,
320 static struct platform_device h3_kp_device = {
321 .name = "omap-keypad",
322 .id = -1,
323 .dev = {
324 .platform_data = &h3_kp_data,
326 .num_resources = ARRAY_SIZE(h3_kp_resources),
327 .resource = h3_kp_resources,
330 static struct platform_device h3_lcd_device = {
331 .name = "lcd_h3",
332 .id = -1,
335 static struct spi_board_info h3_spi_board_info[] __initdata = {
336 [0] = {
337 .modalias = "tsc2101",
338 .bus_num = 2,
339 .chip_select = 0,
340 .irq = OMAP_GPIO_IRQ(H3_TS_GPIO),
341 .max_speed_hz = 16000000,
342 /* .platform_data = &tsc_platform_data, */
346 static struct platform_device *devices[] __initdata = {
347 &nor_device,
348 &nand_device,
349 &smc91x_device,
350 &intlat_device,
351 &h3_kp_device,
352 &h3_lcd_device,
355 static struct omap_usb_config h3_usb_config __initdata = {
356 /* usb1 has a Mini-AB port and external isp1301 transceiver */
357 .otg = 2,
359 #ifdef CONFIG_USB_GADGET_OMAP
360 .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
361 #elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
362 /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
363 .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */
364 #endif
366 .pins[1] = 3,
369 static struct omap_lcd_config h3_lcd_config __initdata = {
370 .ctrl_name = "internal",
373 static struct omap_board_config_kernel h3_config[] __initdata = {
374 { OMAP_TAG_LCD, &h3_lcd_config },
377 static struct i2c_board_info __initdata h3_i2c_board_info[] = {
379 I2C_BOARD_INFO("tps65013", 0x48),
380 /* .irq = OMAP_GPIO_IRQ(??), */
383 I2C_BOARD_INFO("isp1301_omap", 0x2d),
384 .irq = OMAP_GPIO_IRQ(14),
388 static void __init h3_init(void)
390 h3_init_smc91x();
392 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
393 * to address 0 by a dip switch), NAND on CS2B. The NAND driver will
394 * notice whether a NAND chip is enabled at probe time.
396 * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
397 * (which on H2 may be 16bit) on CS3. Try detecting that in code here,
398 * to avoid probing every possible flash configuration...
400 nor_resource.end = nor_resource.start = omap_cs3_phys();
401 nor_resource.end += SZ_32M - 1;
403 nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
404 nand_resource.end += SZ_4K - 1;
405 if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
406 BUG();
407 gpio_direction_input(H3_NAND_RB_GPIO_PIN);
409 /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
410 /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
411 omap_cfg_reg(V2_1710_GPIO10);
413 /* Mux pins for keypad */
414 omap_cfg_reg(F18_1610_KBC0);
415 omap_cfg_reg(D20_1610_KBC1);
416 omap_cfg_reg(D19_1610_KBC2);
417 omap_cfg_reg(E18_1610_KBC3);
418 omap_cfg_reg(C21_1610_KBC4);
419 omap_cfg_reg(G18_1610_KBR0);
420 omap_cfg_reg(F19_1610_KBR1);
421 omap_cfg_reg(H14_1610_KBR2);
422 omap_cfg_reg(E20_1610_KBR3);
423 omap_cfg_reg(E19_1610_KBR4);
424 omap_cfg_reg(N19_1610_KBR5);
426 platform_add_devices(devices, ARRAY_SIZE(devices));
427 spi_register_board_info(h3_spi_board_info,
428 ARRAY_SIZE(h3_spi_board_info));
429 omap_board_config = h3_config;
430 omap_board_config_size = ARRAY_SIZE(h3_config);
431 omap_serial_init();
432 omap_register_i2c_bus(1, 100, h3_i2c_board_info,
433 ARRAY_SIZE(h3_i2c_board_info));
434 omap1_usb_init(&h3_usb_config);
435 h3_mmc_init();
438 static void __init h3_init_irq(void)
440 omap1_init_common_hw();
441 omap1_init_irq();
444 static void __init h3_map_io(void)
446 omap1_map_common_io();
449 MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
450 /* Maintainer: Texas Instruments, Inc. */
451 .atag_offset = 0x100,
452 .map_io = h3_map_io,
453 .reserve = omap_reserve,
454 .init_irq = h3_init_irq,
455 .init_machine = h3_init,
456 .timer = &omap1_timer,
457 MACHINE_END