This client driver allows you to use a GPIO pin as a source for PPS
[linux-2.6/next.git] / arch / powerpc / mm / mmu_context_nohash.c
blob336807de550efa1a33db56ffc5b5866c3013fbc9
1 /*
2 * This file contains the routines for handling the MMU on those
3 * PowerPC implementations where the MMU is not using the hash
4 * table, such as 8xx, 4xx, BookE's etc...
6 * Copyright 2008 Ben Herrenschmidt <benh@kernel.crashing.org>
7 * IBM Corp.
9 * Derived from previous arch/powerpc/mm/mmu_context.c
10 * and arch/powerpc/include/asm/mmu_context.h
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
17 * TODO:
19 * - The global context lock will not scale very well
20 * - The maps should be dynamically allocated to allow for processors
21 * that support more PID bits at runtime
22 * - Implement flush_tlb_mm() by making the context stale and picking
23 * a new one
24 * - More aggressively clear stale map bits and maybe find some way to
25 * also clear mm->cpu_vm_mask bits when processes are migrated
28 //#define DEBUG_MAP_CONSISTENCY
29 //#define DEBUG_CLAMP_LAST_CONTEXT 31
30 //#define DEBUG_HARDER
32 /* We don't use DEBUG because it tends to be compiled in always nowadays
33 * and this would generate way too much output
35 #ifdef DEBUG_HARDER
36 #define pr_hard(args...) printk(KERN_DEBUG args)
37 #define pr_hardcont(args...) printk(KERN_CONT args)
38 #else
39 #define pr_hard(args...) do { } while(0)
40 #define pr_hardcont(args...) do { } while(0)
41 #endif
43 #include <linux/kernel.h>
44 #include <linux/mm.h>
45 #include <linux/init.h>
46 #include <linux/spinlock.h>
47 #include <linux/bootmem.h>
48 #include <linux/notifier.h>
49 #include <linux/cpu.h>
50 #include <linux/slab.h>
52 #include <asm/mmu_context.h>
53 #include <asm/tlbflush.h>
55 static unsigned int first_context, last_context;
56 static unsigned int next_context, nr_free_contexts;
57 static unsigned long *context_map;
58 static unsigned long *stale_map[NR_CPUS];
59 static struct mm_struct **context_mm;
60 static DEFINE_RAW_SPINLOCK(context_lock);
62 #define CTX_MAP_SIZE \
63 (sizeof(unsigned long) * (last_context / BITS_PER_LONG + 1))
66 /* Steal a context from a task that has one at the moment.
68 * This is used when we are running out of available PID numbers
69 * on the processors.
71 * This isn't an LRU system, it just frees up each context in
72 * turn (sort-of pseudo-random replacement :). This would be the
73 * place to implement an LRU scheme if anyone was motivated to do it.
74 * -- paulus
76 * For context stealing, we use a slightly different approach for
77 * SMP and UP. Basically, the UP one is simpler and doesn't use
78 * the stale map as we can just flush the local CPU
79 * -- benh
81 #ifdef CONFIG_SMP
82 static unsigned int steal_context_smp(unsigned int id)
84 struct mm_struct *mm;
85 unsigned int cpu, max, i;
87 max = last_context - first_context;
89 /* Attempt to free next_context first and then loop until we manage */
90 while (max--) {
91 /* Pick up the victim mm */
92 mm = context_mm[id];
94 /* We have a candidate victim, check if it's active, on SMP
95 * we cannot steal active contexts
97 if (mm->context.active) {
98 id++;
99 if (id > last_context)
100 id = first_context;
101 continue;
103 pr_hardcont(" | steal %d from 0x%p", id, mm);
105 /* Mark this mm has having no context anymore */
106 mm->context.id = MMU_NO_CONTEXT;
108 /* Mark it stale on all CPUs that used this mm. For threaded
109 * implementations, we set it on all threads on each core
110 * represented in the mask. A future implementation will use
111 * a core map instead but this will do for now.
113 for_each_cpu(cpu, mm_cpumask(mm)) {
114 for (i = cpu_first_thread_sibling(cpu);
115 i <= cpu_last_thread_sibling(cpu); i++)
116 __set_bit(id, stale_map[i]);
117 cpu = i - 1;
119 return id;
122 /* This will happen if you have more CPUs than available contexts,
123 * all we can do here is wait a bit and try again
125 raw_spin_unlock(&context_lock);
126 cpu_relax();
127 raw_spin_lock(&context_lock);
129 /* This will cause the caller to try again */
130 return MMU_NO_CONTEXT;
132 #endif /* CONFIG_SMP */
134 /* Note that this will also be called on SMP if all other CPUs are
135 * offlined, which means that it may be called for cpu != 0. For
136 * this to work, we somewhat assume that CPUs that are onlined
137 * come up with a fully clean TLB (or are cleaned when offlined)
139 static unsigned int steal_context_up(unsigned int id)
141 struct mm_struct *mm;
142 int cpu = smp_processor_id();
144 /* Pick up the victim mm */
145 mm = context_mm[id];
147 pr_hardcont(" | steal %d from 0x%p", id, mm);
149 /* Flush the TLB for that context */
150 local_flush_tlb_mm(mm);
152 /* Mark this mm has having no context anymore */
153 mm->context.id = MMU_NO_CONTEXT;
155 /* XXX This clear should ultimately be part of local_flush_tlb_mm */
156 __clear_bit(id, stale_map[cpu]);
158 return id;
161 #ifdef DEBUG_MAP_CONSISTENCY
162 static void context_check_map(void)
164 unsigned int id, nrf, nact;
166 nrf = nact = 0;
167 for (id = first_context; id <= last_context; id++) {
168 int used = test_bit(id, context_map);
169 if (!used)
170 nrf++;
171 if (used != (context_mm[id] != NULL))
172 pr_err("MMU: Context %d is %s and MM is %p !\n",
173 id, used ? "used" : "free", context_mm[id]);
174 if (context_mm[id] != NULL)
175 nact += context_mm[id]->context.active;
177 if (nrf != nr_free_contexts) {
178 pr_err("MMU: Free context count out of sync ! (%d vs %d)\n",
179 nr_free_contexts, nrf);
180 nr_free_contexts = nrf;
182 if (nact > num_online_cpus())
183 pr_err("MMU: More active contexts than CPUs ! (%d vs %d)\n",
184 nact, num_online_cpus());
185 if (first_context > 0 && !test_bit(0, context_map))
186 pr_err("MMU: Context 0 has been freed !!!\n");
188 #else
189 static void context_check_map(void) { }
190 #endif
192 void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next)
194 unsigned int i, id, cpu = smp_processor_id();
195 unsigned long *map;
197 /* No lockless fast path .. yet */
198 raw_spin_lock(&context_lock);
200 pr_hard("[%d] activating context for mm @%p, active=%d, id=%d",
201 cpu, next, next->context.active, next->context.id);
203 #ifdef CONFIG_SMP
204 /* Mark us active and the previous one not anymore */
205 next->context.active++;
206 if (prev) {
207 pr_hardcont(" (old=0x%p a=%d)", prev, prev->context.active);
208 WARN_ON(prev->context.active < 1);
209 prev->context.active--;
212 again:
213 #endif /* CONFIG_SMP */
215 /* If we already have a valid assigned context, skip all that */
216 id = next->context.id;
217 if (likely(id != MMU_NO_CONTEXT)) {
218 #ifdef DEBUG_MAP_CONSISTENCY
219 if (context_mm[id] != next)
220 pr_err("MMU: mm 0x%p has id %d but context_mm[%d] says 0x%p\n",
221 next, id, id, context_mm[id]);
222 #endif
223 goto ctxt_ok;
226 /* We really don't have a context, let's try to acquire one */
227 id = next_context;
228 if (id > last_context)
229 id = first_context;
230 map = context_map;
232 /* No more free contexts, let's try to steal one */
233 if (nr_free_contexts == 0) {
234 #ifdef CONFIG_SMP
235 if (num_online_cpus() > 1) {
236 id = steal_context_smp(id);
237 if (id == MMU_NO_CONTEXT)
238 goto again;
239 goto stolen;
241 #endif /* CONFIG_SMP */
242 id = steal_context_up(id);
243 goto stolen;
245 nr_free_contexts--;
247 /* We know there's at least one free context, try to find it */
248 while (__test_and_set_bit(id, map)) {
249 id = find_next_zero_bit(map, last_context+1, id);
250 if (id > last_context)
251 id = first_context;
253 stolen:
254 next_context = id + 1;
255 context_mm[id] = next;
256 next->context.id = id;
257 pr_hardcont(" | new id=%d,nrf=%d", id, nr_free_contexts);
259 context_check_map();
260 ctxt_ok:
262 /* If that context got marked stale on this CPU, then flush the
263 * local TLB for it and unmark it before we use it
265 if (test_bit(id, stale_map[cpu])) {
266 pr_hardcont(" | stale flush %d [%d..%d]",
267 id, cpu_first_thread_sibling(cpu),
268 cpu_last_thread_sibling(cpu));
270 local_flush_tlb_mm(next);
272 /* XXX This clear should ultimately be part of local_flush_tlb_mm */
273 for (i = cpu_first_thread_sibling(cpu);
274 i <= cpu_last_thread_sibling(cpu); i++) {
275 __clear_bit(id, stale_map[i]);
279 /* Flick the MMU and release lock */
280 pr_hardcont(" -> %d\n", id);
281 set_context(id, next->pgd);
282 raw_spin_unlock(&context_lock);
286 * Set up the context for a new address space.
288 int init_new_context(struct task_struct *t, struct mm_struct *mm)
290 pr_hard("initing context for mm @%p\n", mm);
292 mm->context.id = MMU_NO_CONTEXT;
293 mm->context.active = 0;
295 return 0;
299 * We're finished using the context for an address space.
301 void destroy_context(struct mm_struct *mm)
303 unsigned long flags;
304 unsigned int id;
306 if (mm->context.id == MMU_NO_CONTEXT)
307 return;
309 WARN_ON(mm->context.active != 0);
311 raw_spin_lock_irqsave(&context_lock, flags);
312 id = mm->context.id;
313 if (id != MMU_NO_CONTEXT) {
314 __clear_bit(id, context_map);
315 mm->context.id = MMU_NO_CONTEXT;
316 #ifdef DEBUG_MAP_CONSISTENCY
317 mm->context.active = 0;
318 #endif
319 context_mm[id] = NULL;
320 nr_free_contexts++;
322 raw_spin_unlock_irqrestore(&context_lock, flags);
325 #ifdef CONFIG_SMP
327 static int __cpuinit mmu_context_cpu_notify(struct notifier_block *self,
328 unsigned long action, void *hcpu)
330 unsigned int cpu = (unsigned int)(long)hcpu;
331 #ifdef CONFIG_HOTPLUG_CPU
332 struct task_struct *p;
333 #endif
334 /* We don't touch CPU 0 map, it's allocated at aboot and kept
335 * around forever
337 if (cpu == boot_cpuid)
338 return NOTIFY_OK;
340 switch (action) {
341 case CPU_UP_PREPARE:
342 case CPU_UP_PREPARE_FROZEN:
343 pr_devel("MMU: Allocating stale context map for CPU %d\n", cpu);
344 stale_map[cpu] = kzalloc(CTX_MAP_SIZE, GFP_KERNEL);
345 break;
346 #ifdef CONFIG_HOTPLUG_CPU
347 case CPU_UP_CANCELED:
348 case CPU_UP_CANCELED_FROZEN:
349 case CPU_DEAD:
350 case CPU_DEAD_FROZEN:
351 pr_devel("MMU: Freeing stale context map for CPU %d\n", cpu);
352 kfree(stale_map[cpu]);
353 stale_map[cpu] = NULL;
355 /* We also clear the cpu_vm_mask bits of CPUs going away */
356 read_lock(&tasklist_lock);
357 for_each_process(p) {
358 if (p->mm)
359 cpumask_clear_cpu(cpu, mm_cpumask(p->mm));
361 read_unlock(&tasklist_lock);
362 break;
363 #endif /* CONFIG_HOTPLUG_CPU */
365 return NOTIFY_OK;
368 static struct notifier_block __cpuinitdata mmu_context_cpu_nb = {
369 .notifier_call = mmu_context_cpu_notify,
372 #endif /* CONFIG_SMP */
375 * Initialize the context management stuff.
377 void __init mmu_context_init(void)
379 /* Mark init_mm as being active on all possible CPUs since
380 * we'll get called with prev == init_mm the first time
381 * we schedule on a given CPU
383 init_mm.context.active = NR_CPUS;
386 * The MPC8xx has only 16 contexts. We rotate through them on each
387 * task switch. A better way would be to keep track of tasks that
388 * own contexts, and implement an LRU usage. That way very active
389 * tasks don't always have to pay the TLB reload overhead. The
390 * kernel pages are mapped shared, so the kernel can run on behalf
391 * of any task that makes a kernel entry. Shared does not mean they
392 * are not protected, just that the ASID comparison is not performed.
393 * -- Dan
395 * The IBM4xx has 256 contexts, so we can just rotate through these
396 * as a way of "switching" contexts. If the TID of the TLB is zero,
397 * the PID/TID comparison is disabled, so we can use a TID of zero
398 * to represent all kernel pages as shared among all contexts.
399 * -- Dan
401 * The IBM 47x core supports 16-bit PIDs, thus 65535 contexts. We
402 * should normally never have to steal though the facility is
403 * present if needed.
404 * -- BenH
406 if (mmu_has_feature(MMU_FTR_TYPE_8xx)) {
407 first_context = 0;
408 last_context = 15;
409 } else if (mmu_has_feature(MMU_FTR_TYPE_47x)) {
410 first_context = 1;
411 last_context = 65535;
412 } else
413 #ifdef CONFIG_PPC_BOOK3E_MMU
414 if (mmu_has_feature(MMU_FTR_TYPE_3E)) {
415 u32 mmucfg = mfspr(SPRN_MMUCFG);
416 u32 pid_bits = (mmucfg & MMUCFG_PIDSIZE_MASK)
417 >> MMUCFG_PIDSIZE_SHIFT;
418 first_context = 1;
419 last_context = (1UL << (pid_bits + 1)) - 1;
420 } else
421 #endif
423 first_context = 1;
424 last_context = 255;
427 #ifdef DEBUG_CLAMP_LAST_CONTEXT
428 last_context = DEBUG_CLAMP_LAST_CONTEXT;
429 #endif
431 * Allocate the maps used by context management
433 context_map = alloc_bootmem(CTX_MAP_SIZE);
434 context_mm = alloc_bootmem(sizeof(void *) * (last_context + 1));
435 #ifndef CONFIG_SMP
436 stale_map[0] = alloc_bootmem(CTX_MAP_SIZE);
437 #else
438 stale_map[boot_cpuid] = alloc_bootmem(CTX_MAP_SIZE);
440 register_cpu_notifier(&mmu_context_cpu_nb);
441 #endif
443 printk(KERN_INFO
444 "MMU: Allocated %zu bytes of context maps for %d contexts\n",
445 2 * CTX_MAP_SIZE + (sizeof(void *) * (last_context + 1)),
446 last_context - first_context + 1);
449 * Some processors have too few contexts to reserve one for
450 * init_mm, and require using context 0 for a normal task.
451 * Other processors reserve the use of context zero for the kernel.
452 * This code assumes first_context < 32.
454 context_map[0] = (1 << first_context) - 1;
455 next_context = first_context;
456 nr_free_contexts = last_context - first_context + 1;