This client driver allows you to use a GPIO pin as a source for PPS
[linux-2.6/next.git] / drivers / usb / host / xhci-hub.c
bloba02fba6367e2a27fd655f712131b4110a2161b4b
1 /*
2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/gfp.h>
24 #include <asm/unaligned.h>
26 #include "xhci.h"
28 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
29 #define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
30 PORT_RC | PORT_PLC | PORT_PE)
32 static void xhci_common_hub_descriptor(struct xhci_hcd *xhci,
33 struct usb_hub_descriptor *desc, int ports)
35 u16 temp;
37 desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.9 says 20ms max */
38 desc->bHubContrCurrent = 0;
40 desc->bNbrPorts = ports;
41 /* Ugh, these should be #defines, FIXME */
42 /* Using table 11-13 in USB 2.0 spec. */
43 temp = 0;
44 /* Bits 1:0 - support port power switching, or power always on */
45 if (HCC_PPC(xhci->hcc_params))
46 temp |= 0x0001;
47 else
48 temp |= 0x0002;
49 /* Bit 2 - root hubs are not part of a compound device */
50 /* Bits 4:3 - individual port over current protection */
51 temp |= 0x0008;
52 /* Bits 6:5 - no TTs in root ports */
53 /* Bit 7 - no port indicators */
54 desc->wHubCharacteristics = cpu_to_le16(temp);
57 /* Fill in the USB 2.0 roothub descriptor */
58 static void xhci_usb2_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
59 struct usb_hub_descriptor *desc)
61 int ports;
62 u16 temp;
63 __u8 port_removable[(USB_MAXCHILDREN + 1 + 7) / 8];
64 u32 portsc;
65 unsigned int i;
67 ports = xhci->num_usb2_ports;
69 xhci_common_hub_descriptor(xhci, desc, ports);
70 desc->bDescriptorType = 0x29;
71 temp = 1 + (ports / 8);
72 desc->bDescLength = 7 + 2 * temp;
74 /* The Device Removable bits are reported on a byte granularity.
75 * If the port doesn't exist within that byte, the bit is set to 0.
77 memset(port_removable, 0, sizeof(port_removable));
78 for (i = 0; i < ports; i++) {
79 portsc = xhci_readl(xhci, xhci->usb3_ports[i]);
80 /* If a device is removable, PORTSC reports a 0, same as in the
81 * hub descriptor DeviceRemovable bits.
83 if (portsc & PORT_DEV_REMOVE)
84 /* This math is hairy because bit 0 of DeviceRemovable
85 * is reserved, and bit 1 is for port 1, etc.
87 port_removable[(i + 1) / 8] |= 1 << ((i + 1) % 8);
90 /* ch11.h defines a hub descriptor that has room for USB_MAXCHILDREN
91 * ports on it. The USB 2.0 specification says that there are two
92 * variable length fields at the end of the hub descriptor:
93 * DeviceRemovable and PortPwrCtrlMask. But since we can have less than
94 * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array
95 * to set PortPwrCtrlMask bits. PortPwrCtrlMask must always be set to
96 * 0xFF, so we initialize the both arrays (DeviceRemovable and
97 * PortPwrCtrlMask) to 0xFF. Then we set the DeviceRemovable for each
98 * set of ports that actually exist.
100 memset(desc->u.hs.DeviceRemovable, 0xff,
101 sizeof(desc->u.hs.DeviceRemovable));
102 memset(desc->u.hs.PortPwrCtrlMask, 0xff,
103 sizeof(desc->u.hs.PortPwrCtrlMask));
105 for (i = 0; i < (ports + 1 + 7) / 8; i++)
106 memset(&desc->u.hs.DeviceRemovable[i], port_removable[i],
107 sizeof(__u8));
110 /* Fill in the USB 3.0 roothub descriptor */
111 static void xhci_usb3_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
112 struct usb_hub_descriptor *desc)
114 int ports;
115 u16 port_removable;
116 u32 portsc;
117 unsigned int i;
119 ports = xhci->num_usb3_ports;
120 xhci_common_hub_descriptor(xhci, desc, ports);
121 desc->bDescriptorType = 0x2a;
122 desc->bDescLength = 12;
124 /* header decode latency should be zero for roothubs,
125 * see section 4.23.5.2.
127 desc->u.ss.bHubHdrDecLat = 0;
128 desc->u.ss.wHubDelay = 0;
130 port_removable = 0;
131 /* bit 0 is reserved, bit 1 is for port 1, etc. */
132 for (i = 0; i < ports; i++) {
133 portsc = xhci_readl(xhci, xhci->usb3_ports[i]);
134 if (portsc & PORT_DEV_REMOVE)
135 port_removable |= 1 << (i + 1);
137 memset(&desc->u.ss.DeviceRemovable,
138 (__force __u16) cpu_to_le16(port_removable),
139 sizeof(__u16));
142 static void xhci_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
143 struct usb_hub_descriptor *desc)
146 if (hcd->speed == HCD_USB3)
147 xhci_usb3_hub_descriptor(hcd, xhci, desc);
148 else
149 xhci_usb2_hub_descriptor(hcd, xhci, desc);
153 static unsigned int xhci_port_speed(unsigned int port_status)
155 if (DEV_LOWSPEED(port_status))
156 return USB_PORT_STAT_LOW_SPEED;
157 if (DEV_HIGHSPEED(port_status))
158 return USB_PORT_STAT_HIGH_SPEED;
160 * FIXME: Yes, we should check for full speed, but the core uses that as
161 * a default in portspeed() in usb/core/hub.c (which is the only place
162 * USB_PORT_STAT_*_SPEED is used).
164 return 0;
168 * These bits are Read Only (RO) and should be saved and written to the
169 * registers: 0, 3, 10:13, 30
170 * connect status, over-current status, port speed, and device removable.
171 * connect status and port speed are also sticky - meaning they're in
172 * the AUX well and they aren't changed by a hot, warm, or cold reset.
174 #define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
176 * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
177 * bits 5:8, 9, 14:15, 25:27
178 * link state, port power, port indicator state, "wake on" enable state
180 #define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
182 * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
183 * bit 4 (port reset)
185 #define XHCI_PORT_RW1S ((1<<4))
187 * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
188 * bits 1, 17, 18, 19, 20, 21, 22, 23
189 * port enable/disable, and
190 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
191 * over-current, reset, link state, and L1 change
193 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
195 * Bit 16 is RW, and writing a '1' to it causes the link state control to be
196 * latched in
198 #define XHCI_PORT_RW ((1<<16))
200 * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
201 * bits 2, 24, 28:31
203 #define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28))
206 * Given a port state, this function returns a value that would result in the
207 * port being in the same state, if the value was written to the port status
208 * control register.
209 * Save Read Only (RO) bits and save read/write bits where
210 * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
211 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
213 u32 xhci_port_state_to_neutral(u32 state)
215 /* Save read-only status and port state */
216 return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
220 * find slot id based on port number.
221 * @port: The one-based port number from one of the two split roothubs.
223 int xhci_find_slot_id_by_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
224 u16 port)
226 int slot_id;
227 int i;
228 enum usb_device_speed speed;
230 slot_id = 0;
231 for (i = 0; i < MAX_HC_SLOTS; i++) {
232 if (!xhci->devs[i])
233 continue;
234 speed = xhci->devs[i]->udev->speed;
235 if (((speed == USB_SPEED_SUPER) == (hcd->speed == HCD_USB3))
236 && xhci->devs[i]->port == port) {
237 slot_id = i;
238 break;
242 return slot_id;
246 * Stop device
247 * It issues stop endpoint command for EP 0 to 30. And wait the last command
248 * to complete.
249 * suspend will set to 1, if suspend bit need to set in command.
251 static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
253 struct xhci_virt_device *virt_dev;
254 struct xhci_command *cmd;
255 unsigned long flags;
256 int timeleft;
257 int ret;
258 int i;
260 ret = 0;
261 virt_dev = xhci->devs[slot_id];
262 cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
263 if (!cmd) {
264 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
265 return -ENOMEM;
268 spin_lock_irqsave(&xhci->lock, flags);
269 for (i = LAST_EP_INDEX; i > 0; i--) {
270 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
271 xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
273 cmd->command_trb = xhci->cmd_ring->enqueue;
274 list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
275 xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
276 xhci_ring_cmd_db(xhci);
277 spin_unlock_irqrestore(&xhci->lock, flags);
279 /* Wait for last stop endpoint command to finish */
280 timeleft = wait_for_completion_interruptible_timeout(
281 cmd->completion,
282 USB_CTRL_SET_TIMEOUT);
283 if (timeleft <= 0) {
284 xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
285 timeleft == 0 ? "Timeout" : "Signal");
286 spin_lock_irqsave(&xhci->lock, flags);
287 /* The timeout might have raced with the event ring handler, so
288 * only delete from the list if the item isn't poisoned.
290 if (cmd->cmd_list.next != LIST_POISON1)
291 list_del(&cmd->cmd_list);
292 spin_unlock_irqrestore(&xhci->lock, flags);
293 ret = -ETIME;
294 goto command_cleanup;
297 command_cleanup:
298 xhci_free_command(xhci, cmd);
299 return ret;
303 * Ring device, it rings the all doorbells unconditionally.
305 void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
307 int i;
309 for (i = 0; i < LAST_EP_INDEX + 1; i++)
310 if (xhci->devs[slot_id]->eps[i].ring &&
311 xhci->devs[slot_id]->eps[i].ring->dequeue)
312 xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
314 return;
317 static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
318 u16 wIndex, __le32 __iomem *addr, u32 port_status)
320 /* Don't allow the USB core to disable SuperSpeed ports. */
321 if (hcd->speed == HCD_USB3) {
322 xhci_dbg(xhci, "Ignoring request to disable "
323 "SuperSpeed port.\n");
324 return;
327 /* Write 1 to disable the port */
328 xhci_writel(xhci, port_status | PORT_PE, addr);
329 port_status = xhci_readl(xhci, addr);
330 xhci_dbg(xhci, "disable port, actual port %d status = 0x%x\n",
331 wIndex, port_status);
334 static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
335 u16 wIndex, __le32 __iomem *addr, u32 port_status)
337 char *port_change_bit;
338 u32 status;
340 switch (wValue) {
341 case USB_PORT_FEAT_C_RESET:
342 status = PORT_RC;
343 port_change_bit = "reset";
344 break;
345 case USB_PORT_FEAT_C_BH_PORT_RESET:
346 status = PORT_WRC;
347 port_change_bit = "warm(BH) reset";
348 break;
349 case USB_PORT_FEAT_C_CONNECTION:
350 status = PORT_CSC;
351 port_change_bit = "connect";
352 break;
353 case USB_PORT_FEAT_C_OVER_CURRENT:
354 status = PORT_OCC;
355 port_change_bit = "over-current";
356 break;
357 case USB_PORT_FEAT_C_ENABLE:
358 status = PORT_PEC;
359 port_change_bit = "enable/disable";
360 break;
361 case USB_PORT_FEAT_C_SUSPEND:
362 status = PORT_PLC;
363 port_change_bit = "suspend/resume";
364 break;
365 case USB_PORT_FEAT_C_PORT_LINK_STATE:
366 status = PORT_PLC;
367 port_change_bit = "link state";
368 break;
369 default:
370 /* Should never happen */
371 return;
373 /* Change bits are all write 1 to clear */
374 xhci_writel(xhci, port_status | status, addr);
375 port_status = xhci_readl(xhci, addr);
376 xhci_dbg(xhci, "clear port %s change, actual port %d status = 0x%x\n",
377 port_change_bit, wIndex, port_status);
380 static int xhci_get_ports(struct usb_hcd *hcd, __le32 __iomem ***port_array)
382 int max_ports;
383 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
385 if (hcd->speed == HCD_USB3) {
386 max_ports = xhci->num_usb3_ports;
387 *port_array = xhci->usb3_ports;
388 } else {
389 max_ports = xhci->num_usb2_ports;
390 *port_array = xhci->usb2_ports;
393 return max_ports;
396 int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
397 u16 wIndex, char *buf, u16 wLength)
399 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
400 int max_ports;
401 unsigned long flags;
402 u32 temp, temp1, status;
403 int retval = 0;
404 __le32 __iomem **port_array;
405 int slot_id;
406 struct xhci_bus_state *bus_state;
407 u16 link_state = 0;
409 max_ports = xhci_get_ports(hcd, &port_array);
410 bus_state = &xhci->bus_state[hcd_index(hcd)];
412 spin_lock_irqsave(&xhci->lock, flags);
413 switch (typeReq) {
414 case GetHubStatus:
415 /* No power source, over-current reported per port */
416 memset(buf, 0, 4);
417 break;
418 case GetHubDescriptor:
419 /* Check to make sure userspace is asking for the USB 3.0 hub
420 * descriptor for the USB 3.0 roothub. If not, we stall the
421 * endpoint, like external hubs do.
423 if (hcd->speed == HCD_USB3 &&
424 (wLength < USB_DT_SS_HUB_SIZE ||
425 wValue != (USB_DT_SS_HUB << 8))) {
426 xhci_dbg(xhci, "Wrong hub descriptor type for "
427 "USB 3.0 roothub.\n");
428 goto error;
430 xhci_hub_descriptor(hcd, xhci,
431 (struct usb_hub_descriptor *) buf);
432 break;
433 case GetPortStatus:
434 if (!wIndex || wIndex > max_ports)
435 goto error;
436 wIndex--;
437 status = 0;
438 temp = xhci_readl(xhci, port_array[wIndex]);
439 if (temp == 0xffffffff) {
440 retval = -ENODEV;
441 break;
443 xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp);
445 /* wPortChange bits */
446 if (temp & PORT_CSC)
447 status |= USB_PORT_STAT_C_CONNECTION << 16;
448 if (temp & PORT_PEC)
449 status |= USB_PORT_STAT_C_ENABLE << 16;
450 if ((temp & PORT_OCC))
451 status |= USB_PORT_STAT_C_OVERCURRENT << 16;
452 if ((temp & PORT_RC))
453 status |= USB_PORT_STAT_C_RESET << 16;
454 /* USB3.0 only */
455 if (hcd->speed == HCD_USB3) {
456 if ((temp & PORT_PLC))
457 status |= USB_PORT_STAT_C_LINK_STATE << 16;
458 if ((temp & PORT_WRC))
459 status |= USB_PORT_STAT_C_BH_RESET << 16;
462 if (hcd->speed != HCD_USB3) {
463 if ((temp & PORT_PLS_MASK) == XDEV_U3
464 && (temp & PORT_POWER))
465 status |= USB_PORT_STAT_SUSPEND;
467 if ((temp & PORT_PLS_MASK) == XDEV_RESUME &&
468 !DEV_SUPERSPEED(temp)) {
469 if ((temp & PORT_RESET) || !(temp & PORT_PE))
470 goto error;
471 if (time_after_eq(jiffies,
472 bus_state->resume_done[wIndex])) {
473 xhci_dbg(xhci, "Resume USB2 port %d\n",
474 wIndex + 1);
475 bus_state->resume_done[wIndex] = 0;
476 temp1 = xhci_port_state_to_neutral(temp);
477 temp1 &= ~PORT_PLS_MASK;
478 temp1 |= PORT_LINK_STROBE | XDEV_U0;
479 xhci_writel(xhci, temp1, port_array[wIndex]);
481 xhci_dbg(xhci, "set port %d resume\n",
482 wIndex + 1);
483 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
484 wIndex + 1);
485 if (!slot_id) {
486 xhci_dbg(xhci, "slot_id is zero\n");
487 goto error;
489 xhci_ring_device(xhci, slot_id);
490 bus_state->port_c_suspend |= 1 << wIndex;
491 bus_state->suspended_ports &= ~(1 << wIndex);
492 } else {
494 * The resume has been signaling for less than
495 * 20ms. Report the port status as SUSPEND,
496 * let the usbcore check port status again
497 * and clear resume signaling later.
499 status |= USB_PORT_STAT_SUSPEND;
502 if ((temp & PORT_PLS_MASK) == XDEV_U0
503 && (temp & PORT_POWER)
504 && (bus_state->suspended_ports & (1 << wIndex))) {
505 bus_state->suspended_ports &= ~(1 << wIndex);
506 if (hcd->speed != HCD_USB3)
507 bus_state->port_c_suspend |= 1 << wIndex;
509 if (temp & PORT_CONNECT) {
510 status |= USB_PORT_STAT_CONNECTION;
511 status |= xhci_port_speed(temp);
513 if (temp & PORT_PE)
514 status |= USB_PORT_STAT_ENABLE;
515 if (temp & PORT_OC)
516 status |= USB_PORT_STAT_OVERCURRENT;
517 if (temp & PORT_RESET)
518 status |= USB_PORT_STAT_RESET;
519 if (temp & PORT_POWER) {
520 if (hcd->speed == HCD_USB3)
521 status |= USB_SS_PORT_STAT_POWER;
522 else
523 status |= USB_PORT_STAT_POWER;
525 /* Port Link State */
526 if (hcd->speed == HCD_USB3) {
527 /* resume state is a xHCI internal state.
528 * Do not report it to usb core.
530 if ((temp & PORT_PLS_MASK) != XDEV_RESUME)
531 status |= (temp & PORT_PLS_MASK);
533 if (bus_state->port_c_suspend & (1 << wIndex))
534 status |= 1 << USB_PORT_FEAT_C_SUSPEND;
535 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
536 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
537 break;
538 case SetPortFeature:
539 if (wValue == USB_PORT_FEAT_LINK_STATE)
540 link_state = (wIndex & 0xff00) >> 3;
541 wIndex &= 0xff;
542 if (!wIndex || wIndex > max_ports)
543 goto error;
544 wIndex--;
545 temp = xhci_readl(xhci, port_array[wIndex]);
546 if (temp == 0xffffffff) {
547 retval = -ENODEV;
548 break;
550 temp = xhci_port_state_to_neutral(temp);
551 /* FIXME: What new port features do we need to support? */
552 switch (wValue) {
553 case USB_PORT_FEAT_SUSPEND:
554 temp = xhci_readl(xhci, port_array[wIndex]);
555 /* In spec software should not attempt to suspend
556 * a port unless the port reports that it is in the
557 * enabled (PED = ‘1’,PLS < ‘3’) state.
559 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
560 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
561 xhci_warn(xhci, "USB core suspending device "
562 "not in U0/U1/U2.\n");
563 goto error;
566 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
567 wIndex + 1);
568 if (!slot_id) {
569 xhci_warn(xhci, "slot_id is zero\n");
570 goto error;
572 /* unlock to execute stop endpoint commands */
573 spin_unlock_irqrestore(&xhci->lock, flags);
574 xhci_stop_device(xhci, slot_id, 1);
575 spin_lock_irqsave(&xhci->lock, flags);
577 temp = xhci_port_state_to_neutral(temp);
578 temp &= ~PORT_PLS_MASK;
579 temp |= PORT_LINK_STROBE | XDEV_U3;
580 xhci_writel(xhci, temp, port_array[wIndex]);
582 spin_unlock_irqrestore(&xhci->lock, flags);
583 msleep(10); /* wait device to enter */
584 spin_lock_irqsave(&xhci->lock, flags);
586 temp = xhci_readl(xhci, port_array[wIndex]);
587 bus_state->suspended_ports |= 1 << wIndex;
588 break;
589 case USB_PORT_FEAT_LINK_STATE:
590 temp = xhci_readl(xhci, port_array[wIndex]);
591 /* Software should not attempt to set
592 * port link state above '5' (Rx.Detect) and the port
593 * must be enabled.
595 if ((temp & PORT_PE) == 0 ||
596 (link_state > USB_SS_PORT_LS_RX_DETECT)) {
597 xhci_warn(xhci, "Cannot set link state.\n");
598 goto error;
601 if (link_state == USB_SS_PORT_LS_U3) {
602 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
603 wIndex + 1);
604 if (slot_id) {
605 /* unlock to execute stop endpoint
606 * commands */
607 spin_unlock_irqrestore(&xhci->lock,
608 flags);
609 xhci_stop_device(xhci, slot_id, 1);
610 spin_lock_irqsave(&xhci->lock, flags);
614 temp = xhci_port_state_to_neutral(temp);
615 temp &= ~PORT_PLS_MASK;
616 temp |= PORT_LINK_STROBE | link_state;
617 xhci_writel(xhci, temp, port_array[wIndex]);
619 spin_unlock_irqrestore(&xhci->lock, flags);
620 msleep(20); /* wait device to enter */
621 spin_lock_irqsave(&xhci->lock, flags);
623 temp = xhci_readl(xhci, port_array[wIndex]);
624 if (link_state == USB_SS_PORT_LS_U3)
625 bus_state->suspended_ports |= 1 << wIndex;
626 break;
627 case USB_PORT_FEAT_POWER:
629 * Turn on ports, even if there isn't per-port switching.
630 * HC will report connect events even before this is set.
631 * However, khubd will ignore the roothub events until
632 * the roothub is registered.
634 xhci_writel(xhci, temp | PORT_POWER,
635 port_array[wIndex]);
637 temp = xhci_readl(xhci, port_array[wIndex]);
638 xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp);
639 break;
640 case USB_PORT_FEAT_RESET:
641 temp = (temp | PORT_RESET);
642 xhci_writel(xhci, temp, port_array[wIndex]);
644 temp = xhci_readl(xhci, port_array[wIndex]);
645 xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp);
646 break;
647 case USB_PORT_FEAT_BH_PORT_RESET:
648 temp |= PORT_WR;
649 xhci_writel(xhci, temp, port_array[wIndex]);
651 temp = xhci_readl(xhci, port_array[wIndex]);
652 break;
653 default:
654 goto error;
656 /* unblock any posted writes */
657 temp = xhci_readl(xhci, port_array[wIndex]);
658 break;
659 case ClearPortFeature:
660 if (!wIndex || wIndex > max_ports)
661 goto error;
662 wIndex--;
663 temp = xhci_readl(xhci, port_array[wIndex]);
664 if (temp == 0xffffffff) {
665 retval = -ENODEV;
666 break;
668 /* FIXME: What new port features do we need to support? */
669 temp = xhci_port_state_to_neutral(temp);
670 switch (wValue) {
671 case USB_PORT_FEAT_SUSPEND:
672 temp = xhci_readl(xhci, port_array[wIndex]);
673 xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
674 xhci_dbg(xhci, "PORTSC %04x\n", temp);
675 if (temp & PORT_RESET)
676 goto error;
677 if ((temp & PORT_PLS_MASK) == XDEV_U3) {
678 if ((temp & PORT_PE) == 0)
679 goto error;
681 temp = xhci_port_state_to_neutral(temp);
682 temp &= ~PORT_PLS_MASK;
683 temp |= PORT_LINK_STROBE | XDEV_RESUME;
684 xhci_writel(xhci, temp,
685 port_array[wIndex]);
687 spin_unlock_irqrestore(&xhci->lock,
688 flags);
689 msleep(20);
690 spin_lock_irqsave(&xhci->lock, flags);
692 temp = xhci_readl(xhci,
693 port_array[wIndex]);
694 temp = xhci_port_state_to_neutral(temp);
695 temp &= ~PORT_PLS_MASK;
696 temp |= PORT_LINK_STROBE | XDEV_U0;
697 xhci_writel(xhci, temp,
698 port_array[wIndex]);
700 bus_state->port_c_suspend |= 1 << wIndex;
702 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
703 wIndex + 1);
704 if (!slot_id) {
705 xhci_dbg(xhci, "slot_id is zero\n");
706 goto error;
708 xhci_ring_device(xhci, slot_id);
709 break;
710 case USB_PORT_FEAT_C_SUSPEND:
711 bus_state->port_c_suspend &= ~(1 << wIndex);
712 case USB_PORT_FEAT_C_RESET:
713 case USB_PORT_FEAT_C_BH_PORT_RESET:
714 case USB_PORT_FEAT_C_CONNECTION:
715 case USB_PORT_FEAT_C_OVER_CURRENT:
716 case USB_PORT_FEAT_C_ENABLE:
717 case USB_PORT_FEAT_C_PORT_LINK_STATE:
718 xhci_clear_port_change_bit(xhci, wValue, wIndex,
719 port_array[wIndex], temp);
720 break;
721 case USB_PORT_FEAT_ENABLE:
722 xhci_disable_port(hcd, xhci, wIndex,
723 port_array[wIndex], temp);
724 break;
725 default:
726 goto error;
728 break;
729 default:
730 error:
731 /* "stall" on error */
732 retval = -EPIPE;
734 spin_unlock_irqrestore(&xhci->lock, flags);
735 return retval;
739 * Returns 0 if the status hasn't changed, or the number of bytes in buf.
740 * Ports are 0-indexed from the HCD point of view,
741 * and 1-indexed from the USB core pointer of view.
743 * Note that the status change bits will be cleared as soon as a port status
744 * change event is generated, so we use the saved status from that event.
746 int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
748 unsigned long flags;
749 u32 temp, status;
750 u32 mask;
751 int i, retval;
752 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
753 int max_ports;
754 __le32 __iomem **port_array;
755 struct xhci_bus_state *bus_state;
757 max_ports = xhci_get_ports(hcd, &port_array);
758 bus_state = &xhci->bus_state[hcd_index(hcd)];
760 /* Initial status is no changes */
761 retval = (max_ports + 8) / 8;
762 memset(buf, 0, retval);
763 status = 0;
765 mask = PORT_CSC | PORT_PEC | PORT_OCC | PORT_PLC;
767 spin_lock_irqsave(&xhci->lock, flags);
768 /* For each port, did anything change? If so, set that bit in buf. */
769 for (i = 0; i < max_ports; i++) {
770 temp = xhci_readl(xhci, port_array[i]);
771 if (temp == 0xffffffff) {
772 retval = -ENODEV;
773 break;
775 if ((temp & mask) != 0 ||
776 (bus_state->port_c_suspend & 1 << i) ||
777 (bus_state->resume_done[i] && time_after_eq(
778 jiffies, bus_state->resume_done[i]))) {
779 buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
780 status = 1;
783 spin_unlock_irqrestore(&xhci->lock, flags);
784 return status ? retval : 0;
787 #ifdef CONFIG_PM
789 int xhci_bus_suspend(struct usb_hcd *hcd)
791 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
792 int max_ports, port_index;
793 __le32 __iomem **port_array;
794 struct xhci_bus_state *bus_state;
795 unsigned long flags;
797 max_ports = xhci_get_ports(hcd, &port_array);
798 bus_state = &xhci->bus_state[hcd_index(hcd)];
800 spin_lock_irqsave(&xhci->lock, flags);
802 if (hcd->self.root_hub->do_remote_wakeup) {
803 port_index = max_ports;
804 while (port_index--) {
805 if (bus_state->resume_done[port_index] != 0) {
806 spin_unlock_irqrestore(&xhci->lock, flags);
807 xhci_dbg(xhci, "suspend failed because "
808 "port %d is resuming\n",
809 port_index + 1);
810 return -EBUSY;
815 port_index = max_ports;
816 bus_state->bus_suspended = 0;
817 while (port_index--) {
818 /* suspend the port if the port is not suspended */
819 u32 t1, t2;
820 int slot_id;
822 t1 = xhci_readl(xhci, port_array[port_index]);
823 t2 = xhci_port_state_to_neutral(t1);
825 if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
826 xhci_dbg(xhci, "port %d not suspended\n", port_index);
827 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
828 port_index + 1);
829 if (slot_id) {
830 spin_unlock_irqrestore(&xhci->lock, flags);
831 xhci_stop_device(xhci, slot_id, 1);
832 spin_lock_irqsave(&xhci->lock, flags);
834 t2 &= ~PORT_PLS_MASK;
835 t2 |= PORT_LINK_STROBE | XDEV_U3;
836 set_bit(port_index, &bus_state->bus_suspended);
838 if (hcd->self.root_hub->do_remote_wakeup) {
839 if (t1 & PORT_CONNECT) {
840 t2 |= PORT_WKOC_E | PORT_WKDISC_E;
841 t2 &= ~PORT_WKCONN_E;
842 } else {
843 t2 |= PORT_WKOC_E | PORT_WKCONN_E;
844 t2 &= ~PORT_WKDISC_E;
846 } else
847 t2 &= ~PORT_WAKE_BITS;
849 t1 = xhci_port_state_to_neutral(t1);
850 if (t1 != t2)
851 xhci_writel(xhci, t2, port_array[port_index]);
853 if (hcd->speed != HCD_USB3) {
854 /* enable remote wake up for USB 2.0 */
855 __le32 __iomem *addr;
856 u32 tmp;
858 /* Add one to the port status register address to get
859 * the port power control register address.
861 addr = port_array[port_index] + 1;
862 tmp = xhci_readl(xhci, addr);
863 tmp |= PORT_RWE;
864 xhci_writel(xhci, tmp, addr);
867 hcd->state = HC_STATE_SUSPENDED;
868 bus_state->next_statechange = jiffies + msecs_to_jiffies(10);
869 spin_unlock_irqrestore(&xhci->lock, flags);
870 return 0;
873 int xhci_bus_resume(struct usb_hcd *hcd)
875 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
876 int max_ports, port_index;
877 __le32 __iomem **port_array;
878 struct xhci_bus_state *bus_state;
879 u32 temp;
880 unsigned long flags;
882 max_ports = xhci_get_ports(hcd, &port_array);
883 bus_state = &xhci->bus_state[hcd_index(hcd)];
885 if (time_before(jiffies, bus_state->next_statechange))
886 msleep(5);
888 spin_lock_irqsave(&xhci->lock, flags);
889 if (!HCD_HW_ACCESSIBLE(hcd)) {
890 spin_unlock_irqrestore(&xhci->lock, flags);
891 return -ESHUTDOWN;
894 /* delay the irqs */
895 temp = xhci_readl(xhci, &xhci->op_regs->command);
896 temp &= ~CMD_EIE;
897 xhci_writel(xhci, temp, &xhci->op_regs->command);
899 port_index = max_ports;
900 while (port_index--) {
901 /* Check whether need resume ports. If needed
902 resume port and disable remote wakeup */
903 u32 temp;
904 int slot_id;
906 temp = xhci_readl(xhci, port_array[port_index]);
907 if (DEV_SUPERSPEED(temp))
908 temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
909 else
910 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
911 if (test_bit(port_index, &bus_state->bus_suspended) &&
912 (temp & PORT_PLS_MASK)) {
913 if (DEV_SUPERSPEED(temp)) {
914 temp = xhci_port_state_to_neutral(temp);
915 temp &= ~PORT_PLS_MASK;
916 temp |= PORT_LINK_STROBE | XDEV_U0;
917 xhci_writel(xhci, temp, port_array[port_index]);
918 } else {
919 temp = xhci_port_state_to_neutral(temp);
920 temp &= ~PORT_PLS_MASK;
921 temp |= PORT_LINK_STROBE | XDEV_RESUME;
922 xhci_writel(xhci, temp, port_array[port_index]);
924 spin_unlock_irqrestore(&xhci->lock, flags);
925 msleep(20);
926 spin_lock_irqsave(&xhci->lock, flags);
928 temp = xhci_readl(xhci, port_array[port_index]);
929 temp = xhci_port_state_to_neutral(temp);
930 temp &= ~PORT_PLS_MASK;
931 temp |= PORT_LINK_STROBE | XDEV_U0;
932 xhci_writel(xhci, temp, port_array[port_index]);
934 /* wait for the port to enter U0 and report port link
935 * state change.
937 spin_unlock_irqrestore(&xhci->lock, flags);
938 msleep(20);
939 spin_lock_irqsave(&xhci->lock, flags);
941 /* Clear PLC */
942 temp = xhci_readl(xhci, port_array[port_index]);
943 if (temp & PORT_PLC) {
944 temp = xhci_port_state_to_neutral(temp);
945 temp |= PORT_PLC;
946 xhci_writel(xhci, temp, port_array[port_index]);
949 slot_id = xhci_find_slot_id_by_port(hcd,
950 xhci, port_index + 1);
951 if (slot_id)
952 xhci_ring_device(xhci, slot_id);
953 } else
954 xhci_writel(xhci, temp, port_array[port_index]);
956 if (hcd->speed != HCD_USB3) {
957 /* disable remote wake up for USB 2.0 */
958 __le32 __iomem *addr;
959 u32 tmp;
961 /* Add one to the port status register address to get
962 * the port power control register address.
964 addr = port_array[port_index] + 1;
965 tmp = xhci_readl(xhci, addr);
966 tmp &= ~PORT_RWE;
967 xhci_writel(xhci, tmp, addr);
971 (void) xhci_readl(xhci, &xhci->op_regs->command);
973 bus_state->next_statechange = jiffies + msecs_to_jiffies(5);
974 /* re-enable irqs */
975 temp = xhci_readl(xhci, &xhci->op_regs->command);
976 temp |= CMD_EIE;
977 xhci_writel(xhci, temp, &xhci->op_regs->command);
978 temp = xhci_readl(xhci, &xhci->op_regs->command);
980 spin_unlock_irqrestore(&xhci->lock, flags);
981 return 0;
984 #endif /* CONFIG_PM */