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staging:iio:ad9834: allocate chip state with iio_dev and use iio_priv to access.
[linux-2.6/next.git] / sound / soc / codecs / wm8991.c
blob3c2ee1bb73cdb8c85d21372b41d3598cf7b4bcad
1 /*
2 * wm8991.c -- WM8991 ALSA Soc Audio driver
3 *
4 * Copyright 2007-2010 Wolfson Microelectronics PLC.
5 * Author: Graeme Gregory
6 * linux@wolfsonmicro.com
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/version.h>
17 #include <linux/kernel.h>
18 #include <linux/init.h>
19 #include <linux/delay.h>
20 #include <linux/pm.h>
21 #include <linux/i2c.h>
22 #include <linux/platform_device.h>
23 #include <linux/slab.h>
24 #include <sound/core.h>
25 #include <sound/pcm.h>
26 #include <sound/pcm_params.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dapm.h>
29 #include <sound/initval.h>
30 #include <sound/tlv.h>
31 #include <asm/div64.h>
32
33 #include "wm8991.h"
34
35 struct wm8991_priv {
36 enum snd_soc_control_type control_type;
37 unsigned int pcmclk;
38 };
39
40 static const u16 wm8991_reg_defs[] = {
41 0x8991, /* R0 - Reset */
42 0x0000, /* R1 - Power Management (1) */
43 0x6000, /* R2 - Power Management (2) */
44 0x0000, /* R3 - Power Management (3) */
45 0x4050, /* R4 - Audio Interface (1) */
46 0x4000, /* R5 - Audio Interface (2) */
47 0x01C8, /* R6 - Clocking (1) */
48 0x0000, /* R7 - Clocking (2) */
49 0x0040, /* R8 - Audio Interface (3) */
50 0x0040, /* R9 - Audio Interface (4) */
51 0x0004, /* R10 - DAC CTRL */
52 0x00C0, /* R11 - Left DAC Digital Volume */
53 0x00C0, /* R12 - Right DAC Digital Volume */
54 0x0000, /* R13 - Digital Side Tone */
55 0x0100, /* R14 - ADC CTRL */
56 0x00C0, /* R15 - Left ADC Digital Volume */
57 0x00C0, /* R16 - Right ADC Digital Volume */
58 0x0000, /* R17 */
59 0x0000, /* R18 - GPIO CTRL 1 */
60 0x1000, /* R19 - GPIO1 & GPIO2 */
61 0x1010, /* R20 - GPIO3 & GPIO4 */
62 0x1010, /* R21 - GPIO5 & GPIO6 */
63 0x8000, /* R22 - GPIOCTRL 2 */
64 0x0800, /* R23 - GPIO_POL */
65 0x008B, /* R24 - Left Line Input 1&2 Volume */
66 0x008B, /* R25 - Left Line Input 3&4 Volume */
67 0x008B, /* R26 - Right Line Input 1&2 Volume */
68 0x008B, /* R27 - Right Line Input 3&4 Volume */
69 0x0000, /* R28 - Left Output Volume */
70 0x0000, /* R29 - Right Output Volume */
71 0x0066, /* R30 - Line Outputs Volume */
72 0x0022, /* R31 - Out3/4 Volume */
73 0x0079, /* R32 - Left OPGA Volume */
74 0x0079, /* R33 - Right OPGA Volume */
75 0x0003, /* R34 - Speaker Volume */
76 0x0003, /* R35 - ClassD1 */
77 0x0000, /* R36 */
78 0x0100, /* R37 - ClassD3 */
79 0x0000, /* R38 */
80 0x0000, /* R39 - Input Mixer1 */
81 0x0000, /* R40 - Input Mixer2 */
82 0x0000, /* R41 - Input Mixer3 */
83 0x0000, /* R42 - Input Mixer4 */
84 0x0000, /* R43 - Input Mixer5 */
85 0x0000, /* R44 - Input Mixer6 */
86 0x0000, /* R45 - Output Mixer1 */
87 0x0000, /* R46 - Output Mixer2 */
88 0x0000, /* R47 - Output Mixer3 */
89 0x0000, /* R48 - Output Mixer4 */
90 0x0000, /* R49 - Output Mixer5 */
91 0x0000, /* R50 - Output Mixer6 */
92 0x0180, /* R51 - Out3/4 Mixer */
93 0x0000, /* R52 - Line Mixer1 */
94 0x0000, /* R53 - Line Mixer2 */
95 0x0000, /* R54 - Speaker Mixer */
96 0x0000, /* R55 - Additional Control */
97 0x0000, /* R56 - AntiPOP1 */
98 0x0000, /* R57 - AntiPOP2 */
99 0x0000, /* R58 - MICBIAS */
100 0x0000, /* R59 */
101 0x0008, /* R60 - PLL1 */
102 0x0031, /* R61 - PLL2 */
103 0x0026, /* R62 - PLL3 */
104 };
105
106 #define wm8991_reset(c) snd_soc_write(c, WM8991_RESET, 0)
107
108 static const unsigned int rec_mix_tlv[] = {
109 TLV_DB_RANGE_HEAD(1),
110 0, 7, TLV_DB_LINEAR_ITEM(-1500, 600),
111 };
112
113 static const unsigned int in_pga_tlv[] = {
114 TLV_DB_RANGE_HEAD(1),
115 0, 0x1F, TLV_DB_LINEAR_ITEM(-1650, 3000),
116 };
117
118 static const unsigned int out_mix_tlv[] = {
119 TLV_DB_RANGE_HEAD(1),
120 0, 7, TLV_DB_LINEAR_ITEM(0, -2100),
121 };
122
123 static const unsigned int out_pga_tlv[] = {
124 TLV_DB_RANGE_HEAD(1),
125 0, 127, TLV_DB_LINEAR_ITEM(-7300, 600),
126 };
127
128 static const unsigned int out_omix_tlv[] = {
129 TLV_DB_RANGE_HEAD(1),
130 0, 7, TLV_DB_LINEAR_ITEM(-600, 0),
131 };
132
133 static const unsigned int out_dac_tlv[] = {
134 TLV_DB_RANGE_HEAD(1),
135 0, 255, TLV_DB_LINEAR_ITEM(-7163, 0),
136 };
137
138 static const unsigned int in_adc_tlv[] = {
139 TLV_DB_RANGE_HEAD(1),
140 0, 255, TLV_DB_LINEAR_ITEM(-7163, 1763),
141 };
142
143 static const unsigned int out_sidetone_tlv[] = {
144 TLV_DB_RANGE_HEAD(1),
145 0, 31, TLV_DB_LINEAR_ITEM(-3600, 0),
146 };
147
148 static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol,
149 struct snd_ctl_elem_value *ucontrol)
150 {
151 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
152 int reg = kcontrol->private_value & 0xff;
153 int ret;
154 u16 val;
155
156 ret = snd_soc_put_volsw(kcontrol, ucontrol);
157 if (ret < 0)
158 return ret;
159
160 /* now hit the volume update bits (always bit 8) */
161 val = snd_soc_read(codec, reg);
162 return snd_soc_write(codec, reg, val | 0x0100);
163 }
164
165 static const char *wm8991_digital_sidetone[] =
166 {"None", "Left ADC", "Right ADC", "Reserved"};
167
168 static const struct soc_enum wm8991_left_digital_sidetone_enum =
169 SOC_ENUM_SINGLE(WM8991_DIGITAL_SIDE_TONE,
170 WM8991_ADC_TO_DACL_SHIFT,
171 WM8991_ADC_TO_DACL_MASK,
172 wm8991_digital_sidetone);
173
174 static const struct soc_enum wm8991_right_digital_sidetone_enum =
175 SOC_ENUM_SINGLE(WM8991_DIGITAL_SIDE_TONE,
176 WM8991_ADC_TO_DACR_SHIFT,
177 WM8991_ADC_TO_DACR_MASK,
178 wm8991_digital_sidetone);
179
180 static const char *wm8991_adcmode[] =
181 {"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"};
182
183 static const struct soc_enum wm8991_right_adcmode_enum =
184 SOC_ENUM_SINGLE(WM8991_ADC_CTRL,
185 WM8991_ADC_HPF_CUT_SHIFT,
186 WM8991_ADC_HPF_CUT_MASK,
187 wm8991_adcmode);
188
189 static const struct snd_kcontrol_new wm8991_snd_controls[] = {
190 /* INMIXL */
191 SOC_SINGLE("LIN12 PGA Boost", WM8991_INPUT_MIXER3, WM8991_L12MNBST_BIT, 1, 0),
192 SOC_SINGLE("LIN34 PGA Boost", WM8991_INPUT_MIXER3, WM8991_L34MNBST_BIT, 1, 0),
193 /* INMIXR */
194 SOC_SINGLE("RIN12 PGA Boost", WM8991_INPUT_MIXER3, WM8991_R12MNBST_BIT, 1, 0),
195 SOC_SINGLE("RIN34 PGA Boost", WM8991_INPUT_MIXER3, WM8991_R34MNBST_BIT, 1, 0),
196
197 /* LOMIX */
198 SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER3,
199 WM8991_LLI3LOVOL_SHIFT, WM8991_LLI3LOVOL_MASK, 1, out_mix_tlv),
200 SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3,
201 WM8991_LR12LOVOL_SHIFT, WM8991_LR12LOVOL_MASK, 1, out_mix_tlv),
202 SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3,
203 WM8991_LL12LOVOL_SHIFT, WM8991_LL12LOVOL_MASK, 1, out_mix_tlv),
204 SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER5,
205 WM8991_LRI3LOVOL_SHIFT, WM8991_LRI3LOVOL_MASK, 1, out_mix_tlv),
206 SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER5,
207 WM8991_LRBLOVOL_SHIFT, WM8991_LRBLOVOL_MASK, 1, out_mix_tlv),
208 SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER5,
209 WM8991_LRBLOVOL_SHIFT, WM8991_LRBLOVOL_MASK, 1, out_mix_tlv),
210
211 /* ROMIX */
212 SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER4,
213 WM8991_RRI3ROVOL_SHIFT, WM8991_RRI3ROVOL_MASK, 1, out_mix_tlv),
214 SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4,
215 WM8991_RL12ROVOL_SHIFT, WM8991_RL12ROVOL_MASK, 1, out_mix_tlv),
216 SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4,
217 WM8991_RR12ROVOL_SHIFT, WM8991_RR12ROVOL_MASK, 1, out_mix_tlv),
218 SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER6,
219 WM8991_RLI3ROVOL_SHIFT, WM8991_RLI3ROVOL_MASK, 1, out_mix_tlv),
220 SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER6,
221 WM8991_RLBROVOL_SHIFT, WM8991_RLBROVOL_MASK, 1, out_mix_tlv),
222 SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER6,
223 WM8991_RRBROVOL_SHIFT, WM8991_RRBROVOL_MASK, 1, out_mix_tlv),
224
225 /* LOUT */
226 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8991_LEFT_OUTPUT_VOLUME,
227 WM8991_LOUTVOL_SHIFT, WM8991_LOUTVOL_MASK, 0, out_pga_tlv),
228 SOC_SINGLE("LOUT ZC", WM8991_LEFT_OUTPUT_VOLUME, WM8991_LOZC_BIT, 1, 0),
229
230 /* ROUT */
231 SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8991_RIGHT_OUTPUT_VOLUME,
232 WM8991_ROUTVOL_SHIFT, WM8991_ROUTVOL_MASK, 0, out_pga_tlv),
233 SOC_SINGLE("ROUT ZC", WM8991_RIGHT_OUTPUT_VOLUME, WM8991_ROZC_BIT, 1, 0),
234
235 /* LOPGA */
236 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8991_LEFT_OPGA_VOLUME,
237 WM8991_LOPGAVOL_SHIFT, WM8991_LOPGAVOL_MASK, 0, out_pga_tlv),
238 SOC_SINGLE("LOPGA ZC Switch", WM8991_LEFT_OPGA_VOLUME,
239 WM8991_LOPGAZC_BIT, 1, 0),
240
241 /* ROPGA */
242 SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8991_RIGHT_OPGA_VOLUME,
243 WM8991_ROPGAVOL_SHIFT, WM8991_ROPGAVOL_MASK, 0, out_pga_tlv),
244 SOC_SINGLE("ROPGA ZC Switch", WM8991_RIGHT_OPGA_VOLUME,
245 WM8991_ROPGAZC_BIT, 1, 0),
246
247 SOC_SINGLE("LON Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
248 WM8991_LONMUTE_BIT, 1, 0),
249 SOC_SINGLE("LOP Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
250 WM8991_LOPMUTE_BIT, 1, 0),
251 SOC_SINGLE("LOP Attenuation Switch", WM8991_LINE_OUTPUTS_VOLUME,
252 WM8991_LOATTN_BIT, 1, 0),
253 SOC_SINGLE("RON Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
254 WM8991_RONMUTE_BIT, 1, 0),
255 SOC_SINGLE("ROP Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
256 WM8991_ROPMUTE_BIT, 1, 0),
257 SOC_SINGLE("ROP Attenuation Switch", WM8991_LINE_OUTPUTS_VOLUME,
258 WM8991_ROATTN_BIT, 1, 0),
259
260 SOC_SINGLE("OUT3 Mute Switch", WM8991_OUT3_4_VOLUME,
261 WM8991_OUT3MUTE_BIT, 1, 0),
262 SOC_SINGLE("OUT3 Attenuation Switch", WM8991_OUT3_4_VOLUME,
263 WM8991_OUT3ATTN_BIT, 1, 0),
264
265 SOC_SINGLE("OUT4 Mute Switch", WM8991_OUT3_4_VOLUME,
266 WM8991_OUT4MUTE_BIT, 1, 0),
267 SOC_SINGLE("OUT4 Attenuation Switch", WM8991_OUT3_4_VOLUME,
268 WM8991_OUT4ATTN_BIT, 1, 0),
269
270 SOC_SINGLE("Speaker Mode Switch", WM8991_CLASSD1,
271 WM8991_CDMODE_BIT, 1, 0),
272
273 SOC_SINGLE("Speaker Output Attenuation Volume", WM8991_SPEAKER_VOLUME,
274 WM8991_SPKVOL_SHIFT, WM8991_SPKVOL_MASK, 0),
275 SOC_SINGLE("Speaker DC Boost Volume", WM8991_CLASSD3,
276 WM8991_DCGAIN_SHIFT, WM8991_DCGAIN_MASK, 0),
277 SOC_SINGLE("Speaker AC Boost Volume", WM8991_CLASSD3,
278 WM8991_ACGAIN_SHIFT, WM8991_ACGAIN_MASK, 0),
279
280 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume",
281 WM8991_LEFT_DAC_DIGITAL_VOLUME,
282 WM8991_DACL_VOL_SHIFT,
283 WM8991_DACL_VOL_MASK,
284 0,
285 out_dac_tlv),
286
287 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume",
288 WM8991_RIGHT_DAC_DIGITAL_VOLUME,
289 WM8991_DACR_VOL_SHIFT,
290 WM8991_DACR_VOL_MASK,
291 0,
292 out_dac_tlv),
293
294 SOC_ENUM("Left Digital Sidetone", wm8991_left_digital_sidetone_enum),
295 SOC_ENUM("Right Digital Sidetone", wm8991_right_digital_sidetone_enum),
296
297 SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8991_DIGITAL_SIDE_TONE,
298 WM8991_ADCL_DAC_SVOL_SHIFT, WM8991_ADCL_DAC_SVOL_MASK, 0,
299 out_sidetone_tlv),
300 SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8991_DIGITAL_SIDE_TONE,
301 WM8991_ADCR_DAC_SVOL_SHIFT, WM8991_ADCR_DAC_SVOL_MASK, 0,
302 out_sidetone_tlv),
303
304 SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8991_ADC_CTRL,
305 WM8991_ADC_HPF_ENA_BIT, 1, 0),
306
307 SOC_ENUM("ADC HPF Mode", wm8991_right_adcmode_enum),
308
309 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume",
310 WM8991_LEFT_ADC_DIGITAL_VOLUME,
311 WM8991_ADCL_VOL_SHIFT,
312 WM8991_ADCL_VOL_MASK,
313 0,
314 in_adc_tlv),
315
316 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume",
317 WM8991_RIGHT_ADC_DIGITAL_VOLUME,
318 WM8991_ADCR_VOL_SHIFT,
319 WM8991_ADCR_VOL_MASK,
320 0,
321 in_adc_tlv),
322
323 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume",
324 WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
325 WM8991_LIN12VOL_SHIFT,
326 WM8991_LIN12VOL_MASK,
327 0,
328 in_pga_tlv),
329
330 SOC_SINGLE("LIN12 ZC Switch", WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
331 WM8991_LI12ZC_BIT, 1, 0),
332
333 SOC_SINGLE("LIN12 Mute Switch", WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
334 WM8991_LI12MUTE_BIT, 1, 0),
335
336 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume",
337 WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
338 WM8991_LIN34VOL_SHIFT,
339 WM8991_LIN34VOL_MASK,
340 0,
341 in_pga_tlv),
342
343 SOC_SINGLE("LIN34 ZC Switch", WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
344 WM8991_LI34ZC_BIT, 1, 0),
345
346 SOC_SINGLE("LIN34 Mute Switch", WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
347 WM8991_LI34MUTE_BIT, 1, 0),
348
349 SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume",
350 WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
351 WM8991_RIN12VOL_SHIFT,
352 WM8991_RIN12VOL_MASK,
353 0,
354 in_pga_tlv),
355
356 SOC_SINGLE("RIN12 ZC Switch", WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
357 WM8991_RI12ZC_BIT, 1, 0),
358
359 SOC_SINGLE("RIN12 Mute Switch", WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
360 WM8991_RI12MUTE_BIT, 1, 0),
361
362 SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume",
363 WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
364 WM8991_RIN34VOL_SHIFT,
365 WM8991_RIN34VOL_MASK,
366 0,
367 in_pga_tlv),
368
369 SOC_SINGLE("RIN34 ZC Switch", WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
370 WM8991_RI34ZC_BIT, 1, 0),
371
372 SOC_SINGLE("RIN34 Mute Switch", WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
373 WM8991_RI34MUTE_BIT, 1, 0),
374 };
375
376 /*
377 * _DAPM_ Controls
378 */
379 static int inmixer_event(struct snd_soc_dapm_widget *w,
380 struct snd_kcontrol *kcontrol, int event)
381 {
382 u16 reg, fakepower;
383
384 reg = snd_soc_read(w->codec, WM8991_POWER_MANAGEMENT_2);
385 fakepower = snd_soc_read(w->codec, WM8991_INTDRIVBITS);
386
387 if (fakepower & ((1 << WM8991_INMIXL_PWR_BIT) |
388 (1 << WM8991_AINLMUX_PWR_BIT)))
389 reg |= WM8991_AINL_ENA;
390 else
391 reg &= ~WM8991_AINL_ENA;
392
393 if (fakepower & ((1 << WM8991_INMIXR_PWR_BIT) |
394 (1 << WM8991_AINRMUX_PWR_BIT)))
395 reg |= WM8991_AINR_ENA;
396 else
397 reg &= ~WM8991_AINL_ENA;
398
399 snd_soc_write(w->codec, WM8991_POWER_MANAGEMENT_2, reg);
400 return 0;
401 }
402
403 static int outmixer_event(struct snd_soc_dapm_widget *w,
404 struct snd_kcontrol *kcontrol, int event)
405 {
406 u32 reg_shift = kcontrol->private_value & 0xfff;
407 int ret = 0;
408 u16 reg;
409
410 switch (reg_shift) {
411 case WM8991_SPEAKER_MIXER | (WM8991_LDSPK_BIT << 8):
412 reg = snd_soc_read(w->codec, WM8991_OUTPUT_MIXER1);
413 if (reg & WM8991_LDLO) {
414 printk(KERN_WARNING
415 "Cannot set as Output Mixer 1 LDLO Set\n");
416 ret = -1;
417 }
418 break;
419
420 case WM8991_SPEAKER_MIXER | (WM8991_RDSPK_BIT << 8):
421 reg = snd_soc_read(w->codec, WM8991_OUTPUT_MIXER2);
422 if (reg & WM8991_RDRO) {
423 printk(KERN_WARNING
424 "Cannot set as Output Mixer 2 RDRO Set\n");
425 ret = -1;
426 }
427 break;
428
429 case WM8991_OUTPUT_MIXER1 | (WM8991_LDLO_BIT << 8):
430 reg = snd_soc_read(w->codec, WM8991_SPEAKER_MIXER);
431 if (reg & WM8991_LDSPK) {
432 printk(KERN_WARNING
433 "Cannot set as Speaker Mixer LDSPK Set\n");
434 ret = -1;
435 }
436 break;
437
438 case WM8991_OUTPUT_MIXER2 | (WM8991_RDRO_BIT << 8):
439 reg = snd_soc_read(w->codec, WM8991_SPEAKER_MIXER);
440 if (reg & WM8991_RDSPK) {
441 printk(KERN_WARNING
442 "Cannot set as Speaker Mixer RDSPK Set\n");
443 ret = -1;
444 }
445 break;
446 }
447
448 return ret;
449 }
450
451 /* INMIX dB values */
452 static const unsigned int in_mix_tlv[] = {
453 TLV_DB_RANGE_HEAD(1),
454 0, 7, TLV_DB_LINEAR_ITEM(-1200, 600),
455 };
456
457 /* Left In PGA Connections */
458 static const struct snd_kcontrol_new wm8991_dapm_lin12_pga_controls[] = {
459 SOC_DAPM_SINGLE("LIN1 Switch", WM8991_INPUT_MIXER2, WM8991_LMN1_BIT, 1, 0),
460 SOC_DAPM_SINGLE("LIN2 Switch", WM8991_INPUT_MIXER2, WM8991_LMP2_BIT, 1, 0),
461 };
462
463 static const struct snd_kcontrol_new wm8991_dapm_lin34_pga_controls[] = {
464 SOC_DAPM_SINGLE("LIN3 Switch", WM8991_INPUT_MIXER2, WM8991_LMN3_BIT, 1, 0),
465 SOC_DAPM_SINGLE("LIN4 Switch", WM8991_INPUT_MIXER2, WM8991_LMP4_BIT, 1, 0),
466 };
467
468 /* Right In PGA Connections */
469 static const struct snd_kcontrol_new wm8991_dapm_rin12_pga_controls[] = {
470 SOC_DAPM_SINGLE("RIN1 Switch", WM8991_INPUT_MIXER2, WM8991_RMN1_BIT, 1, 0),
471 SOC_DAPM_SINGLE("RIN2 Switch", WM8991_INPUT_MIXER2, WM8991_RMP2_BIT, 1, 0),
472 };
473
474 static const struct snd_kcontrol_new wm8991_dapm_rin34_pga_controls[] = {
475 SOC_DAPM_SINGLE("RIN3 Switch", WM8991_INPUT_MIXER2, WM8991_RMN3_BIT, 1, 0),
476 SOC_DAPM_SINGLE("RIN4 Switch", WM8991_INPUT_MIXER2, WM8991_RMP4_BIT, 1, 0),
477 };
478
479 /* INMIXL */
480 static const struct snd_kcontrol_new wm8991_dapm_inmixl_controls[] = {
481 SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8991_INPUT_MIXER3,
482 WM8991_LDBVOL_SHIFT, WM8991_LDBVOL_MASK, 0, in_mix_tlv),
483 SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8991_INPUT_MIXER5, WM8991_LI2BVOL_SHIFT,
484 7, 0, in_mix_tlv),
485 SOC_DAPM_SINGLE("LINPGA12 Switch", WM8991_INPUT_MIXER3, WM8991_L12MNB_BIT,
486 1, 0),
487 SOC_DAPM_SINGLE("LINPGA34 Switch", WM8991_INPUT_MIXER3, WM8991_L34MNB_BIT,
488 1, 0),
489 };
490
491 /* INMIXR */
492 static const struct snd_kcontrol_new wm8991_dapm_inmixr_controls[] = {
493 SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8991_INPUT_MIXER4,
494 WM8991_RDBVOL_SHIFT, WM8991_RDBVOL_MASK, 0, in_mix_tlv),
495 SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8991_INPUT_MIXER6, WM8991_RI2BVOL_SHIFT,
496 7, 0, in_mix_tlv),
497 SOC_DAPM_SINGLE("RINPGA12 Switch", WM8991_INPUT_MIXER3, WM8991_L12MNB_BIT,
498 1, 0),
499 SOC_DAPM_SINGLE("RINPGA34 Switch", WM8991_INPUT_MIXER3, WM8991_L34MNB_BIT,
500 1, 0),
501 };
502
503 /* AINLMUX */
504 static const char *wm8991_ainlmux[] =
505 {"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"};
506
507 static const struct soc_enum wm8991_ainlmux_enum =
508 SOC_ENUM_SINGLE(WM8991_INPUT_MIXER1, WM8991_AINLMODE_SHIFT,
509 ARRAY_SIZE(wm8991_ainlmux), wm8991_ainlmux);
510
511 static const struct snd_kcontrol_new wm8991_dapm_ainlmux_controls =
512 SOC_DAPM_ENUM("Route", wm8991_ainlmux_enum);
513
514 /* DIFFINL */
515
516 /* AINRMUX */
517 static const char *wm8991_ainrmux[] =
518 {"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"};
519
520 static const struct soc_enum wm8991_ainrmux_enum =
521 SOC_ENUM_SINGLE(WM8991_INPUT_MIXER1, WM8991_AINRMODE_SHIFT,
522 ARRAY_SIZE(wm8991_ainrmux), wm8991_ainrmux);
523
524 static const struct snd_kcontrol_new wm8991_dapm_ainrmux_controls =
525 SOC_DAPM_ENUM("Route", wm8991_ainrmux_enum);
526
527 /* RXVOICE */
528 static const struct snd_kcontrol_new wm8991_dapm_rxvoice_controls[] = {
529 SOC_DAPM_SINGLE_TLV("LIN4RXN", WM8991_INPUT_MIXER5, WM8991_LR4BVOL_SHIFT,
530 WM8991_LR4BVOL_MASK, 0, in_mix_tlv),
531 SOC_DAPM_SINGLE_TLV("RIN4RXP", WM8991_INPUT_MIXER6, WM8991_RL4BVOL_SHIFT,
532 WM8991_RL4BVOL_MASK, 0, in_mix_tlv),
533 };
534
535 /* LOMIX */
536 static const struct snd_kcontrol_new wm8991_dapm_lomix_controls[] = {
537 SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER1,
538 WM8991_LRBLO_BIT, 1, 0),
539 SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8991_OUTPUT_MIXER1,
540 WM8991_LLBLO_BIT, 1, 0),
541 SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8991_OUTPUT_MIXER1,
542 WM8991_LRI3LO_BIT, 1, 0),
543 SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8991_OUTPUT_MIXER1,
544 WM8991_LLI3LO_BIT, 1, 0),
545 SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER1,
546 WM8991_LR12LO_BIT, 1, 0),
547 SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER1,
548 WM8991_LL12LO_BIT, 1, 0),
549 SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8991_OUTPUT_MIXER1,
550 WM8991_LDLO_BIT, 1, 0),
551 };
552
553 /* ROMIX */
554 static const struct snd_kcontrol_new wm8991_dapm_romix_controls[] = {
555 SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8991_OUTPUT_MIXER2,
556 WM8991_RLBRO_BIT, 1, 0),
557 SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER2,
558 WM8991_RRBRO_BIT, 1, 0),
559 SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8991_OUTPUT_MIXER2,
560 WM8991_RLI3RO_BIT, 1, 0),
561 SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8991_OUTPUT_MIXER2,
562 WM8991_RRI3RO_BIT, 1, 0),
563 SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER2,
564 WM8991_RL12RO_BIT, 1, 0),
565 SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER2,
566 WM8991_RR12RO_BIT, 1, 0),
567 SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8991_OUTPUT_MIXER2,
568 WM8991_RDRO_BIT, 1, 0),
569 };
570
571 /* LONMIX */
572 static const struct snd_kcontrol_new wm8991_dapm_lonmix_controls[] = {
573 SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8991_LINE_MIXER1,
574 WM8991_LLOPGALON_BIT, 1, 0),
575 SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8991_LINE_MIXER1,
576 WM8991_LROPGALON_BIT, 1, 0),
577 SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8991_LINE_MIXER1,
578 WM8991_LOPLON_BIT, 1, 0),
579 };
580
581 /* LOPMIX */
582 static const struct snd_kcontrol_new wm8991_dapm_lopmix_controls[] = {
583 SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8991_LINE_MIXER1,
584 WM8991_LR12LOP_BIT, 1, 0),
585 SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8991_LINE_MIXER1,
586 WM8991_LL12LOP_BIT, 1, 0),
587 SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8991_LINE_MIXER1,
588 WM8991_LLOPGALOP_BIT, 1, 0),
589 };
590
591 /* RONMIX */
592 static const struct snd_kcontrol_new wm8991_dapm_ronmix_controls[] = {
593 SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8991_LINE_MIXER2,
594 WM8991_RROPGARON_BIT, 1, 0),
595 SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8991_LINE_MIXER2,
596 WM8991_RLOPGARON_BIT, 1, 0),
597 SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8991_LINE_MIXER2,
598 WM8991_ROPRON_BIT, 1, 0),
599 };
600
601 /* ROPMIX */
602 static const struct snd_kcontrol_new wm8991_dapm_ropmix_controls[] = {
603 SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8991_LINE_MIXER2,
604 WM8991_RL12ROP_BIT, 1, 0),
605 SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8991_LINE_MIXER2,
606 WM8991_RR12ROP_BIT, 1, 0),
607 SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8991_LINE_MIXER2,
608 WM8991_RROPGAROP_BIT, 1, 0),
609 };
610
611 /* OUT3MIX */
612 static const struct snd_kcontrol_new wm8991_dapm_out3mix_controls[] = {
613 SOC_DAPM_SINGLE("OUT3MIX LIN4RXN Bypass Switch", WM8991_OUT3_4_MIXER,
614 WM8991_LI4O3_BIT, 1, 0),
615 SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8991_OUT3_4_MIXER,
616 WM8991_LPGAO3_BIT, 1, 0),
617 };
618
619 /* OUT4MIX */
620 static const struct snd_kcontrol_new wm8991_dapm_out4mix_controls[] = {
621 SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8991_OUT3_4_MIXER,
622 WM8991_RPGAO4_BIT, 1, 0),
623 SOC_DAPM_SINGLE("OUT4MIX RIN4RXP Bypass Switch", WM8991_OUT3_4_MIXER,
624 WM8991_RI4O4_BIT, 1, 0),
625 };
626
627 /* SPKMIX */
628 static const struct snd_kcontrol_new wm8991_dapm_spkmix_controls[] = {
629 SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8991_SPEAKER_MIXER,
630 WM8991_LI2SPK_BIT, 1, 0),
631 SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8991_SPEAKER_MIXER,
632 WM8991_LB2SPK_BIT, 1, 0),
633 SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8991_SPEAKER_MIXER,
634 WM8991_LOPGASPK_BIT, 1, 0),
635 SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8991_SPEAKER_MIXER,
636 WM8991_LDSPK_BIT, 1, 0),
637 SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8991_SPEAKER_MIXER,
638 WM8991_RDSPK_BIT, 1, 0),
639 SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8991_SPEAKER_MIXER,
640 WM8991_ROPGASPK_BIT, 1, 0),
641 SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8991_SPEAKER_MIXER,
642 WM8991_RL12ROP_BIT, 1, 0),
643 SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8991_SPEAKER_MIXER,
644 WM8991_RI2SPK_BIT, 1, 0),
645 };
646
647 static const struct snd_soc_dapm_widget wm8991_dapm_widgets[] = {
648 /* Input Side */
649 /* Input Lines */
650 SND_SOC_DAPM_INPUT("LIN1"),
651 SND_SOC_DAPM_INPUT("LIN2"),
652 SND_SOC_DAPM_INPUT("LIN3"),
653 SND_SOC_DAPM_INPUT("LIN4RXN"),
654 SND_SOC_DAPM_INPUT("RIN3"),
655 SND_SOC_DAPM_INPUT("RIN4RXP"),
656 SND_SOC_DAPM_INPUT("RIN1"),
657 SND_SOC_DAPM_INPUT("RIN2"),
658 SND_SOC_DAPM_INPUT("Internal ADC Source"),
659
660 /* DACs */
661 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8991_POWER_MANAGEMENT_2,
662 WM8991_ADCL_ENA_BIT, 0),
663 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8991_POWER_MANAGEMENT_2,
664 WM8991_ADCR_ENA_BIT, 0),
665
666 /* Input PGAs */
667 SND_SOC_DAPM_MIXER("LIN12 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_LIN12_ENA_BIT,
668 0, &wm8991_dapm_lin12_pga_controls[0],
669 ARRAY_SIZE(wm8991_dapm_lin12_pga_controls)),
670 SND_SOC_DAPM_MIXER("LIN34 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_LIN34_ENA_BIT,
671 0, &wm8991_dapm_lin34_pga_controls[0],
672 ARRAY_SIZE(wm8991_dapm_lin34_pga_controls)),
673 SND_SOC_DAPM_MIXER("RIN12 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_RIN12_ENA_BIT,
674 0, &wm8991_dapm_rin12_pga_controls[0],
675 ARRAY_SIZE(wm8991_dapm_rin12_pga_controls)),
676 SND_SOC_DAPM_MIXER("RIN34 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_RIN34_ENA_BIT,
677 0, &wm8991_dapm_rin34_pga_controls[0],
678 ARRAY_SIZE(wm8991_dapm_rin34_pga_controls)),
679
680 /* INMIXL */
681 SND_SOC_DAPM_MIXER_E("INMIXL", WM8991_INTDRIVBITS, WM8991_INMIXL_PWR_BIT, 0,
682 &wm8991_dapm_inmixl_controls[0],
683 ARRAY_SIZE(wm8991_dapm_inmixl_controls),
684 inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
685
686 /* AINLMUX */
687 SND_SOC_DAPM_MUX_E("AINLMUX", WM8991_INTDRIVBITS, WM8991_AINLMUX_PWR_BIT, 0,
688 &wm8991_dapm_ainlmux_controls, inmixer_event,
689 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
690
691 /* INMIXR */
692 SND_SOC_DAPM_MIXER_E("INMIXR", WM8991_INTDRIVBITS, WM8991_INMIXR_PWR_BIT, 0,
693 &wm8991_dapm_inmixr_controls[0],
694 ARRAY_SIZE(wm8991_dapm_inmixr_controls),
695 inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
696
697 /* AINRMUX */
698 SND_SOC_DAPM_MUX_E("AINRMUX", WM8991_INTDRIVBITS, WM8991_AINRMUX_PWR_BIT, 0,
699 &wm8991_dapm_ainrmux_controls, inmixer_event,
700 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
701
702 /* Output Side */
703 /* DACs */
704 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8991_POWER_MANAGEMENT_3,
705 WM8991_DACL_ENA_BIT, 0),
706 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8991_POWER_MANAGEMENT_3,
707 WM8991_DACR_ENA_BIT, 0),
708
709 /* LOMIX */
710 SND_SOC_DAPM_MIXER_E("LOMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LOMIX_ENA_BIT,
711 0, &wm8991_dapm_lomix_controls[0],
712 ARRAY_SIZE(wm8991_dapm_lomix_controls),
713 outmixer_event, SND_SOC_DAPM_PRE_REG),
714
715 /* LONMIX */
716 SND_SOC_DAPM_MIXER("LONMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LON_ENA_BIT, 0,
717 &wm8991_dapm_lonmix_controls[0],
718 ARRAY_SIZE(wm8991_dapm_lonmix_controls)),
719
720 /* LOPMIX */
721 SND_SOC_DAPM_MIXER("LOPMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LOP_ENA_BIT, 0,
722 &wm8991_dapm_lopmix_controls[0],
723 ARRAY_SIZE(wm8991_dapm_lopmix_controls)),
724
725 /* OUT3MIX */
726 SND_SOC_DAPM_MIXER("OUT3MIX", WM8991_POWER_MANAGEMENT_1, WM8991_OUT3_ENA_BIT, 0,
727 &wm8991_dapm_out3mix_controls[0],
728 ARRAY_SIZE(wm8991_dapm_out3mix_controls)),
729
730 /* SPKMIX */
731 SND_SOC_DAPM_MIXER_E("SPKMIX", WM8991_POWER_MANAGEMENT_1, WM8991_SPK_ENA_BIT, 0,
732 &wm8991_dapm_spkmix_controls[0],
733 ARRAY_SIZE(wm8991_dapm_spkmix_controls), outmixer_event,
734 SND_SOC_DAPM_PRE_REG),
735
736 /* OUT4MIX */
737 SND_SOC_DAPM_MIXER("OUT4MIX", WM8991_POWER_MANAGEMENT_1, WM8991_OUT4_ENA_BIT, 0,
738 &wm8991_dapm_out4mix_controls[0],
739 ARRAY_SIZE(wm8991_dapm_out4mix_controls)),
740
741 /* ROPMIX */
742 SND_SOC_DAPM_MIXER("ROPMIX", WM8991_POWER_MANAGEMENT_3, WM8991_ROP_ENA_BIT, 0,
743 &wm8991_dapm_ropmix_controls[0],
744 ARRAY_SIZE(wm8991_dapm_ropmix_controls)),
745
746 /* RONMIX */
747 SND_SOC_DAPM_MIXER("RONMIX", WM8991_POWER_MANAGEMENT_3, WM8991_RON_ENA_BIT, 0,
748 &wm8991_dapm_ronmix_controls[0],
749 ARRAY_SIZE(wm8991_dapm_ronmix_controls)),
750
751 /* ROMIX */
752 SND_SOC_DAPM_MIXER_E("ROMIX", WM8991_POWER_MANAGEMENT_3, WM8991_ROMIX_ENA_BIT,
753 0, &wm8991_dapm_romix_controls[0],
754 ARRAY_SIZE(wm8991_dapm_romix_controls),
755 outmixer_event, SND_SOC_DAPM_PRE_REG),
756
757 /* LOUT PGA */
758 SND_SOC_DAPM_PGA("LOUT PGA", WM8991_POWER_MANAGEMENT_1, WM8991_LOUT_ENA_BIT, 0,
759 NULL, 0),
760
761 /* ROUT PGA */
762 SND_SOC_DAPM_PGA("ROUT PGA", WM8991_POWER_MANAGEMENT_1, WM8991_ROUT_ENA_BIT, 0,
763 NULL, 0),
764
765 /* LOPGA */
766 SND_SOC_DAPM_PGA("LOPGA", WM8991_POWER_MANAGEMENT_3, WM8991_LOPGA_ENA_BIT, 0,
767 NULL, 0),
768
769 /* ROPGA */
770 SND_SOC_DAPM_PGA("ROPGA", WM8991_POWER_MANAGEMENT_3, WM8991_ROPGA_ENA_BIT, 0,
771 NULL, 0),
772
773 /* MICBIAS */
774 SND_SOC_DAPM_MICBIAS("MICBIAS", WM8991_POWER_MANAGEMENT_1,
775 WM8991_MICBIAS_ENA_BIT, 0),
776
777 SND_SOC_DAPM_OUTPUT("LON"),
778 SND_SOC_DAPM_OUTPUT("LOP"),
779 SND_SOC_DAPM_OUTPUT("OUT3"),
780 SND_SOC_DAPM_OUTPUT("LOUT"),
781 SND_SOC_DAPM_OUTPUT("SPKN"),
782 SND_SOC_DAPM_OUTPUT("SPKP"),
783 SND_SOC_DAPM_OUTPUT("ROUT"),
784 SND_SOC_DAPM_OUTPUT("OUT4"),
785 SND_SOC_DAPM_OUTPUT("ROP"),
786 SND_SOC_DAPM_OUTPUT("RON"),
787 SND_SOC_DAPM_OUTPUT("OUT"),
788
789 SND_SOC_DAPM_OUTPUT("Internal DAC Sink"),
790 };
791
792 static const struct snd_soc_dapm_route audio_map[] = {
793 /* Make DACs turn on when playing even if not mixed into any outputs */
794 {"Internal DAC Sink", NULL, "Left DAC"},
795 {"Internal DAC Sink", NULL, "Right DAC"},
796
797 /* Make ADCs turn on when recording even if not mixed from any inputs */
798 {"Left ADC", NULL, "Internal ADC Source"},
799 {"Right ADC", NULL, "Internal ADC Source"},
800
801 /* Input Side */
802 /* LIN12 PGA */
803 {"LIN12 PGA", "LIN1 Switch", "LIN1"},
804 {"LIN12 PGA", "LIN2 Switch", "LIN2"},
805 /* LIN34 PGA */
806 {"LIN34 PGA", "LIN3 Switch", "LIN3"},
807 {"LIN34 PGA", "LIN4 Switch", "LIN4RXN"},
808 /* INMIXL */
809 {"INMIXL", "Record Left Volume", "LOMIX"},
810 {"INMIXL", "LIN2 Volume", "LIN2"},
811 {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"},
812 {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"},
813 /* AINLMUX */
814 {"AINLMUX", "INMIXL Mix", "INMIXL"},
815 {"AINLMUX", "DIFFINL Mix", "LIN12 PGA"},
816 {"AINLMUX", "DIFFINL Mix", "LIN34 PGA"},
817 {"AINLMUX", "RXVOICE Mix", "LIN4RXN"},
818 {"AINLMUX", "RXVOICE Mix", "RIN4RXP"},
819 /* ADC */
820 {"Left ADC", NULL, "AINLMUX"},
821
822 /* RIN12 PGA */
823 {"RIN12 PGA", "RIN1 Switch", "RIN1"},
824 {"RIN12 PGA", "RIN2 Switch", "RIN2"},
825 /* RIN34 PGA */
826 {"RIN34 PGA", "RIN3 Switch", "RIN3"},
827 {"RIN34 PGA", "RIN4 Switch", "RIN4RXP"},
828 /* INMIXL */
829 {"INMIXR", "Record Right Volume", "ROMIX"},
830 {"INMIXR", "RIN2 Volume", "RIN2"},
831 {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"},
832 {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"},
833 /* AINRMUX */
834 {"AINRMUX", "INMIXR Mix", "INMIXR"},
835 {"AINRMUX", "DIFFINR Mix", "RIN12 PGA"},
836 {"AINRMUX", "DIFFINR Mix", "RIN34 PGA"},
837 {"AINRMUX", "RXVOICE Mix", "LIN4RXN"},
838 {"AINRMUX", "RXVOICE Mix", "RIN4RXP"},
839 /* ADC */
840 {"Right ADC", NULL, "AINRMUX"},
841
842 /* LOMIX */
843 {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"},
844 {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"},
845 {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
846 {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
847 {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"},
848 {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"},
849 {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"},
850
851 /* ROMIX */
852 {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"},
853 {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"},
854 {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
855 {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
856 {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"},
857 {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"},
858 {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"},
859
860 /* SPKMIX */
861 {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"},
862 {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"},
863 {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"},
864 {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"},
865 {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"},
866 {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"},
867 {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"},
868 {"SPKMIX", "SPKMIX Left DAC Switch", "Right DAC"},
869
870 /* LONMIX */
871 {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"},
872 {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"},
873 {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"},
874
875 /* LOPMIX */
876 {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"},
877 {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"},
878 {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"},
879
880 /* OUT3MIX */
881 {"OUT3MIX", "OUT3MIX LIN4RXN Bypass Switch", "LIN4RXN"},
882 {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"},
883
884 /* OUT4MIX */
885 {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"},
886 {"OUT4MIX", "OUT4MIX RIN4RXP Bypass Switch", "RIN4RXP"},
887
888 /* RONMIX */
889 {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"},
890 {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"},
891 {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"},
892
893 /* ROPMIX */
894 {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"},
895 {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"},
896 {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"},
897
898 /* Out Mixer PGAs */
899 {"LOPGA", NULL, "LOMIX"},
900 {"ROPGA", NULL, "ROMIX"},
901
902 {"LOUT PGA", NULL, "LOMIX"},
903 {"ROUT PGA", NULL, "ROMIX"},
904
905 /* Output Pins */
906 {"LON", NULL, "LONMIX"},
907 {"LOP", NULL, "LOPMIX"},
908 {"OUT", NULL, "OUT3MIX"},
909 {"LOUT", NULL, "LOUT PGA"},
910 {"SPKN", NULL, "SPKMIX"},
911 {"ROUT", NULL, "ROUT PGA"},
912 {"OUT4", NULL, "OUT4MIX"},
913 {"ROP", NULL, "ROPMIX"},
914 {"RON", NULL, "RONMIX"},
915 };
916
917 /* PLL divisors */
918 struct _pll_div {
919 u32 div2;
920 u32 n;
921 u32 k;
922 };
923
924 /* The size in bits of the pll divide multiplied by 10
925 * to allow rounding later */
926 #define FIXED_PLL_SIZE ((1 << 16) * 10)
927
928 static void pll_factors(struct _pll_div *pll_div, unsigned int target,
929 unsigned int source)
930 {
931 u64 Kpart;
932 unsigned int K, Ndiv, Nmod;
933
934
935 Ndiv = target / source;
936 if (Ndiv < 6) {
937 source >>= 1;
938 pll_div->div2 = 1;
939 Ndiv = target / source;
940 } else
941 pll_div->div2 = 0;
942
943 if ((Ndiv < 6) || (Ndiv > 12))
944 printk(KERN_WARNING
945 "WM8991 N value outwith recommended range! N = %d\n", Ndiv);
946
947 pll_div->n = Ndiv;
948 Nmod = target % source;
949 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
950
951 do_div(Kpart, source);
952
953 K = Kpart & 0xFFFFFFFF;
954
955 /* Check if we need to round */
956 if ((K % 10) >= 5)
957 K += 5;
958
959 /* Move down to proper range now rounding is done */
960 K /= 10;
961
962 pll_div->k = K;
963 }
964
965 static int wm8991_set_dai_pll(struct snd_soc_dai *codec_dai,
966 int pll_id, int src, unsigned int freq_in, unsigned int freq_out)
967 {
968 u16 reg;
969 struct snd_soc_codec *codec = codec_dai->codec;
970 struct _pll_div pll_div;
971
972 if (freq_in && freq_out) {
973 pll_factors(&pll_div, freq_out * 4, freq_in);
974
975 /* Turn on PLL */
976 reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_2);
977 reg |= WM8991_PLL_ENA;
978 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_2, reg);
979
980 /* sysclk comes from PLL */
981 reg = snd_soc_read(codec, WM8991_CLOCKING_2);
982 snd_soc_write(codec, WM8991_CLOCKING_2, reg | WM8991_SYSCLK_SRC);
983
984 /* set up N , fractional mode and pre-divisor if necessary */
985 snd_soc_write(codec, WM8991_PLL1, pll_div.n | WM8991_SDM |
986 (pll_div.div2 ? WM8991_PRESCALE : 0));
987 snd_soc_write(codec, WM8991_PLL2, (u8)(pll_div.k>>8));
988 snd_soc_write(codec, WM8991_PLL3, (u8)(pll_div.k & 0xFF));
989 } else {
990 /* Turn on PLL */
991 reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_2);
992 reg &= ~WM8991_PLL_ENA;
993 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_2, reg);
994 }
995 return 0;
996 }
997
998 /*
999 * Set's ADC and Voice DAC format.
1000 */
1001 static int wm8991_set_dai_fmt(struct snd_soc_dai *codec_dai,
1002 unsigned int fmt)
1003 {
1004 struct snd_soc_codec *codec = codec_dai->codec;
1005 u16 audio1, audio3;
1006
1007 audio1 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_1);
1008 audio3 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_3);
1009
1010 /* set master/slave audio interface */
1011 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1012 case SND_SOC_DAIFMT_CBS_CFS:
1013 audio3 &= ~WM8991_AIF_MSTR1;
1014 break;
1015 case SND_SOC_DAIFMT_CBM_CFM:
1016 audio3 |= WM8991_AIF_MSTR1;
1017 break;
1018 default:
1019 return -EINVAL;
1020 }
1021
1022 audio1 &= ~WM8991_AIF_FMT_MASK;
1023
1024 /* interface format */
1025 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1026 case SND_SOC_DAIFMT_I2S:
1027 audio1 |= WM8991_AIF_TMF_I2S;
1028 audio1 &= ~WM8991_AIF_LRCLK_INV;
1029 break;
1030 case SND_SOC_DAIFMT_RIGHT_J:
1031 audio1 |= WM8991_AIF_TMF_RIGHTJ;
1032 audio1 &= ~WM8991_AIF_LRCLK_INV;
1033 break;
1034 case SND_SOC_DAIFMT_LEFT_J:
1035 audio1 |= WM8991_AIF_TMF_LEFTJ;
1036 audio1 &= ~WM8991_AIF_LRCLK_INV;
1037 break;
1038 case SND_SOC_DAIFMT_DSP_A:
1039 audio1 |= WM8991_AIF_TMF_DSP;
1040 audio1 &= ~WM8991_AIF_LRCLK_INV;
1041 break;
1042 case SND_SOC_DAIFMT_DSP_B:
1043 audio1 |= WM8991_AIF_TMF_DSP | WM8991_AIF_LRCLK_INV;
1044 break;
1045 default:
1046 return -EINVAL;
1047 }
1048
1049 snd_soc_write(codec, WM8991_AUDIO_INTERFACE_1, audio1);
1050 snd_soc_write(codec, WM8991_AUDIO_INTERFACE_3, audio3);
1051 return 0;
1052 }
1053
1054 static int wm8991_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1055 int div_id, int div)
1056 {
1057 struct snd_soc_codec *codec = codec_dai->codec;
1058 u16 reg;
1059
1060 switch (div_id) {
1061 case WM8991_MCLK_DIV:
1062 reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1063 ~WM8991_MCLK_DIV_MASK;
1064 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1065 break;
1066 case WM8991_DACCLK_DIV:
1067 reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1068 ~WM8991_DAC_CLKDIV_MASK;
1069 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1070 break;
1071 case WM8991_ADCCLK_DIV:
1072 reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1073 ~WM8991_ADC_CLKDIV_MASK;
1074 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1075 break;
1076 case WM8991_BCLK_DIV:
1077 reg = snd_soc_read(codec, WM8991_CLOCKING_1) &
1078 ~WM8991_BCLK_DIV_MASK;
1079 snd_soc_write(codec, WM8991_CLOCKING_1, reg | div);
1080 break;
1081 default:
1082 return -EINVAL;
1083 }
1084
1085 return 0;
1086 }
1087
1088 /*
1089 * Set PCM DAI bit size and sample rate.
1090 */
1091 static int wm8991_hw_params(struct snd_pcm_substream *substream,
1092 struct snd_pcm_hw_params *params,
1093 struct snd_soc_dai *dai)
1094 {
1095 struct snd_soc_codec *codec = dai->codec;
1096 u16 audio1 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_1);
1097
1098 audio1 &= ~WM8991_AIF_WL_MASK;
1099 /* bit size */
1100 switch (params_format(params)) {
1101 case SNDRV_PCM_FORMAT_S16_LE:
1102 break;
1103 case SNDRV_PCM_FORMAT_S20_3LE:
1104 audio1 |= WM8991_AIF_WL_20BITS;
1105 break;
1106 case SNDRV_PCM_FORMAT_S24_LE:
1107 audio1 |= WM8991_AIF_WL_24BITS;
1108 break;
1109 case SNDRV_PCM_FORMAT_S32_LE:
1110 audio1 |= WM8991_AIF_WL_32BITS;
1111 break;
1112 }
1113
1114 snd_soc_write(codec, WM8991_AUDIO_INTERFACE_1, audio1);
1115 return 0;
1116 }
1117
1118 static int wm8991_mute(struct snd_soc_dai *dai, int mute)
1119 {
1120 struct snd_soc_codec *codec = dai->codec;
1121 u16 val;
1122
1123 val = snd_soc_read(codec, WM8991_DAC_CTRL) & ~WM8991_DAC_MUTE;
1124 if (mute)
1125 snd_soc_write(codec, WM8991_DAC_CTRL, val | WM8991_DAC_MUTE);
1126 else
1127 snd_soc_write(codec, WM8991_DAC_CTRL, val);
1128 return 0;
1129 }
1130
1131 static int wm8991_set_bias_level(struct snd_soc_codec *codec,
1132 enum snd_soc_bias_level level)
1133 {
1134 u16 val;
1135
1136 switch (level) {
1137 case SND_SOC_BIAS_ON:
1138 break;
1139
1140 case SND_SOC_BIAS_PREPARE:
1141 /* VMID=2*50k */
1142 val = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_1) &
1143 ~WM8991_VMID_MODE_MASK;
1144 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, val | 0x2);
1145 break;
1146
1147 case SND_SOC_BIAS_STANDBY:
1148 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
1149 snd_soc_cache_sync(codec);
1150 /* Enable all output discharge bits */
1151 snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE |
1152 WM8991_DIS_RLINE | WM8991_DIS_OUT3 |
1153 WM8991_DIS_OUT4 | WM8991_DIS_LOUT |
1154 WM8991_DIS_ROUT);
1155
1156 /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */
1157 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1158 WM8991_BUFDCOPEN | WM8991_POBCTRL |
1159 WM8991_VMIDTOG);
1160
1161 /* Delay to allow output caps to discharge */
1162 msleep(300);
1163
1164 /* Disable VMIDTOG */
1165 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1166 WM8991_BUFDCOPEN | WM8991_POBCTRL);
1167
1168 /* disable all output discharge bits */
1169 snd_soc_write(codec, WM8991_ANTIPOP1, 0);
1170
1171 /* Enable outputs */
1172 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1b00);
1173
1174 msleep(50);
1175
1176 /* Enable VMID at 2x50k */
1177 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f02);
1178
1179 msleep(100);
1180
1181 /* Enable VREF */
1182 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f03);
1183
1184 msleep(600);
1185
1186 /* Enable BUFIOEN */
1187 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1188 WM8991_BUFDCOPEN | WM8991_POBCTRL |
1189 WM8991_BUFIOEN);
1190
1191 /* Disable outputs */
1192 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x3);
1193
1194 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1195 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_BUFIOEN);
1196 }
1197
1198 /* VMID=2*250k */
1199 val = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_1) &
1200 ~WM8991_VMID_MODE_MASK;
1201 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, val | 0x4);
1202 break;
1203
1204 case SND_SOC_BIAS_OFF:
1205 /* Enable POBCTRL and SOFT_ST */
1206 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1207 WM8991_POBCTRL | WM8991_BUFIOEN);
1208
1209 /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */
1210 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1211 WM8991_BUFDCOPEN | WM8991_POBCTRL |
1212 WM8991_BUFIOEN);
1213
1214 /* mute DAC */
1215 val = snd_soc_read(codec, WM8991_DAC_CTRL);
1216 snd_soc_write(codec, WM8991_DAC_CTRL, val | WM8991_DAC_MUTE);
1217
1218 /* Enable any disabled outputs */
1219 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f03);
1220
1221 /* Disable VMID */
1222 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f01);
1223
1224 msleep(300);
1225
1226 /* Enable all output discharge bits */
1227 snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE |
1228 WM8991_DIS_RLINE | WM8991_DIS_OUT3 |
1229 WM8991_DIS_OUT4 | WM8991_DIS_LOUT |
1230 WM8991_DIS_ROUT);
1231
1232 /* Disable VREF */
1233 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x0);
1234
1235 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1236 snd_soc_write(codec, WM8991_ANTIPOP2, 0x0);
1237 codec->cache_sync = 1;
1238 break;
1239 }
1240
1241 codec->dapm.bias_level = level;
1242 return 0;
1243 }
1244
1245 static int wm8991_suspend(struct snd_soc_codec *codec, pm_message_t state)
1246 {
1247 wm8991_set_bias_level(codec, SND_SOC_BIAS_OFF);
1248 return 0;
1249 }
1250
1251 static int wm8991_resume(struct snd_soc_codec *codec)
1252 {
1253 wm8991_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1254 return 0;
1255 }
1256
1257 /* power down chip */
1258 static int wm8991_remove(struct snd_soc_codec *codec)
1259 {
1260 wm8991_set_bias_level(codec, SND_SOC_BIAS_OFF);
1261 return 0;
1262 }
1263
1264 static int wm8991_probe(struct snd_soc_codec *codec)
1265 {
1266 struct wm8991_priv *wm8991;
1267 int ret;
1268 unsigned int reg;
1269
1270 wm8991 = snd_soc_codec_get_drvdata(codec);
1271
1272 ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8991->control_type);
1273 if (ret < 0) {
1274 dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret);
1275 return ret;
1276 }
1277
1278 ret = wm8991_reset(codec);
1279 if (ret < 0) {
1280 dev_err(codec->dev, "Failed to issue reset\n");
1281 return ret;
1282 }
1283
1284 wm8991_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1285
1286 reg = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_4);
1287 snd_soc_write(codec, WM8991_AUDIO_INTERFACE_4, reg | WM8991_ALRCGPIO1);
1288
1289 reg = snd_soc_read(codec, WM8991_GPIO1_GPIO2) &
1290 ~WM8991_GPIO1_SEL_MASK;
1291 snd_soc_write(codec, WM8991_GPIO1_GPIO2, reg | 1);
1292
1293 reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_1);
1294 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, reg | WM8991_VREF_ENA|
1295 WM8991_VMID_MODE_MASK);
1296
1297 reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_2);
1298 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_2, reg | WM8991_OPCLK_ENA);
1299
1300 snd_soc_write(codec, WM8991_DAC_CTRL, 0);
1301 snd_soc_write(codec, WM8991_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8));
1302 snd_soc_write(codec, WM8991_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8));
1303
1304 snd_soc_add_controls(codec, wm8991_snd_controls,
1305 ARRAY_SIZE(wm8991_snd_controls));
1306
1307 snd_soc_dapm_new_controls(&codec->dapm, wm8991_dapm_widgets,
1308 ARRAY_SIZE(wm8991_dapm_widgets));
1309 snd_soc_dapm_add_routes(&codec->dapm, audio_map,
1310 ARRAY_SIZE(audio_map));
1311 return 0;
1312 }
1313
1314 #define WM8991_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1315 SNDRV_PCM_FMTBIT_S24_LE)
1316
1317 static struct snd_soc_dai_ops wm8991_ops = {
1318 .hw_params = wm8991_hw_params,
1319 .digital_mute = wm8991_mute,
1320 .set_fmt = wm8991_set_dai_fmt,
1321 .set_clkdiv = wm8991_set_dai_clkdiv,
1322 .set_pll = wm8991_set_dai_pll
1323 };
1324
1325 /*
1326 * The WM8991 supports 2 different and mutually exclusive DAI
1327 * configurations.
1328 *
1329 * 1. ADC/DAC on Primary Interface
1330 * 2. ADC on Primary Interface/DAC on secondary
1331 */
1332 static struct snd_soc_dai_driver wm8991_dai = {
1333 /* ADC/DAC on primary */
1334 .name = "wm8991",
1335 .id = 1,
1336 .playback = {
1337 .stream_name = "Playback",
1338 .channels_min = 1,
1339 .channels_max = 2,
1340 .rates = SNDRV_PCM_RATE_8000_96000,
1341 .formats = WM8991_FORMATS
1342 },
1343 .capture = {
1344 .stream_name = "Capture",
1345 .channels_min = 1,
1346 .channels_max = 2,
1347 .rates = SNDRV_PCM_RATE_8000_96000,
1348 .formats = WM8991_FORMATS
1349 },
1350 .ops = &wm8991_ops
1351 };
1352
1353 static struct snd_soc_codec_driver soc_codec_dev_wm8991 = {
1354 .probe = wm8991_probe,
1355 .remove = wm8991_remove,
1356 .suspend = wm8991_suspend,
1357 .resume = wm8991_resume,
1358 .set_bias_level = wm8991_set_bias_level,
1359 .reg_cache_size = WM8991_MAX_REGISTER + 1,
1360 .reg_word_size = sizeof(u16),
1361 .reg_cache_default = wm8991_reg_defs
1362 };
1363
1364 static __devinit int wm8991_i2c_probe(struct i2c_client *i2c,
1365 const struct i2c_device_id *id)
1366 {
1367 struct wm8991_priv *wm8991;
1368 int ret;
1369
1370 wm8991 = kzalloc(sizeof *wm8991, GFP_KERNEL);
1371 if (!wm8991)
1372 return -ENOMEM;
1373
1374 wm8991->control_type = SND_SOC_I2C;
1375 i2c_set_clientdata(i2c, wm8991);
1376
1377 ret = snd_soc_register_codec(&i2c->dev,
1378 &soc_codec_dev_wm8991, &wm8991_dai, 1);
1379 if (ret < 0)
1380 kfree(wm8991);
1381 return ret;
1382 }
1383
1384 static __devexit int wm8991_i2c_remove(struct i2c_client *client)
1385 {
1386 snd_soc_unregister_codec(&client->dev);
1387 kfree(i2c_get_clientdata(client));
1388 return 0;
1389 }
1390
1391 static const struct i2c_device_id wm8991_i2c_id[] = {
1392 { "wm8991", 0 },
1393 { }
1394 };
1395 MODULE_DEVICE_TABLE(i2c, wm8991_i2c_id);
1396
1397 static struct i2c_driver wm8991_i2c_driver = {
1398 .driver = {
1399 .name = "wm8991",
1400 .owner = THIS_MODULE,
1401 },
1402 .probe = wm8991_i2c_probe,
1403 .remove = __devexit_p(wm8991_i2c_remove),
1404 .id_table = wm8991_i2c_id,
1405 };
1406
1407 static int __init wm8991_modinit(void)
1408 {
1409 int ret;
1410 ret = i2c_add_driver(&wm8991_i2c_driver);
1411 if (ret != 0) {
1412 printk(KERN_ERR "Failed to register WM8991 I2C driver: %d\n",
1413 ret);
1414 }
1415 return 0;
1416 }
1417 module_init(wm8991_modinit);
1418
1419 static void __exit wm8991_exit(void)
1420 {
1421 i2c_del_driver(&wm8991_i2c_driver);
1422 }
1423 module_exit(wm8991_exit);
1424
1425 MODULE_DESCRIPTION("ASoC WM8991 driver");
1426 MODULE_AUTHOR("Graeme Gregory");
1427 MODULE_LICENSE("GPL");
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