arch/arm/plat-omap/include/plat/omap_hwmod.h

   1 /*
   2  * omap_hwmod macros, structures
   3  *
   4  * Copyright (C) 2009-2010 Nokia Corporation
   5  * Paul Walmsley
   6  *
   7  * Created in collaboration with (alphabetical order): Benoît Cousson,
   8  * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
   9  * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  *
  15  * These headers and macros are used to define OMAP on-chip module
  16  * data and their integration with other OMAP modules and Linux.
  17  * Copious documentation and references can also be found in the
  18  * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this
  19  * writing).
  20  *
  21  * To do:
  22  * - add interconnect error log structures
  23  * - add pinmuxing
  24  * - init_conn_id_bit (CONNID_BIT_VECTOR)
  25  * - implement default hwmod SMS/SDRC flags?
  26  * - move Linux-specific data ("non-ROM data") out
  27  *
  28  */
  29 #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
  30 #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
  31
  32 #include <linux/kernel.h>
  33 #include <linux/list.h>
  34 #include <linux/ioport.h>
  35 #include <linux/spinlock.h>
  36 #include <plat/cpu.h>
  37 #include <plat/voltage.h>
  38
  39 struct omap_device;
  40
  41 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1;
  42 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
  43
  44 /*
  45  * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant
  46  * with the original PRCM protocol defined for OMAP2420
  47  */
  48 #define SYSC_TYPE1_MIDLEMODE_SHIFT      12
  49 #define SYSC_TYPE1_MIDLEMODE_MASK       (0x3 << SYSC_MIDLEMODE_SHIFT)
  50 #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT  8
  51 #define SYSC_TYPE1_CLOCKACTIVITY_MASK   (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
  52 #define SYSC_TYPE1_SIDLEMODE_SHIFT      3
  53 #define SYSC_TYPE1_SIDLEMODE_MASK       (0x3 << SYSC_SIDLEMODE_SHIFT)
  54 #define SYSC_TYPE1_ENAWAKEUP_SHIFT      2
  55 #define SYSC_TYPE1_ENAWAKEUP_MASK       (1 << SYSC_ENAWAKEUP_SHIFT)
  56 #define SYSC_TYPE1_SOFTRESET_SHIFT      1
  57 #define SYSC_TYPE1_SOFTRESET_MASK       (1 << SYSC_SOFTRESET_SHIFT)
  58 #define SYSC_TYPE1_AUTOIDLE_SHIFT       0
  59 #define SYSC_TYPE1_AUTOIDLE_MASK        (1 << SYSC_AUTOIDLE_SHIFT)
  60
  61 /*
  62  * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
  63  * with the new PRCM protocol defined for new OMAP4 IPs.
  64  */
  65 #define SYSC_TYPE2_SOFTRESET_SHIFT      0
  66 #define SYSC_TYPE2_SOFTRESET_MASK       (1 << SYSC_TYPE2_SOFTRESET_SHIFT)
  67 #define SYSC_TYPE2_SIDLEMODE_SHIFT      2
  68 #define SYSC_TYPE2_SIDLEMODE_MASK       (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT)
  69 #define SYSC_TYPE2_MIDLEMODE_SHIFT      4
  70 #define SYSC_TYPE2_MIDLEMODE_MASK       (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT)
  71
  72 /* OCP SYSSTATUS bit shifts/masks */
  73 #define SYSS_RESETDONE_SHIFT            0
  74 #define SYSS_RESETDONE_MASK             (1 << SYSS_RESETDONE_SHIFT)
  75
  76 /* Master standby/slave idle mode flags */
  77 #define HWMOD_IDLEMODE_FORCE            (1 << 0)
  78 #define HWMOD_IDLEMODE_NO               (1 << 1)
  79 #define HWMOD_IDLEMODE_SMART            (1 << 2)
  80 /* Slave idle mode flag only */
  81 #define HWMOD_IDLEMODE_SMART_WKUP       (1 << 3)
  82
  83 /**
  84  * struct omap_hwmod_mux_info - hwmod specific mux configuration
  85  * @pads:              array of omap_device_pad entries
  86  * @nr_pads:           number of omap_device_pad entries
  87  *
  88  * Note that this is currently built during init as needed.
  89  */
  90 struct omap_hwmod_mux_info {
  91         int                             nr_pads;
  92         struct omap_device_pad          *pads;
  93 };
  94
  95 /**
  96  * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
  97  * @name: name of the IRQ channel (module local name)
  98  * @irq_ch: IRQ channel ID
  99  *
 100  * @name should be something short, e.g., "tx" or "rx".  It is for use
 101  * by platform_get_resource_byname().  It is defined locally to the
 102  * hwmod.
 103  */
 104 struct omap_hwmod_irq_info {
 105         const char      *name;
 106         u16             irq;
 107 };
 108
 109 /**
 110  * struct omap_hwmod_dma_info - DMA channels used by the hwmod
 111  * @name: name of the DMA channel (module local name)
 112  * @dma_req: DMA request ID
 113  *
 114  * @name should be something short, e.g., "tx" or "rx".  It is for use
 115  * by platform_get_resource_byname().  It is defined locally to the
 116  * hwmod.
 117  */
 118 struct omap_hwmod_dma_info {
 119         const char      *name;
 120         u16             dma_req;
 121 };
 122
 123 /**
 124  * struct omap_hwmod_rst_info - IPs reset lines use by hwmod
 125  * @name: name of the reset line (module local name)
 126  * @rst_shift: Offset of the reset bit
 127  *
 128  * @name should be something short, e.g., "cpu0" or "rst". It is defined
 129  * locally to the hwmod.
 130  */
 131 struct omap_hwmod_rst_info {
 132         const char      *name;
 133         u8              rst_shift;
 134 };
 135
 136 /**
 137  * struct omap_hwmod_opt_clk - optional clocks used by this hwmod
 138  * @role: "sys", "32k", "tv", etc -- for use in clk_get()
 139  * @clk: opt clock: OMAP clock name
 140  * @_clk: pointer to the struct clk (filled in at runtime)
 141  *
 142  * The module's interface clock and main functional clock should not
 143  * be added as optional clocks.
 144  */
 145 struct omap_hwmod_opt_clk {
 146         const char      *role;
 147         const char      *clk;
 148         struct clk      *_clk;
 149 };
 150
 151
 152 /* omap_hwmod_omap2_firewall.flags bits */
 153 #define OMAP_FIREWALL_L3                (1 << 0)
 154 #define OMAP_FIREWALL_L4                (1 << 1)
 155
 156 /**
 157  * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data
 158  * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_*
 159  * @l4_fw_region: L4 firewall region ID
 160  * @l4_prot_group: L4 protection group ID
 161  * @flags: (see omap_hwmod_omap2_firewall.flags macros above)
 162  */
 163 struct omap_hwmod_omap2_firewall {
 164         u8 l3_perm_bit;
 165         u8 l4_fw_region;
 166         u8 l4_prot_group;
 167         u8 flags;
 168 };
 169
 170
 171 /*
 172  * omap_hwmod_addr_space.flags bits
 173  *
 174  * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init.
 175  * ADDR_TYPE_RT: Address space contains module register target data.
 176  */
 177 #define ADDR_MAP_ON_INIT        (1 << 0)        /* XXX does not belong */
 178 #define ADDR_TYPE_RT            (1 << 1)
 179
 180 /**
 181  * struct omap_hwmod_addr_space - MPU address space handled by the hwmod
 182  * @pa_start: starting physical address
 183  * @pa_end: ending physical address
 184  * @flags: (see omap_hwmod_addr_space.flags macros above)
 185  *
 186  * Address space doesn't necessarily follow physical interconnect
 187  * structure.  GPMC is one example.
 188  */
 189 struct omap_hwmod_addr_space {
 190         u32 pa_start;
 191         u32 pa_end;
 192         u8 flags;
 193 };
 194
 195
 196 /*
 197  * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this
 198  * interface to interact with the hwmod.  Used to add sleep dependencies
 199  * when the module is enabled or disabled.
 200  */
 201 #define OCP_USER_MPU                    (1 << 0)
 202 #define OCP_USER_SDMA                   (1 << 1)
 203
 204 /* omap_hwmod_ocp_if.flags bits */
 205 #define OCPIF_SWSUP_IDLE                (1 << 0)
 206 #define OCPIF_CAN_BURST                 (1 << 1)
 207
 208 /**
 209  * struct omap_hwmod_ocp_if - OCP interface data
 210  * @master: struct omap_hwmod that initiates OCP transactions on this link
 211  * @slave: struct omap_hwmod that responds to OCP transactions on this link
 212  * @addr: address space associated with this link
 213  * @clk: interface clock: OMAP clock name
 214  * @_clk: pointer to the interface struct clk (filled in at runtime)
 215  * @fw: interface firewall data
 216  * @addr_cnt: ARRAY_SIZE(@addr)
 217  * @width: OCP data width
 218  * @user: initiators using this interface (see OCP_USER_* macros above)
 219  * @flags: OCP interface flags (see OCPIF_* macros above)
 220  *
 221  * It may also be useful to add a tag_cnt field for OCP2.x devices.
 222  *
 223  * Parameter names beginning with an underscore are managed internally by
 224  * the omap_hwmod code and should not be set during initialization.
 225  */
 226 struct omap_hwmod_ocp_if {
 227         struct omap_hwmod               *master;
 228         struct omap_hwmod               *slave;
 229         struct omap_hwmod_addr_space    *addr;
 230         const char                      *clk;
 231         struct clk                      *_clk;
 232         union {
 233                 struct omap_hwmod_omap2_firewall omap2;
 234         }                               fw;
 235         u8                              addr_cnt;
 236         u8                              width;
 237         u8                              user;
 238         u8                              flags;
 239 };
 240
 241
 242 /* Macros for use in struct omap_hwmod_sysconfig */
 243
 244 /* Flags for use in omap_hwmod_sysconfig.idlemodes */
 245 #define MASTER_STANDBY_SHIFT    4
 246 #define SLAVE_IDLE_SHIFT        0
 247 #define SIDLE_FORCE             (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT)
 248 #define SIDLE_NO                (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT)
 249 #define SIDLE_SMART             (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT)
 250 #define SIDLE_SMART_WKUP        (HWMOD_IDLEMODE_SMART_WKUP << SLAVE_IDLE_SHIFT)
 251 #define MSTANDBY_FORCE          (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
 252 #define MSTANDBY_NO             (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
 253 #define MSTANDBY_SMART          (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
 254
 255 /* omap_hwmod_sysconfig.sysc_flags capability flags */
 256 #define SYSC_HAS_AUTOIDLE       (1 << 0)
 257 #define SYSC_HAS_SOFTRESET      (1 << 1)
 258 #define SYSC_HAS_ENAWAKEUP      (1 << 2)
 259 #define SYSC_HAS_EMUFREE        (1 << 3)
 260 #define SYSC_HAS_CLOCKACTIVITY  (1 << 4)
 261 #define SYSC_HAS_SIDLEMODE      (1 << 5)
 262 #define SYSC_HAS_MIDLEMODE      (1 << 6)
 263 #define SYSS_HAS_RESET_STATUS   (1 << 7)
 264 #define SYSC_NO_CACHE           (1 << 8)  /* XXX SW flag, belongs elsewhere */
 265 #define SYSC_HAS_RESET_STATUS   (1 << 9)
 266
 267 /* omap_hwmod_sysconfig.clockact flags */
 268 #define CLOCKACT_TEST_BOTH      0x0
 269 #define CLOCKACT_TEST_MAIN      0x1
 270 #define CLOCKACT_TEST_ICLK      0x2
 271 #define CLOCKACT_TEST_NONE      0x3
 272
 273 /**
 274  * struct omap_hwmod_sysc_fields - hwmod OCP_SYSCONFIG register field offsets.
 275  * @midle_shift: Offset of the midle bit
 276  * @clkact_shift: Offset of the clockactivity bit
 277  * @sidle_shift: Offset of the sidle bit
 278  * @enwkup_shift: Offset of the enawakeup bit
 279  * @srst_shift: Offset of the softreset bit
 280  * @autoidle_shift: Offset of the autoidle bit
 281  */
 282 struct omap_hwmod_sysc_fields {
 283         u8 midle_shift;
 284         u8 clkact_shift;
 285         u8 sidle_shift;
 286         u8 enwkup_shift;
 287         u8 srst_shift;
 288         u8 autoidle_shift;
 289 };
 290
 291 /**
 292  * struct omap_hwmod_class_sysconfig - hwmod class OCP_SYS* data
 293  * @rev_offs: IP block revision register offset (from module base addr)
 294  * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
 295  * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
 296  * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
 297  * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
 298  * @clockact: the default value of the module CLOCKACTIVITY bits
 299  *
 300  * @clockact describes to the module which clocks are likely to be
 301  * disabled when the PRCM issues its idle request to the module.  Some
 302  * modules have separate clockdomains for the interface clock and main
 303  * functional clock, and can check whether they should acknowledge the
 304  * idle request based on the internal module functionality that has
 305  * been associated with the clocks marked in @clockact.  This field is
 306  * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below)
 307  *
 308  * @sysc_fields: structure containing the offset positions of various bits in
 309  * SYSCONFIG register. This can be populated using omap_hwmod_sysc_type1 or
 310  * omap_hwmod_sysc_type2 defined in omap_hwmod_common_data.c depending on
 311  * whether the device ip is compliant with the original PRCM protocol
 312  * defined for OMAP2420 or the new PRCM protocol for new OMAP4 IPs.
 313  * If the device follows a different scheme for the sysconfig register ,
 314  * then this field has to be populated with the correct offset structure.
 315  */
 316 struct omap_hwmod_class_sysconfig {
 317         u16 rev_offs;
 318         u16 sysc_offs;
 319         u16 syss_offs;
 320         u16 sysc_flags;
 321         u8 idlemodes;
 322         u8 clockact;
 323         struct omap_hwmod_sysc_fields *sysc_fields;
 324 };
 325
 326 /**
 327  * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
 328  * @module_offs: PRCM submodule offset from the start of the PRM/CM
 329  * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
 330  * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
 331  * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
 332  * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
 333  * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
 334  *
 335  * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
 336  * WKEN, GRPSEL registers.  In an ideal world, no extra information
 337  * would be needed for IDLEST information, but alas, there are some
 338  * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit
 339  * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
 340  */
 341 struct omap_hwmod_omap2_prcm {
 342         s16 module_offs;
 343         u8 prcm_reg_id;
 344         u8 module_bit;
 345         u8 idlest_reg_id;
 346         u8 idlest_idle_bit;
 347         u8 idlest_stdby_bit;
 348 };
 349
 350
 351 /**
 352  * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
 353  * @clkctrl_reg: PRCM address of the clock control register
 354  * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM
 355  * @submodule_wkdep_bit: bit shift of the WKDEP range
 356  */
 357 struct omap_hwmod_omap4_prcm {
 358         void __iomem    *clkctrl_reg;
 359         void __iomem    *rstctrl_reg;
 360         u8              submodule_wkdep_bit;
 361 };
 362
 363
 364 /*
 365  * omap_hwmod.flags definitions
 366  *
 367  * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
 368  *     of idle, rather than relying on module smart-idle
 369  * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
 370  *     of standby, rather than relying on module smart-standby
 371  * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
 372  *     SDRAM controller, etc. XXX probably belongs outside the main hwmod file
 373  * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
 374  *     controller, etc. XXX probably belongs outside the main hwmod file
 375  * HWMOD_NO_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE)
 376  *     when module is enabled, rather than the default, which is to
 377  *     enable autoidle
 378  * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
 379  * HWMOD_NO_IDLEST: this module does not have idle status - this is the case
 380  *     only for few initiator modules on OMAP2 & 3.
 381  * HWMOD_CONTROL_OPT_CLKS_IN_RESET: Enable all optional clocks during reset.
 382  *     This is needed for devices like DSS that require optional clocks enabled
 383  *     in order to complete the reset. Optional clocks will be disabled
 384  *     again after the reset.
 385  * HWMOD_16BIT_REG: Module has 16bit registers
 386  */
 387 #define HWMOD_SWSUP_SIDLE                       (1 << 0)
 388 #define HWMOD_SWSUP_MSTANDBY                    (1 << 1)
 389 #define HWMOD_INIT_NO_RESET                     (1 << 2)
 390 #define HWMOD_INIT_NO_IDLE                      (1 << 3)
 391 #define HWMOD_NO_OCP_AUTOIDLE                   (1 << 4)
 392 #define HWMOD_SET_DEFAULT_CLOCKACT              (1 << 5)
 393 #define HWMOD_NO_IDLEST                         (1 << 6)
 394 #define HWMOD_CONTROL_OPT_CLKS_IN_RESET         (1 << 7)
 395 #define HWMOD_16BIT_REG                         (1 << 8)
 396
 397 /*
 398  * omap_hwmod._int_flags definitions
 399  * These are for internal use only and are managed by the omap_hwmod code.
 400  *
 401  * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
 402  * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
 403  * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
 404  */
 405 #define _HWMOD_NO_MPU_PORT                      (1 << 0)
 406 #define _HWMOD_WAKEUP_ENABLED                   (1 << 1)
 407 #define _HWMOD_SYSCONFIG_LOADED                 (1 << 2)
 408
 409 /*
 410  * omap_hwmod._state definitions
 411  *
 412  * INITIALIZED: reset (optionally), initialized, enabled, disabled
 413  *              (optionally)
 414  *
 415  *
 416  */
 417 #define _HWMOD_STATE_UNKNOWN                    0
 418 #define _HWMOD_STATE_REGISTERED                 1
 419 #define _HWMOD_STATE_CLKS_INITED                2
 420 #define _HWMOD_STATE_INITIALIZED                3
 421 #define _HWMOD_STATE_ENABLED                    4
 422 #define _HWMOD_STATE_IDLE                       5
 423 #define _HWMOD_STATE_DISABLED                   6
 424
 425 /**
 426  * struct omap_hwmod_class - the type of an IP block
 427  * @name: name of the hwmod_class
 428  * @sysc: device SYSCONFIG/SYSSTATUS register data
 429  * @rev: revision of the IP class
 430  * @pre_shutdown: ptr to fn to be executed immediately prior to device shutdown
 431  * @reset: ptr to fn to be executed in place of the standard hwmod reset fn
 432  *
 433  * Represent the class of a OMAP hardware "modules" (e.g. timer,
 434  * smartreflex, gpio, uart...)
 435  *
 436  * @pre_shutdown is a function that will be run immediately before
 437  * hwmod clocks are disabled, etc.  It is intended for use for hwmods
 438  * like the MPU watchdog, which cannot be disabled with the standard
 439  * omap_hwmod_shutdown().  The function should return 0 upon success,
 440  * or some negative error upon failure.  Returning an error will cause
 441  * omap_hwmod_shutdown() to abort the device shutdown and return an
 442  * error.
 443  *
 444  * If @reset is defined, then the function it points to will be
 445  * executed in place of the standard hwmod _reset() code in
 446  * mach-omap2/omap_hwmod.c.  This is needed for IP blocks which have
 447  * unusual reset sequences - usually processor IP blocks like the IVA.
 448  */
 449 struct omap_hwmod_class {
 450         const char                              *name;
 451         struct omap_hwmod_class_sysconfig       *sysc;
 452         u32                                     rev;
 453         int                                     (*pre_shutdown)(struct omap_hwmod *oh);
 454         int                                     (*reset)(struct omap_hwmod *oh);
 455 };
 456
 457 /**
 458  * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
 459  * @name: name of the hwmod
 460  * @class: struct omap_hwmod_class * to the class of this hwmod
 461  * @od: struct omap_device currently associated with this hwmod (internal use)
 462  * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt)
 463  * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt)
 464  * @prcm: PRCM data pertaining to this hwmod
 465  * @main_clk: main clock: OMAP clock name
 466  * @_clk: pointer to the main struct clk (filled in at runtime)
 467  * @opt_clks: other device clocks that drivers can request (0..*)
 468  * @vdd_name: voltage domain name
 469  * @voltdm: pointer to voltage domain (filled in at runtime)
 470  * @masters: ptr to array of OCP ifs that this hwmod can initiate on
 471  * @slaves: ptr to array of OCP ifs that this hwmod can respond on
 472  * @dev_attr: arbitrary device attributes that can be passed to the driver
 473  * @_sysc_cache: internal-use hwmod flags
 474  * @_mpu_rt_va: cached register target start address (internal use)
 475  * @_mpu_port_index: cached MPU register target slave ID (internal use)
 476  * @mpu_irqs_cnt: number of @mpu_irqs
 477  * @sdma_reqs_cnt: number of @sdma_reqs
 478  * @opt_clks_cnt: number of @opt_clks
 479  * @master_cnt: number of @master entries
 480  * @slaves_cnt: number of @slave entries
 481  * @response_lat: device OCP response latency (in interface clock cycles)
 482  * @_int_flags: internal-use hwmod flags
 483  * @_state: internal-use hwmod state
 484  * @_postsetup_state: internal-use state to leave the hwmod in after _setup()
 485  * @flags: hwmod flags (documented below)
 486  * @omap_chip: OMAP chips this hwmod is present on
 487  * @_lock: spinlock serializing operations on this hwmod
 488  * @node: list node for hwmod list (internal use)
 489  *
 490  * @main_clk refers to this module's "main clock," which for our
 491  * purposes is defined as "the functional clock needed for register
 492  * accesses to complete."  Modules may not have a main clock if the
 493  * interface clock also serves as a main clock.
 494  *
 495  * Parameter names beginning with an underscore are managed internally by
 496  * the omap_hwmod code and should not be set during initialization.
 497  */
 498 struct omap_hwmod {
 499         const char                      *name;
 500         struct omap_hwmod_class         *class;
 501         struct omap_device              *od;
 502         struct omap_hwmod_mux_info      *mux;
 503         struct omap_hwmod_irq_info      *mpu_irqs;
 504         struct omap_hwmod_dma_info      *sdma_reqs;
 505         struct omap_hwmod_rst_info      *rst_lines;
 506         union {
 507                 struct omap_hwmod_omap2_prcm omap2;
 508                 struct omap_hwmod_omap4_prcm omap4;
 509         }                               prcm;
 510         const char                      *main_clk;
 511         struct clk                      *_clk;
 512         struct omap_hwmod_opt_clk       *opt_clks;
 513         char                            *vdd_name;
 514         struct voltagedomain            *voltdm;
 515         struct omap_hwmod_ocp_if        **masters; /* connect to *_IA */
 516         struct omap_hwmod_ocp_if        **slaves;  /* connect to *_TA */
 517         void                            *dev_attr;
 518         u32                             _sysc_cache;
 519         void __iomem                    *_mpu_rt_va;
 520         spinlock_t                      _lock;
 521         struct list_head                node;
 522         u16                             flags;
 523         u8                              _mpu_port_index;
 524         u8                              response_lat;
 525         u8                              mpu_irqs_cnt;
 526         u8                              sdma_reqs_cnt;
 527         u8                              rst_lines_cnt;
 528         u8                              opt_clks_cnt;
 529         u8                              masters_cnt;
 530         u8                              slaves_cnt;
 531         u8                              hwmods_cnt;
 532         u8                              _int_flags;
 533         u8                              _state;
 534         u8                              _postsetup_state;
 535         const struct omap_chip_id       omap_chip;
 536 };
 537
 538 int omap_hwmod_init(struct omap_hwmod **ohs);
 539 struct omap_hwmod *omap_hwmod_lookup(const char *name);
 540 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
 541                         void *data);
 542 int omap_hwmod_late_init(void);
 543
 544 int omap_hwmod_enable(struct omap_hwmod *oh);
 545 int _omap_hwmod_enable(struct omap_hwmod *oh);
 546 int omap_hwmod_idle(struct omap_hwmod *oh);
 547 int _omap_hwmod_idle(struct omap_hwmod *oh);
 548 int omap_hwmod_shutdown(struct omap_hwmod *oh);
 549
 550 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name);
 551 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name);
 552 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name);
 553
 554 int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
 555 int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
 556
 557 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode);
 558
 559 int omap_hwmod_reset(struct omap_hwmod *oh);
 560 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
 561
 562 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs);
 563 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs);
 564
 565 int omap_hwmod_count_resources(struct omap_hwmod *oh);
 566 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
 567
 568 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
 569 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh);
 570
 571 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
 572                                  struct omap_hwmod *init_oh);
 573 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
 574                                  struct omap_hwmod *init_oh);
 575
 576 int omap_hwmod_set_clockact_both(struct omap_hwmod *oh);
 577 int omap_hwmod_set_clockact_main(struct omap_hwmod *oh);
 578 int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh);
 579 int omap_hwmod_set_clockact_none(struct omap_hwmod *oh);
 580
 581 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh);
 582 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh);
 583
 584 int omap_hwmod_for_each_by_class(const char *classname,
 585                                  int (*fn)(struct omap_hwmod *oh,
 586                                            void *user),
 587                                  void *user);
 588
 589 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state);
 590 u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
 591
 592 /*
 593  * Chip variant-specific hwmod init routines - XXX should be converted
 594  * to use initcalls once the initial boot ordering is straightened out
 595  */
 596 extern int omap2420_hwmod_init(void);
 597 extern int omap2430_hwmod_init(void);
 598 extern int omap3xxx_hwmod_init(void);
 599 extern int omap44xx_hwmod_init(void);
 600
 601 #endif