arch/arm/plat-samsung/irq-vic-timer.c

   1 /* arch/arm/plat-samsung/irq-vic-timer.c
   2  *      originally part of arch/arm/plat-s3c64xx/irq.c
   3  *
   4  * Copyright 2008 Openmoko, Inc.
   5  * Copyright 2008 Simtec Electronics
   6  *      Ben Dooks <ben@simtec.co.uk>
   7  *      http://armlinux.simtec.co.uk/
   8  *
   9  * S3C64XX - Interrupt handling
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/kernel.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/irq.h>
  19 #include <linux/io.h>
  20
  21 #include <mach/map.h>
  22 #include <plat/irq-vic-timer.h>
  23 #include <plat/regs-timer.h>
  24
  25 static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
  26 {
  27         generic_handle_irq((int)desc->irq_data.handler_data);
  28 }
  29
  30 /* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
  31
  32 static void s3c_irq_timer_mask(struct irq_data *data)
  33 {
  34         u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
  35         u32 mask = (u32)data->chip_data;
  36
  37         reg &= 0x1f;  /* mask out pending interrupts */
  38         reg &= ~mask;
  39         __raw_writel(reg, S3C64XX_TINT_CSTAT);
  40 }
  41
  42 static void s3c_irq_timer_unmask(struct irq_data *data)
  43 {
  44         u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
  45         u32 mask = (u32)data->chip_data;
  46
  47         reg &= 0x1f;  /* mask out pending interrupts */
  48         reg |= mask;
  49         __raw_writel(reg, S3C64XX_TINT_CSTAT);
  50 }
  51
  52 static void s3c_irq_timer_ack(struct irq_data *data)
  53 {
  54         u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
  55         u32 mask = (u32)data->chip_data;
  56
  57         reg &= 0x1f;
  58         reg |= mask << 5;
  59         __raw_writel(reg, S3C64XX_TINT_CSTAT);
  60 }
  61
  62 static struct irq_chip s3c_irq_timer = {
  63         .name           = "s3c-timer",
  64         .irq_mask       = s3c_irq_timer_mask,
  65         .irq_unmask     = s3c_irq_timer_unmask,
  66         .irq_ack        = s3c_irq_timer_ack,
  67 };
  68
  69 /**
  70  * s3c_init_vic_timer_irq() - initialise timer irq chanined off VIC.\
  71  * @parent_irq: The parent IRQ on the VIC for the timer.
  72  * @timer_irq: The IRQ to be used for the timer.
  73  *
  74  * Register the necessary IRQ chaining and support for the timer IRQs
  75  * chained of the VIC.
  76  */
  77 void __init s3c_init_vic_timer_irq(unsigned int parent_irq,
  78                                    unsigned int timer_irq)
  79 {
  80         struct irq_desc *desc = irq_to_desc(parent_irq);
  81
  82         set_irq_chained_handler(parent_irq, s3c_irq_demux_vic_timer);
  83
  84         set_irq_chip(timer_irq, &s3c_irq_timer);
  85         set_irq_chip_data(timer_irq, (void *)(1 << (timer_irq - IRQ_TIMER0)));
  86         set_irq_handler(timer_irq, handle_level_irq);
  87         set_irq_flags(timer_irq, IRQF_VALID);
  88
  89         desc->irq_data.handler_data = (void *)timer_irq;
  90 }