2 * linux/arch/arm/vfp/vfpmodule.c
4 * Copyright (C) 2004 ARM Limited.
5 * Written by Deep Blue Solutions Limited.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/module.h>
12 #include <linux/types.h>
13 #include <linux/cpu.h>
14 #include <linux/kernel.h>
15 #include <linux/notifier.h>
16 #include <linux/signal.h>
17 #include <linux/sched.h>
18 #include <linux/smp.h>
19 #include <linux/init.h>
21 #include <asm/cputype.h>
22 #include <asm/thread_notify.h>
29 * Our undef handlers (in entry.S)
31 void vfp_testing_entry(void);
32 void vfp_support_entry(void);
33 void vfp_null_entry(void);
35 void (*vfp_vector
)(void) = vfp_null_entry
;
36 union vfp_state
*last_VFP_context
[NR_CPUS
];
40 * Used in startup: set to non-zero if VFP checks fail
41 * After startup, holds VFP architecture
43 unsigned int VFP_arch
;
46 * Per-thread VFP initialization.
48 static void vfp_thread_flush(struct thread_info
*thread
)
50 union vfp_state
*vfp
= &thread
->vfpstate
;
53 memset(vfp
, 0, sizeof(union vfp_state
));
55 vfp
->hard
.fpexc
= FPEXC_EN
;
56 vfp
->hard
.fpscr
= FPSCR_ROUND_NEAREST
;
59 * Disable VFP to ensure we initialize it first. We must ensure
60 * that the modification of last_VFP_context[] and hardware disable
61 * are done for the same CPU and without preemption.
64 if (last_VFP_context
[cpu
] == vfp
)
65 last_VFP_context
[cpu
] = NULL
;
66 fmxr(FPEXC
, fmrx(FPEXC
) & ~FPEXC_EN
);
70 static void vfp_thread_exit(struct thread_info
*thread
)
72 /* release case: Per-thread VFP cleanup. */
73 union vfp_state
*vfp
= &thread
->vfpstate
;
74 unsigned int cpu
= get_cpu();
76 if (last_VFP_context
[cpu
] == vfp
)
77 last_VFP_context
[cpu
] = NULL
;
82 * When this function is called with the following 'cmd's, the following
83 * is true while this function is being run:
84 * THREAD_NOFTIFY_SWTICH:
85 * - the previously running thread will not be scheduled onto another CPU.
86 * - the next thread to be run (v) will not be running on another CPU.
87 * - thread->cpu is the local CPU number
88 * - not preemptible as we're called in the middle of a thread switch
89 * THREAD_NOTIFY_FLUSH:
90 * - the thread (v) will be running on the local CPU, so
91 * v === current_thread_info()
92 * - thread->cpu is the local CPU number at the time it is accessed,
93 * but may change at any time.
94 * - we could be preempted if tree preempt rcu is enabled, so
95 * it is unsafe to use thread->cpu.
97 * - the thread (v) will be running on the local CPU, so
98 * v === current_thread_info()
99 * - thread->cpu is the local CPU number at the time it is accessed,
100 * but may change at any time.
101 * - we could be preempted if tree preempt rcu is enabled, so
102 * it is unsafe to use thread->cpu.
104 static int vfp_notifier(struct notifier_block
*self
, unsigned long cmd
, void *v
)
106 struct thread_info
*thread
= v
;
108 if (likely(cmd
== THREAD_NOTIFY_SWITCH
)) {
109 u32 fpexc
= fmrx(FPEXC
);
112 unsigned int cpu
= thread
->cpu
;
115 * On SMP, if VFP is enabled, save the old state in
116 * case the thread migrates to a different CPU. The
117 * restoring is done lazily.
119 if ((fpexc
& FPEXC_EN
) && last_VFP_context
[cpu
]) {
120 vfp_save_state(last_VFP_context
[cpu
], fpexc
);
121 last_VFP_context
[cpu
]->hard
.cpu
= cpu
;
124 * Thread migration, just force the reloading of the
125 * state on the new CPU in case the VFP registers
126 * contain stale data.
128 if (thread
->vfpstate
.hard
.cpu
!= cpu
)
129 last_VFP_context
[cpu
] = NULL
;
133 * Always disable VFP so we can lazily save/restore the
136 fmxr(FPEXC
, fpexc
& ~FPEXC_EN
);
140 if (cmd
== THREAD_NOTIFY_FLUSH
)
141 vfp_thread_flush(thread
);
143 vfp_thread_exit(thread
);
148 static struct notifier_block vfp_notifier_block
= {
149 .notifier_call
= vfp_notifier
,
153 * Raise a SIGFPE for the current process.
154 * sicode describes the signal being raised.
156 void vfp_raise_sigfpe(unsigned int sicode
, struct pt_regs
*regs
)
160 memset(&info
, 0, sizeof(info
));
162 info
.si_signo
= SIGFPE
;
163 info
.si_code
= sicode
;
164 info
.si_addr
= (void __user
*)(instruction_pointer(regs
) - 4);
167 * This is the same as NWFPE, because it's not clear what
170 current
->thread
.error_code
= 0;
171 current
->thread
.trap_no
= 6;
173 send_sig_info(SIGFPE
, &info
, current
);
176 static void vfp_panic(char *reason
, u32 inst
)
180 printk(KERN_ERR
"VFP: Error: %s\n", reason
);
181 printk(KERN_ERR
"VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n",
182 fmrx(FPEXC
), fmrx(FPSCR
), inst
);
183 for (i
= 0; i
< 32; i
+= 2)
184 printk(KERN_ERR
"VFP: s%2u: 0x%08x s%2u: 0x%08x\n",
185 i
, vfp_get_float(i
), i
+1, vfp_get_float(i
+1));
189 * Process bitmask of exception conditions.
191 static void vfp_raise_exceptions(u32 exceptions
, u32 inst
, u32 fpscr
, struct pt_regs
*regs
)
195 pr_debug("VFP: raising exceptions %08x\n", exceptions
);
197 if (exceptions
== VFP_EXCEPTION_ERROR
) {
198 vfp_panic("unhandled bounce", inst
);
199 vfp_raise_sigfpe(0, regs
);
204 * If any of the status flags are set, update the FPSCR.
205 * Comparison instructions always return at least one of
208 if (exceptions
& (FPSCR_N
|FPSCR_Z
|FPSCR_C
|FPSCR_V
))
209 fpscr
&= ~(FPSCR_N
|FPSCR_Z
|FPSCR_C
|FPSCR_V
);
215 #define RAISE(stat,en,sig) \
216 if (exceptions & stat && fpscr & en) \
220 * These are arranged in priority order, least to highest.
222 RAISE(FPSCR_DZC
, FPSCR_DZE
, FPE_FLTDIV
);
223 RAISE(FPSCR_IXC
, FPSCR_IXE
, FPE_FLTRES
);
224 RAISE(FPSCR_UFC
, FPSCR_UFE
, FPE_FLTUND
);
225 RAISE(FPSCR_OFC
, FPSCR_OFE
, FPE_FLTOVF
);
226 RAISE(FPSCR_IOC
, FPSCR_IOE
, FPE_FLTINV
);
229 vfp_raise_sigfpe(si_code
, regs
);
233 * Emulate a VFP instruction.
235 static u32
vfp_emulate_instruction(u32 inst
, u32 fpscr
, struct pt_regs
*regs
)
237 u32 exceptions
= VFP_EXCEPTION_ERROR
;
239 pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst
, fpscr
);
241 if (INST_CPRTDO(inst
)) {
242 if (!INST_CPRT(inst
)) {
246 if (vfp_single(inst
)) {
247 exceptions
= vfp_single_cpdo(inst
, fpscr
);
249 exceptions
= vfp_double_cpdo(inst
, fpscr
);
253 * A CPRT instruction can not appear in FPINST2, nor
254 * can it cause an exception. Therefore, we do not
255 * have to emulate it.
260 * A CPDT instruction can not appear in FPINST2, nor can
261 * it cause an exception. Therefore, we do not have to
265 return exceptions
& ~VFP_NAN_FLAG
;
269 * Package up a bounce condition.
271 void VFP_bounce(u32 trigger
, u32 fpexc
, struct pt_regs
*regs
)
273 u32 fpscr
, orig_fpscr
, fpsid
, exceptions
;
275 pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger
, fpexc
);
278 * At this point, FPEXC can have the following configuration:
281 * 0 1 x - synchronous exception
282 * 1 x 0 - asynchronous exception
283 * 1 x 1 - sychronous on VFP subarch 1 and asynchronous on later
284 * 0 0 1 - synchronous on VFP9 (non-standard subarch 1
285 * implementation), undefined otherwise
287 * Clear various bits and enable access to the VFP so we can
290 fmxr(FPEXC
, fpexc
& ~(FPEXC_EX
|FPEXC_DEX
|FPEXC_FP2V
|FPEXC_VV
|FPEXC_TRAP_MASK
));
293 orig_fpscr
= fpscr
= fmrx(FPSCR
);
296 * Check for the special VFP subarch 1 and FPSCR.IXE bit case
298 if ((fpsid
& FPSID_ARCH_MASK
) == (1 << FPSID_ARCH_BIT
)
299 && (fpscr
& FPSCR_IXE
)) {
301 * Synchronous exception, emulate the trigger instruction
306 if (fpexc
& FPEXC_EX
) {
307 #ifndef CONFIG_CPU_FEROCEON
309 * Asynchronous exception. The instruction is read from FPINST
310 * and the interrupted instruction has to be restarted.
312 trigger
= fmrx(FPINST
);
315 } else if (!(fpexc
& FPEXC_DEX
)) {
317 * Illegal combination of bits. It can be caused by an
318 * unallocated VFP instruction but with FPSCR.IXE set and not
321 vfp_raise_exceptions(VFP_EXCEPTION_ERROR
, trigger
, fpscr
, regs
);
326 * Modify fpscr to indicate the number of iterations remaining.
327 * If FPEXC.EX is 0, FPEXC.DEX is 1 and the FPEXC.VV bit indicates
328 * whether FPEXC.VECITR or FPSCR.LEN is used.
330 if (fpexc
& (FPEXC_EX
| FPEXC_VV
)) {
333 len
= fpexc
+ (1 << FPEXC_LENGTH_BIT
);
335 fpscr
&= ~FPSCR_LENGTH_MASK
;
336 fpscr
|= (len
& FPEXC_LENGTH_MASK
) << (FPSCR_LENGTH_BIT
- FPEXC_LENGTH_BIT
);
340 * Handle the first FP instruction. We used to take note of the
341 * FPEXC bounce reason, but this appears to be unreliable.
342 * Emulate the bounced instruction instead.
344 exceptions
= vfp_emulate_instruction(trigger
, fpscr
, regs
);
346 vfp_raise_exceptions(exceptions
, trigger
, orig_fpscr
, regs
);
349 * If there isn't a second FP instruction, exit now. Note that
350 * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1.
352 if (fpexc
^ (FPEXC_EX
| FPEXC_FP2V
))
356 * The barrier() here prevents fpinst2 being read
357 * before the condition above.
360 trigger
= fmrx(FPINST2
);
363 exceptions
= vfp_emulate_instruction(trigger
, orig_fpscr
, regs
);
365 vfp_raise_exceptions(exceptions
, trigger
, orig_fpscr
, regs
);
370 static void vfp_enable(void *unused
)
372 u32 access
= get_copro_access();
375 * Enable full access to VFP (cp10 and cp11)
377 set_copro_access(access
| CPACC_FULL(10) | CPACC_FULL(11));
381 #include <linux/sysdev.h>
383 static int vfp_pm_suspend(struct sys_device
*dev
, pm_message_t state
)
385 struct thread_info
*ti
= current_thread_info();
386 u32 fpexc
= fmrx(FPEXC
);
388 /* if vfp is on, then save state for resumption */
389 if (fpexc
& FPEXC_EN
) {
390 printk(KERN_DEBUG
"%s: saving vfp state\n", __func__
);
391 vfp_save_state(&ti
->vfpstate
, fpexc
);
393 /* disable, just in case */
394 fmxr(FPEXC
, fmrx(FPEXC
) & ~FPEXC_EN
);
397 /* clear any information we had about last context state */
398 memset(last_VFP_context
, 0, sizeof(last_VFP_context
));
403 static int vfp_pm_resume(struct sys_device
*dev
)
405 /* ensure we have access to the vfp */
408 /* and disable it to ensure the next usage restores the state */
409 fmxr(FPEXC
, fmrx(FPEXC
) & ~FPEXC_EN
);
414 static struct sysdev_class vfp_pm_sysclass
= {
416 .suspend
= vfp_pm_suspend
,
417 .resume
= vfp_pm_resume
,
420 static struct sys_device vfp_pm_sysdev
= {
421 .cls
= &vfp_pm_sysclass
,
424 static void vfp_pm_init(void)
426 sysdev_class_register(&vfp_pm_sysclass
);
427 sysdev_register(&vfp_pm_sysdev
);
432 static inline void vfp_pm_init(void) { }
433 #endif /* CONFIG_PM */
435 void vfp_sync_hwstate(struct thread_info
*thread
)
437 unsigned int cpu
= get_cpu();
440 * If the thread we're interested in is the current owner of the
441 * hardware VFP state, then we need to save its state.
443 if (last_VFP_context
[cpu
] == &thread
->vfpstate
) {
444 u32 fpexc
= fmrx(FPEXC
);
447 * Save the last VFP state on this CPU.
449 fmxr(FPEXC
, fpexc
| FPEXC_EN
);
450 vfp_save_state(&thread
->vfpstate
, fpexc
| FPEXC_EN
);
457 void vfp_flush_hwstate(struct thread_info
*thread
)
459 unsigned int cpu
= get_cpu();
462 * If the thread we're interested in is the current owner of the
463 * hardware VFP state, then we need to save its state.
465 if (last_VFP_context
[cpu
] == &thread
->vfpstate
) {
466 u32 fpexc
= fmrx(FPEXC
);
468 fmxr(FPEXC
, fpexc
& ~FPEXC_EN
);
471 * Set the context to NULL to force a reload the next time
472 * the thread uses the VFP.
474 last_VFP_context
[cpu
] = NULL
;
479 * For SMP we still have to take care of the case where the thread
480 * migrates to another CPU and then back to the original CPU on which
481 * the last VFP user is still the same thread. Mark the thread VFP
482 * state as belonging to a non-existent CPU so that the saved one will
483 * be reloaded in the above case.
485 thread
->vfpstate
.hard
.cpu
= NR_CPUS
;
491 * VFP hardware can lose all context when a CPU goes offline.
492 * Safely clear our held state when a CPU has been killed, and
493 * re-enable access to VFP when the CPU comes back online.
495 * Both CPU_DYING and CPU_STARTING are called on the CPU which
496 * is being offlined/onlined.
498 static int vfp_hotplug(struct notifier_block
*b
, unsigned long action
,
501 if (action
== CPU_DYING
|| action
== CPU_DYING_FROZEN
) {
502 unsigned int cpu
= (long)hcpu
;
503 last_VFP_context
[cpu
] = NULL
;
504 } else if (action
== CPU_STARTING
|| action
== CPU_STARTING_FROZEN
)
510 * VFP support code initialisation.
512 static int __init
vfp_init(void)
515 unsigned int cpu_arch
= cpu_architecture();
517 if (cpu_arch
>= CPU_ARCH_ARMv6
)
521 * First check that there is a VFP that we can use.
522 * The handler is already setup to just log calls, so
523 * we just need to read the VFPSID register.
525 vfp_vector
= vfp_testing_entry
;
527 vfpsid
= fmrx(FPSID
);
529 vfp_vector
= vfp_null_entry
;
531 printk(KERN_INFO
"VFP support v0.3: ");
533 printk("not present\n");
534 else if (vfpsid
& FPSID_NODOUBLE
) {
535 printk("no double precision support\n");
537 hotcpu_notifier(vfp_hotplug
, 0);
539 smp_call_function(vfp_enable
, NULL
, 1);
541 VFP_arch
= (vfpsid
& FPSID_ARCH_MASK
) >> FPSID_ARCH_BIT
; /* Extract the architecture version */
542 printk("implementor %02x architecture %d part %02x variant %x rev %x\n",
543 (vfpsid
& FPSID_IMPLEMENTER_MASK
) >> FPSID_IMPLEMENTER_BIT
,
544 (vfpsid
& FPSID_ARCH_MASK
) >> FPSID_ARCH_BIT
,
545 (vfpsid
& FPSID_PART_MASK
) >> FPSID_PART_BIT
,
546 (vfpsid
& FPSID_VARIANT_MASK
) >> FPSID_VARIANT_BIT
,
547 (vfpsid
& FPSID_REV_MASK
) >> FPSID_REV_BIT
);
549 vfp_vector
= vfp_support_entry
;
551 thread_register_notifier(&vfp_notifier_block
);
555 * We detected VFP, and the support code is
556 * in place; report VFP support to userspace.
558 elf_hwcap
|= HWCAP_VFP
;
561 elf_hwcap
|= HWCAP_VFPv3
;
564 * Check for VFPv3 D16. CPUs in this configuration
565 * only have 16 x 64bit registers.
567 if (((fmrx(MVFR0
) & MVFR0_A_SIMD_MASK
)) == 1)
568 elf_hwcap
|= HWCAP_VFPv3D16
;
573 * Check for the presence of the Advanced SIMD
574 * load/store instructions, integer and single
575 * precision floating point operations. Only check
576 * for NEON if the hardware has the MVFR registers.
578 if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
579 if ((fmrx(MVFR1
) & 0x000fff00) == 0x00011100)
580 elf_hwcap
|= HWCAP_NEON
;
587 late_initcall(vfp_init
);