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proc: use seq_puts()/seq_putc() where possible
[linux-2.6/next.git] / drivers / net / atl1c / atl1c_main.c
bloba699bbf20eb58e2f7c1bfb591af6a15750a9cd79
1 /*
2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22 #include "atl1c.h"
23
24 #define ATL1C_DRV_VERSION "1.0.1.0-NAPI"
25 char atl1c_driver_name[] = "atl1c";
26 char atl1c_driver_version[] = ATL1C_DRV_VERSION;
27 #define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062
28 #define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063
29 #define PCI_DEVICE_ID_ATHEROS_L2C_B 0x2060 /* AR8152 v1.1 Fast 10/100 */
30 #define PCI_DEVICE_ID_ATHEROS_L2C_B2 0x2062 /* AR8152 v2.0 Fast 10/100 */
31 #define PCI_DEVICE_ID_ATHEROS_L1D 0x1073 /* AR8151 v1.0 Gigabit 1000 */
32 #define PCI_DEVICE_ID_ATHEROS_L1D_2_0 0x1083 /* AR8151 v2.0 Gigabit 1000 */
33 #define L2CB_V10 0xc0
34 #define L2CB_V11 0xc1
35
36 /*
37 * atl1c_pci_tbl - PCI Device ID Table
38 *
39 * Wildcard entries (PCI_ANY_ID) should come last
40 * Last entry must be all 0s
41 *
42 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
43 * Class, Class Mask, private data (not used) }
44 */
45 static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
46 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
47 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
48 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
49 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
50 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
51 /* required last entry */
52 { 0 }
53 };
54 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
55
56 MODULE_AUTHOR("Jie Yang <jie.yang@atheros.com>");
57 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
58 MODULE_LICENSE("GPL");
59 MODULE_VERSION(ATL1C_DRV_VERSION);
60
61 static int atl1c_stop_mac(struct atl1c_hw *hw);
62 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);
63 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
64 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
65 static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
66 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
67 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
68 int *work_done, int work_to_do);
69 static int atl1c_up(struct atl1c_adapter *adapter);
70 static void atl1c_down(struct atl1c_adapter *adapter);
71
72 static const u16 atl1c_pay_load_size[] = {
73 128, 256, 512, 1024, 2048, 4096,
74 };
75
76 static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] =
77 {
78 REG_MB_RFD0_PROD_IDX,
79 REG_MB_RFD1_PROD_IDX,
80 REG_MB_RFD2_PROD_IDX,
81 REG_MB_RFD3_PROD_IDX
82 };
83
84 static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
85 {
86 REG_RFD0_HEAD_ADDR_LO,
87 REG_RFD1_HEAD_ADDR_LO,
88 REG_RFD2_HEAD_ADDR_LO,
89 REG_RFD3_HEAD_ADDR_LO
90 };
91
92 static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
93 {
94 REG_RRD0_HEAD_ADDR_LO,
95 REG_RRD1_HEAD_ADDR_LO,
96 REG_RRD2_HEAD_ADDR_LO,
97 REG_RRD3_HEAD_ADDR_LO
98 };
99
100 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
101 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
102 static void atl1c_pcie_patch(struct atl1c_hw *hw)
103 {
104 u32 data;
105
106 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
107 data |= PCIE_PHYMISC_FORCE_RCV_DET;
108 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
109
110 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
111 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
112
113 data &= ~(PCIE_PHYMISC2_SERDES_CDR_MASK <<
114 PCIE_PHYMISC2_SERDES_CDR_SHIFT);
115 data |= 3 << PCIE_PHYMISC2_SERDES_CDR_SHIFT;
116 data &= ~(PCIE_PHYMISC2_SERDES_TH_MASK <<
117 PCIE_PHYMISC2_SERDES_TH_SHIFT);
118 data |= 3 << PCIE_PHYMISC2_SERDES_TH_SHIFT;
119 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
120 }
121 }
122
123 /* FIXME: no need any more ? */
124 /*
125 * atl1c_init_pcie - init PCIE module
126 */
127 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
128 {
129 u32 data;
130 u32 pci_cmd;
131 struct pci_dev *pdev = hw->adapter->pdev;
132
133 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
134 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
135 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
136 PCI_COMMAND_IO);
137 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
138
139 /*
140 * Clear any PowerSaveing Settings
141 */
142 pci_enable_wake(pdev, PCI_D3hot, 0);
143 pci_enable_wake(pdev, PCI_D3cold, 0);
144
145 /*
146 * Mask some pcie error bits
147 */
148 AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
149 data &= ~PCIE_UC_SERVRITY_DLP;
150 data &= ~PCIE_UC_SERVRITY_FCP;
151 AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
152
153 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
154 data &= ~LTSSM_ID_EN_WRO;
155 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
156
157 atl1c_pcie_patch(hw);
158 if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
159 atl1c_disable_l0s_l1(hw);
160 if (flag & ATL1C_PCIE_PHY_RESET)
161 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
162 else
163 AT_WRITE_REG(hw, REG_GPHY_CTRL,
164 GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
165
166 msleep(5);
167 }
168
169 /*
170 * atl1c_irq_enable - Enable default interrupt generation settings
171 * @adapter: board private structure
172 */
173 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
174 {
175 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
176 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
177 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
178 AT_WRITE_FLUSH(&adapter->hw);
179 }
180 }
181
182 /*
183 * atl1c_irq_disable - Mask off interrupt generation on the NIC
184 * @adapter: board private structure
185 */
186 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
187 {
188 atomic_inc(&adapter->irq_sem);
189 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
190 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
191 AT_WRITE_FLUSH(&adapter->hw);
192 synchronize_irq(adapter->pdev->irq);
193 }
194
195 /*
196 * atl1c_irq_reset - reset interrupt confiure on the NIC
197 * @adapter: board private structure
198 */
199 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
200 {
201 atomic_set(&adapter->irq_sem, 1);
202 atl1c_irq_enable(adapter);
203 }
204
205 /*
206 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
207 * of the idle status register until the device is actually idle
208 */
209 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw)
210 {
211 int timeout;
212 u32 data;
213
214 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
215 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
216 if ((data & IDLE_STATUS_MASK) == 0)
217 return 0;
218 msleep(1);
219 }
220 return data;
221 }
222
223 /*
224 * atl1c_phy_config - Timer Call-back
225 * @data: pointer to netdev cast into an unsigned long
226 */
227 static void atl1c_phy_config(unsigned long data)
228 {
229 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
230 struct atl1c_hw *hw = &adapter->hw;
231 unsigned long flags;
232
233 spin_lock_irqsave(&adapter->mdio_lock, flags);
234 atl1c_restart_autoneg(hw);
235 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
236 }
237
238 void atl1c_reinit_locked(struct atl1c_adapter *adapter)
239 {
240 WARN_ON(in_interrupt());
241 atl1c_down(adapter);
242 atl1c_up(adapter);
243 clear_bit(__AT_RESETTING, &adapter->flags);
244 }
245
246 static void atl1c_check_link_status(struct atl1c_adapter *adapter)
247 {
248 struct atl1c_hw *hw = &adapter->hw;
249 struct net_device *netdev = adapter->netdev;
250 struct pci_dev *pdev = adapter->pdev;
251 int err;
252 unsigned long flags;
253 u16 speed, duplex, phy_data;
254
255 spin_lock_irqsave(&adapter->mdio_lock, flags);
256 /* MII_BMSR must read twise */
257 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
258 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
259 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
260
261 if ((phy_data & BMSR_LSTATUS) == 0) {
262 /* link down */
263 hw->hibernate = true;
264 if (atl1c_stop_mac(hw) != 0)
265 if (netif_msg_hw(adapter))
266 dev_warn(&pdev->dev, "stop mac failed\n");
267 atl1c_set_aspm(hw, false);
268 netif_carrier_off(netdev);
269 netif_stop_queue(netdev);
270 atl1c_phy_reset(hw);
271 atl1c_phy_init(&adapter->hw);
272 } else {
273 /* Link Up */
274 hw->hibernate = false;
275 spin_lock_irqsave(&adapter->mdio_lock, flags);
276 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
277 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
278 if (unlikely(err))
279 return;
280 /* link result is our setting */
281 if (adapter->link_speed != speed ||
282 adapter->link_duplex != duplex) {
283 adapter->link_speed = speed;
284 adapter->link_duplex = duplex;
285 atl1c_set_aspm(hw, true);
286 atl1c_enable_tx_ctrl(hw);
287 atl1c_enable_rx_ctrl(hw);
288 atl1c_setup_mac_ctrl(adapter);
289 if (netif_msg_link(adapter))
290 dev_info(&pdev->dev,
291 "%s: %s NIC Link is Up<%d Mbps %s>\n",
292 atl1c_driver_name, netdev->name,
293 adapter->link_speed,
294 adapter->link_duplex == FULL_DUPLEX ?
295 "Full Duplex" : "Half Duplex");
296 }
297 if (!netif_carrier_ok(netdev))
298 netif_carrier_on(netdev);
299 }
300 }
301
302 static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
303 {
304 struct net_device *netdev = adapter->netdev;
305 struct pci_dev *pdev = adapter->pdev;
306 u16 phy_data;
307 u16 link_up;
308
309 spin_lock(&adapter->mdio_lock);
310 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
311 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
312 spin_unlock(&adapter->mdio_lock);
313 link_up = phy_data & BMSR_LSTATUS;
314 /* notify upper layer link down ASAP */
315 if (!link_up) {
316 if (netif_carrier_ok(netdev)) {
317 /* old link state: Up */
318 netif_carrier_off(netdev);
319 if (netif_msg_link(adapter))
320 dev_info(&pdev->dev,
321 "%s: %s NIC Link is Down\n",
322 atl1c_driver_name, netdev->name);
323 adapter->link_speed = SPEED_0;
324 }
325 }
326
327 adapter->work_event |= ATL1C_WORK_EVENT_LINK_CHANGE;
328 schedule_work(&adapter->common_task);
329 }
330
331 static void atl1c_common_task(struct work_struct *work)
332 {
333 struct atl1c_adapter *adapter;
334 struct net_device *netdev;
335
336 adapter = container_of(work, struct atl1c_adapter, common_task);
337 netdev = adapter->netdev;
338
339 if (adapter->work_event & ATL1C_WORK_EVENT_RESET) {
340 adapter->work_event &= ~ATL1C_WORK_EVENT_RESET;
341 netif_device_detach(netdev);
342 atl1c_down(adapter);
343 atl1c_up(adapter);
344 netif_device_attach(netdev);
345 return;
346 }
347
348 if (adapter->work_event & ATL1C_WORK_EVENT_LINK_CHANGE) {
349 adapter->work_event &= ~ATL1C_WORK_EVENT_LINK_CHANGE;
350 atl1c_check_link_status(adapter);
351 }
352 return;
353 }
354
355
356 static void atl1c_del_timer(struct atl1c_adapter *adapter)
357 {
358 del_timer_sync(&adapter->phy_config_timer);
359 }
360
361
362 /*
363 * atl1c_tx_timeout - Respond to a Tx Hang
364 * @netdev: network interface device structure
365 */
366 static void atl1c_tx_timeout(struct net_device *netdev)
367 {
368 struct atl1c_adapter *adapter = netdev_priv(netdev);
369
370 /* Do the reset outside of interrupt context */
371 adapter->work_event |= ATL1C_WORK_EVENT_RESET;
372 schedule_work(&adapter->common_task);
373 }
374
375 /*
376 * atl1c_set_multi - Multicast and Promiscuous mode set
377 * @netdev: network interface device structure
378 *
379 * The set_multi entry point is called whenever the multicast address
380 * list or the network interface flags are updated. This routine is
381 * responsible for configuring the hardware for proper multicast,
382 * promiscuous mode, and all-multi behavior.
383 */
384 static void atl1c_set_multi(struct net_device *netdev)
385 {
386 struct atl1c_adapter *adapter = netdev_priv(netdev);
387 struct atl1c_hw *hw = &adapter->hw;
388 struct netdev_hw_addr *ha;
389 u32 mac_ctrl_data;
390 u32 hash_value;
391
392 /* Check for Promiscuous and All Multicast modes */
393 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
394
395 if (netdev->flags & IFF_PROMISC) {
396 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
397 } else if (netdev->flags & IFF_ALLMULTI) {
398 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
399 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
400 } else {
401 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
402 }
403
404 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
405
406 /* clear the old settings from the multicast hash table */
407 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
408 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
409
410 /* comoute mc addresses' hash value ,and put it into hash table */
411 netdev_for_each_mc_addr(ha, netdev) {
412 hash_value = atl1c_hash_mc_addr(hw, ha->addr);
413 atl1c_hash_set(hw, hash_value);
414 }
415 }
416
417 static void atl1c_vlan_rx_register(struct net_device *netdev,
418 struct vlan_group *grp)
419 {
420 struct atl1c_adapter *adapter = netdev_priv(netdev);
421 struct pci_dev *pdev = adapter->pdev;
422 u32 mac_ctrl_data = 0;
423
424 if (netif_msg_pktdata(adapter))
425 dev_dbg(&pdev->dev, "atl1c_vlan_rx_register\n");
426
427 atl1c_irq_disable(adapter);
428
429 adapter->vlgrp = grp;
430 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
431
432 if (grp) {
433 /* enable VLAN tag insert/strip */
434 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
435 } else {
436 /* disable VLAN tag insert/strip */
437 mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
438 }
439
440 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
441 atl1c_irq_enable(adapter);
442 }
443
444 static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
445 {
446 struct pci_dev *pdev = adapter->pdev;
447
448 if (netif_msg_pktdata(adapter))
449 dev_dbg(&pdev->dev, "atl1c_restore_vlan !");
450 atl1c_vlan_rx_register(adapter->netdev, adapter->vlgrp);
451 }
452 /*
453 * atl1c_set_mac - Change the Ethernet Address of the NIC
454 * @netdev: network interface device structure
455 * @p: pointer to an address structure
456 *
457 * Returns 0 on success, negative on failure
458 */
459 static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
460 {
461 struct atl1c_adapter *adapter = netdev_priv(netdev);
462 struct sockaddr *addr = p;
463
464 if (!is_valid_ether_addr(addr->sa_data))
465 return -EADDRNOTAVAIL;
466
467 if (netif_running(netdev))
468 return -EBUSY;
469
470 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
471 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
472
473 atl1c_hw_set_mac_addr(&adapter->hw);
474
475 return 0;
476 }
477
478 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
479 struct net_device *dev)
480 {
481 int mtu = dev->mtu;
482
483 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
484 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
485 }
486 /*
487 * atl1c_change_mtu - Change the Maximum Transfer Unit
488 * @netdev: network interface device structure
489 * @new_mtu: new value for maximum frame size
490 *
491 * Returns 0 on success, negative on failure
492 */
493 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
494 {
495 struct atl1c_adapter *adapter = netdev_priv(netdev);
496 int old_mtu = netdev->mtu;
497 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
498
499 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
500 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
501 if (netif_msg_link(adapter))
502 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
503 return -EINVAL;
504 }
505 /* set MTU */
506 if (old_mtu != new_mtu && netif_running(netdev)) {
507 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
508 msleep(1);
509 netdev->mtu = new_mtu;
510 adapter->hw.max_frame_size = new_mtu;
511 atl1c_set_rxbufsize(adapter, netdev);
512 if (new_mtu > MAX_TSO_FRAME_SIZE) {
513 adapter->netdev->features &= ~NETIF_F_TSO;
514 adapter->netdev->features &= ~NETIF_F_TSO6;
515 } else {
516 adapter->netdev->features |= NETIF_F_TSO;
517 adapter->netdev->features |= NETIF_F_TSO6;
518 }
519 atl1c_down(adapter);
520 atl1c_up(adapter);
521 clear_bit(__AT_RESETTING, &adapter->flags);
522 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
523 u32 phy_data;
524
525 AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
526 phy_data |= 0x10000000;
527 AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
528 }
529
530 }
531 return 0;
532 }
533
534 /*
535 * caller should hold mdio_lock
536 */
537 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
538 {
539 struct atl1c_adapter *adapter = netdev_priv(netdev);
540 u16 result;
541
542 atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
543 return result;
544 }
545
546 static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
547 int reg_num, int val)
548 {
549 struct atl1c_adapter *adapter = netdev_priv(netdev);
550
551 atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
552 }
553
554 /*
555 * atl1c_mii_ioctl -
556 * @netdev:
557 * @ifreq:
558 * @cmd:
559 */
560 static int atl1c_mii_ioctl(struct net_device *netdev,
561 struct ifreq *ifr, int cmd)
562 {
563 struct atl1c_adapter *adapter = netdev_priv(netdev);
564 struct pci_dev *pdev = adapter->pdev;
565 struct mii_ioctl_data *data = if_mii(ifr);
566 unsigned long flags;
567 int retval = 0;
568
569 if (!netif_running(netdev))
570 return -EINVAL;
571
572 spin_lock_irqsave(&adapter->mdio_lock, flags);
573 switch (cmd) {
574 case SIOCGMIIPHY:
575 data->phy_id = 0;
576 break;
577
578 case SIOCGMIIREG:
579 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
580 &data->val_out)) {
581 retval = -EIO;
582 goto out;
583 }
584 break;
585
586 case SIOCSMIIREG:
587 if (data->reg_num & ~(0x1F)) {
588 retval = -EFAULT;
589 goto out;
590 }
591
592 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
593 data->reg_num, data->val_in);
594 if (atl1c_write_phy_reg(&adapter->hw,
595 data->reg_num, data->val_in)) {
596 retval = -EIO;
597 goto out;
598 }
599 break;
600
601 default:
602 retval = -EOPNOTSUPP;
603 break;
604 }
605 out:
606 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
607 return retval;
608 }
609
610 /*
611 * atl1c_ioctl -
612 * @netdev:
613 * @ifreq:
614 * @cmd:
615 */
616 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
617 {
618 switch (cmd) {
619 case SIOCGMIIPHY:
620 case SIOCGMIIREG:
621 case SIOCSMIIREG:
622 return atl1c_mii_ioctl(netdev, ifr, cmd);
623 default:
624 return -EOPNOTSUPP;
625 }
626 }
627
628 /*
629 * atl1c_alloc_queues - Allocate memory for all rings
630 * @adapter: board private structure to initialize
631 *
632 */
633 static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
634 {
635 return 0;
636 }
637
638 static void atl1c_set_mac_type(struct atl1c_hw *hw)
639 {
640 switch (hw->device_id) {
641 case PCI_DEVICE_ID_ATTANSIC_L2C:
642 hw->nic_type = athr_l2c;
643 break;
644 case PCI_DEVICE_ID_ATTANSIC_L1C:
645 hw->nic_type = athr_l1c;
646 break;
647 case PCI_DEVICE_ID_ATHEROS_L2C_B:
648 hw->nic_type = athr_l2c_b;
649 break;
650 case PCI_DEVICE_ID_ATHEROS_L2C_B2:
651 hw->nic_type = athr_l2c_b2;
652 break;
653 case PCI_DEVICE_ID_ATHEROS_L1D:
654 hw->nic_type = athr_l1d;
655 break;
656 case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
657 hw->nic_type = athr_l1d_2;
658 break;
659 default:
660 break;
661 }
662 }
663
664 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
665 {
666 u32 phy_status_data;
667 u32 link_ctrl_data;
668
669 atl1c_set_mac_type(hw);
670 AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data);
671 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
672
673 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
674 ATL1C_TXQ_MODE_ENHANCE;
675 if (link_ctrl_data & LINK_CTRL_L0S_EN)
676 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
677 if (link_ctrl_data & LINK_CTRL_L1_EN)
678 hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
679 if (link_ctrl_data & LINK_CTRL_EXT_SYNC)
680 hw->ctrl_flags |= ATL1C_LINK_EXT_SYNC;
681 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
682
683 if (hw->nic_type == athr_l1c ||
684 hw->nic_type == athr_l1d ||
685 hw->nic_type == athr_l1d_2)
686 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
687 return 0;
688 }
689 /*
690 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
691 * @adapter: board private structure to initialize
692 *
693 * atl1c_sw_init initializes the Adapter private data structure.
694 * Fields are initialized based on PCI device information and
695 * OS network device settings (MTU size).
696 */
697 static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
698 {
699 struct atl1c_hw *hw = &adapter->hw;
700 struct pci_dev *pdev = adapter->pdev;
701 u32 revision;
702
703
704 adapter->wol = 0;
705 device_set_wakeup_enable(&pdev->dev, false);
706 adapter->link_speed = SPEED_0;
707 adapter->link_duplex = FULL_DUPLEX;
708 adapter->num_rx_queues = AT_DEF_RECEIVE_QUEUE;
709 adapter->tpd_ring[0].count = 1024;
710 adapter->rfd_ring[0].count = 512;
711
712 hw->vendor_id = pdev->vendor;
713 hw->device_id = pdev->device;
714 hw->subsystem_vendor_id = pdev->subsystem_vendor;
715 hw->subsystem_id = pdev->subsystem_device;
716 AT_READ_REG(hw, PCI_CLASS_REVISION, &revision);
717 hw->revision_id = revision & 0xFF;
718 /* before link up, we assume hibernate is true */
719 hw->hibernate = true;
720 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
721 if (atl1c_setup_mac_funcs(hw) != 0) {
722 dev_err(&pdev->dev, "set mac function pointers failed\n");
723 return -1;
724 }
725 hw->intr_mask = IMR_NORMAL_MASK;
726 hw->phy_configured = false;
727 hw->preamble_len = 7;
728 hw->max_frame_size = adapter->netdev->mtu;
729 if (adapter->num_rx_queues < 2) {
730 hw->rss_type = atl1c_rss_disable;
731 hw->rss_mode = atl1c_rss_mode_disable;
732 } else {
733 hw->rss_type = atl1c_rss_ipv4;
734 hw->rss_mode = atl1c_rss_mul_que_mul_int;
735 hw->rss_hash_bits = 16;
736 }
737 hw->autoneg_advertised = ADVERTISED_Autoneg;
738 hw->indirect_tab = 0xE4E4E4E4;
739 hw->base_cpu = 0;
740
741 hw->ict = 50000; /* 100ms */
742 hw->smb_timer = 200000; /* 400ms */
743 hw->cmb_tpd = 4;
744 hw->cmb_tx_timer = 1; /* 2 us */
745 hw->rx_imt = 200;
746 hw->tx_imt = 1000;
747
748 hw->tpd_burst = 5;
749 hw->rfd_burst = 8;
750 hw->dma_order = atl1c_dma_ord_out;
751 hw->dmar_block = atl1c_dma_req_1024;
752 hw->dmaw_block = atl1c_dma_req_1024;
753 hw->dmar_dly_cnt = 15;
754 hw->dmaw_dly_cnt = 4;
755
756 if (atl1c_alloc_queues(adapter)) {
757 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
758 return -ENOMEM;
759 }
760 /* TODO */
761 atl1c_set_rxbufsize(adapter, adapter->netdev);
762 atomic_set(&adapter->irq_sem, 1);
763 spin_lock_init(&adapter->mdio_lock);
764 spin_lock_init(&adapter->tx_lock);
765 set_bit(__AT_DOWN, &adapter->flags);
766
767 return 0;
768 }
769
770 static inline void atl1c_clean_buffer(struct pci_dev *pdev,
771 struct atl1c_buffer *buffer_info, int in_irq)
772 {
773 u16 pci_driection;
774 if (buffer_info->flags & ATL1C_BUFFER_FREE)
775 return;
776 if (buffer_info->dma) {
777 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
778 pci_driection = PCI_DMA_FROMDEVICE;
779 else
780 pci_driection = PCI_DMA_TODEVICE;
781
782 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
783 pci_unmap_single(pdev, buffer_info->dma,
784 buffer_info->length, pci_driection);
785 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
786 pci_unmap_page(pdev, buffer_info->dma,
787 buffer_info->length, pci_driection);
788 }
789 if (buffer_info->skb) {
790 if (in_irq)
791 dev_kfree_skb_irq(buffer_info->skb);
792 else
793 dev_kfree_skb(buffer_info->skb);
794 }
795 buffer_info->dma = 0;
796 buffer_info->skb = NULL;
797 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
798 }
799 /*
800 * atl1c_clean_tx_ring - Free Tx-skb
801 * @adapter: board private structure
802 */
803 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
804 enum atl1c_trans_queue type)
805 {
806 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
807 struct atl1c_buffer *buffer_info;
808 struct pci_dev *pdev = adapter->pdev;
809 u16 index, ring_count;
810
811 ring_count = tpd_ring->count;
812 for (index = 0; index < ring_count; index++) {
813 buffer_info = &tpd_ring->buffer_info[index];
814 atl1c_clean_buffer(pdev, buffer_info, 0);
815 }
816
817 /* Zero out Tx-buffers */
818 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
819 ring_count);
820 atomic_set(&tpd_ring->next_to_clean, 0);
821 tpd_ring->next_to_use = 0;
822 }
823
824 /*
825 * atl1c_clean_rx_ring - Free rx-reservation skbs
826 * @adapter: board private structure
827 */
828 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
829 {
830 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
831 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
832 struct atl1c_buffer *buffer_info;
833 struct pci_dev *pdev = adapter->pdev;
834 int i, j;
835
836 for (i = 0; i < adapter->num_rx_queues; i++) {
837 for (j = 0; j < rfd_ring[i].count; j++) {
838 buffer_info = &rfd_ring[i].buffer_info[j];
839 atl1c_clean_buffer(pdev, buffer_info, 0);
840 }
841 /* zero out the descriptor ring */
842 memset(rfd_ring[i].desc, 0, rfd_ring[i].size);
843 rfd_ring[i].next_to_clean = 0;
844 rfd_ring[i].next_to_use = 0;
845 rrd_ring[i].next_to_use = 0;
846 rrd_ring[i].next_to_clean = 0;
847 }
848 }
849
850 /*
851 * Read / Write Ptr Initialize:
852 */
853 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
854 {
855 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
856 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
857 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
858 struct atl1c_buffer *buffer_info;
859 int i, j;
860
861 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
862 tpd_ring[i].next_to_use = 0;
863 atomic_set(&tpd_ring[i].next_to_clean, 0);
864 buffer_info = tpd_ring[i].buffer_info;
865 for (j = 0; j < tpd_ring->count; j++)
866 ATL1C_SET_BUFFER_STATE(&buffer_info[i],
867 ATL1C_BUFFER_FREE);
868 }
869 for (i = 0; i < adapter->num_rx_queues; i++) {
870 rfd_ring[i].next_to_use = 0;
871 rfd_ring[i].next_to_clean = 0;
872 rrd_ring[i].next_to_use = 0;
873 rrd_ring[i].next_to_clean = 0;
874 for (j = 0; j < rfd_ring[i].count; j++) {
875 buffer_info = &rfd_ring[i].buffer_info[j];
876 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
877 }
878 }
879 }
880
881 /*
882 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
883 * @adapter: board private structure
884 *
885 * Free all transmit software resources
886 */
887 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
888 {
889 struct pci_dev *pdev = adapter->pdev;
890
891 pci_free_consistent(pdev, adapter->ring_header.size,
892 adapter->ring_header.desc,
893 adapter->ring_header.dma);
894 adapter->ring_header.desc = NULL;
895
896 /* Note: just free tdp_ring.buffer_info,
897 * it contain rfd_ring.buffer_info, do not double free */
898 if (adapter->tpd_ring[0].buffer_info) {
899 kfree(adapter->tpd_ring[0].buffer_info);
900 adapter->tpd_ring[0].buffer_info = NULL;
901 }
902 }
903
904 /*
905 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
906 * @adapter: board private structure
907 *
908 * Return 0 on success, negative on failure
909 */
910 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
911 {
912 struct pci_dev *pdev = adapter->pdev;
913 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
914 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
915 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
916 struct atl1c_ring_header *ring_header = &adapter->ring_header;
917 int num_rx_queues = adapter->num_rx_queues;
918 int size;
919 int i;
920 int count = 0;
921 int rx_desc_count = 0;
922 u32 offset = 0;
923
924 rrd_ring[0].count = rfd_ring[0].count;
925 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
926 tpd_ring[i].count = tpd_ring[0].count;
927
928 for (i = 1; i < adapter->num_rx_queues; i++)
929 rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count;
930
931 /* 2 tpd queue, one high priority queue,
932 * another normal priority queue */
933 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
934 rfd_ring->count * num_rx_queues);
935 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
936 if (unlikely(!tpd_ring->buffer_info)) {
937 dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
938 size);
939 goto err_nomem;
940 }
941 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
942 tpd_ring[i].buffer_info =
943 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
944 count += tpd_ring[i].count;
945 }
946
947 for (i = 0; i < num_rx_queues; i++) {
948 rfd_ring[i].buffer_info =
949 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
950 count += rfd_ring[i].count;
951 rx_desc_count += rfd_ring[i].count;
952 }
953 /*
954 * real ring DMA buffer
955 * each ring/block may need up to 8 bytes for alignment, hence the
956 * additional bytes tacked onto the end.
957 */
958 ring_header->size = size =
959 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
960 sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
961 sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
962 sizeof(struct atl1c_hw_stats) +
963 8 * 4 + 8 * 2 * num_rx_queues;
964
965 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
966 &ring_header->dma);
967 if (unlikely(!ring_header->desc)) {
968 dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
969 goto err_nomem;
970 }
971 memset(ring_header->desc, 0, ring_header->size);
972 /* init TPD ring */
973
974 tpd_ring[0].dma = roundup(ring_header->dma, 8);
975 offset = tpd_ring[0].dma - ring_header->dma;
976 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
977 tpd_ring[i].dma = ring_header->dma + offset;
978 tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
979 tpd_ring[i].size =
980 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
981 offset += roundup(tpd_ring[i].size, 8);
982 }
983 /* init RFD ring */
984 for (i = 0; i < num_rx_queues; i++) {
985 rfd_ring[i].dma = ring_header->dma + offset;
986 rfd_ring[i].desc = (u8 *) ring_header->desc + offset;
987 rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *
988 rfd_ring[i].count;
989 offset += roundup(rfd_ring[i].size, 8);
990 }
991
992 /* init RRD ring */
993 for (i = 0; i < num_rx_queues; i++) {
994 rrd_ring[i].dma = ring_header->dma + offset;
995 rrd_ring[i].desc = (u8 *) ring_header->desc + offset;
996 rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *
997 rrd_ring[i].count;
998 offset += roundup(rrd_ring[i].size, 8);
999 }
1000
1001 adapter->smb.dma = ring_header->dma + offset;
1002 adapter->smb.smb = (u8 *)ring_header->desc + offset;
1003 return 0;
1004
1005 err_nomem:
1006 kfree(tpd_ring->buffer_info);
1007 return -ENOMEM;
1008 }
1009
1010 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
1011 {
1012 struct atl1c_hw *hw = &adapter->hw;
1013 struct atl1c_rfd_ring *rfd_ring = (struct atl1c_rfd_ring *)
1014 adapter->rfd_ring;
1015 struct atl1c_rrd_ring *rrd_ring = (struct atl1c_rrd_ring *)
1016 adapter->rrd_ring;
1017 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1018 adapter->tpd_ring;
1019 struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb;
1020 struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb;
1021 int i;
1022 u32 data;
1023
1024 /* TPD */
1025 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
1026 (u32)((tpd_ring[atl1c_trans_normal].dma &
1027 AT_DMA_HI_ADDR_MASK) >> 32));
1028 /* just enable normal priority TX queue */
1029 AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO,
1030 (u32)(tpd_ring[atl1c_trans_normal].dma &
1031 AT_DMA_LO_ADDR_MASK));
1032 AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO,
1033 (u32)(tpd_ring[atl1c_trans_high].dma &
1034 AT_DMA_LO_ADDR_MASK));
1035 AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
1036 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
1037
1038
1039 /* RFD */
1040 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
1041 (u32)((rfd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32));
1042 for (i = 0; i < adapter->num_rx_queues; i++)
1043 AT_WRITE_REG(hw, atl1c_rfd_addr_lo_regs[i],
1044 (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1045
1046 AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
1047 rfd_ring[0].count & RFD_RING_SIZE_MASK);
1048 AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
1049 adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
1050
1051 /* RRD */
1052 for (i = 0; i < adapter->num_rx_queues; i++)
1053 AT_WRITE_REG(hw, atl1c_rrd_addr_lo_regs[i],
1054 (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1055 AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
1056 (rrd_ring[0].count & RRD_RING_SIZE_MASK));
1057
1058 /* CMB */
1059 AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK);
1060
1061 /* SMB */
1062 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI,
1063 (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1064 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO,
1065 (u32)(smb->dma & AT_DMA_LO_ADDR_MASK));
1066 if (hw->nic_type == athr_l2c_b) {
1067 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
1068 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
1069 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
1070 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
1071 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
1072 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
1073 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/
1074 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/
1075 }
1076 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d_2) {
1077 /* Power Saving for L2c_B */
1078 AT_READ_REG(hw, REG_SERDES_LOCK, &data);
1079 data |= SERDES_MAC_CLK_SLOWDOWN;
1080 data |= SERDES_PYH_CLK_SLOWDOWN;
1081 AT_WRITE_REG(hw, REG_SERDES_LOCK, data);
1082 }
1083 /* Load all of base address above */
1084 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
1085 }
1086
1087 static void atl1c_configure_tx(struct atl1c_adapter *adapter)
1088 {
1089 struct atl1c_hw *hw = &adapter->hw;
1090 u32 dev_ctrl_data;
1091 u32 max_pay_load;
1092 u16 tx_offload_thresh;
1093 u32 txq_ctrl_data;
1094 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
1095 u32 max_pay_load_data;
1096
1097 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
1098 tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
1099 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1100 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
1101 AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
1102 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
1103 DEVICE_CTRL_MAX_PAYLOAD_MASK;
1104 hw->dmaw_block = min(max_pay_load, hw->dmaw_block);
1105 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
1106 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
1107 hw->dmar_block = min(max_pay_load, hw->dmar_block);
1108
1109 txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) <<
1110 TXQ_NUM_TPD_BURST_SHIFT;
1111 if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE)
1112 txq_ctrl_data |= TXQ_CTRL_ENH_MODE;
1113 max_pay_load_data = (atl1c_pay_load_size[hw->dmar_block] &
1114 TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT;
1115 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2)
1116 max_pay_load_data >>= 1;
1117 txq_ctrl_data |= max_pay_load_data;
1118
1119 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1120 }
1121
1122 static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1123 {
1124 struct atl1c_hw *hw = &adapter->hw;
1125 u32 rxq_ctrl_data;
1126
1127 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1128 RXQ_RFD_BURST_NUM_SHIFT;
1129
1130 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1131 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
1132 if (hw->rss_type == atl1c_rss_ipv4)
1133 rxq_ctrl_data |= RSS_HASH_IPV4;
1134 if (hw->rss_type == atl1c_rss_ipv4_tcp)
1135 rxq_ctrl_data |= RSS_HASH_IPV4_TCP;
1136 if (hw->rss_type == atl1c_rss_ipv6)
1137 rxq_ctrl_data |= RSS_HASH_IPV6;
1138 if (hw->rss_type == atl1c_rss_ipv6_tcp)
1139 rxq_ctrl_data |= RSS_HASH_IPV6_TCP;
1140 if (hw->rss_type != atl1c_rss_disable)
1141 rxq_ctrl_data |= RRS_HASH_CTRL_EN;
1142
1143 rxq_ctrl_data |= (hw->rss_mode & RSS_MODE_MASK) <<
1144 RSS_MODE_SHIFT;
1145 rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) <<
1146 RSS_HASH_BITS_SHIFT;
1147 if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
1148 rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_1M &
1149 ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
1150
1151 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1152 }
1153
1154 static void atl1c_configure_rss(struct atl1c_adapter *adapter)
1155 {
1156 struct atl1c_hw *hw = &adapter->hw;
1157
1158 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
1159 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
1160 }
1161
1162 static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1163 {
1164 struct atl1c_hw *hw = &adapter->hw;
1165 u32 dma_ctrl_data;
1166
1167 dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;
1168 if (hw->ctrl_flags & ATL1C_CMB_ENABLE)
1169 dma_ctrl_data |= DMA_CTRL_CMB_EN;
1170 if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
1171 dma_ctrl_data |= DMA_CTRL_SMB_EN;
1172 else
1173 dma_ctrl_data |= MAC_CTRL_SMB_DIS;
1174
1175 switch (hw->dma_order) {
1176 case atl1c_dma_ord_in:
1177 dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER;
1178 break;
1179 case atl1c_dma_ord_enh:
1180 dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER;
1181 break;
1182 case atl1c_dma_ord_out:
1183 dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER;
1184 break;
1185 default:
1186 break;
1187 }
1188
1189 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1190 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1191 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1192 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1193 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1194 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1195 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1196 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1197
1198 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1199 }
1200
1201 /*
1202 * Stop the mac, transmit and receive units
1203 * hw - Struct containing variables accessed by shared code
1204 * return : 0 or idle status (if error)
1205 */
1206 static int atl1c_stop_mac(struct atl1c_hw *hw)
1207 {
1208 u32 data;
1209
1210 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1211 data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN |
1212 RXQ3_CTRL_EN | RXQ_CTRL_EN);
1213 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1214
1215 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1216 data &= ~TXQ_CTRL_EN;
1217 AT_WRITE_REG(hw, REG_TWSI_CTRL, data);
1218
1219 atl1c_wait_until_idle(hw);
1220
1221 AT_READ_REG(hw, REG_MAC_CTRL, &data);
1222 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1223 AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1224
1225 return (int)atl1c_wait_until_idle(hw);
1226 }
1227
1228 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
1229 {
1230 u32 data;
1231
1232 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1233 switch (hw->adapter->num_rx_queues) {
1234 case 4:
1235 data |= (RXQ3_CTRL_EN | RXQ2_CTRL_EN | RXQ1_CTRL_EN);
1236 break;
1237 case 3:
1238 data |= (RXQ2_CTRL_EN | RXQ1_CTRL_EN);
1239 break;
1240 case 2:
1241 data |= RXQ1_CTRL_EN;
1242 break;
1243 default:
1244 break;
1245 }
1246 data |= RXQ_CTRL_EN;
1247 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1248 }
1249
1250 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw)
1251 {
1252 u32 data;
1253
1254 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1255 data |= TXQ_CTRL_EN;
1256 AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
1257 }
1258
1259 /*
1260 * Reset the transmit and receive units; mask and clear all interrupts.
1261 * hw - Struct containing variables accessed by shared code
1262 * return : 0 or idle status (if error)
1263 */
1264 static int atl1c_reset_mac(struct atl1c_hw *hw)
1265 {
1266 struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
1267 struct pci_dev *pdev = adapter->pdev;
1268 u32 master_ctrl_data = 0;
1269
1270 AT_WRITE_REG(hw, REG_IMR, 0);
1271 AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
1272
1273 atl1c_stop_mac(hw);
1274 /*
1275 * Issue Soft Reset to the MAC. This will reset the chip's
1276 * transmit, receive, DMA. It will not effect
1277 * the current PCI configuration. The global reset bit is self-
1278 * clearing, and should clear within a microsecond.
1279 */
1280 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
1281 master_ctrl_data |= MASTER_CTRL_OOB_DIS_OFF;
1282 AT_WRITE_REGW(hw, REG_MASTER_CTRL, ((master_ctrl_data | MASTER_CTRL_SOFT_RST)
1283 & 0xFFFF));
1284
1285 AT_WRITE_FLUSH(hw);
1286 msleep(10);
1287 /* Wait at least 10ms for All module to be Idle */
1288
1289 if (atl1c_wait_until_idle(hw)) {
1290 dev_err(&pdev->dev,
1291 "MAC state machine can't be idle since"
1292 " disabled for 10ms second\n");
1293 return -1;
1294 }
1295 return 0;
1296 }
1297
1298 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1299 {
1300 u32 pm_ctrl_data;
1301
1302 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1303 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1304 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1305 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1306 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1307 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1308 pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK;
1309 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1310
1311 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1312 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1313 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1314 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1315 }
1316
1317 /*
1318 * Set ASPM state.
1319 * Enable/disable L0s/L1 depend on link state.
1320 */
1321 static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
1322 {
1323 u32 pm_ctrl_data;
1324 u32 link_ctrl_data;
1325 u32 link_l1_timer = 0xF;
1326
1327 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1328 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
1329
1330 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1331 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1332 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1333 pm_ctrl_data &= ~(PM_CTRL_LCKDET_TIMER_MASK <<
1334 PM_CTRL_LCKDET_TIMER_SHIFT);
1335 pm_ctrl_data |= AT_LCKDET_TIMER << PM_CTRL_LCKDET_TIMER_SHIFT;
1336
1337 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1338 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1339 link_ctrl_data &= ~LINK_CTRL_EXT_SYNC;
1340 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) {
1341 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10)
1342 link_ctrl_data |= LINK_CTRL_EXT_SYNC;
1343 }
1344
1345 AT_WRITE_REG(hw, REG_LINK_CTRL, link_ctrl_data);
1346
1347 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER;
1348 pm_ctrl_data &= ~(PM_CTRL_PM_REQ_TIMER_MASK <<
1349 PM_CTRL_PM_REQ_TIMER_SHIFT);
1350 pm_ctrl_data |= AT_ASPM_L1_TIMER <<
1351 PM_CTRL_PM_REQ_TIMER_SHIFT;
1352 pm_ctrl_data &= ~PM_CTRL_SA_DLY_EN;
1353 pm_ctrl_data &= ~PM_CTRL_HOTRST;
1354 pm_ctrl_data |= 1 << PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1355 pm_ctrl_data |= PM_CTRL_SERDES_PD_EX_L1;
1356 }
1357 pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;
1358 if (linkup) {
1359 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1360 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1361 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1362 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1363 if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT)
1364 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN;
1365
1366 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1367 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1368 if (hw->nic_type == athr_l2c_b)
1369 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE))
1370 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1371 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1372 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1373 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
1374 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1375 if (hw->adapter->link_speed == SPEED_100 ||
1376 hw->adapter->link_speed == SPEED_1000) {
1377 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1378 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1379 if (hw->nic_type == athr_l2c_b)
1380 link_l1_timer = 7;
1381 else if (hw->nic_type == athr_l2c_b2 ||
1382 hw->nic_type == athr_l1d_2)
1383 link_l1_timer = 4;
1384 pm_ctrl_data |= link_l1_timer <<
1385 PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1386 }
1387 } else {
1388 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1389 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1390 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1391 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1392 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1393 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1394
1395 }
1396 } else {
1397 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1398 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1399 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1400 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1401
1402 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1403 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1404 else
1405 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1406 }
1407 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1408
1409 return;
1410 }
1411
1412 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)
1413 {
1414 struct atl1c_hw *hw = &adapter->hw;
1415 struct net_device *netdev = adapter->netdev;
1416 u32 mac_ctrl_data;
1417
1418 mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1419 mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1420
1421 if (adapter->link_duplex == FULL_DUPLEX) {
1422 hw->mac_duplex = true;
1423 mac_ctrl_data |= MAC_CTRL_DUPLX;
1424 }
1425
1426 if (adapter->link_speed == SPEED_1000)
1427 hw->mac_speed = atl1c_mac_speed_1000;
1428 else
1429 hw->mac_speed = atl1c_mac_speed_10_100;
1430
1431 mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) <<
1432 MAC_CTRL_SPEED_SHIFT;
1433
1434 mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1435 mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) <<
1436 MAC_CTRL_PRMLEN_SHIFT);
1437
1438 if (adapter->vlgrp)
1439 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
1440
1441 mac_ctrl_data |= MAC_CTRL_BC_EN;
1442 if (netdev->flags & IFF_PROMISC)
1443 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
1444 if (netdev->flags & IFF_ALLMULTI)
1445 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
1446
1447 mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;
1448 if (hw->nic_type == athr_l1d || hw->nic_type == athr_l2c_b2 ||
1449 hw->nic_type == athr_l1d_2) {
1450 mac_ctrl_data |= MAC_CTRL_SPEED_MODE_SW;
1451 mac_ctrl_data |= MAC_CTRL_HASH_ALG_CRC32;
1452 }
1453 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
1454 }
1455
1456 /*
1457 * atl1c_configure - Configure Transmit&Receive Unit after Reset
1458 * @adapter: board private structure
1459 *
1460 * Configure the Tx /Rx unit of the MAC after a reset.
1461 */
1462 static int atl1c_configure(struct atl1c_adapter *adapter)
1463 {
1464 struct atl1c_hw *hw = &adapter->hw;
1465 u32 master_ctrl_data = 0;
1466 u32 intr_modrt_data;
1467 u32 data;
1468
1469 /* clear interrupt status */
1470 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1471 /* Clear any WOL status */
1472 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1473 /* set Interrupt Clear Timer
1474 * HW will enable self to assert interrupt event to system after
1475 * waiting x-time for software to notify it accept interrupt.
1476 */
1477
1478 data = CLK_GATING_EN_ALL;
1479 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
1480 if (hw->nic_type == athr_l2c_b)
1481 data &= ~CLK_GATING_RXMAC_EN;
1482 } else
1483 data = 0;
1484 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
1485
1486 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1487 hw->ict & INT_RETRIG_TIMER_MASK);
1488
1489 atl1c_configure_des_ring(adapter);
1490
1491 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1492 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1493 IRQ_MODRT_TX_TIMER_SHIFT;
1494 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1495 IRQ_MODRT_RX_TIMER_SHIFT;
1496 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1497 master_ctrl_data |=
1498 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1499 }
1500
1501 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1502 master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1503
1504 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
1505 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1506
1507 if (hw->ctrl_flags & ATL1C_CMB_ENABLE) {
1508 AT_WRITE_REG(hw, REG_CMB_TPD_THRESH,
1509 hw->cmb_tpd & CMB_TPD_THRESH_MASK);
1510 AT_WRITE_REG(hw, REG_CMB_TX_TIMER,
1511 hw->cmb_tx_timer & CMB_TX_TIMER_MASK);
1512 }
1513
1514 if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
1515 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1516 hw->smb_timer & SMB_STAT_TIMER_MASK);
1517 /* set MTU */
1518 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1519 VLAN_HLEN + ETH_FCS_LEN);
1520 /* HDS, disable */
1521 AT_WRITE_REG(hw, REG_HDS_CTRL, 0);
1522
1523 atl1c_configure_tx(adapter);
1524 atl1c_configure_rx(adapter);
1525 atl1c_configure_rss(adapter);
1526 atl1c_configure_dma(adapter);
1527
1528 return 0;
1529 }
1530
1531 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1532 {
1533 u16 hw_reg_addr = 0;
1534 unsigned long *stats_item = NULL;
1535 u32 data;
1536
1537 /* update rx status */
1538 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1539 stats_item = &adapter->hw_stats.rx_ok;
1540 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1541 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1542 *stats_item += data;
1543 stats_item++;
1544 hw_reg_addr += 4;
1545 }
1546 /* update tx status */
1547 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1548 stats_item = &adapter->hw_stats.tx_ok;
1549 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1550 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1551 *stats_item += data;
1552 stats_item++;
1553 hw_reg_addr += 4;
1554 }
1555 }
1556
1557 /*
1558 * atl1c_get_stats - Get System Network Statistics
1559 * @netdev: network interface device structure
1560 *
1561 * Returns the address of the device statistics structure.
1562 * The statistics are actually updated from the timer callback.
1563 */
1564 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1565 {
1566 struct atl1c_adapter *adapter = netdev_priv(netdev);
1567 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
1568 struct net_device_stats *net_stats = &netdev->stats;
1569
1570 atl1c_update_hw_stats(adapter);
1571 net_stats->rx_packets = hw_stats->rx_ok;
1572 net_stats->tx_packets = hw_stats->tx_ok;
1573 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1574 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1575 net_stats->multicast = hw_stats->rx_mcast;
1576 net_stats->collisions = hw_stats->tx_1_col +
1577 hw_stats->tx_2_col * 2 +
1578 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1579 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1580 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1581 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1582 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1583 net_stats->rx_length_errors = hw_stats->rx_len_err;
1584 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1585 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1586 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1587
1588 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1589
1590 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1591 hw_stats->tx_underrun + hw_stats->tx_trunc;
1592 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1593 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1594 net_stats->tx_window_errors = hw_stats->tx_late_col;
1595
1596 return net_stats;
1597 }
1598
1599 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1600 {
1601 u16 phy_data;
1602
1603 spin_lock(&adapter->mdio_lock);
1604 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1605 spin_unlock(&adapter->mdio_lock);
1606 }
1607
1608 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
1609 enum atl1c_trans_queue type)
1610 {
1611 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1612 &adapter->tpd_ring[type];
1613 struct atl1c_buffer *buffer_info;
1614 struct pci_dev *pdev = adapter->pdev;
1615 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1616 u16 hw_next_to_clean;
1617 u16 shift;
1618 u32 data;
1619
1620 if (type == atl1c_trans_high)
1621 shift = MB_HTPD_CONS_IDX_SHIFT;
1622 else
1623 shift = MB_NTPD_CONS_IDX_SHIFT;
1624
1625 AT_READ_REG(&adapter->hw, REG_MB_PRIO_CONS_IDX, &data);
1626 hw_next_to_clean = (data >> shift) & MB_PRIO_PROD_IDX_MASK;
1627
1628 while (next_to_clean != hw_next_to_clean) {
1629 buffer_info = &tpd_ring->buffer_info[next_to_clean];
1630 atl1c_clean_buffer(pdev, buffer_info, 1);
1631 if (++next_to_clean == tpd_ring->count)
1632 next_to_clean = 0;
1633 atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1634 }
1635
1636 if (netif_queue_stopped(adapter->netdev) &&
1637 netif_carrier_ok(adapter->netdev)) {
1638 netif_wake_queue(adapter->netdev);
1639 }
1640
1641 return true;
1642 }
1643
1644 /*
1645 * atl1c_intr - Interrupt Handler
1646 * @irq: interrupt number
1647 * @data: pointer to a network interface device structure
1648 * @pt_regs: CPU registers structure
1649 */
1650 static irqreturn_t atl1c_intr(int irq, void *data)
1651 {
1652 struct net_device *netdev = data;
1653 struct atl1c_adapter *adapter = netdev_priv(netdev);
1654 struct pci_dev *pdev = adapter->pdev;
1655 struct atl1c_hw *hw = &adapter->hw;
1656 int max_ints = AT_MAX_INT_WORK;
1657 int handled = IRQ_NONE;
1658 u32 status;
1659 u32 reg_data;
1660
1661 do {
1662 AT_READ_REG(hw, REG_ISR, &reg_data);
1663 status = reg_data & hw->intr_mask;
1664
1665 if (status == 0 || (status & ISR_DIS_INT) != 0) {
1666 if (max_ints != AT_MAX_INT_WORK)
1667 handled = IRQ_HANDLED;
1668 break;
1669 }
1670 /* link event */
1671 if (status & ISR_GPHY)
1672 atl1c_clear_phy_int(adapter);
1673 /* Ack ISR */
1674 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1675 if (status & ISR_RX_PKT) {
1676 if (likely(napi_schedule_prep(&adapter->napi))) {
1677 hw->intr_mask &= ~ISR_RX_PKT;
1678 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1679 __napi_schedule(&adapter->napi);
1680 }
1681 }
1682 if (status & ISR_TX_PKT)
1683 atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
1684
1685 handled = IRQ_HANDLED;
1686 /* check if PCIE PHY Link down */
1687 if (status & ISR_ERROR) {
1688 if (netif_msg_hw(adapter))
1689 dev_err(&pdev->dev,
1690 "atl1c hardware error (status = 0x%x)\n",
1691 status & ISR_ERROR);
1692 /* reset MAC */
1693 adapter->work_event |= ATL1C_WORK_EVENT_RESET;
1694 schedule_work(&adapter->common_task);
1695 return IRQ_HANDLED;
1696 }
1697
1698 if (status & ISR_OVER)
1699 if (netif_msg_intr(adapter))
1700 dev_warn(&pdev->dev,
1701 "TX/RX overflow (status = 0x%x)\n",
1702 status & ISR_OVER);
1703
1704 /* link event */
1705 if (status & (ISR_GPHY | ISR_MANUAL)) {
1706 netdev->stats.tx_carrier_errors++;
1707 atl1c_link_chg_event(adapter);
1708 break;
1709 }
1710
1711 } while (--max_ints > 0);
1712 /* re-enable Interrupt*/
1713 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1714 return handled;
1715 }
1716
1717 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1718 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1719 {
1720 /*
1721 * The pid field in RRS in not correct sometimes, so we
1722 * cannot figure out if the packet is fragmented or not,
1723 * so we tell the KERNEL CHECKSUM_NONE
1724 */
1725 skb_checksum_none_assert(skb);
1726 }
1727
1728 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid)
1729 {
1730 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[ringid];
1731 struct pci_dev *pdev = adapter->pdev;
1732 struct atl1c_buffer *buffer_info, *next_info;
1733 struct sk_buff *skb;
1734 void *vir_addr = NULL;
1735 u16 num_alloc = 0;
1736 u16 rfd_next_to_use, next_next;
1737 struct atl1c_rx_free_desc *rfd_desc;
1738
1739 next_next = rfd_next_to_use = rfd_ring->next_to_use;
1740 if (++next_next == rfd_ring->count)
1741 next_next = 0;
1742 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1743 next_info = &rfd_ring->buffer_info[next_next];
1744
1745 while (next_info->flags & ATL1C_BUFFER_FREE) {
1746 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1747
1748 skb = dev_alloc_skb(adapter->rx_buffer_len);
1749 if (unlikely(!skb)) {
1750 if (netif_msg_rx_err(adapter))
1751 dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1752 break;
1753 }
1754
1755 /*
1756 * Make buffer alignment 2 beyond a 16 byte boundary
1757 * this will result in a 16 byte aligned IP header after
1758 * the 14 byte MAC header is removed
1759 */
1760 vir_addr = skb->data;
1761 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
1762 buffer_info->skb = skb;
1763 buffer_info->length = adapter->rx_buffer_len;
1764 buffer_info->dma = pci_map_single(pdev, vir_addr,
1765 buffer_info->length,
1766 PCI_DMA_FROMDEVICE);
1767 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
1768 ATL1C_PCIMAP_FROMDEVICE);
1769 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1770 rfd_next_to_use = next_next;
1771 if (++next_next == rfd_ring->count)
1772 next_next = 0;
1773 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1774 next_info = &rfd_ring->buffer_info[next_next];
1775 num_alloc++;
1776 }
1777
1778 if (num_alloc) {
1779 /* TODO: update mailbox here */
1780 wmb();
1781 rfd_ring->next_to_use = rfd_next_to_use;
1782 AT_WRITE_REG(&adapter->hw, atl1c_rfd_prod_idx_regs[ringid],
1783 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
1784 }
1785
1786 return num_alloc;
1787 }
1788
1789 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1790 struct atl1c_recv_ret_status *rrs, u16 num)
1791 {
1792 u16 i;
1793 /* the relationship between rrd and rfd is one map one */
1794 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1795 rrd_ring->next_to_clean)) {
1796 rrs->word3 &= ~RRS_RXD_UPDATED;
1797 if (++rrd_ring->next_to_clean == rrd_ring->count)
1798 rrd_ring->next_to_clean = 0;
1799 }
1800 }
1801
1802 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1803 struct atl1c_recv_ret_status *rrs, u16 num)
1804 {
1805 u16 i;
1806 u16 rfd_index;
1807 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1808
1809 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1810 RRS_RX_RFD_INDEX_MASK;
1811 for (i = 0; i < num; i++) {
1812 buffer_info[rfd_index].skb = NULL;
1813 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
1814 ATL1C_BUFFER_FREE);
1815 if (++rfd_index == rfd_ring->count)
1816 rfd_index = 0;
1817 }
1818 rfd_ring->next_to_clean = rfd_index;
1819 }
1820
1821 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
1822 int *work_done, int work_to_do)
1823 {
1824 u16 rfd_num, rfd_index;
1825 u16 count = 0;
1826 u16 length;
1827 struct pci_dev *pdev = adapter->pdev;
1828 struct net_device *netdev = adapter->netdev;
1829 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[que];
1830 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[que];
1831 struct sk_buff *skb;
1832 struct atl1c_recv_ret_status *rrs;
1833 struct atl1c_buffer *buffer_info;
1834
1835 while (1) {
1836 if (*work_done >= work_to_do)
1837 break;
1838 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1839 if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1840 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1841 RRS_RX_RFD_CNT_MASK;
1842 if (unlikely(rfd_num != 1))
1843 /* TODO support mul rfd*/
1844 if (netif_msg_rx_err(adapter))
1845 dev_warn(&pdev->dev,
1846 "Multi rfd not support yet!\n");
1847 goto rrs_checked;
1848 } else {
1849 break;
1850 }
1851 rrs_checked:
1852 atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1853 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1854 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1855 if (netif_msg_rx_err(adapter))
1856 dev_warn(&pdev->dev,
1857 "wrong packet! rrs word3 is %x\n",
1858 rrs->word3);
1859 continue;
1860 }
1861
1862 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1863 RRS_PKT_SIZE_MASK);
1864 /* Good Receive */
1865 if (likely(rfd_num == 1)) {
1866 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1867 RRS_RX_RFD_INDEX_MASK;
1868 buffer_info = &rfd_ring->buffer_info[rfd_index];
1869 pci_unmap_single(pdev, buffer_info->dma,
1870 buffer_info->length, PCI_DMA_FROMDEVICE);
1871 skb = buffer_info->skb;
1872 } else {
1873 /* TODO */
1874 if (netif_msg_rx_err(adapter))
1875 dev_warn(&pdev->dev,
1876 "Multi rfd not support yet!\n");
1877 break;
1878 }
1879 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1880 skb_put(skb, length - ETH_FCS_LEN);
1881 skb->protocol = eth_type_trans(skb, netdev);
1882 atl1c_rx_checksum(adapter, skb, rrs);
1883 if (unlikely(adapter->vlgrp) && rrs->word3 & RRS_VLAN_INS) {
1884 u16 vlan;
1885
1886 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1887 vlan = le16_to_cpu(vlan);
1888 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, vlan);
1889 } else
1890 netif_receive_skb(skb);
1891
1892 (*work_done)++;
1893 count++;
1894 }
1895 if (count)
1896 atl1c_alloc_rx_buffer(adapter, que);
1897 }
1898
1899 /*
1900 * atl1c_clean - NAPI Rx polling callback
1901 * @adapter: board private structure
1902 */
1903 static int atl1c_clean(struct napi_struct *napi, int budget)
1904 {
1905 struct atl1c_adapter *adapter =
1906 container_of(napi, struct atl1c_adapter, napi);
1907 int work_done = 0;
1908
1909 /* Keep link state information with original netdev */
1910 if (!netif_carrier_ok(adapter->netdev))
1911 goto quit_polling;
1912 /* just enable one RXQ */
1913 atl1c_clean_rx_irq(adapter, 0, &work_done, budget);
1914
1915 if (work_done < budget) {
1916 quit_polling:
1917 napi_complete(napi);
1918 adapter->hw.intr_mask |= ISR_RX_PKT;
1919 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1920 }
1921 return work_done;
1922 }
1923
1924 #ifdef CONFIG_NET_POLL_CONTROLLER
1925
1926 /*
1927 * Polling 'interrupt' - used by things like netconsole to send skbs
1928 * without having to re-enable interrupts. It's not called while
1929 * the interrupt routine is executing.
1930 */
1931 static void atl1c_netpoll(struct net_device *netdev)
1932 {
1933 struct atl1c_adapter *adapter = netdev_priv(netdev);
1934
1935 disable_irq(adapter->pdev->irq);
1936 atl1c_intr(adapter->pdev->irq, netdev);
1937 enable_irq(adapter->pdev->irq);
1938 }
1939 #endif
1940
1941 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
1942 {
1943 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1944 u16 next_to_use = 0;
1945 u16 next_to_clean = 0;
1946
1947 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1948 next_to_use = tpd_ring->next_to_use;
1949
1950 return (u16)(next_to_clean > next_to_use) ?
1951 (next_to_clean - next_to_use - 1) :
1952 (tpd_ring->count + next_to_clean - next_to_use - 1);
1953 }
1954
1955 /*
1956 * get next usable tpd
1957 * Note: should call atl1c_tdp_avail to make sure
1958 * there is enough tpd to use
1959 */
1960 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
1961 enum atl1c_trans_queue type)
1962 {
1963 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1964 struct atl1c_tpd_desc *tpd_desc;
1965 u16 next_to_use = 0;
1966
1967 next_to_use = tpd_ring->next_to_use;
1968 if (++tpd_ring->next_to_use == tpd_ring->count)
1969 tpd_ring->next_to_use = 0;
1970 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
1971 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
1972 return tpd_desc;
1973 }
1974
1975 static struct atl1c_buffer *
1976 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
1977 {
1978 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
1979
1980 return &tpd_ring->buffer_info[tpd -
1981 (struct atl1c_tpd_desc *)tpd_ring->desc];
1982 }
1983
1984 /* Calculate the transmit packet descript needed*/
1985 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
1986 {
1987 u16 tpd_req;
1988 u16 proto_hdr_len = 0;
1989
1990 tpd_req = skb_shinfo(skb)->nr_frags + 1;
1991
1992 if (skb_is_gso(skb)) {
1993 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1994 if (proto_hdr_len < skb_headlen(skb))
1995 tpd_req++;
1996 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
1997 tpd_req++;
1998 }
1999 return tpd_req;
2000 }
2001
2002 static int atl1c_tso_csum(struct atl1c_adapter *adapter,
2003 struct sk_buff *skb,
2004 struct atl1c_tpd_desc **tpd,
2005 enum atl1c_trans_queue type)
2006 {
2007 struct pci_dev *pdev = adapter->pdev;
2008 u8 hdr_len;
2009 u32 real_len;
2010 unsigned short offload_type;
2011 int err;
2012
2013 if (skb_is_gso(skb)) {
2014 if (skb_header_cloned(skb)) {
2015 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2016 if (unlikely(err))
2017 return -1;
2018 }
2019 offload_type = skb_shinfo(skb)->gso_type;
2020
2021 if (offload_type & SKB_GSO_TCPV4) {
2022 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
2023 + ntohs(ip_hdr(skb)->tot_len));
2024
2025 if (real_len < skb->len)
2026 pskb_trim(skb, real_len);
2027
2028 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2029 if (unlikely(skb->len == hdr_len)) {
2030 /* only xsum need */
2031 if (netif_msg_tx_queued(adapter))
2032 dev_warn(&pdev->dev,
2033 "IPV4 tso with zero data??\n");
2034 goto check_sum;
2035 } else {
2036 ip_hdr(skb)->check = 0;
2037 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
2038 ip_hdr(skb)->saddr,
2039 ip_hdr(skb)->daddr,
2040 0, IPPROTO_TCP, 0);
2041 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
2042 }
2043 }
2044
2045 if (offload_type & SKB_GSO_TCPV6) {
2046 struct atl1c_tpd_ext_desc *etpd =
2047 *(struct atl1c_tpd_ext_desc **)(tpd);
2048
2049 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
2050 *tpd = atl1c_get_tpd(adapter, type);
2051 ipv6_hdr(skb)->payload_len = 0;
2052 /* check payload == 0 byte ? */
2053 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2054 if (unlikely(skb->len == hdr_len)) {
2055 /* only xsum need */
2056 if (netif_msg_tx_queued(adapter))
2057 dev_warn(&pdev->dev,
2058 "IPV6 tso with zero data??\n");
2059 goto check_sum;
2060 } else
2061 tcp_hdr(skb)->check = ~csum_ipv6_magic(
2062 &ipv6_hdr(skb)->saddr,
2063 &ipv6_hdr(skb)->daddr,
2064 0, IPPROTO_TCP, 0);
2065 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
2066 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
2067 etpd->pkt_len = cpu_to_le32(skb->len);
2068 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
2069 }
2070
2071 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
2072 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
2073 TPD_TCPHDR_OFFSET_SHIFT;
2074 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
2075 TPD_MSS_SHIFT;
2076 return 0;
2077 }
2078
2079 check_sum:
2080 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2081 u8 css, cso;
2082 cso = skb_checksum_start_offset(skb);
2083
2084 if (unlikely(cso & 0x1)) {
2085 if (netif_msg_tx_err(adapter))
2086 dev_err(&adapter->pdev->dev,
2087 "payload offset should not an event number\n");
2088 return -1;
2089 } else {
2090 css = cso + skb->csum_offset;
2091
2092 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
2093 TPD_PLOADOFFSET_SHIFT;
2094 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
2095 TPD_CCSUM_OFFSET_SHIFT;
2096 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
2097 }
2098 }
2099 return 0;
2100 }
2101
2102 static void atl1c_tx_map(struct atl1c_adapter *adapter,
2103 struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
2104 enum atl1c_trans_queue type)
2105 {
2106 struct atl1c_tpd_desc *use_tpd = NULL;
2107 struct atl1c_buffer *buffer_info = NULL;
2108 u16 buf_len = skb_headlen(skb);
2109 u16 map_len = 0;
2110 u16 mapped_len = 0;
2111 u16 hdr_len = 0;
2112 u16 nr_frags;
2113 u16 f;
2114 int tso;
2115
2116 nr_frags = skb_shinfo(skb)->nr_frags;
2117 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
2118 if (tso) {
2119 /* TSO */
2120 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2121 use_tpd = tpd;
2122
2123 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2124 buffer_info->length = map_len;
2125 buffer_info->dma = pci_map_single(adapter->pdev,
2126 skb->data, hdr_len, PCI_DMA_TODEVICE);
2127 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2128 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2129 ATL1C_PCIMAP_TODEVICE);
2130 mapped_len += map_len;
2131 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2132 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2133 }
2134
2135 if (mapped_len < buf_len) {
2136 /* mapped_len == 0, means we should use the first tpd,
2137 which is given by caller */
2138 if (mapped_len == 0)
2139 use_tpd = tpd;
2140 else {
2141 use_tpd = atl1c_get_tpd(adapter, type);
2142 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2143 }
2144 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2145 buffer_info->length = buf_len - mapped_len;
2146 buffer_info->dma =
2147 pci_map_single(adapter->pdev, skb->data + mapped_len,
2148 buffer_info->length, PCI_DMA_TODEVICE);
2149 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2150 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2151 ATL1C_PCIMAP_TODEVICE);
2152 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2153 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2154 }
2155
2156 for (f = 0; f < nr_frags; f++) {
2157 struct skb_frag_struct *frag;
2158
2159 frag = &skb_shinfo(skb)->frags[f];
2160
2161 use_tpd = atl1c_get_tpd(adapter, type);
2162 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2163
2164 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2165 buffer_info->length = frag->size;
2166 buffer_info->dma =
2167 pci_map_page(adapter->pdev, frag->page,
2168 frag->page_offset,
2169 buffer_info->length,
2170 PCI_DMA_TODEVICE);
2171 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2172 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
2173 ATL1C_PCIMAP_TODEVICE);
2174 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2175 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2176 }
2177
2178 /* The last tpd */
2179 use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2180 /* The last buffer info contain the skb address,
2181 so it will be free after unmap */
2182 buffer_info->skb = skb;
2183 }
2184
2185 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
2186 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
2187 {
2188 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
2189 u32 prod_data;
2190
2191 AT_READ_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, &prod_data);
2192 switch (type) {
2193 case atl1c_trans_high:
2194 prod_data &= 0xFFFF0000;
2195 prod_data |= tpd_ring->next_to_use & 0xFFFF;
2196 break;
2197 case atl1c_trans_normal:
2198 prod_data &= 0x0000FFFF;
2199 prod_data |= (tpd_ring->next_to_use & 0xFFFF) << 16;
2200 break;
2201 default:
2202 break;
2203 }
2204 wmb();
2205 AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data);
2206 }
2207
2208 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
2209 struct net_device *netdev)
2210 {
2211 struct atl1c_adapter *adapter = netdev_priv(netdev);
2212 unsigned long flags;
2213 u16 tpd_req = 1;
2214 struct atl1c_tpd_desc *tpd;
2215 enum atl1c_trans_queue type = atl1c_trans_normal;
2216
2217 if (test_bit(__AT_DOWN, &adapter->flags)) {
2218 dev_kfree_skb_any(skb);
2219 return NETDEV_TX_OK;
2220 }
2221
2222 tpd_req = atl1c_cal_tpd_req(skb);
2223 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
2224 if (netif_msg_pktdata(adapter))
2225 dev_info(&adapter->pdev->dev, "tx locked\n");
2226 return NETDEV_TX_LOCKED;
2227 }
2228 if (skb->mark == 0x01)
2229 type = atl1c_trans_high;
2230 else
2231 type = atl1c_trans_normal;
2232
2233 if (atl1c_tpd_avail(adapter, type) < tpd_req) {
2234 /* no enough descriptor, just stop queue */
2235 netif_stop_queue(netdev);
2236 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2237 return NETDEV_TX_BUSY;
2238 }
2239
2240 tpd = atl1c_get_tpd(adapter, type);
2241
2242 /* do TSO and check sum */
2243 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
2244 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2245 dev_kfree_skb_any(skb);
2246 return NETDEV_TX_OK;
2247 }
2248
2249 if (unlikely(vlan_tx_tag_present(skb))) {
2250 u16 vlan = vlan_tx_tag_get(skb);
2251 __le16 tag;
2252
2253 vlan = cpu_to_le16(vlan);
2254 AT_VLAN_TO_TAG(vlan, tag);
2255 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2256 tpd->vlan_tag = tag;
2257 }
2258
2259 if (skb_network_offset(skb) != ETH_HLEN)
2260 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
2261
2262 atl1c_tx_map(adapter, skb, tpd, type);
2263 atl1c_tx_queue(adapter, skb, tpd, type);
2264
2265 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2266 return NETDEV_TX_OK;
2267 }
2268
2269 static void atl1c_free_irq(struct atl1c_adapter *adapter)
2270 {
2271 struct net_device *netdev = adapter->netdev;
2272
2273 free_irq(adapter->pdev->irq, netdev);
2274
2275 if (adapter->have_msi)
2276 pci_disable_msi(adapter->pdev);
2277 }
2278
2279 static int atl1c_request_irq(struct atl1c_adapter *adapter)
2280 {
2281 struct pci_dev *pdev = adapter->pdev;
2282 struct net_device *netdev = adapter->netdev;
2283 int flags = 0;
2284 int err = 0;
2285
2286 adapter->have_msi = true;
2287 err = pci_enable_msi(adapter->pdev);
2288 if (err) {
2289 if (netif_msg_ifup(adapter))
2290 dev_err(&pdev->dev,
2291 "Unable to allocate MSI interrupt Error: %d\n",
2292 err);
2293 adapter->have_msi = false;
2294 } else
2295 netdev->irq = pdev->irq;
2296
2297 if (!adapter->have_msi)
2298 flags |= IRQF_SHARED;
2299 err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
2300 netdev->name, netdev);
2301 if (err) {
2302 if (netif_msg_ifup(adapter))
2303 dev_err(&pdev->dev,
2304 "Unable to allocate interrupt Error: %d\n",
2305 err);
2306 if (adapter->have_msi)
2307 pci_disable_msi(adapter->pdev);
2308 return err;
2309 }
2310 if (netif_msg_ifup(adapter))
2311 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2312 return err;
2313 }
2314
2315 static int atl1c_up(struct atl1c_adapter *adapter)
2316 {
2317 struct net_device *netdev = adapter->netdev;
2318 int num;
2319 int err;
2320 int i;
2321
2322 netif_carrier_off(netdev);
2323 atl1c_init_ring_ptrs(adapter);
2324 atl1c_set_multi(netdev);
2325 atl1c_restore_vlan(adapter);
2326
2327 for (i = 0; i < adapter->num_rx_queues; i++) {
2328 num = atl1c_alloc_rx_buffer(adapter, i);
2329 if (unlikely(num == 0)) {
2330 err = -ENOMEM;
2331 goto err_alloc_rx;
2332 }
2333 }
2334
2335 if (atl1c_configure(adapter)) {
2336 err = -EIO;
2337 goto err_up;
2338 }
2339
2340 err = atl1c_request_irq(adapter);
2341 if (unlikely(err))
2342 goto err_up;
2343
2344 clear_bit(__AT_DOWN, &adapter->flags);
2345 napi_enable(&adapter->napi);
2346 atl1c_irq_enable(adapter);
2347 atl1c_check_link_status(adapter);
2348 netif_start_queue(netdev);
2349 return err;
2350
2351 err_up:
2352 err_alloc_rx:
2353 atl1c_clean_rx_ring(adapter);
2354 return err;
2355 }
2356
2357 static void atl1c_down(struct atl1c_adapter *adapter)
2358 {
2359 struct net_device *netdev = adapter->netdev;
2360
2361 atl1c_del_timer(adapter);
2362 adapter->work_event = 0; /* clear all event */
2363 /* signal that we're down so the interrupt handler does not
2364 * reschedule our watchdog timer */
2365 set_bit(__AT_DOWN, &adapter->flags);
2366 netif_carrier_off(netdev);
2367 napi_disable(&adapter->napi);
2368 atl1c_irq_disable(adapter);
2369 atl1c_free_irq(adapter);
2370 /* reset MAC to disable all RX/TX */
2371 atl1c_reset_mac(&adapter->hw);
2372 msleep(1);
2373
2374 adapter->link_speed = SPEED_0;
2375 adapter->link_duplex = -1;
2376 atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
2377 atl1c_clean_tx_ring(adapter, atl1c_trans_high);
2378 atl1c_clean_rx_ring(adapter);
2379 }
2380
2381 /*
2382 * atl1c_open - Called when a network interface is made active
2383 * @netdev: network interface device structure
2384 *
2385 * Returns 0 on success, negative value on failure
2386 *
2387 * The open entry point is called when a network interface is made
2388 * active by the system (IFF_UP). At this point all resources needed
2389 * for transmit and receive operations are allocated, the interrupt
2390 * handler is registered with the OS, the watchdog timer is started,
2391 * and the stack is notified that the interface is ready.
2392 */
2393 static int atl1c_open(struct net_device *netdev)
2394 {
2395 struct atl1c_adapter *adapter = netdev_priv(netdev);
2396 int err;
2397
2398 /* disallow open during test */
2399 if (test_bit(__AT_TESTING, &adapter->flags))
2400 return -EBUSY;
2401
2402 /* allocate rx/tx dma buffer & descriptors */
2403 err = atl1c_setup_ring_resources(adapter);
2404 if (unlikely(err))
2405 return err;
2406
2407 err = atl1c_up(adapter);
2408 if (unlikely(err))
2409 goto err_up;
2410
2411 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
2412 u32 phy_data;
2413
2414 AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data);
2415 phy_data |= MDIO_AP_EN;
2416 AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data);
2417 }
2418 return 0;
2419
2420 err_up:
2421 atl1c_free_irq(adapter);
2422 atl1c_free_ring_resources(adapter);
2423 atl1c_reset_mac(&adapter->hw);
2424 return err;
2425 }
2426
2427 /*
2428 * atl1c_close - Disables a network interface
2429 * @netdev: network interface device structure
2430 *
2431 * Returns 0, this is not allowed to fail
2432 *
2433 * The close entry point is called when an interface is de-activated
2434 * by the OS. The hardware is still under the drivers control, but
2435 * needs to be disabled. A global MAC reset is issued to stop the
2436 * hardware, and all transmit and receive resources are freed.
2437 */
2438 static int atl1c_close(struct net_device *netdev)
2439 {
2440 struct atl1c_adapter *adapter = netdev_priv(netdev);
2441
2442 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2443 atl1c_down(adapter);
2444 atl1c_free_ring_resources(adapter);
2445 return 0;
2446 }
2447
2448 static int atl1c_suspend(struct device *dev)
2449 {
2450 struct pci_dev *pdev = to_pci_dev(dev);
2451 struct net_device *netdev = pci_get_drvdata(pdev);
2452 struct atl1c_adapter *adapter = netdev_priv(netdev);
2453 struct atl1c_hw *hw = &adapter->hw;
2454 u32 mac_ctrl_data = 0;
2455 u32 master_ctrl_data = 0;
2456 u32 wol_ctrl_data = 0;
2457 u16 mii_intr_status_data = 0;
2458 u32 wufc = adapter->wol;
2459
2460 atl1c_disable_l0s_l1(hw);
2461 if (netif_running(netdev)) {
2462 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2463 atl1c_down(adapter);
2464 }
2465 netif_device_detach(netdev);
2466
2467 if (wufc)
2468 if (atl1c_phy_power_saving(hw) != 0)
2469 dev_dbg(&pdev->dev, "phy power saving failed");
2470
2471 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
2472 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
2473
2474 master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS;
2475 mac_ctrl_data &= ~(MAC_CTRL_PRMLEN_MASK << MAC_CTRL_PRMLEN_SHIFT);
2476 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2477 MAC_CTRL_PRMLEN_MASK) <<
2478 MAC_CTRL_PRMLEN_SHIFT);
2479 mac_ctrl_data &= ~(MAC_CTRL_SPEED_MASK << MAC_CTRL_SPEED_SHIFT);
2480 mac_ctrl_data &= ~MAC_CTRL_DUPLX;
2481
2482 if (wufc) {
2483 mac_ctrl_data |= MAC_CTRL_RX_EN;
2484 if (adapter->link_speed == SPEED_1000 ||
2485 adapter->link_speed == SPEED_0) {
2486 mac_ctrl_data |= atl1c_mac_speed_1000 <<
2487 MAC_CTRL_SPEED_SHIFT;
2488 mac_ctrl_data |= MAC_CTRL_DUPLX;
2489 } else
2490 mac_ctrl_data |= atl1c_mac_speed_10_100 <<
2491 MAC_CTRL_SPEED_SHIFT;
2492
2493 if (adapter->link_duplex == DUPLEX_FULL)
2494 mac_ctrl_data |= MAC_CTRL_DUPLX;
2495
2496 /* turn on magic packet wol */
2497 if (wufc & AT_WUFC_MAG)
2498 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2499
2500 if (wufc & AT_WUFC_LNKC) {
2501 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2502 /* only link up can wake up */
2503 if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {
2504 dev_dbg(&pdev->dev, "%s: read write phy "
2505 "register failed.\n",
2506 atl1c_driver_name);
2507 }
2508 }
2509 /* clear phy interrupt */
2510 atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data);
2511 /* Config MAC Ctrl register */
2512 if (adapter->vlgrp)
2513 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
2514
2515 /* magic packet maybe Broadcast&multicast&Unicast frame */
2516 if (wufc & AT_WUFC_MAG)
2517 mac_ctrl_data |= MAC_CTRL_BC_EN;
2518
2519 dev_dbg(&pdev->dev,
2520 "%s: suspend MAC=0x%x\n",
2521 atl1c_driver_name, mac_ctrl_data);
2522 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2523 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2524 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2525
2526 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT |
2527 GPHY_CTRL_EXT_RESET);
2528 } else {
2529 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_POWER_SAVING);
2530 master_ctrl_data |= MASTER_CTRL_CLK_SEL_DIS;
2531 mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT;
2532 mac_ctrl_data |= MAC_CTRL_DUPLX;
2533 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2534 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2535 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2536 hw->phy_configured = false; /* re-init PHY when resume */
2537 }
2538
2539 return 0;
2540 }
2541
2542 static int atl1c_resume(struct device *dev)
2543 {
2544 struct pci_dev *pdev = to_pci_dev(dev);
2545 struct net_device *netdev = pci_get_drvdata(pdev);
2546 struct atl1c_adapter *adapter = netdev_priv(netdev);
2547
2548 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2549 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2550 ATL1C_PCIE_PHY_RESET);
2551
2552 atl1c_phy_reset(&adapter->hw);
2553 atl1c_reset_mac(&adapter->hw);
2554 atl1c_phy_init(&adapter->hw);
2555
2556 #if 0
2557 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data);
2558 pm_data &= ~PM_CTRLSTAT_PME_EN;
2559 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data);
2560 #endif
2561
2562 netif_device_attach(netdev);
2563 if (netif_running(netdev))
2564 atl1c_up(adapter);
2565
2566 return 0;
2567 }
2568
2569 static void atl1c_shutdown(struct pci_dev *pdev)
2570 {
2571 struct net_device *netdev = pci_get_drvdata(pdev);
2572 struct atl1c_adapter *adapter = netdev_priv(netdev);
2573
2574 atl1c_suspend(&pdev->dev);
2575 pci_wake_from_d3(pdev, adapter->wol);
2576 pci_set_power_state(pdev, PCI_D3hot);
2577 }
2578
2579 static const struct net_device_ops atl1c_netdev_ops = {
2580 .ndo_open = atl1c_open,
2581 .ndo_stop = atl1c_close,
2582 .ndo_validate_addr = eth_validate_addr,
2583 .ndo_start_xmit = atl1c_xmit_frame,
2584 .ndo_set_mac_address = atl1c_set_mac_addr,
2585 .ndo_set_multicast_list = atl1c_set_multi,
2586 .ndo_change_mtu = atl1c_change_mtu,
2587 .ndo_do_ioctl = atl1c_ioctl,
2588 .ndo_tx_timeout = atl1c_tx_timeout,
2589 .ndo_get_stats = atl1c_get_stats,
2590 .ndo_vlan_rx_register = atl1c_vlan_rx_register,
2591 #ifdef CONFIG_NET_POLL_CONTROLLER
2592 .ndo_poll_controller = atl1c_netpoll,
2593 #endif
2594 };
2595
2596 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2597 {
2598 SET_NETDEV_DEV(netdev, &pdev->dev);
2599 pci_set_drvdata(pdev, netdev);
2600
2601 netdev->irq = pdev->irq;
2602 netdev->netdev_ops = &atl1c_netdev_ops;
2603 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2604 atl1c_set_ethtool_ops(netdev);
2605
2606 /* TODO: add when ready */
2607 netdev->features = NETIF_F_SG |
2608 NETIF_F_HW_CSUM |
2609 NETIF_F_HW_VLAN_TX |
2610 NETIF_F_HW_VLAN_RX |
2611 NETIF_F_TSO |
2612 NETIF_F_TSO6;
2613 return 0;
2614 }
2615
2616 /*
2617 * atl1c_probe - Device Initialization Routine
2618 * @pdev: PCI device information struct
2619 * @ent: entry in atl1c_pci_tbl
2620 *
2621 * Returns 0 on success, negative on failure
2622 *
2623 * atl1c_probe initializes an adapter identified by a pci_dev structure.
2624 * The OS initialization, configuring of the adapter private structure,
2625 * and a hardware reset occur.
2626 */
2627 static int __devinit atl1c_probe(struct pci_dev *pdev,
2628 const struct pci_device_id *ent)
2629 {
2630 struct net_device *netdev;
2631 struct atl1c_adapter *adapter;
2632 static int cards_found;
2633
2634 int err = 0;
2635
2636 /* enable device (incl. PCI PM wakeup and hotplug setup) */
2637 err = pci_enable_device_mem(pdev);
2638 if (err) {
2639 dev_err(&pdev->dev, "cannot enable PCI device\n");
2640 return err;
2641 }
2642
2643 /*
2644 * The atl1c chip can DMA to 64-bit addresses, but it uses a single
2645 * shared register for the high 32 bits, so only a single, aligned,
2646 * 4 GB physical address range can be used at a time.
2647 *
2648 * Supporting 64-bit DMA on this hardware is more trouble than it's
2649 * worth. It is far easier to limit to 32-bit DMA than update
2650 * various kernel subsystems to support the mechanics required by a
2651 * fixed-high-32-bit system.
2652 */
2653 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2654 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2655 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2656 goto err_dma;
2657 }
2658
2659 err = pci_request_regions(pdev, atl1c_driver_name);
2660 if (err) {
2661 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2662 goto err_pci_reg;
2663 }
2664
2665 pci_set_master(pdev);
2666
2667 netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
2668 if (netdev == NULL) {
2669 err = -ENOMEM;
2670 dev_err(&pdev->dev, "etherdev alloc failed\n");
2671 goto err_alloc_etherdev;
2672 }
2673
2674 err = atl1c_init_netdev(netdev, pdev);
2675 if (err) {
2676 dev_err(&pdev->dev, "init netdevice failed\n");
2677 goto err_init_netdev;
2678 }
2679 adapter = netdev_priv(netdev);
2680 adapter->bd_number = cards_found;
2681 adapter->netdev = netdev;
2682 adapter->pdev = pdev;
2683 adapter->hw.adapter = adapter;
2684 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
2685 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
2686 if (!adapter->hw.hw_addr) {
2687 err = -EIO;
2688 dev_err(&pdev->dev, "cannot map device registers\n");
2689 goto err_ioremap;
2690 }
2691 netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
2692
2693 /* init mii data */
2694 adapter->mii.dev = netdev;
2695 adapter->mii.mdio_read = atl1c_mdio_read;
2696 adapter->mii.mdio_write = atl1c_mdio_write;
2697 adapter->mii.phy_id_mask = 0x1f;
2698 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2699 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
2700 setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
2701 (unsigned long)adapter);
2702 /* setup the private structure */
2703 err = atl1c_sw_init(adapter);
2704 if (err) {
2705 dev_err(&pdev->dev, "net device private data init failed\n");
2706 goto err_sw_init;
2707 }
2708 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2709 ATL1C_PCIE_PHY_RESET);
2710
2711 /* Init GPHY as early as possible due to power saving issue */
2712 atl1c_phy_reset(&adapter->hw);
2713
2714 err = atl1c_reset_mac(&adapter->hw);
2715 if (err) {
2716 err = -EIO;
2717 goto err_reset;
2718 }
2719
2720 device_init_wakeup(&pdev->dev, 1);
2721 /* reset the controller to
2722 * put the device in a known good starting state */
2723 err = atl1c_phy_init(&adapter->hw);
2724 if (err) {
2725 err = -EIO;
2726 goto err_reset;
2727 }
2728 if (atl1c_read_mac_addr(&adapter->hw) != 0) {
2729 err = -EIO;
2730 dev_err(&pdev->dev, "get mac address failed\n");
2731 goto err_eeprom;
2732 }
2733 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2734 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2735 if (netif_msg_probe(adapter))
2736 dev_dbg(&pdev->dev, "mac address : %pM\n",
2737 adapter->hw.mac_addr);
2738
2739 atl1c_hw_set_mac_addr(&adapter->hw);
2740 INIT_WORK(&adapter->common_task, atl1c_common_task);
2741 adapter->work_event = 0;
2742 err = register_netdev(netdev);
2743 if (err) {
2744 dev_err(&pdev->dev, "register netdevice failed\n");
2745 goto err_register;
2746 }
2747
2748 if (netif_msg_probe(adapter))
2749 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
2750 cards_found++;
2751 return 0;
2752
2753 err_reset:
2754 err_register:
2755 err_sw_init:
2756 err_eeprom:
2757 iounmap(adapter->hw.hw_addr);
2758 err_init_netdev:
2759 err_ioremap:
2760 free_netdev(netdev);
2761 err_alloc_etherdev:
2762 pci_release_regions(pdev);
2763 err_pci_reg:
2764 err_dma:
2765 pci_disable_device(pdev);
2766 return err;
2767 }
2768
2769 /*
2770 * atl1c_remove - Device Removal Routine
2771 * @pdev: PCI device information struct
2772 *
2773 * atl1c_remove is called by the PCI subsystem to alert the driver
2774 * that it should release a PCI device. The could be caused by a
2775 * Hot-Plug event, or because the driver is going to be removed from
2776 * memory.
2777 */
2778 static void __devexit atl1c_remove(struct pci_dev *pdev)
2779 {
2780 struct net_device *netdev = pci_get_drvdata(pdev);
2781 struct atl1c_adapter *adapter = netdev_priv(netdev);
2782
2783 unregister_netdev(netdev);
2784 atl1c_phy_disable(&adapter->hw);
2785
2786 iounmap(adapter->hw.hw_addr);
2787
2788 pci_release_regions(pdev);
2789 pci_disable_device(pdev);
2790 free_netdev(netdev);
2791 }
2792
2793 /*
2794 * atl1c_io_error_detected - called when PCI error is detected
2795 * @pdev: Pointer to PCI device
2796 * @state: The current pci connection state
2797 *
2798 * This function is called after a PCI bus error affecting
2799 * this device has been detected.
2800 */
2801 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2802 pci_channel_state_t state)
2803 {
2804 struct net_device *netdev = pci_get_drvdata(pdev);
2805 struct atl1c_adapter *adapter = netdev_priv(netdev);
2806
2807 netif_device_detach(netdev);
2808
2809 if (state == pci_channel_io_perm_failure)
2810 return PCI_ERS_RESULT_DISCONNECT;
2811
2812 if (netif_running(netdev))
2813 atl1c_down(adapter);
2814
2815 pci_disable_device(pdev);
2816
2817 /* Request a slot slot reset. */
2818 return PCI_ERS_RESULT_NEED_RESET;
2819 }
2820
2821 /*
2822 * atl1c_io_slot_reset - called after the pci bus has been reset.
2823 * @pdev: Pointer to PCI device
2824 *
2825 * Restart the card from scratch, as if from a cold-boot. Implementation
2826 * resembles the first-half of the e1000_resume routine.
2827 */
2828 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2829 {
2830 struct net_device *netdev = pci_get_drvdata(pdev);
2831 struct atl1c_adapter *adapter = netdev_priv(netdev);
2832
2833 if (pci_enable_device(pdev)) {
2834 if (netif_msg_hw(adapter))
2835 dev_err(&pdev->dev,
2836 "Cannot re-enable PCI device after reset\n");
2837 return PCI_ERS_RESULT_DISCONNECT;
2838 }
2839 pci_set_master(pdev);
2840
2841 pci_enable_wake(pdev, PCI_D3hot, 0);
2842 pci_enable_wake(pdev, PCI_D3cold, 0);
2843
2844 atl1c_reset_mac(&adapter->hw);
2845
2846 return PCI_ERS_RESULT_RECOVERED;
2847 }
2848
2849 /*
2850 * atl1c_io_resume - called when traffic can start flowing again.
2851 * @pdev: Pointer to PCI device
2852 *
2853 * This callback is called when the error recovery driver tells us that
2854 * its OK to resume normal operation. Implementation resembles the
2855 * second-half of the atl1c_resume routine.
2856 */
2857 static void atl1c_io_resume(struct pci_dev *pdev)
2858 {
2859 struct net_device *netdev = pci_get_drvdata(pdev);
2860 struct atl1c_adapter *adapter = netdev_priv(netdev);
2861
2862 if (netif_running(netdev)) {
2863 if (atl1c_up(adapter)) {
2864 if (netif_msg_hw(adapter))
2865 dev_err(&pdev->dev,
2866 "Cannot bring device back up after reset\n");
2867 return;
2868 }
2869 }
2870
2871 netif_device_attach(netdev);
2872 }
2873
2874 static struct pci_error_handlers atl1c_err_handler = {
2875 .error_detected = atl1c_io_error_detected,
2876 .slot_reset = atl1c_io_slot_reset,
2877 .resume = atl1c_io_resume,
2878 };
2879
2880 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
2881
2882 static struct pci_driver atl1c_driver = {
2883 .name = atl1c_driver_name,
2884 .id_table = atl1c_pci_tbl,
2885 .probe = atl1c_probe,
2886 .remove = __devexit_p(atl1c_remove),
2887 .shutdown = atl1c_shutdown,
2888 .err_handler = &atl1c_err_handler,
2889 .driver.pm = &atl1c_pm_ops,
2890 };
2891
2892 /*
2893 * atl1c_init_module - Driver Registration Routine
2894 *
2895 * atl1c_init_module is the first routine called when the driver is
2896 * loaded. All it does is register with the PCI subsystem.
2897 */
2898 static int __init atl1c_init_module(void)
2899 {
2900 return pci_register_driver(&atl1c_driver);
2901 }
2902
2903 /*
2904 * atl1c_exit_module - Driver Exit Cleanup Routine
2905 *
2906 * atl1c_exit_module is called just before the driver is removed
2907 * from memory.
2908 */
2909 static void __exit atl1c_exit_module(void)
2910 {
2911 pci_unregister_driver(&atl1c_driver);
2912 }
2913
2914 module_init(atl1c_init_module);
2915 module_exit(atl1c_exit_module);
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