proc: use seq_puts()/seq_putc() where possible
[linux-2.6/next.git] / drivers / net / ixgbe / ixgbe_fcoe.c
blob6342d4859790804a83981f65175d7653bb3f19a5
1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2010 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include "ixgbe.h"
29 #ifdef CONFIG_IXGBE_DCB
30 #include "ixgbe_dcb_82599.h"
31 #endif /* CONFIG_IXGBE_DCB */
32 #include <linux/if_ether.h>
33 #include <linux/gfp.h>
34 #include <linux/if_vlan.h>
35 #include <scsi/scsi_cmnd.h>
36 #include <scsi/scsi_device.h>
37 #include <scsi/fc/fc_fs.h>
38 #include <scsi/fc/fc_fcoe.h>
39 #include <scsi/libfc.h>
40 #include <scsi/libfcoe.h>
42 /**
43 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
44 * @rx_desc: advanced rx descriptor
46 * Returns : true if it is FCoE pkt
48 static inline bool ixgbe_rx_is_fcoe(union ixgbe_adv_rx_desc *rx_desc)
50 u16 p;
52 p = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info);
53 if (p & IXGBE_RXDADV_PKTTYPE_ETQF) {
54 p &= IXGBE_RXDADV_PKTTYPE_ETQF_MASK;
55 p >>= IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT;
56 return p == IXGBE_ETQF_FILTER_FCOE;
58 return false;
61 /**
62 * ixgbe_fcoe_clear_ddp - clear the given ddp context
63 * @ddp - ptr to the ixgbe_fcoe_ddp
65 * Returns : none
68 static inline void ixgbe_fcoe_clear_ddp(struct ixgbe_fcoe_ddp *ddp)
70 ddp->len = 0;
71 ddp->err = 1;
72 ddp->udl = NULL;
73 ddp->udp = 0UL;
74 ddp->sgl = NULL;
75 ddp->sgc = 0;
78 /**
79 * ixgbe_fcoe_ddp_put - free the ddp context for a given xid
80 * @netdev: the corresponding net_device
81 * @xid: the xid that corresponding ddp will be freed
83 * This is the implementation of net_device_ops.ndo_fcoe_ddp_done
84 * and it is expected to be called by ULD, i.e., FCP layer of libfc
85 * to release the corresponding ddp context when the I/O is done.
87 * Returns : data length already ddp-ed in bytes
89 int ixgbe_fcoe_ddp_put(struct net_device *netdev, u16 xid)
91 int len = 0;
92 struct ixgbe_fcoe *fcoe;
93 struct ixgbe_adapter *adapter;
94 struct ixgbe_fcoe_ddp *ddp;
95 u32 fcbuff;
97 if (!netdev)
98 goto out_ddp_put;
100 if (xid >= IXGBE_FCOE_DDP_MAX)
101 goto out_ddp_put;
103 adapter = netdev_priv(netdev);
104 fcoe = &adapter->fcoe;
105 ddp = &fcoe->ddp[xid];
106 if (!ddp->udl)
107 goto out_ddp_put;
109 len = ddp->len;
110 /* if there an error, force to invalidate ddp context */
111 if (ddp->err) {
112 spin_lock_bh(&fcoe->lock);
113 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCFLT, 0);
114 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCFLTRW,
115 (xid | IXGBE_FCFLTRW_WE));
116 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCBUFF, 0);
117 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCDMARW,
118 (xid | IXGBE_FCDMARW_WE));
120 /* guaranteed to be invalidated after 100us */
121 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCDMARW,
122 (xid | IXGBE_FCDMARW_RE));
123 fcbuff = IXGBE_READ_REG(&adapter->hw, IXGBE_FCBUFF);
124 spin_unlock_bh(&fcoe->lock);
125 if (fcbuff & IXGBE_FCBUFF_VALID)
126 udelay(100);
128 if (ddp->sgl)
129 pci_unmap_sg(adapter->pdev, ddp->sgl, ddp->sgc,
130 DMA_FROM_DEVICE);
131 pci_pool_free(fcoe->pool, ddp->udl, ddp->udp);
132 ixgbe_fcoe_clear_ddp(ddp);
134 out_ddp_put:
135 return len;
139 * ixgbe_fcoe_ddp_get - called to set up ddp context
140 * @netdev: the corresponding net_device
141 * @xid: the exchange id requesting ddp
142 * @sgl: the scatter-gather list for this request
143 * @sgc: the number of scatter-gather items
145 * This is the implementation of net_device_ops.ndo_fcoe_ddp_setup
146 * and is expected to be called from ULD, e.g., FCP layer of libfc
147 * to set up ddp for the corresponding xid of the given sglist for
148 * the corresponding I/O.
150 * Returns : 1 for success and 0 for no ddp
152 int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid,
153 struct scatterlist *sgl, unsigned int sgc)
155 struct ixgbe_adapter *adapter;
156 struct ixgbe_hw *hw;
157 struct ixgbe_fcoe *fcoe;
158 struct ixgbe_fcoe_ddp *ddp;
159 struct scatterlist *sg;
160 unsigned int i, j, dmacount;
161 unsigned int len;
162 static const unsigned int bufflen = 4096;
163 unsigned int firstoff = 0;
164 unsigned int lastsize;
165 unsigned int thisoff = 0;
166 unsigned int thislen = 0;
167 u32 fcbuff, fcdmarw, fcfltrw;
168 dma_addr_t addr;
170 if (!netdev || !sgl)
171 return 0;
173 adapter = netdev_priv(netdev);
174 if (xid >= IXGBE_FCOE_DDP_MAX) {
175 e_warn(drv, "xid=0x%x out-of-range\n", xid);
176 return 0;
179 /* no DDP if we are already down or resetting */
180 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
181 test_bit(__IXGBE_RESETTING, &adapter->state))
182 return 0;
184 fcoe = &adapter->fcoe;
185 if (!fcoe->pool) {
186 e_warn(drv, "xid=0x%x no ddp pool for fcoe\n", xid);
187 return 0;
190 ddp = &fcoe->ddp[xid];
191 if (ddp->sgl) {
192 e_err(drv, "xid 0x%x w/ non-null sgl=%p nents=%d\n",
193 xid, ddp->sgl, ddp->sgc);
194 return 0;
196 ixgbe_fcoe_clear_ddp(ddp);
198 /* setup dma from scsi command sgl */
199 dmacount = pci_map_sg(adapter->pdev, sgl, sgc, DMA_FROM_DEVICE);
200 if (dmacount == 0) {
201 e_err(drv, "xid 0x%x DMA map error\n", xid);
202 return 0;
205 /* alloc the udl from our ddp pool */
206 ddp->udl = pci_pool_alloc(fcoe->pool, GFP_ATOMIC, &ddp->udp);
207 if (!ddp->udl) {
208 e_err(drv, "failed allocated ddp context\n");
209 goto out_noddp_unmap;
211 ddp->sgl = sgl;
212 ddp->sgc = sgc;
214 j = 0;
215 for_each_sg(sgl, sg, dmacount, i) {
216 addr = sg_dma_address(sg);
217 len = sg_dma_len(sg);
218 while (len) {
219 /* max number of buffers allowed in one DDP context */
220 if (j >= IXGBE_BUFFCNT_MAX) {
221 e_err(drv, "xid=%x:%d,%d,%d:addr=%llx "
222 "not enough descriptors\n",
223 xid, i, j, dmacount, (u64)addr);
224 goto out_noddp_free;
227 /* get the offset of length of current buffer */
228 thisoff = addr & ((dma_addr_t)bufflen - 1);
229 thislen = min((bufflen - thisoff), len);
231 * all but the 1st buffer (j == 0)
232 * must be aligned on bufflen
234 if ((j != 0) && (thisoff))
235 goto out_noddp_free;
237 * all but the last buffer
238 * ((i == (dmacount - 1)) && (thislen == len))
239 * must end at bufflen
241 if (((i != (dmacount - 1)) || (thislen != len))
242 && ((thislen + thisoff) != bufflen))
243 goto out_noddp_free;
245 ddp->udl[j] = (u64)(addr - thisoff);
246 /* only the first buffer may have none-zero offset */
247 if (j == 0)
248 firstoff = thisoff;
249 len -= thislen;
250 addr += thislen;
251 j++;
254 /* only the last buffer may have non-full bufflen */
255 lastsize = thisoff + thislen;
257 fcbuff = (IXGBE_FCBUFF_4KB << IXGBE_FCBUFF_BUFFSIZE_SHIFT);
258 fcbuff |= ((j & 0xff) << IXGBE_FCBUFF_BUFFCNT_SHIFT);
259 fcbuff |= (firstoff << IXGBE_FCBUFF_OFFSET_SHIFT);
260 fcbuff |= (IXGBE_FCBUFF_VALID);
262 fcdmarw = xid;
263 fcdmarw |= IXGBE_FCDMARW_WE;
264 fcdmarw |= (lastsize << IXGBE_FCDMARW_LASTSIZE_SHIFT);
266 fcfltrw = xid;
267 fcfltrw |= IXGBE_FCFLTRW_WE;
269 /* program DMA context */
270 hw = &adapter->hw;
271 spin_lock_bh(&fcoe->lock);
272 IXGBE_WRITE_REG(hw, IXGBE_FCPTRL, ddp->udp & DMA_BIT_MASK(32));
273 IXGBE_WRITE_REG(hw, IXGBE_FCPTRH, (u64)ddp->udp >> 32);
274 IXGBE_WRITE_REG(hw, IXGBE_FCBUFF, fcbuff);
275 IXGBE_WRITE_REG(hw, IXGBE_FCDMARW, fcdmarw);
276 /* program filter context */
277 IXGBE_WRITE_REG(hw, IXGBE_FCPARAM, 0);
278 IXGBE_WRITE_REG(hw, IXGBE_FCFLT, IXGBE_FCFLT_VALID);
279 IXGBE_WRITE_REG(hw, IXGBE_FCFLTRW, fcfltrw);
280 spin_unlock_bh(&fcoe->lock);
282 return 1;
284 out_noddp_free:
285 pci_pool_free(fcoe->pool, ddp->udl, ddp->udp);
286 ixgbe_fcoe_clear_ddp(ddp);
288 out_noddp_unmap:
289 pci_unmap_sg(adapter->pdev, sgl, sgc, DMA_FROM_DEVICE);
290 return 0;
294 * ixgbe_fcoe_ddp - check ddp status and mark it done
295 * @adapter: ixgbe adapter
296 * @rx_desc: advanced rx descriptor
297 * @skb: the skb holding the received data
299 * This checks ddp status.
301 * Returns : < 0 indicates an error or not a FCiE ddp, 0 indicates
302 * not passing the skb to ULD, > 0 indicates is the length of data
303 * being ddped.
305 int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
306 union ixgbe_adv_rx_desc *rx_desc,
307 struct sk_buff *skb)
309 u16 xid;
310 u32 fctl;
311 u32 sterr, fceofe, fcerr, fcstat;
312 int rc = -EINVAL;
313 struct ixgbe_fcoe *fcoe;
314 struct ixgbe_fcoe_ddp *ddp;
315 struct fc_frame_header *fh;
317 if (!ixgbe_rx_is_fcoe(rx_desc))
318 goto ddp_out;
320 sterr = le32_to_cpu(rx_desc->wb.upper.status_error);
321 fcerr = (sterr & IXGBE_RXDADV_ERR_FCERR);
322 fceofe = (sterr & IXGBE_RXDADV_ERR_FCEOFE);
323 if (fcerr == IXGBE_FCERR_BADCRC)
324 skb_checksum_none_assert(skb);
325 else
326 skb->ip_summed = CHECKSUM_UNNECESSARY;
328 if (eth_hdr(skb)->h_proto == htons(ETH_P_8021Q))
329 fh = (struct fc_frame_header *)(skb->data +
330 sizeof(struct vlan_hdr) + sizeof(struct fcoe_hdr));
331 else
332 fh = (struct fc_frame_header *)(skb->data +
333 sizeof(struct fcoe_hdr));
334 fctl = ntoh24(fh->fh_f_ctl);
335 if (fctl & FC_FC_EX_CTX)
336 xid = be16_to_cpu(fh->fh_ox_id);
337 else
338 xid = be16_to_cpu(fh->fh_rx_id);
340 if (xid >= IXGBE_FCOE_DDP_MAX)
341 goto ddp_out;
343 fcoe = &adapter->fcoe;
344 ddp = &fcoe->ddp[xid];
345 if (!ddp->udl)
346 goto ddp_out;
348 ddp->err = (fcerr | fceofe);
349 if (ddp->err)
350 goto ddp_out;
352 fcstat = (sterr & IXGBE_RXDADV_STAT_FCSTAT);
353 if (fcstat) {
354 /* update length of DDPed data */
355 ddp->len = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
356 /* unmap the sg list when FCP_RSP is received */
357 if (fcstat == IXGBE_RXDADV_STAT_FCSTAT_FCPRSP) {
358 pci_unmap_sg(adapter->pdev, ddp->sgl,
359 ddp->sgc, DMA_FROM_DEVICE);
360 ddp->sgl = NULL;
361 ddp->sgc = 0;
363 /* return 0 to bypass going to ULD for DDPed data */
364 if (fcstat == IXGBE_RXDADV_STAT_FCSTAT_DDP)
365 rc = 0;
366 else if (ddp->len)
367 rc = ddp->len;
370 ddp_out:
371 return rc;
375 * ixgbe_fso - ixgbe FCoE Sequence Offload (FSO)
376 * @adapter: ixgbe adapter
377 * @tx_ring: tx desc ring
378 * @skb: associated skb
379 * @tx_flags: tx flags
380 * @hdr_len: hdr_len to be returned
382 * This sets up large send offload for FCoE
384 * Returns : 0 indicates no FSO, > 0 for FSO, < 0 for error
386 int ixgbe_fso(struct ixgbe_adapter *adapter,
387 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
388 u32 tx_flags, u8 *hdr_len)
390 u8 sof, eof;
391 u32 vlan_macip_lens;
392 u32 fcoe_sof_eof;
393 u32 type_tucmd;
394 u32 mss_l4len_idx;
395 int mss = 0;
396 unsigned int i;
397 struct ixgbe_tx_buffer *tx_buffer_info;
398 struct ixgbe_adv_tx_context_desc *context_desc;
399 struct fc_frame_header *fh;
401 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_type != SKB_GSO_FCOE)) {
402 e_err(drv, "Wrong gso type %d:expecting SKB_GSO_FCOE\n",
403 skb_shinfo(skb)->gso_type);
404 return -EINVAL;
407 /* resets the header to point fcoe/fc */
408 skb_set_network_header(skb, skb->mac_len);
409 skb_set_transport_header(skb, skb->mac_len +
410 sizeof(struct fcoe_hdr));
412 /* sets up SOF and ORIS */
413 fcoe_sof_eof = 0;
414 sof = ((struct fcoe_hdr *)skb_network_header(skb))->fcoe_sof;
415 switch (sof) {
416 case FC_SOF_I2:
417 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_ORIS;
418 break;
419 case FC_SOF_I3:
420 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_SOF;
421 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_ORIS;
422 break;
423 case FC_SOF_N2:
424 break;
425 case FC_SOF_N3:
426 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_SOF;
427 break;
428 default:
429 e_warn(drv, "unknown sof = 0x%x\n", sof);
430 return -EINVAL;
433 /* the first byte of the last dword is EOF */
434 skb_copy_bits(skb, skb->len - 4, &eof, 1);
435 /* sets up EOF and ORIE */
436 switch (eof) {
437 case FC_EOF_N:
438 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_N;
439 break;
440 case FC_EOF_T:
441 /* lso needs ORIE */
442 if (skb_is_gso(skb)) {
443 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_N;
444 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_ORIE;
445 } else {
446 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_T;
448 break;
449 case FC_EOF_NI:
450 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_NI;
451 break;
452 case FC_EOF_A:
453 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_A;
454 break;
455 default:
456 e_warn(drv, "unknown eof = 0x%x\n", eof);
457 return -EINVAL;
460 /* sets up PARINC indicating data offset */
461 fh = (struct fc_frame_header *)skb_transport_header(skb);
462 if (fh->fh_f_ctl[2] & FC_FC_REL_OFF)
463 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_PARINC;
465 /* hdr_len includes fc_hdr if FCoE lso is enabled */
466 *hdr_len = sizeof(struct fcoe_crc_eof);
467 if (skb_is_gso(skb))
468 *hdr_len += (skb_transport_offset(skb) +
469 sizeof(struct fc_frame_header));
470 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
471 vlan_macip_lens = (skb_transport_offset(skb) +
472 sizeof(struct fc_frame_header));
473 vlan_macip_lens |= ((skb_transport_offset(skb) - 4)
474 << IXGBE_ADVTXD_MACLEN_SHIFT);
475 vlan_macip_lens |= (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
477 /* type_tycmd and mss: set TUCMD.FCoE to enable offload */
478 type_tucmd = IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT |
479 IXGBE_ADVTXT_TUCMD_FCOE;
480 if (skb_is_gso(skb))
481 mss = skb_shinfo(skb)->gso_size;
482 /* mss_l4len_id: use 1 for FSO as TSO, no need for L4LEN */
483 mss_l4len_idx = (mss << IXGBE_ADVTXD_MSS_SHIFT) |
484 (1 << IXGBE_ADVTXD_IDX_SHIFT);
486 /* write context desc */
487 i = tx_ring->next_to_use;
488 context_desc = IXGBE_TX_CTXTDESC_ADV(tx_ring, i);
489 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
490 context_desc->seqnum_seed = cpu_to_le32(fcoe_sof_eof);
491 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
492 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
494 tx_buffer_info = &tx_ring->tx_buffer_info[i];
495 tx_buffer_info->time_stamp = jiffies;
496 tx_buffer_info->next_to_watch = i;
498 i++;
499 if (i == tx_ring->count)
500 i = 0;
501 tx_ring->next_to_use = i;
503 return skb_is_gso(skb);
507 * ixgbe_configure_fcoe - configures registers for fcoe at start
508 * @adapter: ptr to ixgbe adapter
510 * This sets up FCoE related registers
512 * Returns : none
514 void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter)
516 int i, fcoe_q, fcoe_i;
517 struct ixgbe_hw *hw = &adapter->hw;
518 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
519 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];
520 #ifdef CONFIG_IXGBE_DCB
521 u8 tc;
522 u32 up2tc;
523 #endif
525 /* create the pool for ddp if not created yet */
526 if (!fcoe->pool) {
527 /* allocate ddp pool */
528 fcoe->pool = pci_pool_create("ixgbe_fcoe_ddp",
529 adapter->pdev, IXGBE_FCPTR_MAX,
530 IXGBE_FCPTR_ALIGN, PAGE_SIZE);
531 if (!fcoe->pool)
532 e_err(drv, "failed to allocated FCoE DDP pool\n");
534 spin_lock_init(&fcoe->lock);
537 /* Enable L2 eth type filter for FCoE */
538 IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FCOE),
539 (ETH_P_FCOE | IXGBE_ETQF_FCOE | IXGBE_ETQF_FILTER_EN));
540 /* Enable L2 eth type filter for FIP */
541 IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FIP),
542 (ETH_P_FIP | IXGBE_ETQF_FILTER_EN));
543 if (adapter->ring_feature[RING_F_FCOE].indices) {
544 /* Use multiple rx queues for FCoE by redirection table */
545 for (i = 0; i < IXGBE_FCRETA_SIZE; i++) {
546 fcoe_i = f->mask + i % f->indices;
547 fcoe_i &= IXGBE_FCRETA_ENTRY_MASK;
548 fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
549 IXGBE_WRITE_REG(hw, IXGBE_FCRETA(i), fcoe_q);
551 IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, IXGBE_FCRECTL_ENA);
552 IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE), 0);
553 } else {
554 /* Use single rx queue for FCoE */
555 fcoe_i = f->mask;
556 fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
557 IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, 0);
558 IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE),
559 IXGBE_ETQS_QUEUE_EN |
560 (fcoe_q << IXGBE_ETQS_RX_QUEUE_SHIFT));
562 /* send FIP frames to the first FCoE queue */
563 fcoe_i = f->mask;
564 fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
565 IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FIP),
566 IXGBE_ETQS_QUEUE_EN |
567 (fcoe_q << IXGBE_ETQS_RX_QUEUE_SHIFT));
569 IXGBE_WRITE_REG(hw, IXGBE_FCRXCTRL,
570 IXGBE_FCRXCTRL_FCOELLI |
571 IXGBE_FCRXCTRL_FCCRCBO |
572 (FC_FCOE_VER << IXGBE_FCRXCTRL_FCOEVER_SHIFT));
573 #ifdef CONFIG_IXGBE_DCB
574 up2tc = IXGBE_READ_REG(&adapter->hw, IXGBE_RTTUP2TC);
575 for (i = 0; i < MAX_USER_PRIORITY; i++) {
576 tc = (u8)(up2tc >> (i * IXGBE_RTTUP2TC_UP_SHIFT));
577 tc &= (MAX_TRAFFIC_CLASS - 1);
578 if (fcoe->tc == tc) {
579 fcoe->up = i;
580 break;
583 #endif
587 * ixgbe_cleanup_fcoe - release all fcoe ddp context resources
588 * @adapter : ixgbe adapter
590 * Cleans up outstanding ddp context resources
592 * Returns : none
594 void ixgbe_cleanup_fcoe(struct ixgbe_adapter *adapter)
596 int i;
597 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
599 /* release ddp resource */
600 if (fcoe->pool) {
601 for (i = 0; i < IXGBE_FCOE_DDP_MAX; i++)
602 ixgbe_fcoe_ddp_put(adapter->netdev, i);
603 pci_pool_destroy(fcoe->pool);
604 fcoe->pool = NULL;
609 * ixgbe_fcoe_enable - turn on FCoE offload feature
610 * @netdev: the corresponding netdev
612 * Turns on FCoE offload feature in 82599.
614 * Returns : 0 indicates success or -EINVAL on failure
616 int ixgbe_fcoe_enable(struct net_device *netdev)
618 int rc = -EINVAL;
619 struct ixgbe_adapter *adapter = netdev_priv(netdev);
620 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
623 if (!(adapter->flags & IXGBE_FLAG_FCOE_CAPABLE))
624 goto out_enable;
626 atomic_inc(&fcoe->refcnt);
627 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
628 goto out_enable;
630 e_info(drv, "Enabling FCoE offload features.\n");
631 if (netif_running(netdev))
632 netdev->netdev_ops->ndo_stop(netdev);
634 ixgbe_clear_interrupt_scheme(adapter);
636 adapter->flags |= IXGBE_FLAG_FCOE_ENABLED;
637 adapter->ring_feature[RING_F_FCOE].indices = IXGBE_FCRETA_SIZE;
638 netdev->features |= NETIF_F_FCOE_CRC;
639 netdev->features |= NETIF_F_FSO;
640 netdev->features |= NETIF_F_FCOE_MTU;
641 netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX - 1;
643 ixgbe_init_interrupt_scheme(adapter);
644 netdev_features_change(netdev);
646 if (netif_running(netdev))
647 netdev->netdev_ops->ndo_open(netdev);
648 rc = 0;
650 out_enable:
651 return rc;
655 * ixgbe_fcoe_disable - turn off FCoE offload feature
656 * @netdev: the corresponding netdev
658 * Turns off FCoE offload feature in 82599.
660 * Returns : 0 indicates success or -EINVAL on failure
662 int ixgbe_fcoe_disable(struct net_device *netdev)
664 int rc = -EINVAL;
665 struct ixgbe_adapter *adapter = netdev_priv(netdev);
666 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
668 if (!(adapter->flags & IXGBE_FLAG_FCOE_CAPABLE))
669 goto out_disable;
671 if (!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
672 goto out_disable;
674 if (!atomic_dec_and_test(&fcoe->refcnt))
675 goto out_disable;
677 e_info(drv, "Disabling FCoE offload features.\n");
678 netdev->features &= ~NETIF_F_FCOE_CRC;
679 netdev->features &= ~NETIF_F_FSO;
680 netdev->features &= ~NETIF_F_FCOE_MTU;
681 netdev->fcoe_ddp_xid = 0;
682 netdev_features_change(netdev);
684 if (netif_running(netdev))
685 netdev->netdev_ops->ndo_stop(netdev);
687 ixgbe_clear_interrupt_scheme(adapter);
688 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
689 adapter->ring_feature[RING_F_FCOE].indices = 0;
690 ixgbe_cleanup_fcoe(adapter);
691 ixgbe_init_interrupt_scheme(adapter);
693 if (netif_running(netdev))
694 netdev->netdev_ops->ndo_open(netdev);
695 rc = 0;
697 out_disable:
698 return rc;
701 #ifdef CONFIG_IXGBE_DCB
703 * ixgbe_fcoe_getapp - retrieves current user priority bitmap for FCoE
704 * @adapter : ixgbe adapter
706 * Finds out the corresponding user priority bitmap from the current
707 * traffic class that FCoE belongs to. Returns 0 as the invalid user
708 * priority bitmap to indicate an error.
710 * Returns : 802.1p user priority bitmap for FCoE
712 u8 ixgbe_fcoe_getapp(struct ixgbe_adapter *adapter)
714 return 1 << adapter->fcoe.up;
718 * ixgbe_fcoe_setapp - sets the user priority bitmap for FCoE
719 * @adapter : ixgbe adapter
720 * @up : 802.1p user priority bitmap
722 * Finds out the traffic class from the input user priority
723 * bitmap for FCoE.
725 * Returns : 0 on success otherwise returns 1 on error
727 u8 ixgbe_fcoe_setapp(struct ixgbe_adapter *adapter, u8 up)
729 int i;
730 u32 up2tc;
732 /* valid user priority bitmap must not be 0 */
733 if (up) {
734 /* from user priority to the corresponding traffic class */
735 up2tc = IXGBE_READ_REG(&adapter->hw, IXGBE_RTTUP2TC);
736 for (i = 0; i < MAX_USER_PRIORITY; i++) {
737 if (up & (1 << i)) {
738 up2tc >>= (i * IXGBE_RTTUP2TC_UP_SHIFT);
739 up2tc &= (MAX_TRAFFIC_CLASS - 1);
740 adapter->fcoe.tc = (u8)up2tc;
741 adapter->fcoe.up = i;
742 return 0;
747 return 1;
749 #endif /* CONFIG_IXGBE_DCB */
752 * ixgbe_fcoe_get_wwn - get world wide name for the node or the port
753 * @netdev : ixgbe adapter
754 * @wwn : the world wide name
755 * @type: the type of world wide name
757 * Returns the node or port world wide name if both the prefix and the san
758 * mac address are valid, then the wwn is formed based on the NAA-2 for
759 * IEEE Extended name identifier (ref. to T10 FC-LS Spec., Sec. 15.3).
761 * Returns : 0 on success
763 int ixgbe_fcoe_get_wwn(struct net_device *netdev, u64 *wwn, int type)
765 int rc = -EINVAL;
766 u16 prefix = 0xffff;
767 struct ixgbe_adapter *adapter = netdev_priv(netdev);
768 struct ixgbe_mac_info *mac = &adapter->hw.mac;
770 switch (type) {
771 case NETDEV_FCOE_WWNN:
772 prefix = mac->wwnn_prefix;
773 break;
774 case NETDEV_FCOE_WWPN:
775 prefix = mac->wwpn_prefix;
776 break;
777 default:
778 break;
781 if ((prefix != 0xffff) &&
782 is_valid_ether_addr(mac->san_addr)) {
783 *wwn = ((u64) prefix << 48) |
784 ((u64) mac->san_addr[0] << 40) |
785 ((u64) mac->san_addr[1] << 32) |
786 ((u64) mac->san_addr[2] << 24) |
787 ((u64) mac->san_addr[3] << 16) |
788 ((u64) mac->san_addr[4] << 8) |
789 ((u64) mac->san_addr[5]);
790 rc = 0;
792 return rc;