proc: use seq_puts()/seq_putc() where possible
[linux-2.6/next.git] / drivers / net / wireless / ath / ath9k / main.c
blobf90a6ca94a7682705d0180bd74119873d6fc2416
1 /*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include "ath9k.h"
19 #include "btcoex.h"
21 static void ath_update_txpow(struct ath_softc *sc)
23 struct ath_hw *ah = sc->sc_ah;
25 if (sc->curtxpow != sc->config.txpowlimit) {
26 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
27 /* read back in case value is clamped */
28 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
32 static u8 parse_mpdudensity(u8 mpdudensity)
35 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36 * 0 for no restriction
37 * 1 for 1/4 us
38 * 2 for 1/2 us
39 * 3 for 1 us
40 * 4 for 2 us
41 * 5 for 4 us
42 * 6 for 8 us
43 * 7 for 16 us
45 switch (mpdudensity) {
46 case 0:
47 return 0;
48 case 1:
49 case 2:
50 case 3:
51 /* Our lower layer calculations limit our precision to
52 1 microsecond */
53 return 1;
54 case 4:
55 return 2;
56 case 5:
57 return 4;
58 case 6:
59 return 8;
60 case 7:
61 return 16;
62 default:
63 return 0;
67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68 struct ieee80211_hw *hw)
70 struct ieee80211_channel *curchan = hw->conf.channel;
71 struct ath9k_channel *channel;
72 u8 chan_idx;
74 chan_idx = curchan->hw_value;
75 channel = &sc->sc_ah->channels[chan_idx];
76 ath9k_update_ichannel(sc, hw, channel);
77 return channel;
80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
82 unsigned long flags;
83 bool ret;
85 spin_lock_irqsave(&sc->sc_pm_lock, flags);
86 ret = ath9k_hw_setpower(sc->sc_ah, mode);
87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
89 return ret;
92 void ath9k_ps_wakeup(struct ath_softc *sc)
94 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
95 unsigned long flags;
96 enum ath9k_power_mode power_mode;
98 spin_lock_irqsave(&sc->sc_pm_lock, flags);
99 if (++sc->ps_usecount != 1)
100 goto unlock;
102 power_mode = sc->sc_ah->power_mode;
103 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
106 * While the hardware is asleep, the cycle counters contain no
107 * useful data. Better clear them now so that they don't mess up
108 * survey data results.
110 if (power_mode != ATH9K_PM_AWAKE) {
111 spin_lock(&common->cc_lock);
112 ath_hw_cycle_counters_update(common);
113 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
114 spin_unlock(&common->cc_lock);
117 unlock:
118 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
121 void ath9k_ps_restore(struct ath_softc *sc)
123 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
124 unsigned long flags;
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (--sc->ps_usecount != 0)
128 goto unlock;
130 spin_lock(&common->cc_lock);
131 ath_hw_cycle_counters_update(common);
132 spin_unlock(&common->cc_lock);
134 if (sc->ps_idle)
135 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
136 else if (sc->ps_enabled &&
137 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
138 PS_WAIT_FOR_CAB |
139 PS_WAIT_FOR_PSPOLL_DATA |
140 PS_WAIT_FOR_TX_ACK)))
141 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
143 unlock:
144 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
147 static void ath_start_ani(struct ath_common *common)
149 struct ath_hw *ah = common->ah;
150 unsigned long timestamp = jiffies_to_msecs(jiffies);
151 struct ath_softc *sc = (struct ath_softc *) common->priv;
153 if (!(sc->sc_flags & SC_OP_ANI_RUN))
154 return;
156 if (sc->sc_flags & SC_OP_OFFCHANNEL)
157 return;
159 common->ani.longcal_timer = timestamp;
160 common->ani.shortcal_timer = timestamp;
161 common->ani.checkani_timer = timestamp;
163 mod_timer(&common->ani.timer,
164 jiffies +
165 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
170 struct ath_hw *ah = sc->sc_ah;
171 struct ath9k_channel *chan = &ah->channels[channel];
172 struct survey_info *survey = &sc->survey[channel];
174 if (chan->noisefloor) {
175 survey->filled |= SURVEY_INFO_NOISE_DBM;
176 survey->noise = chan->noisefloor;
180 static void ath_update_survey_stats(struct ath_softc *sc)
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
189 if (!ah->curchan)
190 return;
192 if (ah->power_mode == ATH9K_PM_AWAKE)
193 ath_hw_cycle_counters_update(common);
195 if (cc->cycles > 0) {
196 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
197 SURVEY_INFO_CHANNEL_TIME_BUSY |
198 SURVEY_INFO_CHANNEL_TIME_RX |
199 SURVEY_INFO_CHANNEL_TIME_TX;
200 survey->channel_time += cc->cycles / div;
201 survey->channel_time_busy += cc->rx_busy / div;
202 survey->channel_time_rx += cc->rx_frame / div;
203 survey->channel_time_tx += cc->tx_frame / div;
205 memset(cc, 0, sizeof(*cc));
207 ath_update_survey_nf(sc, pos);
211 * Set/change channels. If the channel is really being changed, it's done
212 * by reseting the chip. To accomplish this we must first cleanup any pending
213 * DMA, then restart stuff.
215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
216 struct ath9k_channel *hchan)
218 struct ath_wiphy *aphy = hw->priv;
219 struct ath_hw *ah = sc->sc_ah;
220 struct ath_common *common = ath9k_hw_common(ah);
221 struct ieee80211_conf *conf = &common->hw->conf;
222 bool fastcc = true, stopped;
223 struct ieee80211_channel *channel = hw->conf.channel;
224 struct ath9k_hw_cal_data *caldata = NULL;
225 int r;
227 if (sc->sc_flags & SC_OP_INVALID)
228 return -EIO;
230 del_timer_sync(&common->ani.timer);
231 cancel_work_sync(&sc->paprd_work);
232 cancel_work_sync(&sc->hw_check_work);
233 cancel_delayed_work_sync(&sc->tx_complete_work);
235 ath9k_ps_wakeup(sc);
237 spin_lock_bh(&sc->sc_pcu_lock);
240 * This is only performed if the channel settings have
241 * actually changed.
243 * To switch channels clear any pending DMA operations;
244 * wait long enough for the RX fifo to drain, reset the
245 * hardware at the new frequency, and then re-enable
246 * the relevant bits of the h/w.
248 ath9k_hw_disable_interrupts(ah);
249 stopped = ath_drain_all_txq(sc, false);
251 if (!ath_stoprecv(sc))
252 stopped = false;
254 /* XXX: do not flush receive queue here. We don't want
255 * to flush data frames already in queue because of
256 * changing channel. */
258 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
259 fastcc = false;
261 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
262 caldata = &aphy->caldata;
264 ath_dbg(common, ATH_DBG_CONFIG,
265 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
266 sc->sc_ah->curchan->channel,
267 channel->center_freq, conf_is_ht40(conf),
268 fastcc);
270 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
271 if (r) {
272 ath_err(common,
273 "Unable to reset channel (%u MHz), reset status %d\n",
274 channel->center_freq, r);
275 goto ps_restore;
278 if (ath_startrecv(sc) != 0) {
279 ath_err(common, "Unable to restart recv logic\n");
280 r = -EIO;
281 goto ps_restore;
284 ath_update_txpow(sc);
285 ath9k_hw_set_interrupts(ah, ah->imask);
287 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
288 if (sc->sc_flags & SC_OP_BEACONS)
289 ath_beacon_config(sc, NULL);
290 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
291 ath_start_ani(common);
294 ps_restore:
295 spin_unlock_bh(&sc->sc_pcu_lock);
297 ath9k_ps_restore(sc);
298 return r;
301 static void ath_paprd_activate(struct ath_softc *sc)
303 struct ath_hw *ah = sc->sc_ah;
304 struct ath9k_hw_cal_data *caldata = ah->caldata;
305 struct ath_common *common = ath9k_hw_common(ah);
306 int chain;
308 if (!caldata || !caldata->paprd_done)
309 return;
311 ath9k_ps_wakeup(sc);
312 ar9003_paprd_enable(ah, false);
313 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
314 if (!(common->tx_chainmask & BIT(chain)))
315 continue;
317 ar9003_paprd_populate_single_table(ah, caldata, chain);
320 ar9003_paprd_enable(ah, true);
321 ath9k_ps_restore(sc);
324 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
326 struct ieee80211_hw *hw = sc->hw;
327 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
328 struct ath_tx_control txctl;
329 int time_left;
331 memset(&txctl, 0, sizeof(txctl));
332 txctl.txq = sc->tx.txq_map[WME_AC_BE];
334 memset(tx_info, 0, sizeof(*tx_info));
335 tx_info->band = hw->conf.channel->band;
336 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
337 tx_info->control.rates[0].idx = 0;
338 tx_info->control.rates[0].count = 1;
339 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
340 tx_info->control.rates[1].idx = -1;
342 init_completion(&sc->paprd_complete);
343 sc->paprd_pending = true;
344 txctl.paprd = BIT(chain);
345 if (ath_tx_start(hw, skb, &txctl) != 0)
346 return false;
348 time_left = wait_for_completion_timeout(&sc->paprd_complete,
349 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
350 sc->paprd_pending = false;
352 if (!time_left)
353 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
354 "Timeout waiting for paprd training on TX chain %d\n",
355 chain);
357 return !!time_left;
360 void ath_paprd_calibrate(struct work_struct *work)
362 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
363 struct ieee80211_hw *hw = sc->hw;
364 struct ath_hw *ah = sc->sc_ah;
365 struct ieee80211_hdr *hdr;
366 struct sk_buff *skb = NULL;
367 struct ath9k_hw_cal_data *caldata = ah->caldata;
368 struct ath_common *common = ath9k_hw_common(ah);
369 int ftype;
370 int chain_ok = 0;
371 int chain;
372 int len = 1800;
374 if (!caldata)
375 return;
377 if (ar9003_paprd_init_table(ah) < 0)
378 return;
380 skb = alloc_skb(len, GFP_KERNEL);
381 if (!skb)
382 return;
384 skb_put(skb, len);
385 memset(skb->data, 0, len);
386 hdr = (struct ieee80211_hdr *)skb->data;
387 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
388 hdr->frame_control = cpu_to_le16(ftype);
389 hdr->duration_id = cpu_to_le16(10);
390 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
391 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
392 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
394 ath9k_ps_wakeup(sc);
395 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
396 if (!(common->tx_chainmask & BIT(chain)))
397 continue;
399 chain_ok = 0;
401 ath_dbg(common, ATH_DBG_CALIBRATE,
402 "Sending PAPRD frame for thermal measurement "
403 "on chain %d\n", chain);
404 if (!ath_paprd_send_frame(sc, skb, chain))
405 goto fail_paprd;
407 ar9003_paprd_setup_gain_table(ah, chain);
409 ath_dbg(common, ATH_DBG_CALIBRATE,
410 "Sending PAPRD training frame on chain %d\n", chain);
411 if (!ath_paprd_send_frame(sc, skb, chain))
412 goto fail_paprd;
414 if (!ar9003_paprd_is_done(ah))
415 break;
417 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
418 break;
420 chain_ok = 1;
422 kfree_skb(skb);
424 if (chain_ok) {
425 caldata->paprd_done = true;
426 ath_paprd_activate(sc);
429 fail_paprd:
430 ath9k_ps_restore(sc);
434 * This routine performs the periodic noise floor calibration function
435 * that is used to adjust and optimize the chip performance. This
436 * takes environmental changes (location, temperature) into account.
437 * When the task is complete, it reschedules itself depending on the
438 * appropriate interval that was calculated.
440 void ath_ani_calibrate(unsigned long data)
442 struct ath_softc *sc = (struct ath_softc *)data;
443 struct ath_hw *ah = sc->sc_ah;
444 struct ath_common *common = ath9k_hw_common(ah);
445 bool longcal = false;
446 bool shortcal = false;
447 bool aniflag = false;
448 unsigned int timestamp = jiffies_to_msecs(jiffies);
449 u32 cal_interval, short_cal_interval, long_cal_interval;
450 unsigned long flags;
452 if (ah->caldata && ah->caldata->nfcal_interference)
453 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
454 else
455 long_cal_interval = ATH_LONG_CALINTERVAL;
457 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
458 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
460 /* Only calibrate if awake */
461 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
462 goto set_timer;
464 ath9k_ps_wakeup(sc);
466 /* Long calibration runs independently of short calibration. */
467 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
468 longcal = true;
469 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
470 common->ani.longcal_timer = timestamp;
473 /* Short calibration applies only while caldone is false */
474 if (!common->ani.caldone) {
475 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
476 shortcal = true;
477 ath_dbg(common, ATH_DBG_ANI,
478 "shortcal @%lu\n", jiffies);
479 common->ani.shortcal_timer = timestamp;
480 common->ani.resetcal_timer = timestamp;
482 } else {
483 if ((timestamp - common->ani.resetcal_timer) >=
484 ATH_RESTART_CALINTERVAL) {
485 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
486 if (common->ani.caldone)
487 common->ani.resetcal_timer = timestamp;
491 /* Verify whether we must check ANI */
492 if ((timestamp - common->ani.checkani_timer) >=
493 ah->config.ani_poll_interval) {
494 aniflag = true;
495 common->ani.checkani_timer = timestamp;
498 /* Skip all processing if there's nothing to do. */
499 if (longcal || shortcal || aniflag) {
500 /* Call ANI routine if necessary */
501 if (aniflag) {
502 spin_lock_irqsave(&common->cc_lock, flags);
503 ath9k_hw_ani_monitor(ah, ah->curchan);
504 ath_update_survey_stats(sc);
505 spin_unlock_irqrestore(&common->cc_lock, flags);
508 /* Perform calibration if necessary */
509 if (longcal || shortcal) {
510 common->ani.caldone =
511 ath9k_hw_calibrate(ah,
512 ah->curchan,
513 common->rx_chainmask,
514 longcal);
518 ath9k_ps_restore(sc);
520 set_timer:
522 * Set timer interval based on previous results.
523 * The interval must be the shortest necessary to satisfy ANI,
524 * short calibration and long calibration.
526 cal_interval = ATH_LONG_CALINTERVAL;
527 if (sc->sc_ah->config.enable_ani)
528 cal_interval = min(cal_interval,
529 (u32)ah->config.ani_poll_interval);
530 if (!common->ani.caldone)
531 cal_interval = min(cal_interval, (u32)short_cal_interval);
533 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
534 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
535 if (!ah->caldata->paprd_done)
536 ieee80211_queue_work(sc->hw, &sc->paprd_work);
537 else if (!ah->paprd_table_write_done)
538 ath_paprd_activate(sc);
542 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
544 struct ath_node *an;
545 struct ath_hw *ah = sc->sc_ah;
546 an = (struct ath_node *)sta->drv_priv;
548 if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
549 sc->sc_flags |= SC_OP_ENABLE_APM;
551 if (sc->sc_flags & SC_OP_TXAGGR) {
552 ath_tx_node_init(sc, an);
553 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
554 sta->ht_cap.ampdu_factor);
555 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
559 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
561 struct ath_node *an = (struct ath_node *)sta->drv_priv;
563 if (sc->sc_flags & SC_OP_TXAGGR)
564 ath_tx_node_cleanup(sc, an);
567 void ath_hw_check(struct work_struct *work)
569 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
570 int i;
572 ath9k_ps_wakeup(sc);
574 for (i = 0; i < 3; i++) {
575 if (ath9k_hw_check_alive(sc->sc_ah))
576 goto out;
578 msleep(1);
580 ath_reset(sc, true);
582 out:
583 ath9k_ps_restore(sc);
586 void ath9k_tasklet(unsigned long data)
588 struct ath_softc *sc = (struct ath_softc *)data;
589 struct ath_hw *ah = sc->sc_ah;
590 struct ath_common *common = ath9k_hw_common(ah);
592 u32 status = sc->intrstatus;
593 u32 rxmask;
595 ath9k_ps_wakeup(sc);
597 if (status & ATH9K_INT_FATAL) {
598 ath_reset(sc, true);
599 ath9k_ps_restore(sc);
600 return;
603 spin_lock(&sc->sc_pcu_lock);
605 if (!ath9k_hw_check_alive(ah))
606 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
608 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
609 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
610 ATH9K_INT_RXORN);
611 else
612 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
614 if (status & rxmask) {
615 /* Check for high priority Rx first */
616 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
617 (status & ATH9K_INT_RXHP))
618 ath_rx_tasklet(sc, 0, true);
620 ath_rx_tasklet(sc, 0, false);
623 if (status & ATH9K_INT_TX) {
624 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
625 ath_tx_edma_tasklet(sc);
626 else
627 ath_tx_tasklet(sc);
630 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
632 * TSF sync does not look correct; remain awake to sync with
633 * the next Beacon.
635 ath_dbg(common, ATH_DBG_PS,
636 "TSFOOR - Sync with next Beacon\n");
637 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
640 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
641 if (status & ATH9K_INT_GENTIMER)
642 ath_gen_timer_isr(sc->sc_ah);
644 /* re-enable hardware interrupt */
645 ath9k_hw_enable_interrupts(ah);
647 spin_unlock(&sc->sc_pcu_lock);
648 ath9k_ps_restore(sc);
651 irqreturn_t ath_isr(int irq, void *dev)
653 #define SCHED_INTR ( \
654 ATH9K_INT_FATAL | \
655 ATH9K_INT_RXORN | \
656 ATH9K_INT_RXEOL | \
657 ATH9K_INT_RX | \
658 ATH9K_INT_RXLP | \
659 ATH9K_INT_RXHP | \
660 ATH9K_INT_TX | \
661 ATH9K_INT_BMISS | \
662 ATH9K_INT_CST | \
663 ATH9K_INT_TSFOOR | \
664 ATH9K_INT_GENTIMER)
666 struct ath_softc *sc = dev;
667 struct ath_hw *ah = sc->sc_ah;
668 struct ath_common *common = ath9k_hw_common(ah);
669 enum ath9k_int status;
670 bool sched = false;
673 * The hardware is not ready/present, don't
674 * touch anything. Note this can happen early
675 * on if the IRQ is shared.
677 if (sc->sc_flags & SC_OP_INVALID)
678 return IRQ_NONE;
681 /* shared irq, not for us */
683 if (!ath9k_hw_intrpend(ah))
684 return IRQ_NONE;
687 * Figure out the reason(s) for the interrupt. Note
688 * that the hal returns a pseudo-ISR that may include
689 * bits we haven't explicitly enabled so we mask the
690 * value to insure we only process bits we requested.
692 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
693 status &= ah->imask; /* discard unasked-for bits */
696 * If there are no status bits set, then this interrupt was not
697 * for me (should have been caught above).
699 if (!status)
700 return IRQ_NONE;
702 /* Cache the status */
703 sc->intrstatus = status;
705 if (status & SCHED_INTR)
706 sched = true;
709 * If a FATAL or RXORN interrupt is received, we have to reset the
710 * chip immediately.
712 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
713 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
714 goto chip_reset;
716 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
717 (status & ATH9K_INT_BB_WATCHDOG)) {
719 spin_lock(&common->cc_lock);
720 ath_hw_cycle_counters_update(common);
721 ar9003_hw_bb_watchdog_dbg_info(ah);
722 spin_unlock(&common->cc_lock);
724 goto chip_reset;
727 if (status & ATH9K_INT_SWBA)
728 tasklet_schedule(&sc->bcon_tasklet);
730 if (status & ATH9K_INT_TXURN)
731 ath9k_hw_updatetxtriglevel(ah, true);
733 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
734 if (status & ATH9K_INT_RXEOL) {
735 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
736 ath9k_hw_set_interrupts(ah, ah->imask);
740 if (status & ATH9K_INT_MIB) {
742 * Disable interrupts until we service the MIB
743 * interrupt; otherwise it will continue to
744 * fire.
746 ath9k_hw_disable_interrupts(ah);
748 * Let the hal handle the event. We assume
749 * it will clear whatever condition caused
750 * the interrupt.
752 spin_lock(&common->cc_lock);
753 ath9k_hw_proc_mib_event(ah);
754 spin_unlock(&common->cc_lock);
755 ath9k_hw_enable_interrupts(ah);
758 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
759 if (status & ATH9K_INT_TIM_TIMER) {
760 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
761 goto chip_reset;
762 /* Clear RxAbort bit so that we can
763 * receive frames */
764 ath9k_setpower(sc, ATH9K_PM_AWAKE);
765 ath9k_hw_setrxabort(sc->sc_ah, 0);
766 sc->ps_flags |= PS_WAIT_FOR_BEACON;
769 chip_reset:
771 ath_debug_stat_interrupt(sc, status);
773 if (sched) {
774 /* turn off every interrupt */
775 ath9k_hw_disable_interrupts(ah);
776 tasklet_schedule(&sc->intr_tq);
779 return IRQ_HANDLED;
781 #undef SCHED_INTR
784 static u32 ath_get_extchanmode(struct ath_softc *sc,
785 struct ieee80211_channel *chan,
786 enum nl80211_channel_type channel_type)
788 u32 chanmode = 0;
790 switch (chan->band) {
791 case IEEE80211_BAND_2GHZ:
792 switch(channel_type) {
793 case NL80211_CHAN_NO_HT:
794 case NL80211_CHAN_HT20:
795 chanmode = CHANNEL_G_HT20;
796 break;
797 case NL80211_CHAN_HT40PLUS:
798 chanmode = CHANNEL_G_HT40PLUS;
799 break;
800 case NL80211_CHAN_HT40MINUS:
801 chanmode = CHANNEL_G_HT40MINUS;
802 break;
804 break;
805 case IEEE80211_BAND_5GHZ:
806 switch(channel_type) {
807 case NL80211_CHAN_NO_HT:
808 case NL80211_CHAN_HT20:
809 chanmode = CHANNEL_A_HT20;
810 break;
811 case NL80211_CHAN_HT40PLUS:
812 chanmode = CHANNEL_A_HT40PLUS;
813 break;
814 case NL80211_CHAN_HT40MINUS:
815 chanmode = CHANNEL_A_HT40MINUS;
816 break;
818 break;
819 default:
820 break;
823 return chanmode;
826 static void ath9k_bss_assoc_info(struct ath_softc *sc,
827 struct ieee80211_hw *hw,
828 struct ieee80211_vif *vif,
829 struct ieee80211_bss_conf *bss_conf)
831 struct ath_wiphy *aphy = hw->priv;
832 struct ath_hw *ah = sc->sc_ah;
833 struct ath_common *common = ath9k_hw_common(ah);
835 if (bss_conf->assoc) {
836 ath_dbg(common, ATH_DBG_CONFIG,
837 "Bss Info ASSOC %d, bssid: %pM\n",
838 bss_conf->aid, common->curbssid);
840 /* New association, store aid */
841 common->curaid = bss_conf->aid;
842 ath9k_hw_write_associd(ah);
845 * Request a re-configuration of Beacon related timers
846 * on the receipt of the first Beacon frame (i.e.,
847 * after time sync with the AP).
849 sc->ps_flags |= PS_BEACON_SYNC;
851 /* Configure the beacon */
852 ath_beacon_config(sc, vif);
854 /* Reset rssi stats */
855 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
856 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
858 sc->sc_flags |= SC_OP_ANI_RUN;
859 ath_start_ani(common);
860 } else {
861 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
862 common->curaid = 0;
863 /* Stop ANI */
864 sc->sc_flags &= ~SC_OP_ANI_RUN;
865 del_timer_sync(&common->ani.timer);
869 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
871 struct ath_hw *ah = sc->sc_ah;
872 struct ath_common *common = ath9k_hw_common(ah);
873 struct ieee80211_channel *channel = hw->conf.channel;
874 int r;
876 ath9k_ps_wakeup(sc);
877 spin_lock_bh(&sc->sc_pcu_lock);
879 ath9k_hw_configpcipowersave(ah, 0, 0);
881 if (!ah->curchan)
882 ah->curchan = ath_get_curchannel(sc, sc->hw);
884 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
885 if (r) {
886 ath_err(common,
887 "Unable to reset channel (%u MHz), reset status %d\n",
888 channel->center_freq, r);
891 ath_update_txpow(sc);
892 if (ath_startrecv(sc) != 0) {
893 ath_err(common, "Unable to restart recv logic\n");
894 goto out;
896 if (sc->sc_flags & SC_OP_BEACONS)
897 ath_beacon_config(sc, NULL); /* restart beacons */
899 /* Re-Enable interrupts */
900 ath9k_hw_set_interrupts(ah, ah->imask);
902 /* Enable LED */
903 ath9k_hw_cfg_output(ah, ah->led_pin,
904 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
905 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
907 ieee80211_wake_queues(hw);
908 out:
909 spin_unlock_bh(&sc->sc_pcu_lock);
911 ath9k_ps_restore(sc);
914 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
916 struct ath_hw *ah = sc->sc_ah;
917 struct ieee80211_channel *channel = hw->conf.channel;
918 int r;
920 ath9k_ps_wakeup(sc);
921 spin_lock_bh(&sc->sc_pcu_lock);
923 ieee80211_stop_queues(hw);
926 * Keep the LED on when the radio is disabled
927 * during idle unassociated state.
929 if (!sc->ps_idle) {
930 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
931 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
934 /* Disable interrupts */
935 ath9k_hw_disable_interrupts(ah);
937 ath_drain_all_txq(sc, false); /* clear pending tx frames */
939 ath_stoprecv(sc); /* turn off frame recv */
940 ath_flushrecv(sc); /* flush recv queue */
942 if (!ah->curchan)
943 ah->curchan = ath_get_curchannel(sc, hw);
945 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
946 if (r) {
947 ath_err(ath9k_hw_common(sc->sc_ah),
948 "Unable to reset channel (%u MHz), reset status %d\n",
949 channel->center_freq, r);
952 ath9k_hw_phy_disable(ah);
954 ath9k_hw_configpcipowersave(ah, 1, 1);
956 spin_unlock_bh(&sc->sc_pcu_lock);
957 ath9k_ps_restore(sc);
959 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
962 int ath_reset(struct ath_softc *sc, bool retry_tx)
964 struct ath_hw *ah = sc->sc_ah;
965 struct ath_common *common = ath9k_hw_common(ah);
966 struct ieee80211_hw *hw = sc->hw;
967 int r;
969 /* Stop ANI */
970 del_timer_sync(&common->ani.timer);
972 spin_lock_bh(&sc->sc_pcu_lock);
974 ieee80211_stop_queues(hw);
976 ath9k_hw_disable_interrupts(ah);
977 ath_drain_all_txq(sc, retry_tx);
979 ath_stoprecv(sc);
980 ath_flushrecv(sc);
982 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
983 if (r)
984 ath_err(common,
985 "Unable to reset hardware; reset status %d\n", r);
987 if (ath_startrecv(sc) != 0)
988 ath_err(common, "Unable to start recv logic\n");
991 * We may be doing a reset in response to a request
992 * that changes the channel so update any state that
993 * might change as a result.
995 ath_update_txpow(sc);
997 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
998 ath_beacon_config(sc, NULL); /* restart beacons */
1000 ath9k_hw_set_interrupts(ah, ah->imask);
1002 if (retry_tx) {
1003 int i;
1004 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1005 if (ATH_TXQ_SETUP(sc, i)) {
1006 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1007 ath_txq_schedule(sc, &sc->tx.txq[i]);
1008 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1013 ieee80211_wake_queues(hw);
1014 spin_unlock_bh(&sc->sc_pcu_lock);
1016 /* Start ANI */
1017 ath_start_ani(common);
1019 return r;
1022 /* XXX: Remove me once we don't depend on ath9k_channel for all
1023 * this redundant data */
1024 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1025 struct ath9k_channel *ichan)
1027 struct ieee80211_channel *chan = hw->conf.channel;
1028 struct ieee80211_conf *conf = &hw->conf;
1030 ichan->channel = chan->center_freq;
1031 ichan->chan = chan;
1033 if (chan->band == IEEE80211_BAND_2GHZ) {
1034 ichan->chanmode = CHANNEL_G;
1035 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1036 } else {
1037 ichan->chanmode = CHANNEL_A;
1038 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1041 if (conf_is_ht(conf))
1042 ichan->chanmode = ath_get_extchanmode(sc, chan,
1043 conf->channel_type);
1046 /**********************/
1047 /* mac80211 callbacks */
1048 /**********************/
1050 static int ath9k_start(struct ieee80211_hw *hw)
1052 struct ath_wiphy *aphy = hw->priv;
1053 struct ath_softc *sc = aphy->sc;
1054 struct ath_hw *ah = sc->sc_ah;
1055 struct ath_common *common = ath9k_hw_common(ah);
1056 struct ieee80211_channel *curchan = hw->conf.channel;
1057 struct ath9k_channel *init_channel;
1058 int r;
1060 ath_dbg(common, ATH_DBG_CONFIG,
1061 "Starting driver with initial channel: %d MHz\n",
1062 curchan->center_freq);
1064 mutex_lock(&sc->mutex);
1066 if (ath9k_wiphy_started(sc)) {
1067 if (sc->chan_idx == curchan->hw_value) {
1069 * Already on the operational channel, the new wiphy
1070 * can be marked active.
1072 aphy->state = ATH_WIPHY_ACTIVE;
1073 ieee80211_wake_queues(hw);
1074 } else {
1076 * Another wiphy is on another channel, start the new
1077 * wiphy in paused state.
1079 aphy->state = ATH_WIPHY_PAUSED;
1080 ieee80211_stop_queues(hw);
1082 mutex_unlock(&sc->mutex);
1083 return 0;
1085 aphy->state = ATH_WIPHY_ACTIVE;
1087 /* setup initial channel */
1089 sc->chan_idx = curchan->hw_value;
1091 init_channel = ath_get_curchannel(sc, hw);
1093 /* Reset SERDES registers */
1094 ath9k_hw_configpcipowersave(ah, 0, 0);
1097 * The basic interface to setting the hardware in a good
1098 * state is ``reset''. On return the hardware is known to
1099 * be powered up and with interrupts disabled. This must
1100 * be followed by initialization of the appropriate bits
1101 * and then setup of the interrupt mask.
1103 spin_lock_bh(&sc->sc_pcu_lock);
1104 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1105 if (r) {
1106 ath_err(common,
1107 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1108 r, curchan->center_freq);
1109 spin_unlock_bh(&sc->sc_pcu_lock);
1110 goto mutex_unlock;
1114 * This is needed only to setup initial state
1115 * but it's best done after a reset.
1117 ath_update_txpow(sc);
1120 * Setup the hardware after reset:
1121 * The receive engine is set going.
1122 * Frame transmit is handled entirely
1123 * in the frame output path; there's nothing to do
1124 * here except setup the interrupt mask.
1126 if (ath_startrecv(sc) != 0) {
1127 ath_err(common, "Unable to start recv logic\n");
1128 r = -EIO;
1129 spin_unlock_bh(&sc->sc_pcu_lock);
1130 goto mutex_unlock;
1132 spin_unlock_bh(&sc->sc_pcu_lock);
1134 /* Setup our intr mask. */
1135 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1136 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1137 ATH9K_INT_GLOBAL;
1139 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1140 ah->imask |= ATH9K_INT_RXHP |
1141 ATH9K_INT_RXLP |
1142 ATH9K_INT_BB_WATCHDOG;
1143 else
1144 ah->imask |= ATH9K_INT_RX;
1146 ah->imask |= ATH9K_INT_GTT;
1148 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1149 ah->imask |= ATH9K_INT_CST;
1151 sc->sc_flags &= ~SC_OP_INVALID;
1152 sc->sc_ah->is_monitoring = false;
1154 /* Disable BMISS interrupt when we're not associated */
1155 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1156 ath9k_hw_set_interrupts(ah, ah->imask);
1158 ieee80211_wake_queues(hw);
1160 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1162 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1163 !ah->btcoex_hw.enabled) {
1164 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1165 AR_STOMP_LOW_WLAN_WGHT);
1166 ath9k_hw_btcoex_enable(ah);
1168 if (common->bus_ops->bt_coex_prep)
1169 common->bus_ops->bt_coex_prep(common);
1170 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1171 ath9k_btcoex_timer_resume(sc);
1174 /* User has the option to provide pm-qos value as a module
1175 * parameter rather than using the default value of
1176 * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
1178 pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
1180 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1181 common->bus_ops->extn_synch_en(common);
1183 mutex_unlock:
1184 mutex_unlock(&sc->mutex);
1186 return r;
1189 static int ath9k_tx(struct ieee80211_hw *hw,
1190 struct sk_buff *skb)
1192 struct ath_wiphy *aphy = hw->priv;
1193 struct ath_softc *sc = aphy->sc;
1194 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1195 struct ath_tx_control txctl;
1196 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1198 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1199 ath_dbg(common, ATH_DBG_XMIT,
1200 "ath9k: %s: TX in unexpected wiphy state %d\n",
1201 wiphy_name(hw->wiphy), aphy->state);
1202 goto exit;
1205 if (sc->ps_enabled) {
1207 * mac80211 does not set PM field for normal data frames, so we
1208 * need to update that based on the current PS mode.
1210 if (ieee80211_is_data(hdr->frame_control) &&
1211 !ieee80211_is_nullfunc(hdr->frame_control) &&
1212 !ieee80211_has_pm(hdr->frame_control)) {
1213 ath_dbg(common, ATH_DBG_PS,
1214 "Add PM=1 for a TX frame while in PS mode\n");
1215 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1219 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1221 * We are using PS-Poll and mac80211 can request TX while in
1222 * power save mode. Need to wake up hardware for the TX to be
1223 * completed and if needed, also for RX of buffered frames.
1225 ath9k_ps_wakeup(sc);
1226 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1227 ath9k_hw_setrxabort(sc->sc_ah, 0);
1228 if (ieee80211_is_pspoll(hdr->frame_control)) {
1229 ath_dbg(common, ATH_DBG_PS,
1230 "Sending PS-Poll to pick a buffered frame\n");
1231 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1232 } else {
1233 ath_dbg(common, ATH_DBG_PS,
1234 "Wake up to complete TX\n");
1235 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1238 * The actual restore operation will happen only after
1239 * the sc_flags bit is cleared. We are just dropping
1240 * the ps_usecount here.
1242 ath9k_ps_restore(sc);
1245 memset(&txctl, 0, sizeof(struct ath_tx_control));
1246 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1248 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1250 if (ath_tx_start(hw, skb, &txctl) != 0) {
1251 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1252 goto exit;
1255 return 0;
1256 exit:
1257 dev_kfree_skb_any(skb);
1258 return 0;
1261 static void ath9k_stop(struct ieee80211_hw *hw)
1263 struct ath_wiphy *aphy = hw->priv;
1264 struct ath_softc *sc = aphy->sc;
1265 struct ath_hw *ah = sc->sc_ah;
1266 struct ath_common *common = ath9k_hw_common(ah);
1267 int i;
1269 mutex_lock(&sc->mutex);
1271 aphy->state = ATH_WIPHY_INACTIVE;
1273 if (led_blink)
1274 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1276 cancel_delayed_work_sync(&sc->tx_complete_work);
1277 cancel_work_sync(&sc->paprd_work);
1278 cancel_work_sync(&sc->hw_check_work);
1280 for (i = 0; i < sc->num_sec_wiphy; i++) {
1281 if (sc->sec_wiphy[i])
1282 break;
1285 if (i == sc->num_sec_wiphy) {
1286 cancel_delayed_work_sync(&sc->wiphy_work);
1287 cancel_work_sync(&sc->chan_work);
1290 if (sc->sc_flags & SC_OP_INVALID) {
1291 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1292 mutex_unlock(&sc->mutex);
1293 return;
1296 if (ath9k_wiphy_started(sc)) {
1297 mutex_unlock(&sc->mutex);
1298 return; /* another wiphy still in use */
1301 /* Ensure HW is awake when we try to shut it down. */
1302 ath9k_ps_wakeup(sc);
1304 if (ah->btcoex_hw.enabled) {
1305 ath9k_hw_btcoex_disable(ah);
1306 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1307 ath9k_btcoex_timer_pause(sc);
1310 spin_lock_bh(&sc->sc_pcu_lock);
1312 /* make sure h/w will not generate any interrupt
1313 * before setting the invalid flag. */
1314 ath9k_hw_disable_interrupts(ah);
1316 if (!(sc->sc_flags & SC_OP_INVALID)) {
1317 ath_drain_all_txq(sc, false);
1318 ath_stoprecv(sc);
1319 ath9k_hw_phy_disable(ah);
1320 } else
1321 sc->rx.rxlink = NULL;
1323 /* disable HAL and put h/w to sleep */
1324 ath9k_hw_disable(ah);
1325 ath9k_hw_configpcipowersave(ah, 1, 1);
1327 spin_unlock_bh(&sc->sc_pcu_lock);
1329 ath9k_ps_restore(sc);
1331 sc->ps_idle = true;
1332 ath9k_set_wiphy_idle(aphy, true);
1333 ath_radio_disable(sc, hw);
1335 sc->sc_flags |= SC_OP_INVALID;
1337 pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1339 mutex_unlock(&sc->mutex);
1341 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1344 static int ath9k_add_interface(struct ieee80211_hw *hw,
1345 struct ieee80211_vif *vif)
1347 struct ath_wiphy *aphy = hw->priv;
1348 struct ath_softc *sc = aphy->sc;
1349 struct ath_hw *ah = sc->sc_ah;
1350 struct ath_common *common = ath9k_hw_common(ah);
1351 struct ath_vif *avp = (void *)vif->drv_priv;
1352 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1353 int ret = 0;
1355 mutex_lock(&sc->mutex);
1357 switch (vif->type) {
1358 case NL80211_IFTYPE_STATION:
1359 ic_opmode = NL80211_IFTYPE_STATION;
1360 break;
1361 case NL80211_IFTYPE_WDS:
1362 ic_opmode = NL80211_IFTYPE_WDS;
1363 break;
1364 case NL80211_IFTYPE_ADHOC:
1365 case NL80211_IFTYPE_AP:
1366 case NL80211_IFTYPE_MESH_POINT:
1367 if (sc->nbcnvifs >= ATH_BCBUF) {
1368 ret = -ENOBUFS;
1369 goto out;
1371 ic_opmode = vif->type;
1372 break;
1373 default:
1374 ath_err(common, "Interface type %d not yet supported\n",
1375 vif->type);
1376 ret = -EOPNOTSUPP;
1377 goto out;
1380 ath_dbg(common, ATH_DBG_CONFIG,
1381 "Attach a VIF of type: %d\n", ic_opmode);
1383 /* Set the VIF opmode */
1384 avp->av_opmode = ic_opmode;
1385 avp->av_bslot = -1;
1387 sc->nvifs++;
1389 ath9k_set_bssid_mask(hw, vif);
1391 if (sc->nvifs > 1)
1392 goto out; /* skip global settings for secondary vif */
1394 if (ic_opmode == NL80211_IFTYPE_AP) {
1395 ath9k_hw_set_tsfadjust(ah, 1);
1396 sc->sc_flags |= SC_OP_TSF_RESET;
1399 /* Set the device opmode */
1400 ah->opmode = ic_opmode;
1403 * Enable MIB interrupts when there are hardware phy counters.
1404 * Note we only do this (at the moment) for station mode.
1406 if ((vif->type == NL80211_IFTYPE_STATION) ||
1407 (vif->type == NL80211_IFTYPE_ADHOC) ||
1408 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1409 if (ah->config.enable_ani)
1410 ah->imask |= ATH9K_INT_MIB;
1411 ah->imask |= ATH9K_INT_TSFOOR;
1414 ath9k_hw_set_interrupts(ah, ah->imask);
1416 if (vif->type == NL80211_IFTYPE_AP ||
1417 vif->type == NL80211_IFTYPE_ADHOC) {
1418 sc->sc_flags |= SC_OP_ANI_RUN;
1419 ath_start_ani(common);
1422 out:
1423 mutex_unlock(&sc->mutex);
1424 return ret;
1427 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1428 struct ieee80211_vif *vif)
1430 struct ath_vif *avp = (void *)vif->drv_priv;
1432 /* Disable SWBA interrupt */
1433 sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1434 ath9k_ps_wakeup(sc);
1435 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1436 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1437 tasklet_kill(&sc->bcon_tasklet);
1438 ath9k_ps_restore(sc);
1440 ath_beacon_return(sc, avp);
1441 sc->sc_flags &= ~SC_OP_BEACONS;
1443 if (sc->nbcnvifs > 0) {
1444 /* Re-enable beaconing */
1445 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1446 ath9k_ps_wakeup(sc);
1447 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1448 ath9k_ps_restore(sc);
1452 static int ath9k_change_interface(struct ieee80211_hw *hw,
1453 struct ieee80211_vif *vif,
1454 enum nl80211_iftype new_type,
1455 bool p2p)
1457 struct ath_wiphy *aphy = hw->priv;
1458 struct ath_softc *sc = aphy->sc;
1459 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1460 int ret = 0;
1462 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1463 mutex_lock(&sc->mutex);
1465 switch (new_type) {
1466 case NL80211_IFTYPE_AP:
1467 case NL80211_IFTYPE_ADHOC:
1468 if (sc->nbcnvifs >= ATH_BCBUF) {
1469 ath_err(common, "No beacon slot available\n");
1470 ret = -ENOBUFS;
1471 goto out;
1473 break;
1474 case NL80211_IFTYPE_STATION:
1475 /* Stop ANI */
1476 sc->sc_flags &= ~SC_OP_ANI_RUN;
1477 del_timer_sync(&common->ani.timer);
1478 if ((vif->type == NL80211_IFTYPE_AP) ||
1479 (vif->type == NL80211_IFTYPE_ADHOC))
1480 ath9k_reclaim_beacon(sc, vif);
1481 break;
1482 default:
1483 ath_err(common, "Interface type %d not yet supported\n",
1484 vif->type);
1485 ret = -ENOTSUPP;
1486 goto out;
1488 vif->type = new_type;
1489 vif->p2p = p2p;
1491 out:
1492 mutex_unlock(&sc->mutex);
1493 return ret;
1496 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1497 struct ieee80211_vif *vif)
1499 struct ath_wiphy *aphy = hw->priv;
1500 struct ath_softc *sc = aphy->sc;
1501 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1503 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1505 mutex_lock(&sc->mutex);
1507 /* Stop ANI */
1508 sc->sc_flags &= ~SC_OP_ANI_RUN;
1509 del_timer_sync(&common->ani.timer);
1511 /* Reclaim beacon resources */
1512 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1513 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1514 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT))
1515 ath9k_reclaim_beacon(sc, vif);
1517 sc->nvifs--;
1519 mutex_unlock(&sc->mutex);
1522 static void ath9k_enable_ps(struct ath_softc *sc)
1524 struct ath_hw *ah = sc->sc_ah;
1526 sc->ps_enabled = true;
1527 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1528 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1529 ah->imask |= ATH9K_INT_TIM_TIMER;
1530 ath9k_hw_set_interrupts(ah, ah->imask);
1532 ath9k_hw_setrxabort(ah, 1);
1536 static void ath9k_disable_ps(struct ath_softc *sc)
1538 struct ath_hw *ah = sc->sc_ah;
1540 sc->ps_enabled = false;
1541 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1542 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1543 ath9k_hw_setrxabort(ah, 0);
1544 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1545 PS_WAIT_FOR_CAB |
1546 PS_WAIT_FOR_PSPOLL_DATA |
1547 PS_WAIT_FOR_TX_ACK);
1548 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1549 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1550 ath9k_hw_set_interrupts(ah, ah->imask);
1556 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1558 struct ath_wiphy *aphy = hw->priv;
1559 struct ath_softc *sc = aphy->sc;
1560 struct ath_hw *ah = sc->sc_ah;
1561 struct ath_common *common = ath9k_hw_common(ah);
1562 struct ieee80211_conf *conf = &hw->conf;
1563 bool disable_radio;
1565 mutex_lock(&sc->mutex);
1568 * Leave this as the first check because we need to turn on the
1569 * radio if it was disabled before prior to processing the rest
1570 * of the changes. Likewise we must only disable the radio towards
1571 * the end.
1573 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1574 bool enable_radio;
1575 bool all_wiphys_idle;
1576 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1578 spin_lock_bh(&sc->wiphy_lock);
1579 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1580 ath9k_set_wiphy_idle(aphy, idle);
1582 enable_radio = (!idle && all_wiphys_idle);
1585 * After we unlock here its possible another wiphy
1586 * can be re-renabled so to account for that we will
1587 * only disable the radio toward the end of this routine
1588 * if by then all wiphys are still idle.
1590 spin_unlock_bh(&sc->wiphy_lock);
1592 if (enable_radio) {
1593 sc->ps_idle = false;
1594 ath_radio_enable(sc, hw);
1595 ath_dbg(common, ATH_DBG_CONFIG,
1596 "not-idle: enabling radio\n");
1601 * We just prepare to enable PS. We have to wait until our AP has
1602 * ACK'd our null data frame to disable RX otherwise we'll ignore
1603 * those ACKs and end up retransmitting the same null data frames.
1604 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1606 if (changed & IEEE80211_CONF_CHANGE_PS) {
1607 unsigned long flags;
1608 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1609 if (conf->flags & IEEE80211_CONF_PS)
1610 ath9k_enable_ps(sc);
1611 else
1612 ath9k_disable_ps(sc);
1613 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1616 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1617 if (conf->flags & IEEE80211_CONF_MONITOR) {
1618 ath_dbg(common, ATH_DBG_CONFIG,
1619 "Monitor mode is enabled\n");
1620 sc->sc_ah->is_monitoring = true;
1621 } else {
1622 ath_dbg(common, ATH_DBG_CONFIG,
1623 "Monitor mode is disabled\n");
1624 sc->sc_ah->is_monitoring = false;
1628 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1629 struct ieee80211_channel *curchan = hw->conf.channel;
1630 int pos = curchan->hw_value;
1631 int old_pos = -1;
1632 unsigned long flags;
1634 if (ah->curchan)
1635 old_pos = ah->curchan - &ah->channels[0];
1637 aphy->chan_idx = pos;
1638 aphy->chan_is_ht = conf_is_ht(conf);
1639 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1640 sc->sc_flags |= SC_OP_OFFCHANNEL;
1641 else
1642 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1644 if (aphy->state == ATH_WIPHY_SCAN ||
1645 aphy->state == ATH_WIPHY_ACTIVE)
1646 ath9k_wiphy_pause_all_forced(sc, aphy);
1647 else {
1649 * Do not change operational channel based on a paused
1650 * wiphy changes.
1652 goto skip_chan_change;
1655 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1656 curchan->center_freq);
1658 /* XXX: remove me eventualy */
1659 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1661 /* update survey stats for the old channel before switching */
1662 spin_lock_irqsave(&common->cc_lock, flags);
1663 ath_update_survey_stats(sc);
1664 spin_unlock_irqrestore(&common->cc_lock, flags);
1667 * If the operating channel changes, change the survey in-use flags
1668 * along with it.
1669 * Reset the survey data for the new channel, unless we're switching
1670 * back to the operating channel from an off-channel operation.
1672 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1673 sc->cur_survey != &sc->survey[pos]) {
1675 if (sc->cur_survey)
1676 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1678 sc->cur_survey = &sc->survey[pos];
1680 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1681 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1682 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1683 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1686 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1687 ath_err(common, "Unable to set channel\n");
1688 mutex_unlock(&sc->mutex);
1689 return -EINVAL;
1693 * The most recent snapshot of channel->noisefloor for the old
1694 * channel is only available after the hardware reset. Copy it to
1695 * the survey stats now.
1697 if (old_pos >= 0)
1698 ath_update_survey_nf(sc, old_pos);
1701 skip_chan_change:
1702 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1703 sc->config.txpowlimit = 2 * conf->power_level;
1704 ath_update_txpow(sc);
1707 spin_lock_bh(&sc->wiphy_lock);
1708 disable_radio = ath9k_all_wiphys_idle(sc);
1709 spin_unlock_bh(&sc->wiphy_lock);
1711 if (disable_radio) {
1712 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1713 sc->ps_idle = true;
1714 ath_radio_disable(sc, hw);
1717 mutex_unlock(&sc->mutex);
1719 return 0;
1722 #define SUPPORTED_FILTERS \
1723 (FIF_PROMISC_IN_BSS | \
1724 FIF_ALLMULTI | \
1725 FIF_CONTROL | \
1726 FIF_PSPOLL | \
1727 FIF_OTHER_BSS | \
1728 FIF_BCN_PRBRESP_PROMISC | \
1729 FIF_PROBE_REQ | \
1730 FIF_FCSFAIL)
1732 /* FIXME: sc->sc_full_reset ? */
1733 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1734 unsigned int changed_flags,
1735 unsigned int *total_flags,
1736 u64 multicast)
1738 struct ath_wiphy *aphy = hw->priv;
1739 struct ath_softc *sc = aphy->sc;
1740 u32 rfilt;
1742 changed_flags &= SUPPORTED_FILTERS;
1743 *total_flags &= SUPPORTED_FILTERS;
1745 sc->rx.rxfilter = *total_flags;
1746 ath9k_ps_wakeup(sc);
1747 rfilt = ath_calcrxfilter(sc);
1748 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1749 ath9k_ps_restore(sc);
1751 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1752 "Set HW RX filter: 0x%x\n", rfilt);
1755 static int ath9k_sta_add(struct ieee80211_hw *hw,
1756 struct ieee80211_vif *vif,
1757 struct ieee80211_sta *sta)
1759 struct ath_wiphy *aphy = hw->priv;
1760 struct ath_softc *sc = aphy->sc;
1762 ath_node_attach(sc, sta);
1764 return 0;
1767 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1768 struct ieee80211_vif *vif,
1769 struct ieee80211_sta *sta)
1771 struct ath_wiphy *aphy = hw->priv;
1772 struct ath_softc *sc = aphy->sc;
1774 ath_node_detach(sc, sta);
1776 return 0;
1779 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1780 const struct ieee80211_tx_queue_params *params)
1782 struct ath_wiphy *aphy = hw->priv;
1783 struct ath_softc *sc = aphy->sc;
1784 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1785 struct ath_txq *txq;
1786 struct ath9k_tx_queue_info qi;
1787 int ret = 0;
1789 if (queue >= WME_NUM_AC)
1790 return 0;
1792 txq = sc->tx.txq_map[queue];
1794 mutex_lock(&sc->mutex);
1796 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1798 qi.tqi_aifs = params->aifs;
1799 qi.tqi_cwmin = params->cw_min;
1800 qi.tqi_cwmax = params->cw_max;
1801 qi.tqi_burstTime = params->txop;
1803 ath_dbg(common, ATH_DBG_CONFIG,
1804 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1805 queue, txq->axq_qnum, params->aifs, params->cw_min,
1806 params->cw_max, params->txop);
1808 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1809 if (ret)
1810 ath_err(common, "TXQ Update failed\n");
1812 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1813 if (queue == WME_AC_BE && !ret)
1814 ath_beaconq_config(sc);
1816 mutex_unlock(&sc->mutex);
1818 return ret;
1821 static int ath9k_set_key(struct ieee80211_hw *hw,
1822 enum set_key_cmd cmd,
1823 struct ieee80211_vif *vif,
1824 struct ieee80211_sta *sta,
1825 struct ieee80211_key_conf *key)
1827 struct ath_wiphy *aphy = hw->priv;
1828 struct ath_softc *sc = aphy->sc;
1829 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1830 int ret = 0;
1832 if (ath9k_modparam_nohwcrypt)
1833 return -ENOSPC;
1835 mutex_lock(&sc->mutex);
1836 ath9k_ps_wakeup(sc);
1837 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1839 switch (cmd) {
1840 case SET_KEY:
1841 ret = ath_key_config(common, vif, sta, key);
1842 if (ret >= 0) {
1843 key->hw_key_idx = ret;
1844 /* push IV and Michael MIC generation to stack */
1845 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1846 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1847 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1848 if (sc->sc_ah->sw_mgmt_crypto &&
1849 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1850 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1851 ret = 0;
1853 break;
1854 case DISABLE_KEY:
1855 ath_key_delete(common, key);
1856 break;
1857 default:
1858 ret = -EINVAL;
1861 ath9k_ps_restore(sc);
1862 mutex_unlock(&sc->mutex);
1864 return ret;
1867 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1868 struct ieee80211_vif *vif,
1869 struct ieee80211_bss_conf *bss_conf,
1870 u32 changed)
1872 struct ath_wiphy *aphy = hw->priv;
1873 struct ath_softc *sc = aphy->sc;
1874 struct ath_hw *ah = sc->sc_ah;
1875 struct ath_common *common = ath9k_hw_common(ah);
1876 struct ath_vif *avp = (void *)vif->drv_priv;
1877 int slottime;
1878 int error;
1880 mutex_lock(&sc->mutex);
1882 if (changed & BSS_CHANGED_BSSID) {
1883 /* Set BSSID */
1884 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1885 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1886 common->curaid = 0;
1887 ath9k_hw_write_associd(ah);
1889 /* Set aggregation protection mode parameters */
1890 sc->config.ath_aggr_prot = 0;
1892 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1893 common->curbssid, common->curaid);
1895 /* need to reconfigure the beacon */
1896 sc->sc_flags &= ~SC_OP_BEACONS ;
1899 /* Enable transmission of beacons (AP, IBSS, MESH) */
1900 if ((changed & BSS_CHANGED_BEACON) ||
1901 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1902 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1903 error = ath_beacon_alloc(aphy, vif);
1904 if (!error)
1905 ath_beacon_config(sc, vif);
1908 if (changed & BSS_CHANGED_ERP_SLOT) {
1909 if (bss_conf->use_short_slot)
1910 slottime = 9;
1911 else
1912 slottime = 20;
1913 if (vif->type == NL80211_IFTYPE_AP) {
1915 * Defer update, so that connected stations can adjust
1916 * their settings at the same time.
1917 * See beacon.c for more details
1919 sc->beacon.slottime = slottime;
1920 sc->beacon.updateslot = UPDATE;
1921 } else {
1922 ah->slottime = slottime;
1923 ath9k_hw_init_global_settings(ah);
1927 /* Disable transmission of beacons */
1928 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1929 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1931 if (changed & BSS_CHANGED_BEACON_INT) {
1932 sc->beacon_interval = bss_conf->beacon_int;
1934 * In case of AP mode, the HW TSF has to be reset
1935 * when the beacon interval changes.
1937 if (vif->type == NL80211_IFTYPE_AP) {
1938 sc->sc_flags |= SC_OP_TSF_RESET;
1939 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1940 error = ath_beacon_alloc(aphy, vif);
1941 if (!error)
1942 ath_beacon_config(sc, vif);
1943 } else {
1944 ath_beacon_config(sc, vif);
1948 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1949 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1950 bss_conf->use_short_preamble);
1951 if (bss_conf->use_short_preamble)
1952 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1953 else
1954 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1957 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1958 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1959 bss_conf->use_cts_prot);
1960 if (bss_conf->use_cts_prot &&
1961 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1962 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1963 else
1964 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1967 if (changed & BSS_CHANGED_ASSOC) {
1968 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1969 bss_conf->assoc);
1970 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1973 mutex_unlock(&sc->mutex);
1976 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1978 u64 tsf;
1979 struct ath_wiphy *aphy = hw->priv;
1980 struct ath_softc *sc = aphy->sc;
1982 mutex_lock(&sc->mutex);
1983 ath9k_ps_wakeup(sc);
1984 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1985 ath9k_ps_restore(sc);
1986 mutex_unlock(&sc->mutex);
1988 return tsf;
1991 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1993 struct ath_wiphy *aphy = hw->priv;
1994 struct ath_softc *sc = aphy->sc;
1996 mutex_lock(&sc->mutex);
1997 ath9k_ps_wakeup(sc);
1998 ath9k_hw_settsf64(sc->sc_ah, tsf);
1999 ath9k_ps_restore(sc);
2000 mutex_unlock(&sc->mutex);
2003 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2005 struct ath_wiphy *aphy = hw->priv;
2006 struct ath_softc *sc = aphy->sc;
2008 mutex_lock(&sc->mutex);
2010 ath9k_ps_wakeup(sc);
2011 ath9k_hw_reset_tsf(sc->sc_ah);
2012 ath9k_ps_restore(sc);
2014 mutex_unlock(&sc->mutex);
2017 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2018 struct ieee80211_vif *vif,
2019 enum ieee80211_ampdu_mlme_action action,
2020 struct ieee80211_sta *sta,
2021 u16 tid, u16 *ssn)
2023 struct ath_wiphy *aphy = hw->priv;
2024 struct ath_softc *sc = aphy->sc;
2025 int ret = 0;
2027 local_bh_disable();
2029 switch (action) {
2030 case IEEE80211_AMPDU_RX_START:
2031 if (!(sc->sc_flags & SC_OP_RXAGGR))
2032 ret = -ENOTSUPP;
2033 break;
2034 case IEEE80211_AMPDU_RX_STOP:
2035 break;
2036 case IEEE80211_AMPDU_TX_START:
2037 if (!(sc->sc_flags & SC_OP_TXAGGR))
2038 return -EOPNOTSUPP;
2040 ath9k_ps_wakeup(sc);
2041 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2042 if (!ret)
2043 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2044 ath9k_ps_restore(sc);
2045 break;
2046 case IEEE80211_AMPDU_TX_STOP:
2047 ath9k_ps_wakeup(sc);
2048 ath_tx_aggr_stop(sc, sta, tid);
2049 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2050 ath9k_ps_restore(sc);
2051 break;
2052 case IEEE80211_AMPDU_TX_OPERATIONAL:
2053 ath9k_ps_wakeup(sc);
2054 ath_tx_aggr_resume(sc, sta, tid);
2055 ath9k_ps_restore(sc);
2056 break;
2057 default:
2058 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2061 local_bh_enable();
2063 return ret;
2066 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2067 struct survey_info *survey)
2069 struct ath_wiphy *aphy = hw->priv;
2070 struct ath_softc *sc = aphy->sc;
2071 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2072 struct ieee80211_supported_band *sband;
2073 struct ieee80211_channel *chan;
2074 unsigned long flags;
2075 int pos;
2077 spin_lock_irqsave(&common->cc_lock, flags);
2078 if (idx == 0)
2079 ath_update_survey_stats(sc);
2081 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2082 if (sband && idx >= sband->n_channels) {
2083 idx -= sband->n_channels;
2084 sband = NULL;
2087 if (!sband)
2088 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2090 if (!sband || idx >= sband->n_channels) {
2091 spin_unlock_irqrestore(&common->cc_lock, flags);
2092 return -ENOENT;
2095 chan = &sband->channels[idx];
2096 pos = chan->hw_value;
2097 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2098 survey->channel = chan;
2099 spin_unlock_irqrestore(&common->cc_lock, flags);
2101 return 0;
2104 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2106 struct ath_wiphy *aphy = hw->priv;
2107 struct ath_softc *sc = aphy->sc;
2109 mutex_lock(&sc->mutex);
2110 if (ath9k_wiphy_scanning(sc)) {
2112 * There is a race here in mac80211 but fixing it requires
2113 * we revisit how we handle the scan complete callback.
2114 * After mac80211 fixes we will not have configured hardware
2115 * to the home channel nor would we have configured the RX
2116 * filter yet.
2118 mutex_unlock(&sc->mutex);
2119 return;
2122 aphy->state = ATH_WIPHY_SCAN;
2123 ath9k_wiphy_pause_all_forced(sc, aphy);
2124 mutex_unlock(&sc->mutex);
2128 * XXX: this requires a revisit after the driver
2129 * scan_complete gets moved to another place/removed in mac80211.
2131 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2133 struct ath_wiphy *aphy = hw->priv;
2134 struct ath_softc *sc = aphy->sc;
2136 mutex_lock(&sc->mutex);
2137 aphy->state = ATH_WIPHY_ACTIVE;
2138 mutex_unlock(&sc->mutex);
2141 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2143 struct ath_wiphy *aphy = hw->priv;
2144 struct ath_softc *sc = aphy->sc;
2145 struct ath_hw *ah = sc->sc_ah;
2147 mutex_lock(&sc->mutex);
2148 ah->coverage_class = coverage_class;
2149 ath9k_hw_init_global_settings(ah);
2150 mutex_unlock(&sc->mutex);
2153 struct ieee80211_ops ath9k_ops = {
2154 .tx = ath9k_tx,
2155 .start = ath9k_start,
2156 .stop = ath9k_stop,
2157 .add_interface = ath9k_add_interface,
2158 .change_interface = ath9k_change_interface,
2159 .remove_interface = ath9k_remove_interface,
2160 .config = ath9k_config,
2161 .configure_filter = ath9k_configure_filter,
2162 .sta_add = ath9k_sta_add,
2163 .sta_remove = ath9k_sta_remove,
2164 .conf_tx = ath9k_conf_tx,
2165 .bss_info_changed = ath9k_bss_info_changed,
2166 .set_key = ath9k_set_key,
2167 .get_tsf = ath9k_get_tsf,
2168 .set_tsf = ath9k_set_tsf,
2169 .reset_tsf = ath9k_reset_tsf,
2170 .ampdu_action = ath9k_ampdu_action,
2171 .get_survey = ath9k_get_survey,
2172 .sw_scan_start = ath9k_sw_scan_start,
2173 .sw_scan_complete = ath9k_sw_scan_complete,
2174 .rfkill_poll = ath9k_rfkill_poll_state,
2175 .set_coverage_class = ath9k_set_coverage_class,