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proc: use seq_puts()/seq_putc() where possible
[linux-2.6/next.git] / drivers / net / wireless / mwl8k.c
blob9ecf8407cb1b070825d098869c7e5317d499d019
1 /*
2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
4 *
5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <linux/slab.h>
23 #include <net/mac80211.h>
24 #include <linux/moduleparam.h>
25 #include <linux/firmware.h>
26 #include <linux/workqueue.h>
27
28 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
29 #define MWL8K_NAME KBUILD_MODNAME
30 #define MWL8K_VERSION "0.12"
31
32 /* Module parameters */
33 static unsigned ap_mode_default;
34 module_param(ap_mode_default, bool, 0);
35 MODULE_PARM_DESC(ap_mode_default,
36 "Set to 1 to make ap mode the default instead of sta mode");
37
38 /* Register definitions */
39 #define MWL8K_HIU_GEN_PTR 0x00000c10
40 #define MWL8K_MODE_STA 0x0000005a
41 #define MWL8K_MODE_AP 0x000000a5
42 #define MWL8K_HIU_INT_CODE 0x00000c14
43 #define MWL8K_FWSTA_READY 0xf0f1f2f4
44 #define MWL8K_FWAP_READY 0xf1f2f4a5
45 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
46 #define MWL8K_HIU_SCRATCH 0x00000c40
47
48 /* Host->device communications */
49 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
50 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
51 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
52 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
53 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
54 #define MWL8K_H2A_INT_DUMMY (1 << 20)
55 #define MWL8K_H2A_INT_RESET (1 << 15)
56 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
57 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
58
59 /* Device->host communications */
60 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
61 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
62 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
63 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
64 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
65 #define MWL8K_A2H_INT_DUMMY (1 << 20)
66 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
67 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
68 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
69 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
70 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
71 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
72 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
73 #define MWL8K_A2H_INT_RX_READY (1 << 1)
74 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
75
76 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
77 MWL8K_A2H_INT_CHNL_SWITCHED | \
78 MWL8K_A2H_INT_QUEUE_EMPTY | \
79 MWL8K_A2H_INT_RADAR_DETECT | \
80 MWL8K_A2H_INT_RADIO_ON | \
81 MWL8K_A2H_INT_RADIO_OFF | \
82 MWL8K_A2H_INT_MAC_EVENT | \
83 MWL8K_A2H_INT_OPC_DONE | \
84 MWL8K_A2H_INT_RX_READY | \
85 MWL8K_A2H_INT_TX_DONE)
86
87 #define MWL8K_RX_QUEUES 1
88 #define MWL8K_TX_QUEUES 4
89
90 struct rxd_ops {
91 int rxd_size;
92 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
93 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
94 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
95 __le16 *qos, s8 *noise);
96 };
97
98 struct mwl8k_device_info {
99 char *part_name;
100 char *helper_image;
101 char *fw_image_sta;
102 char *fw_image_ap;
103 struct rxd_ops *ap_rxd_ops;
104 u32 fw_api_ap;
105 };
106
107 struct mwl8k_rx_queue {
108 int rxd_count;
109
110 /* hw receives here */
111 int head;
112
113 /* refill descs here */
114 int tail;
115
116 void *rxd;
117 dma_addr_t rxd_dma;
118 struct {
119 struct sk_buff *skb;
120 DEFINE_DMA_UNMAP_ADDR(dma);
121 } *buf;
122 };
123
124 struct mwl8k_tx_queue {
125 /* hw transmits here */
126 int head;
127
128 /* sw appends here */
129 int tail;
130
131 unsigned int len;
132 struct mwl8k_tx_desc *txd;
133 dma_addr_t txd_dma;
134 struct sk_buff **skb;
135 };
136
137 struct mwl8k_priv {
138 struct ieee80211_hw *hw;
139 struct pci_dev *pdev;
140
141 struct mwl8k_device_info *device_info;
142
143 void __iomem *sram;
144 void __iomem *regs;
145
146 /* firmware */
147 const struct firmware *fw_helper;
148 const struct firmware *fw_ucode;
149
150 /* hardware/firmware parameters */
151 bool ap_fw;
152 struct rxd_ops *rxd_ops;
153 struct ieee80211_supported_band band_24;
154 struct ieee80211_channel channels_24[14];
155 struct ieee80211_rate rates_24[14];
156 struct ieee80211_supported_band band_50;
157 struct ieee80211_channel channels_50[4];
158 struct ieee80211_rate rates_50[9];
159 u32 ap_macids_supported;
160 u32 sta_macids_supported;
161
162 /* firmware access */
163 struct mutex fw_mutex;
164 struct task_struct *fw_mutex_owner;
165 int fw_mutex_depth;
166 struct completion *hostcmd_wait;
167
168 /* lock held over TX and TX reap */
169 spinlock_t tx_lock;
170
171 /* TX quiesce completion, protected by fw_mutex and tx_lock */
172 struct completion *tx_wait;
173
174 /* List of interfaces. */
175 u32 macids_used;
176 struct list_head vif_list;
177
178 /* power management status cookie from firmware */
179 u32 *cookie;
180 dma_addr_t cookie_dma;
181
182 u16 num_mcaddrs;
183 u8 hw_rev;
184 u32 fw_rev;
185
186 /*
187 * Running count of TX packets in flight, to avoid
188 * iterating over the transmit rings each time.
189 */
190 int pending_tx_pkts;
191
192 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
193 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
194
195 bool radio_on;
196 bool radio_short_preamble;
197 bool sniffer_enabled;
198 bool wmm_enabled;
199
200 /* XXX need to convert this to handle multiple interfaces */
201 bool capture_beacon;
202 u8 capture_bssid[ETH_ALEN];
203 struct sk_buff *beacon_skb;
204
205 /*
206 * This FJ worker has to be global as it is scheduled from the
207 * RX handler. At this point we don't know which interface it
208 * belongs to until the list of bssids waiting to complete join
209 * is checked.
210 */
211 struct work_struct finalize_join_worker;
212
213 /* Tasklet to perform TX reclaim. */
214 struct tasklet_struct poll_tx_task;
215
216 /* Tasklet to perform RX. */
217 struct tasklet_struct poll_rx_task;
218
219 /* Most recently reported noise in dBm */
220 s8 noise;
221
222 /*
223 * preserve the queue configurations so they can be restored if/when
224 * the firmware image is swapped.
225 */
226 struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_QUEUES];
227
228 /* async firmware loading state */
229 unsigned fw_state;
230 char *fw_pref;
231 char *fw_alt;
232 struct completion firmware_loading_complete;
233 };
234
235 /* Per interface specific private data */
236 struct mwl8k_vif {
237 struct list_head list;
238 struct ieee80211_vif *vif;
239
240 /* Firmware macid for this vif. */
241 int macid;
242
243 /* Non AMPDU sequence number assigned by driver. */
244 u16 seqno;
245 };
246 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
247
248 struct mwl8k_sta {
249 /* Index into station database. Returned by UPDATE_STADB. */
250 u8 peer_id;
251 };
252 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
253
254 static const struct ieee80211_channel mwl8k_channels_24[] = {
255 { .center_freq = 2412, .hw_value = 1, },
256 { .center_freq = 2417, .hw_value = 2, },
257 { .center_freq = 2422, .hw_value = 3, },
258 { .center_freq = 2427, .hw_value = 4, },
259 { .center_freq = 2432, .hw_value = 5, },
260 { .center_freq = 2437, .hw_value = 6, },
261 { .center_freq = 2442, .hw_value = 7, },
262 { .center_freq = 2447, .hw_value = 8, },
263 { .center_freq = 2452, .hw_value = 9, },
264 { .center_freq = 2457, .hw_value = 10, },
265 { .center_freq = 2462, .hw_value = 11, },
266 { .center_freq = 2467, .hw_value = 12, },
267 { .center_freq = 2472, .hw_value = 13, },
268 { .center_freq = 2484, .hw_value = 14, },
269 };
270
271 static const struct ieee80211_rate mwl8k_rates_24[] = {
272 { .bitrate = 10, .hw_value = 2, },
273 { .bitrate = 20, .hw_value = 4, },
274 { .bitrate = 55, .hw_value = 11, },
275 { .bitrate = 110, .hw_value = 22, },
276 { .bitrate = 220, .hw_value = 44, },
277 { .bitrate = 60, .hw_value = 12, },
278 { .bitrate = 90, .hw_value = 18, },
279 { .bitrate = 120, .hw_value = 24, },
280 { .bitrate = 180, .hw_value = 36, },
281 { .bitrate = 240, .hw_value = 48, },
282 { .bitrate = 360, .hw_value = 72, },
283 { .bitrate = 480, .hw_value = 96, },
284 { .bitrate = 540, .hw_value = 108, },
285 { .bitrate = 720, .hw_value = 144, },
286 };
287
288 static const struct ieee80211_channel mwl8k_channels_50[] = {
289 { .center_freq = 5180, .hw_value = 36, },
290 { .center_freq = 5200, .hw_value = 40, },
291 { .center_freq = 5220, .hw_value = 44, },
292 { .center_freq = 5240, .hw_value = 48, },
293 };
294
295 static const struct ieee80211_rate mwl8k_rates_50[] = {
296 { .bitrate = 60, .hw_value = 12, },
297 { .bitrate = 90, .hw_value = 18, },
298 { .bitrate = 120, .hw_value = 24, },
299 { .bitrate = 180, .hw_value = 36, },
300 { .bitrate = 240, .hw_value = 48, },
301 { .bitrate = 360, .hw_value = 72, },
302 { .bitrate = 480, .hw_value = 96, },
303 { .bitrate = 540, .hw_value = 108, },
304 { .bitrate = 720, .hw_value = 144, },
305 };
306
307 /* Set or get info from Firmware */
308 #define MWL8K_CMD_GET 0x0000
309 #define MWL8K_CMD_SET 0x0001
310 #define MWL8K_CMD_SET_LIST 0x0002
311
312 /* Firmware command codes */
313 #define MWL8K_CMD_CODE_DNLD 0x0001
314 #define MWL8K_CMD_GET_HW_SPEC 0x0003
315 #define MWL8K_CMD_SET_HW_SPEC 0x0004
316 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
317 #define MWL8K_CMD_GET_STAT 0x0014
318 #define MWL8K_CMD_RADIO_CONTROL 0x001c
319 #define MWL8K_CMD_RF_TX_POWER 0x001e
320 #define MWL8K_CMD_TX_POWER 0x001f
321 #define MWL8K_CMD_RF_ANTENNA 0x0020
322 #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
323 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
324 #define MWL8K_CMD_SET_POST_SCAN 0x0108
325 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
326 #define MWL8K_CMD_SET_AID 0x010d
327 #define MWL8K_CMD_SET_RATE 0x0110
328 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
329 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
330 #define MWL8K_CMD_SET_SLOT 0x0114
331 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
332 #define MWL8K_CMD_SET_WMM_MODE 0x0123
333 #define MWL8K_CMD_MIMO_CONFIG 0x0125
334 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
335 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
336 #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
337 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
338 #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
339 #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
340 #define MWL8K_CMD_UPDATE_STADB 0x1123
341
342 static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
343 {
344 u16 command = le16_to_cpu(cmd);
345
346 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
347 snprintf(buf, bufsize, "%s", #x);\
348 return buf;\
349 } while (0)
350 switch (command & ~0x8000) {
351 MWL8K_CMDNAME(CODE_DNLD);
352 MWL8K_CMDNAME(GET_HW_SPEC);
353 MWL8K_CMDNAME(SET_HW_SPEC);
354 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
355 MWL8K_CMDNAME(GET_STAT);
356 MWL8K_CMDNAME(RADIO_CONTROL);
357 MWL8K_CMDNAME(RF_TX_POWER);
358 MWL8K_CMDNAME(TX_POWER);
359 MWL8K_CMDNAME(RF_ANTENNA);
360 MWL8K_CMDNAME(SET_BEACON);
361 MWL8K_CMDNAME(SET_PRE_SCAN);
362 MWL8K_CMDNAME(SET_POST_SCAN);
363 MWL8K_CMDNAME(SET_RF_CHANNEL);
364 MWL8K_CMDNAME(SET_AID);
365 MWL8K_CMDNAME(SET_RATE);
366 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
367 MWL8K_CMDNAME(RTS_THRESHOLD);
368 MWL8K_CMDNAME(SET_SLOT);
369 MWL8K_CMDNAME(SET_EDCA_PARAMS);
370 MWL8K_CMDNAME(SET_WMM_MODE);
371 MWL8K_CMDNAME(MIMO_CONFIG);
372 MWL8K_CMDNAME(USE_FIXED_RATE);
373 MWL8K_CMDNAME(ENABLE_SNIFFER);
374 MWL8K_CMDNAME(SET_MAC_ADDR);
375 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
376 MWL8K_CMDNAME(BSS_START);
377 MWL8K_CMDNAME(SET_NEW_STN);
378 MWL8K_CMDNAME(UPDATE_STADB);
379 default:
380 snprintf(buf, bufsize, "0x%x", cmd);
381 }
382 #undef MWL8K_CMDNAME
383
384 return buf;
385 }
386
387 /* Hardware and firmware reset */
388 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
389 {
390 iowrite32(MWL8K_H2A_INT_RESET,
391 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
392 iowrite32(MWL8K_H2A_INT_RESET,
393 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
394 msleep(20);
395 }
396
397 /* Release fw image */
398 static void mwl8k_release_fw(const struct firmware **fw)
399 {
400 if (*fw == NULL)
401 return;
402 release_firmware(*fw);
403 *fw = NULL;
404 }
405
406 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
407 {
408 mwl8k_release_fw(&priv->fw_ucode);
409 mwl8k_release_fw(&priv->fw_helper);
410 }
411
412 /* states for asynchronous f/w loading */
413 static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
414 enum {
415 FW_STATE_INIT = 0,
416 FW_STATE_LOADING_PREF,
417 FW_STATE_LOADING_ALT,
418 FW_STATE_ERROR,
419 };
420
421 /* Request fw image */
422 static int mwl8k_request_fw(struct mwl8k_priv *priv,
423 const char *fname, const struct firmware **fw,
424 bool nowait)
425 {
426 /* release current image */
427 if (*fw != NULL)
428 mwl8k_release_fw(fw);
429
430 if (nowait)
431 return request_firmware_nowait(THIS_MODULE, 1, fname,
432 &priv->pdev->dev, GFP_KERNEL,
433 priv, mwl8k_fw_state_machine);
434 else
435 return request_firmware(fw, fname, &priv->pdev->dev);
436 }
437
438 static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
439 bool nowait)
440 {
441 struct mwl8k_device_info *di = priv->device_info;
442 int rc;
443
444 if (di->helper_image != NULL) {
445 if (nowait)
446 rc = mwl8k_request_fw(priv, di->helper_image,
447 &priv->fw_helper, true);
448 else
449 rc = mwl8k_request_fw(priv, di->helper_image,
450 &priv->fw_helper, false);
451 if (rc)
452 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
453 pci_name(priv->pdev), di->helper_image);
454
455 if (rc || nowait)
456 return rc;
457 }
458
459 if (nowait) {
460 /*
461 * if we get here, no helper image is needed. Skip the
462 * FW_STATE_INIT state.
463 */
464 priv->fw_state = FW_STATE_LOADING_PREF;
465 rc = mwl8k_request_fw(priv, fw_image,
466 &priv->fw_ucode,
467 true);
468 } else
469 rc = mwl8k_request_fw(priv, fw_image,
470 &priv->fw_ucode, false);
471 if (rc) {
472 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
473 pci_name(priv->pdev), fw_image);
474 mwl8k_release_fw(&priv->fw_helper);
475 return rc;
476 }
477
478 return 0;
479 }
480
481 struct mwl8k_cmd_pkt {
482 __le16 code;
483 __le16 length;
484 __u8 seq_num;
485 __u8 macid;
486 __le16 result;
487 char payload[0];
488 } __packed;
489
490 /*
491 * Firmware loading.
492 */
493 static int
494 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
495 {
496 void __iomem *regs = priv->regs;
497 dma_addr_t dma_addr;
498 int loops;
499
500 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
501 if (pci_dma_mapping_error(priv->pdev, dma_addr))
502 return -ENOMEM;
503
504 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
505 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
506 iowrite32(MWL8K_H2A_INT_DOORBELL,
507 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
508 iowrite32(MWL8K_H2A_INT_DUMMY,
509 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
510
511 loops = 1000;
512 do {
513 u32 int_code;
514
515 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
516 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
517 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
518 break;
519 }
520
521 cond_resched();
522 udelay(1);
523 } while (--loops);
524
525 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
526
527 return loops ? 0 : -ETIMEDOUT;
528 }
529
530 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
531 const u8 *data, size_t length)
532 {
533 struct mwl8k_cmd_pkt *cmd;
534 int done;
535 int rc = 0;
536
537 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
538 if (cmd == NULL)
539 return -ENOMEM;
540
541 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
542 cmd->seq_num = 0;
543 cmd->macid = 0;
544 cmd->result = 0;
545
546 done = 0;
547 while (length) {
548 int block_size = length > 256 ? 256 : length;
549
550 memcpy(cmd->payload, data + done, block_size);
551 cmd->length = cpu_to_le16(block_size);
552
553 rc = mwl8k_send_fw_load_cmd(priv, cmd,
554 sizeof(*cmd) + block_size);
555 if (rc)
556 break;
557
558 done += block_size;
559 length -= block_size;
560 }
561
562 if (!rc) {
563 cmd->length = 0;
564 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
565 }
566
567 kfree(cmd);
568
569 return rc;
570 }
571
572 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
573 const u8 *data, size_t length)
574 {
575 unsigned char *buffer;
576 int may_continue, rc = 0;
577 u32 done, prev_block_size;
578
579 buffer = kmalloc(1024, GFP_KERNEL);
580 if (buffer == NULL)
581 return -ENOMEM;
582
583 done = 0;
584 prev_block_size = 0;
585 may_continue = 1000;
586 while (may_continue > 0) {
587 u32 block_size;
588
589 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
590 if (block_size & 1) {
591 block_size &= ~1;
592 may_continue--;
593 } else {
594 done += prev_block_size;
595 length -= prev_block_size;
596 }
597
598 if (block_size > 1024 || block_size > length) {
599 rc = -EOVERFLOW;
600 break;
601 }
602
603 if (length == 0) {
604 rc = 0;
605 break;
606 }
607
608 if (block_size == 0) {
609 rc = -EPROTO;
610 may_continue--;
611 udelay(1);
612 continue;
613 }
614
615 prev_block_size = block_size;
616 memcpy(buffer, data + done, block_size);
617
618 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
619 if (rc)
620 break;
621 }
622
623 if (!rc && length != 0)
624 rc = -EREMOTEIO;
625
626 kfree(buffer);
627
628 return rc;
629 }
630
631 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
632 {
633 struct mwl8k_priv *priv = hw->priv;
634 const struct firmware *fw = priv->fw_ucode;
635 int rc;
636 int loops;
637
638 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
639 const struct firmware *helper = priv->fw_helper;
640
641 if (helper == NULL) {
642 printk(KERN_ERR "%s: helper image needed but none "
643 "given\n", pci_name(priv->pdev));
644 return -EINVAL;
645 }
646
647 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
648 if (rc) {
649 printk(KERN_ERR "%s: unable to load firmware "
650 "helper image\n", pci_name(priv->pdev));
651 return rc;
652 }
653 msleep(5);
654
655 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
656 } else {
657 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
658 }
659
660 if (rc) {
661 printk(KERN_ERR "%s: unable to load firmware image\n",
662 pci_name(priv->pdev));
663 return rc;
664 }
665
666 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
667
668 loops = 500000;
669 do {
670 u32 ready_code;
671
672 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
673 if (ready_code == MWL8K_FWAP_READY) {
674 priv->ap_fw = 1;
675 break;
676 } else if (ready_code == MWL8K_FWSTA_READY) {
677 priv->ap_fw = 0;
678 break;
679 }
680
681 cond_resched();
682 udelay(1);
683 } while (--loops);
684
685 return loops ? 0 : -ETIMEDOUT;
686 }
687
688
689 /* DMA header used by firmware and hardware. */
690 struct mwl8k_dma_data {
691 __le16 fwlen;
692 struct ieee80211_hdr wh;
693 char data[0];
694 } __packed;
695
696 /* Routines to add/remove DMA header from skb. */
697 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
698 {
699 struct mwl8k_dma_data *tr;
700 int hdrlen;
701
702 tr = (struct mwl8k_dma_data *)skb->data;
703 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
704
705 if (hdrlen != sizeof(tr->wh)) {
706 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
707 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
708 *((__le16 *)(tr->data - 2)) = qos;
709 } else {
710 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
711 }
712 }
713
714 if (hdrlen != sizeof(*tr))
715 skb_pull(skb, sizeof(*tr) - hdrlen);
716 }
717
718 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
719 {
720 struct ieee80211_hdr *wh;
721 int hdrlen;
722 struct mwl8k_dma_data *tr;
723
724 /*
725 * Add a firmware DMA header; the firmware requires that we
726 * present a 2-byte payload length followed by a 4-address
727 * header (without QoS field), followed (optionally) by any
728 * WEP/ExtIV header (but only filled in for CCMP).
729 */
730 wh = (struct ieee80211_hdr *)skb->data;
731
732 hdrlen = ieee80211_hdrlen(wh->frame_control);
733 if (hdrlen != sizeof(*tr))
734 skb_push(skb, sizeof(*tr) - hdrlen);
735
736 if (ieee80211_is_data_qos(wh->frame_control))
737 hdrlen -= 2;
738
739 tr = (struct mwl8k_dma_data *)skb->data;
740 if (wh != &tr->wh)
741 memmove(&tr->wh, wh, hdrlen);
742 if (hdrlen != sizeof(tr->wh))
743 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
744
745 /*
746 * Firmware length is the length of the fully formed "802.11
747 * payload". That is, everything except for the 802.11 header.
748 * This includes all crypto material including the MIC.
749 */
750 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
751 }
752
753
754 /*
755 * Packet reception for 88w8366 AP firmware.
756 */
757 struct mwl8k_rxd_8366_ap {
758 __le16 pkt_len;
759 __u8 sq2;
760 __u8 rate;
761 __le32 pkt_phys_addr;
762 __le32 next_rxd_phys_addr;
763 __le16 qos_control;
764 __le16 htsig2;
765 __le32 hw_rssi_info;
766 __le32 hw_noise_floor_info;
767 __u8 noise_floor;
768 __u8 pad0[3];
769 __u8 rssi;
770 __u8 rx_status;
771 __u8 channel;
772 __u8 rx_ctrl;
773 } __packed;
774
775 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
776 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
777 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
778
779 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
780
781 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
782 {
783 struct mwl8k_rxd_8366_ap *rxd = _rxd;
784
785 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
786 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
787 }
788
789 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
790 {
791 struct mwl8k_rxd_8366_ap *rxd = _rxd;
792
793 rxd->pkt_len = cpu_to_le16(len);
794 rxd->pkt_phys_addr = cpu_to_le32(addr);
795 wmb();
796 rxd->rx_ctrl = 0;
797 }
798
799 static int
800 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
801 __le16 *qos, s8 *noise)
802 {
803 struct mwl8k_rxd_8366_ap *rxd = _rxd;
804
805 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
806 return -1;
807 rmb();
808
809 memset(status, 0, sizeof(*status));
810
811 status->signal = -rxd->rssi;
812 *noise = -rxd->noise_floor;
813
814 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
815 status->flag |= RX_FLAG_HT;
816 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
817 status->flag |= RX_FLAG_40MHZ;
818 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
819 } else {
820 int i;
821
822 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
823 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
824 status->rate_idx = i;
825 break;
826 }
827 }
828 }
829
830 if (rxd->channel > 14) {
831 status->band = IEEE80211_BAND_5GHZ;
832 if (!(status->flag & RX_FLAG_HT))
833 status->rate_idx -= 5;
834 } else {
835 status->band = IEEE80211_BAND_2GHZ;
836 }
837 status->freq = ieee80211_channel_to_frequency(rxd->channel);
838
839 *qos = rxd->qos_control;
840
841 return le16_to_cpu(rxd->pkt_len);
842 }
843
844 static struct rxd_ops rxd_8366_ap_ops = {
845 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
846 .rxd_init = mwl8k_rxd_8366_ap_init,
847 .rxd_refill = mwl8k_rxd_8366_ap_refill,
848 .rxd_process = mwl8k_rxd_8366_ap_process,
849 };
850
851 /*
852 * Packet reception for STA firmware.
853 */
854 struct mwl8k_rxd_sta {
855 __le16 pkt_len;
856 __u8 link_quality;
857 __u8 noise_level;
858 __le32 pkt_phys_addr;
859 __le32 next_rxd_phys_addr;
860 __le16 qos_control;
861 __le16 rate_info;
862 __le32 pad0[4];
863 __u8 rssi;
864 __u8 channel;
865 __le16 pad1;
866 __u8 rx_ctrl;
867 __u8 rx_status;
868 __u8 pad2[2];
869 } __packed;
870
871 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
872 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
873 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
874 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
875 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
876 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
877
878 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
879
880 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
881 {
882 struct mwl8k_rxd_sta *rxd = _rxd;
883
884 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
885 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
886 }
887
888 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
889 {
890 struct mwl8k_rxd_sta *rxd = _rxd;
891
892 rxd->pkt_len = cpu_to_le16(len);
893 rxd->pkt_phys_addr = cpu_to_le32(addr);
894 wmb();
895 rxd->rx_ctrl = 0;
896 }
897
898 static int
899 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
900 __le16 *qos, s8 *noise)
901 {
902 struct mwl8k_rxd_sta *rxd = _rxd;
903 u16 rate_info;
904
905 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
906 return -1;
907 rmb();
908
909 rate_info = le16_to_cpu(rxd->rate_info);
910
911 memset(status, 0, sizeof(*status));
912
913 status->signal = -rxd->rssi;
914 *noise = -rxd->noise_level;
915 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
916 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
917
918 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
919 status->flag |= RX_FLAG_SHORTPRE;
920 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
921 status->flag |= RX_FLAG_40MHZ;
922 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
923 status->flag |= RX_FLAG_SHORT_GI;
924 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
925 status->flag |= RX_FLAG_HT;
926
927 if (rxd->channel > 14) {
928 status->band = IEEE80211_BAND_5GHZ;
929 if (!(status->flag & RX_FLAG_HT))
930 status->rate_idx -= 5;
931 } else {
932 status->band = IEEE80211_BAND_2GHZ;
933 }
934 status->freq = ieee80211_channel_to_frequency(rxd->channel);
935
936 *qos = rxd->qos_control;
937
938 return le16_to_cpu(rxd->pkt_len);
939 }
940
941 static struct rxd_ops rxd_sta_ops = {
942 .rxd_size = sizeof(struct mwl8k_rxd_sta),
943 .rxd_init = mwl8k_rxd_sta_init,
944 .rxd_refill = mwl8k_rxd_sta_refill,
945 .rxd_process = mwl8k_rxd_sta_process,
946 };
947
948
949 #define MWL8K_RX_DESCS 256
950 #define MWL8K_RX_MAXSZ 3800
951
952 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
953 {
954 struct mwl8k_priv *priv = hw->priv;
955 struct mwl8k_rx_queue *rxq = priv->rxq + index;
956 int size;
957 int i;
958
959 rxq->rxd_count = 0;
960 rxq->head = 0;
961 rxq->tail = 0;
962
963 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
964
965 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
966 if (rxq->rxd == NULL) {
967 wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
968 return -ENOMEM;
969 }
970 memset(rxq->rxd, 0, size);
971
972 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
973 if (rxq->buf == NULL) {
974 wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
975 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
976 return -ENOMEM;
977 }
978 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
979
980 for (i = 0; i < MWL8K_RX_DESCS; i++) {
981 int desc_size;
982 void *rxd;
983 int nexti;
984 dma_addr_t next_dma_addr;
985
986 desc_size = priv->rxd_ops->rxd_size;
987 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
988
989 nexti = i + 1;
990 if (nexti == MWL8K_RX_DESCS)
991 nexti = 0;
992 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
993
994 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
995 }
996
997 return 0;
998 }
999
1000 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
1001 {
1002 struct mwl8k_priv *priv = hw->priv;
1003 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1004 int refilled;
1005
1006 refilled = 0;
1007 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
1008 struct sk_buff *skb;
1009 dma_addr_t addr;
1010 int rx;
1011 void *rxd;
1012
1013 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
1014 if (skb == NULL)
1015 break;
1016
1017 addr = pci_map_single(priv->pdev, skb->data,
1018 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
1019
1020 rxq->rxd_count++;
1021 rx = rxq->tail++;
1022 if (rxq->tail == MWL8K_RX_DESCS)
1023 rxq->tail = 0;
1024 rxq->buf[rx].skb = skb;
1025 dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
1026
1027 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
1028 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
1029
1030 refilled++;
1031 }
1032
1033 return refilled;
1034 }
1035
1036 /* Must be called only when the card's reception is completely halted */
1037 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
1038 {
1039 struct mwl8k_priv *priv = hw->priv;
1040 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1041 int i;
1042
1043 for (i = 0; i < MWL8K_RX_DESCS; i++) {
1044 if (rxq->buf[i].skb != NULL) {
1045 pci_unmap_single(priv->pdev,
1046 dma_unmap_addr(&rxq->buf[i], dma),
1047 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1048 dma_unmap_addr_set(&rxq->buf[i], dma, 0);
1049
1050 kfree_skb(rxq->buf[i].skb);
1051 rxq->buf[i].skb = NULL;
1052 }
1053 }
1054
1055 kfree(rxq->buf);
1056 rxq->buf = NULL;
1057
1058 pci_free_consistent(priv->pdev,
1059 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
1060 rxq->rxd, rxq->rxd_dma);
1061 rxq->rxd = NULL;
1062 }
1063
1064
1065 /*
1066 * Scan a list of BSSIDs to process for finalize join.
1067 * Allows for extension to process multiple BSSIDs.
1068 */
1069 static inline int
1070 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1071 {
1072 return priv->capture_beacon &&
1073 ieee80211_is_beacon(wh->frame_control) &&
1074 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1075 }
1076
1077 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1078 struct sk_buff *skb)
1079 {
1080 struct mwl8k_priv *priv = hw->priv;
1081
1082 priv->capture_beacon = false;
1083 memset(priv->capture_bssid, 0, ETH_ALEN);
1084
1085 /*
1086 * Use GFP_ATOMIC as rxq_process is called from
1087 * the primary interrupt handler, memory allocation call
1088 * must not sleep.
1089 */
1090 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1091 if (priv->beacon_skb != NULL)
1092 ieee80211_queue_work(hw, &priv->finalize_join_worker);
1093 }
1094
1095 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1096 {
1097 struct mwl8k_priv *priv = hw->priv;
1098 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1099 int processed;
1100
1101 processed = 0;
1102 while (rxq->rxd_count && limit--) {
1103 struct sk_buff *skb;
1104 void *rxd;
1105 int pkt_len;
1106 struct ieee80211_rx_status status;
1107 __le16 qos;
1108
1109 skb = rxq->buf[rxq->head].skb;
1110 if (skb == NULL)
1111 break;
1112
1113 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1114
1115 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1116 &priv->noise);
1117 if (pkt_len < 0)
1118 break;
1119
1120 rxq->buf[rxq->head].skb = NULL;
1121
1122 pci_unmap_single(priv->pdev,
1123 dma_unmap_addr(&rxq->buf[rxq->head], dma),
1124 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1125 dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1126
1127 rxq->head++;
1128 if (rxq->head == MWL8K_RX_DESCS)
1129 rxq->head = 0;
1130
1131 rxq->rxd_count--;
1132
1133 skb_put(skb, pkt_len);
1134 mwl8k_remove_dma_header(skb, qos);
1135
1136 /*
1137 * Check for a pending join operation. Save a
1138 * copy of the beacon and schedule a tasklet to
1139 * send a FINALIZE_JOIN command to the firmware.
1140 */
1141 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1142 mwl8k_save_beacon(hw, skb);
1143
1144 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1145 ieee80211_rx_irqsafe(hw, skb);
1146
1147 processed++;
1148 }
1149
1150 return processed;
1151 }
1152
1153
1154 /*
1155 * Packet transmission.
1156 */
1157
1158 #define MWL8K_TXD_STATUS_OK 0x00000001
1159 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1160 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1161 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1162 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1163
1164 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1165 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1166 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1167 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1168 #define MWL8K_QOS_EOSP 0x0010
1169
1170 struct mwl8k_tx_desc {
1171 __le32 status;
1172 __u8 data_rate;
1173 __u8 tx_priority;
1174 __le16 qos_control;
1175 __le32 pkt_phys_addr;
1176 __le16 pkt_len;
1177 __u8 dest_MAC_addr[ETH_ALEN];
1178 __le32 next_txd_phys_addr;
1179 __le32 reserved;
1180 __le16 rate_info;
1181 __u8 peer_id;
1182 __u8 tx_frag_cnt;
1183 } __packed;
1184
1185 #define MWL8K_TX_DESCS 128
1186
1187 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1188 {
1189 struct mwl8k_priv *priv = hw->priv;
1190 struct mwl8k_tx_queue *txq = priv->txq + index;
1191 int size;
1192 int i;
1193
1194 txq->len = 0;
1195 txq->head = 0;
1196 txq->tail = 0;
1197
1198 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1199
1200 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1201 if (txq->txd == NULL) {
1202 wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
1203 return -ENOMEM;
1204 }
1205 memset(txq->txd, 0, size);
1206
1207 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1208 if (txq->skb == NULL) {
1209 wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
1210 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1211 return -ENOMEM;
1212 }
1213 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1214
1215 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1216 struct mwl8k_tx_desc *tx_desc;
1217 int nexti;
1218
1219 tx_desc = txq->txd + i;
1220 nexti = (i + 1) % MWL8K_TX_DESCS;
1221
1222 tx_desc->status = 0;
1223 tx_desc->next_txd_phys_addr =
1224 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1225 }
1226
1227 return 0;
1228 }
1229
1230 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1231 {
1232 iowrite32(MWL8K_H2A_INT_PPA_READY,
1233 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1234 iowrite32(MWL8K_H2A_INT_DUMMY,
1235 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1236 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1237 }
1238
1239 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1240 {
1241 struct mwl8k_priv *priv = hw->priv;
1242 int i;
1243
1244 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1245 struct mwl8k_tx_queue *txq = priv->txq + i;
1246 int fw_owned = 0;
1247 int drv_owned = 0;
1248 int unused = 0;
1249 int desc;
1250
1251 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1252 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1253 u32 status;
1254
1255 status = le32_to_cpu(tx_desc->status);
1256 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1257 fw_owned++;
1258 else
1259 drv_owned++;
1260
1261 if (tx_desc->pkt_len == 0)
1262 unused++;
1263 }
1264
1265 wiphy_err(hw->wiphy,
1266 "txq[%d] len=%d head=%d tail=%d "
1267 "fw_owned=%d drv_owned=%d unused=%d\n",
1268 i,
1269 txq->len, txq->head, txq->tail,
1270 fw_owned, drv_owned, unused);
1271 }
1272 }
1273
1274 /*
1275 * Must be called with priv->fw_mutex held and tx queues stopped.
1276 */
1277 #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
1278
1279 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1280 {
1281 struct mwl8k_priv *priv = hw->priv;
1282 DECLARE_COMPLETION_ONSTACK(tx_wait);
1283 int retry;
1284 int rc;
1285
1286 might_sleep();
1287
1288 /*
1289 * The TX queues are stopped at this point, so this test
1290 * doesn't need to take ->tx_lock.
1291 */
1292 if (!priv->pending_tx_pkts)
1293 return 0;
1294
1295 retry = 0;
1296 rc = 0;
1297
1298 spin_lock_bh(&priv->tx_lock);
1299 priv->tx_wait = &tx_wait;
1300 while (!rc) {
1301 int oldcount;
1302 unsigned long timeout;
1303
1304 oldcount = priv->pending_tx_pkts;
1305
1306 spin_unlock_bh(&priv->tx_lock);
1307 timeout = wait_for_completion_timeout(&tx_wait,
1308 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1309 spin_lock_bh(&priv->tx_lock);
1310
1311 if (timeout) {
1312 WARN_ON(priv->pending_tx_pkts);
1313 if (retry) {
1314 wiphy_notice(hw->wiphy, "tx rings drained\n");
1315 }
1316 break;
1317 }
1318
1319 if (priv->pending_tx_pkts < oldcount) {
1320 wiphy_notice(hw->wiphy,
1321 "waiting for tx rings to drain (%d -> %d pkts)\n",
1322 oldcount, priv->pending_tx_pkts);
1323 retry = 1;
1324 continue;
1325 }
1326
1327 priv->tx_wait = NULL;
1328
1329 wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
1330 MWL8K_TX_WAIT_TIMEOUT_MS);
1331 mwl8k_dump_tx_rings(hw);
1332
1333 rc = -ETIMEDOUT;
1334 }
1335 spin_unlock_bh(&priv->tx_lock);
1336
1337 return rc;
1338 }
1339
1340 #define MWL8K_TXD_SUCCESS(status) \
1341 ((status) & (MWL8K_TXD_STATUS_OK | \
1342 MWL8K_TXD_STATUS_OK_RETRY | \
1343 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1344
1345 static int
1346 mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
1347 {
1348 struct mwl8k_priv *priv = hw->priv;
1349 struct mwl8k_tx_queue *txq = priv->txq + index;
1350 int processed;
1351
1352 processed = 0;
1353 while (txq->len > 0 && limit--) {
1354 int tx;
1355 struct mwl8k_tx_desc *tx_desc;
1356 unsigned long addr;
1357 int size;
1358 struct sk_buff *skb;
1359 struct ieee80211_tx_info *info;
1360 u32 status;
1361
1362 tx = txq->head;
1363 tx_desc = txq->txd + tx;
1364
1365 status = le32_to_cpu(tx_desc->status);
1366
1367 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1368 if (!force)
1369 break;
1370 tx_desc->status &=
1371 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1372 }
1373
1374 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1375 BUG_ON(txq->len == 0);
1376 txq->len--;
1377 priv->pending_tx_pkts--;
1378
1379 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1380 size = le16_to_cpu(tx_desc->pkt_len);
1381 skb = txq->skb[tx];
1382 txq->skb[tx] = NULL;
1383
1384 BUG_ON(skb == NULL);
1385 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1386
1387 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1388
1389 /* Mark descriptor as unused */
1390 tx_desc->pkt_phys_addr = 0;
1391 tx_desc->pkt_len = 0;
1392
1393 info = IEEE80211_SKB_CB(skb);
1394 ieee80211_tx_info_clear_status(info);
1395 if (MWL8K_TXD_SUCCESS(status))
1396 info->flags |= IEEE80211_TX_STAT_ACK;
1397
1398 ieee80211_tx_status_irqsafe(hw, skb);
1399
1400 processed++;
1401 }
1402
1403 if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1404 ieee80211_wake_queue(hw, index);
1405
1406 return processed;
1407 }
1408
1409 /* must be called only when the card's transmit is completely halted */
1410 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1411 {
1412 struct mwl8k_priv *priv = hw->priv;
1413 struct mwl8k_tx_queue *txq = priv->txq + index;
1414
1415 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
1416
1417 kfree(txq->skb);
1418 txq->skb = NULL;
1419
1420 pci_free_consistent(priv->pdev,
1421 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1422 txq->txd, txq->txd_dma);
1423 txq->txd = NULL;
1424 }
1425
1426 static int
1427 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1428 {
1429 struct mwl8k_priv *priv = hw->priv;
1430 struct ieee80211_tx_info *tx_info;
1431 struct mwl8k_vif *mwl8k_vif;
1432 struct ieee80211_hdr *wh;
1433 struct mwl8k_tx_queue *txq;
1434 struct mwl8k_tx_desc *tx;
1435 dma_addr_t dma;
1436 u32 txstatus;
1437 u8 txdatarate;
1438 u16 qos;
1439
1440 wh = (struct ieee80211_hdr *)skb->data;
1441 if (ieee80211_is_data_qos(wh->frame_control))
1442 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1443 else
1444 qos = 0;
1445
1446 mwl8k_add_dma_header(skb);
1447 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1448
1449 tx_info = IEEE80211_SKB_CB(skb);
1450 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1451
1452 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1453 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1454 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1455 mwl8k_vif->seqno += 0x10;
1456 }
1457
1458 /* Setup firmware control bit fields for each frame type. */
1459 txstatus = 0;
1460 txdatarate = 0;
1461 if (ieee80211_is_mgmt(wh->frame_control) ||
1462 ieee80211_is_ctl(wh->frame_control)) {
1463 txdatarate = 0;
1464 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1465 } else if (ieee80211_is_data(wh->frame_control)) {
1466 txdatarate = 1;
1467 if (is_multicast_ether_addr(wh->addr1))
1468 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1469
1470 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1471 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1472 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1473 else
1474 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1475 }
1476
1477 dma = pci_map_single(priv->pdev, skb->data,
1478 skb->len, PCI_DMA_TODEVICE);
1479
1480 if (pci_dma_mapping_error(priv->pdev, dma)) {
1481 wiphy_debug(hw->wiphy,
1482 "failed to dma map skb, dropping TX frame.\n");
1483 dev_kfree_skb(skb);
1484 return NETDEV_TX_OK;
1485 }
1486
1487 spin_lock_bh(&priv->tx_lock);
1488
1489 txq = priv->txq + index;
1490
1491 BUG_ON(txq->skb[txq->tail] != NULL);
1492 txq->skb[txq->tail] = skb;
1493
1494 tx = txq->txd + txq->tail;
1495 tx->data_rate = txdatarate;
1496 tx->tx_priority = index;
1497 tx->qos_control = cpu_to_le16(qos);
1498 tx->pkt_phys_addr = cpu_to_le32(dma);
1499 tx->pkt_len = cpu_to_le16(skb->len);
1500 tx->rate_info = 0;
1501 if (!priv->ap_fw && tx_info->control.sta != NULL)
1502 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1503 else
1504 tx->peer_id = 0;
1505 wmb();
1506 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1507
1508 txq->len++;
1509 priv->pending_tx_pkts++;
1510
1511 txq->tail++;
1512 if (txq->tail == MWL8K_TX_DESCS)
1513 txq->tail = 0;
1514
1515 if (txq->head == txq->tail)
1516 ieee80211_stop_queue(hw, index);
1517
1518 mwl8k_tx_start(priv);
1519
1520 spin_unlock_bh(&priv->tx_lock);
1521
1522 return NETDEV_TX_OK;
1523 }
1524
1525
1526 /*
1527 * Firmware access.
1528 *
1529 * We have the following requirements for issuing firmware commands:
1530 * - Some commands require that the packet transmit path is idle when
1531 * the command is issued. (For simplicity, we'll just quiesce the
1532 * transmit path for every command.)
1533 * - There are certain sequences of commands that need to be issued to
1534 * the hardware sequentially, with no other intervening commands.
1535 *
1536 * This leads to an implementation of a "firmware lock" as a mutex that
1537 * can be taken recursively, and which is taken by both the low-level
1538 * command submission function (mwl8k_post_cmd) as well as any users of
1539 * that function that require issuing of an atomic sequence of commands,
1540 * and quiesces the transmit path whenever it's taken.
1541 */
1542 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1543 {
1544 struct mwl8k_priv *priv = hw->priv;
1545
1546 if (priv->fw_mutex_owner != current) {
1547 int rc;
1548
1549 mutex_lock(&priv->fw_mutex);
1550 ieee80211_stop_queues(hw);
1551
1552 rc = mwl8k_tx_wait_empty(hw);
1553 if (rc) {
1554 ieee80211_wake_queues(hw);
1555 mutex_unlock(&priv->fw_mutex);
1556
1557 return rc;
1558 }
1559
1560 priv->fw_mutex_owner = current;
1561 }
1562
1563 priv->fw_mutex_depth++;
1564
1565 return 0;
1566 }
1567
1568 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1569 {
1570 struct mwl8k_priv *priv = hw->priv;
1571
1572 if (!--priv->fw_mutex_depth) {
1573 ieee80211_wake_queues(hw);
1574 priv->fw_mutex_owner = NULL;
1575 mutex_unlock(&priv->fw_mutex);
1576 }
1577 }
1578
1579
1580 /*
1581 * Command processing.
1582 */
1583
1584 /* Timeout firmware commands after 10s */
1585 #define MWL8K_CMD_TIMEOUT_MS 10000
1586
1587 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1588 {
1589 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1590 struct mwl8k_priv *priv = hw->priv;
1591 void __iomem *regs = priv->regs;
1592 dma_addr_t dma_addr;
1593 unsigned int dma_size;
1594 int rc;
1595 unsigned long timeout = 0;
1596 u8 buf[32];
1597
1598 cmd->result = (__force __le16) 0xffff;
1599 dma_size = le16_to_cpu(cmd->length);
1600 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1601 PCI_DMA_BIDIRECTIONAL);
1602 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1603 return -ENOMEM;
1604
1605 rc = mwl8k_fw_lock(hw);
1606 if (rc) {
1607 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1608 PCI_DMA_BIDIRECTIONAL);
1609 return rc;
1610 }
1611
1612 priv->hostcmd_wait = &cmd_wait;
1613 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1614 iowrite32(MWL8K_H2A_INT_DOORBELL,
1615 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1616 iowrite32(MWL8K_H2A_INT_DUMMY,
1617 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1618
1619 timeout = wait_for_completion_timeout(&cmd_wait,
1620 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1621
1622 priv->hostcmd_wait = NULL;
1623
1624 mwl8k_fw_unlock(hw);
1625
1626 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1627 PCI_DMA_BIDIRECTIONAL);
1628
1629 if (!timeout) {
1630 wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
1631 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1632 MWL8K_CMD_TIMEOUT_MS);
1633 rc = -ETIMEDOUT;
1634 } else {
1635 int ms;
1636
1637 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1638
1639 rc = cmd->result ? -EINVAL : 0;
1640 if (rc)
1641 wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
1642 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1643 le16_to_cpu(cmd->result));
1644 else if (ms > 2000)
1645 wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
1646 mwl8k_cmd_name(cmd->code,
1647 buf, sizeof(buf)),
1648 ms);
1649 }
1650
1651 return rc;
1652 }
1653
1654 static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
1655 struct ieee80211_vif *vif,
1656 struct mwl8k_cmd_pkt *cmd)
1657 {
1658 if (vif != NULL)
1659 cmd->macid = MWL8K_VIF(vif)->macid;
1660 return mwl8k_post_cmd(hw, cmd);
1661 }
1662
1663 /*
1664 * Setup code shared between STA and AP firmware images.
1665 */
1666 static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
1667 {
1668 struct mwl8k_priv *priv = hw->priv;
1669
1670 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
1671 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
1672
1673 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
1674 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
1675
1676 priv->band_24.band = IEEE80211_BAND_2GHZ;
1677 priv->band_24.channels = priv->channels_24;
1678 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
1679 priv->band_24.bitrates = priv->rates_24;
1680 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
1681
1682 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
1683 }
1684
1685 static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
1686 {
1687 struct mwl8k_priv *priv = hw->priv;
1688
1689 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
1690 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
1691
1692 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
1693 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
1694
1695 priv->band_50.band = IEEE80211_BAND_5GHZ;
1696 priv->band_50.channels = priv->channels_50;
1697 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
1698 priv->band_50.bitrates = priv->rates_50;
1699 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
1700
1701 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
1702 }
1703
1704 /*
1705 * CMD_GET_HW_SPEC (STA version).
1706 */
1707 struct mwl8k_cmd_get_hw_spec_sta {
1708 struct mwl8k_cmd_pkt header;
1709 __u8 hw_rev;
1710 __u8 host_interface;
1711 __le16 num_mcaddrs;
1712 __u8 perm_addr[ETH_ALEN];
1713 __le16 region_code;
1714 __le32 fw_rev;
1715 __le32 ps_cookie;
1716 __le32 caps;
1717 __u8 mcs_bitmap[16];
1718 __le32 rx_queue_ptr;
1719 __le32 num_tx_queues;
1720 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1721 __le32 caps2;
1722 __le32 num_tx_desc_per_queue;
1723 __le32 total_rxd;
1724 } __packed;
1725
1726 #define MWL8K_CAP_MAX_AMSDU 0x20000000
1727 #define MWL8K_CAP_GREENFIELD 0x08000000
1728 #define MWL8K_CAP_AMPDU 0x04000000
1729 #define MWL8K_CAP_RX_STBC 0x01000000
1730 #define MWL8K_CAP_TX_STBC 0x00800000
1731 #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1732 #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1733 #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1734 #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1735 #define MWL8K_CAP_DELAY_BA 0x00003000
1736 #define MWL8K_CAP_MIMO 0x00000200
1737 #define MWL8K_CAP_40MHZ 0x00000100
1738 #define MWL8K_CAP_BAND_MASK 0x00000007
1739 #define MWL8K_CAP_5GHZ 0x00000004
1740 #define MWL8K_CAP_2GHZ4 0x00000001
1741
1742 static void
1743 mwl8k_set_ht_caps(struct ieee80211_hw *hw,
1744 struct ieee80211_supported_band *band, u32 cap)
1745 {
1746 int rx_streams;
1747 int tx_streams;
1748
1749 band->ht_cap.ht_supported = 1;
1750
1751 if (cap & MWL8K_CAP_MAX_AMSDU)
1752 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
1753 if (cap & MWL8K_CAP_GREENFIELD)
1754 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
1755 if (cap & MWL8K_CAP_AMPDU) {
1756 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
1757 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1758 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
1759 }
1760 if (cap & MWL8K_CAP_RX_STBC)
1761 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
1762 if (cap & MWL8K_CAP_TX_STBC)
1763 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
1764 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
1765 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
1766 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
1767 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
1768 if (cap & MWL8K_CAP_DELAY_BA)
1769 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
1770 if (cap & MWL8K_CAP_40MHZ)
1771 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
1772
1773 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1774 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1775
1776 band->ht_cap.mcs.rx_mask[0] = 0xff;
1777 if (rx_streams >= 2)
1778 band->ht_cap.mcs.rx_mask[1] = 0xff;
1779 if (rx_streams >= 3)
1780 band->ht_cap.mcs.rx_mask[2] = 0xff;
1781 band->ht_cap.mcs.rx_mask[4] = 0x01;
1782 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1783
1784 if (rx_streams != tx_streams) {
1785 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1786 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
1787 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1788 }
1789 }
1790
1791 static void
1792 mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
1793 {
1794 struct mwl8k_priv *priv = hw->priv;
1795
1796 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
1797 mwl8k_setup_2ghz_band(hw);
1798 if (caps & MWL8K_CAP_MIMO)
1799 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
1800 }
1801
1802 if (caps & MWL8K_CAP_5GHZ) {
1803 mwl8k_setup_5ghz_band(hw);
1804 if (caps & MWL8K_CAP_MIMO)
1805 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
1806 }
1807 }
1808
1809 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1810 {
1811 struct mwl8k_priv *priv = hw->priv;
1812 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1813 int rc;
1814 int i;
1815
1816 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1817 if (cmd == NULL)
1818 return -ENOMEM;
1819
1820 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1821 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1822
1823 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1824 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1825 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1826 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1827 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1828 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1829 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1830 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1831
1832 rc = mwl8k_post_cmd(hw, &cmd->header);
1833
1834 if (!rc) {
1835 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1836 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1837 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1838 priv->hw_rev = cmd->hw_rev;
1839 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
1840 priv->ap_macids_supported = 0x00000000;
1841 priv->sta_macids_supported = 0x00000001;
1842 }
1843
1844 kfree(cmd);
1845 return rc;
1846 }
1847
1848 /*
1849 * CMD_GET_HW_SPEC (AP version).
1850 */
1851 struct mwl8k_cmd_get_hw_spec_ap {
1852 struct mwl8k_cmd_pkt header;
1853 __u8 hw_rev;
1854 __u8 host_interface;
1855 __le16 num_wcb;
1856 __le16 num_mcaddrs;
1857 __u8 perm_addr[ETH_ALEN];
1858 __le16 region_code;
1859 __le16 num_antenna;
1860 __le32 fw_rev;
1861 __le32 wcbbase0;
1862 __le32 rxwrptr;
1863 __le32 rxrdptr;
1864 __le32 ps_cookie;
1865 __le32 wcbbase1;
1866 __le32 wcbbase2;
1867 __le32 wcbbase3;
1868 __le32 fw_api_version;
1869 } __packed;
1870
1871 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1872 {
1873 struct mwl8k_priv *priv = hw->priv;
1874 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1875 int rc;
1876 u32 api_version;
1877
1878 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1879 if (cmd == NULL)
1880 return -ENOMEM;
1881
1882 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1883 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1884
1885 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1886 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1887
1888 rc = mwl8k_post_cmd(hw, &cmd->header);
1889
1890 if (!rc) {
1891 int off;
1892
1893 api_version = le32_to_cpu(cmd->fw_api_version);
1894 if (priv->device_info->fw_api_ap != api_version) {
1895 printk(KERN_ERR "%s: Unsupported fw API version for %s."
1896 " Expected %d got %d.\n", MWL8K_NAME,
1897 priv->device_info->part_name,
1898 priv->device_info->fw_api_ap,
1899 api_version);
1900 rc = -EINVAL;
1901 goto done;
1902 }
1903 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1904 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1905 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1906 priv->hw_rev = cmd->hw_rev;
1907 mwl8k_setup_2ghz_band(hw);
1908 priv->ap_macids_supported = 0x000000ff;
1909 priv->sta_macids_supported = 0x00000000;
1910
1911 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1912 iowrite32(priv->txq[0].txd_dma, priv->sram + off);
1913
1914 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1915 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
1916
1917 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1918 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
1919
1920 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1921 iowrite32(priv->txq[1].txd_dma, priv->sram + off);
1922
1923 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1924 iowrite32(priv->txq[2].txd_dma, priv->sram + off);
1925
1926 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1927 iowrite32(priv->txq[3].txd_dma, priv->sram + off);
1928 }
1929
1930 done:
1931 kfree(cmd);
1932 return rc;
1933 }
1934
1935 /*
1936 * CMD_SET_HW_SPEC.
1937 */
1938 struct mwl8k_cmd_set_hw_spec {
1939 struct mwl8k_cmd_pkt header;
1940 __u8 hw_rev;
1941 __u8 host_interface;
1942 __le16 num_mcaddrs;
1943 __u8 perm_addr[ETH_ALEN];
1944 __le16 region_code;
1945 __le32 fw_rev;
1946 __le32 ps_cookie;
1947 __le32 caps;
1948 __le32 rx_queue_ptr;
1949 __le32 num_tx_queues;
1950 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1951 __le32 flags;
1952 __le32 num_tx_desc_per_queue;
1953 __le32 total_rxd;
1954 } __packed;
1955
1956 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1957 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
1958 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
1959
1960 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1961 {
1962 struct mwl8k_priv *priv = hw->priv;
1963 struct mwl8k_cmd_set_hw_spec *cmd;
1964 int rc;
1965 int i;
1966
1967 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1968 if (cmd == NULL)
1969 return -ENOMEM;
1970
1971 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1972 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1973
1974 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1975 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1976 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1977 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1978 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1979 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
1980 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
1981 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
1982 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1983 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1984
1985 rc = mwl8k_post_cmd(hw, &cmd->header);
1986 kfree(cmd);
1987
1988 return rc;
1989 }
1990
1991 /*
1992 * CMD_MAC_MULTICAST_ADR.
1993 */
1994 struct mwl8k_cmd_mac_multicast_adr {
1995 struct mwl8k_cmd_pkt header;
1996 __le16 action;
1997 __le16 numaddr;
1998 __u8 addr[0][ETH_ALEN];
1999 };
2000
2001 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
2002 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
2003 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
2004 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
2005
2006 static struct mwl8k_cmd_pkt *
2007 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
2008 struct netdev_hw_addr_list *mc_list)
2009 {
2010 struct mwl8k_priv *priv = hw->priv;
2011 struct mwl8k_cmd_mac_multicast_adr *cmd;
2012 int size;
2013 int mc_count = 0;
2014
2015 if (mc_list)
2016 mc_count = netdev_hw_addr_list_count(mc_list);
2017
2018 if (allmulti || mc_count > priv->num_mcaddrs) {
2019 allmulti = 1;
2020 mc_count = 0;
2021 }
2022
2023 size = sizeof(*cmd) + mc_count * ETH_ALEN;
2024
2025 cmd = kzalloc(size, GFP_ATOMIC);
2026 if (cmd == NULL)
2027 return NULL;
2028
2029 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
2030 cmd->header.length = cpu_to_le16(size);
2031 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
2032 MWL8K_ENABLE_RX_BROADCAST);
2033
2034 if (allmulti) {
2035 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
2036 } else if (mc_count) {
2037 struct netdev_hw_addr *ha;
2038 int i = 0;
2039
2040 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
2041 cmd->numaddr = cpu_to_le16(mc_count);
2042 netdev_hw_addr_list_for_each(ha, mc_list) {
2043 memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
2044 }
2045 }
2046
2047 return &cmd->header;
2048 }
2049
2050 /*
2051 * CMD_GET_STAT.
2052 */
2053 struct mwl8k_cmd_get_stat {
2054 struct mwl8k_cmd_pkt header;
2055 __le32 stats[64];
2056 } __packed;
2057
2058 #define MWL8K_STAT_ACK_FAILURE 9
2059 #define MWL8K_STAT_RTS_FAILURE 12
2060 #define MWL8K_STAT_FCS_ERROR 24
2061 #define MWL8K_STAT_RTS_SUCCESS 11
2062
2063 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
2064 struct ieee80211_low_level_stats *stats)
2065 {
2066 struct mwl8k_cmd_get_stat *cmd;
2067 int rc;
2068
2069 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2070 if (cmd == NULL)
2071 return -ENOMEM;
2072
2073 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2074 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2075
2076 rc = mwl8k_post_cmd(hw, &cmd->header);
2077 if (!rc) {
2078 stats->dot11ACKFailureCount =
2079 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2080 stats->dot11RTSFailureCount =
2081 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2082 stats->dot11FCSErrorCount =
2083 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2084 stats->dot11RTSSuccessCount =
2085 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2086 }
2087 kfree(cmd);
2088
2089 return rc;
2090 }
2091
2092 /*
2093 * CMD_RADIO_CONTROL.
2094 */
2095 struct mwl8k_cmd_radio_control {
2096 struct mwl8k_cmd_pkt header;
2097 __le16 action;
2098 __le16 control;
2099 __le16 radio_on;
2100 } __packed;
2101
2102 static int
2103 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
2104 {
2105 struct mwl8k_priv *priv = hw->priv;
2106 struct mwl8k_cmd_radio_control *cmd;
2107 int rc;
2108
2109 if (enable == priv->radio_on && !force)
2110 return 0;
2111
2112 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2113 if (cmd == NULL)
2114 return -ENOMEM;
2115
2116 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2117 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2118 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2119 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
2120 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2121
2122 rc = mwl8k_post_cmd(hw, &cmd->header);
2123 kfree(cmd);
2124
2125 if (!rc)
2126 priv->radio_on = enable;
2127
2128 return rc;
2129 }
2130
2131 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
2132 {
2133 return mwl8k_cmd_radio_control(hw, 0, 0);
2134 }
2135
2136 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
2137 {
2138 return mwl8k_cmd_radio_control(hw, 1, 0);
2139 }
2140
2141 static int
2142 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2143 {
2144 struct mwl8k_priv *priv = hw->priv;
2145
2146 priv->radio_short_preamble = short_preamble;
2147
2148 return mwl8k_cmd_radio_control(hw, 1, 1);
2149 }
2150
2151 /*
2152 * CMD_RF_TX_POWER.
2153 */
2154 #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
2155
2156 struct mwl8k_cmd_rf_tx_power {
2157 struct mwl8k_cmd_pkt header;
2158 __le16 action;
2159 __le16 support_level;
2160 __le16 current_level;
2161 __le16 reserved;
2162 __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
2163 } __packed;
2164
2165 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
2166 {
2167 struct mwl8k_cmd_rf_tx_power *cmd;
2168 int rc;
2169
2170 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2171 if (cmd == NULL)
2172 return -ENOMEM;
2173
2174 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2175 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2176 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2177 cmd->support_level = cpu_to_le16(dBm);
2178
2179 rc = mwl8k_post_cmd(hw, &cmd->header);
2180 kfree(cmd);
2181
2182 return rc;
2183 }
2184
2185 /*
2186 * CMD_TX_POWER.
2187 */
2188 #define MWL8K_TX_POWER_LEVEL_TOTAL 12
2189
2190 struct mwl8k_cmd_tx_power {
2191 struct mwl8k_cmd_pkt header;
2192 __le16 action;
2193 __le16 band;
2194 __le16 channel;
2195 __le16 bw;
2196 __le16 sub_ch;
2197 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
2198 } __attribute__((packed));
2199
2200 static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
2201 struct ieee80211_conf *conf,
2202 unsigned short pwr)
2203 {
2204 struct ieee80211_channel *channel = conf->channel;
2205 struct mwl8k_cmd_tx_power *cmd;
2206 int rc;
2207 int i;
2208
2209 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2210 if (cmd == NULL)
2211 return -ENOMEM;
2212
2213 cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
2214 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2215 cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
2216
2217 if (channel->band == IEEE80211_BAND_2GHZ)
2218 cmd->band = cpu_to_le16(0x1);
2219 else if (channel->band == IEEE80211_BAND_5GHZ)
2220 cmd->band = cpu_to_le16(0x4);
2221
2222 cmd->channel = channel->hw_value;
2223
2224 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2225 conf->channel_type == NL80211_CHAN_HT20) {
2226 cmd->bw = cpu_to_le16(0x2);
2227 } else {
2228 cmd->bw = cpu_to_le16(0x4);
2229 if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2230 cmd->sub_ch = cpu_to_le16(0x3);
2231 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2232 cmd->sub_ch = cpu_to_le16(0x1);
2233 }
2234
2235 for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
2236 cmd->power_level_list[i] = cpu_to_le16(pwr);
2237
2238 rc = mwl8k_post_cmd(hw, &cmd->header);
2239 kfree(cmd);
2240
2241 return rc;
2242 }
2243
2244 /*
2245 * CMD_RF_ANTENNA.
2246 */
2247 struct mwl8k_cmd_rf_antenna {
2248 struct mwl8k_cmd_pkt header;
2249 __le16 antenna;
2250 __le16 mode;
2251 } __packed;
2252
2253 #define MWL8K_RF_ANTENNA_RX 1
2254 #define MWL8K_RF_ANTENNA_TX 2
2255
2256 static int
2257 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2258 {
2259 struct mwl8k_cmd_rf_antenna *cmd;
2260 int rc;
2261
2262 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2263 if (cmd == NULL)
2264 return -ENOMEM;
2265
2266 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2267 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2268 cmd->antenna = cpu_to_le16(antenna);
2269 cmd->mode = cpu_to_le16(mask);
2270
2271 rc = mwl8k_post_cmd(hw, &cmd->header);
2272 kfree(cmd);
2273
2274 return rc;
2275 }
2276
2277 /*
2278 * CMD_SET_BEACON.
2279 */
2280 struct mwl8k_cmd_set_beacon {
2281 struct mwl8k_cmd_pkt header;
2282 __le16 beacon_len;
2283 __u8 beacon[0];
2284 };
2285
2286 static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2287 struct ieee80211_vif *vif, u8 *beacon, int len)
2288 {
2289 struct mwl8k_cmd_set_beacon *cmd;
2290 int rc;
2291
2292 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2293 if (cmd == NULL)
2294 return -ENOMEM;
2295
2296 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2297 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2298 cmd->beacon_len = cpu_to_le16(len);
2299 memcpy(cmd->beacon, beacon, len);
2300
2301 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2302 kfree(cmd);
2303
2304 return rc;
2305 }
2306
2307 /*
2308 * CMD_SET_PRE_SCAN.
2309 */
2310 struct mwl8k_cmd_set_pre_scan {
2311 struct mwl8k_cmd_pkt header;
2312 } __packed;
2313
2314 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2315 {
2316 struct mwl8k_cmd_set_pre_scan *cmd;
2317 int rc;
2318
2319 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2320 if (cmd == NULL)
2321 return -ENOMEM;
2322
2323 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2324 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2325
2326 rc = mwl8k_post_cmd(hw, &cmd->header);
2327 kfree(cmd);
2328
2329 return rc;
2330 }
2331
2332 /*
2333 * CMD_SET_POST_SCAN.
2334 */
2335 struct mwl8k_cmd_set_post_scan {
2336 struct mwl8k_cmd_pkt header;
2337 __le32 isibss;
2338 __u8 bssid[ETH_ALEN];
2339 } __packed;
2340
2341 static int
2342 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2343 {
2344 struct mwl8k_cmd_set_post_scan *cmd;
2345 int rc;
2346
2347 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2348 if (cmd == NULL)
2349 return -ENOMEM;
2350
2351 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2352 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2353 cmd->isibss = 0;
2354 memcpy(cmd->bssid, mac, ETH_ALEN);
2355
2356 rc = mwl8k_post_cmd(hw, &cmd->header);
2357 kfree(cmd);
2358
2359 return rc;
2360 }
2361
2362 /*
2363 * CMD_SET_RF_CHANNEL.
2364 */
2365 struct mwl8k_cmd_set_rf_channel {
2366 struct mwl8k_cmd_pkt header;
2367 __le16 action;
2368 __u8 current_channel;
2369 __le32 channel_flags;
2370 } __packed;
2371
2372 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2373 struct ieee80211_conf *conf)
2374 {
2375 struct ieee80211_channel *channel = conf->channel;
2376 struct mwl8k_cmd_set_rf_channel *cmd;
2377 int rc;
2378
2379 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2380 if (cmd == NULL)
2381 return -ENOMEM;
2382
2383 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2384 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2385 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2386 cmd->current_channel = channel->hw_value;
2387
2388 if (channel->band == IEEE80211_BAND_2GHZ)
2389 cmd->channel_flags |= cpu_to_le32(0x00000001);
2390 else if (channel->band == IEEE80211_BAND_5GHZ)
2391 cmd->channel_flags |= cpu_to_le32(0x00000004);
2392
2393 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2394 conf->channel_type == NL80211_CHAN_HT20)
2395 cmd->channel_flags |= cpu_to_le32(0x00000080);
2396 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2397 cmd->channel_flags |= cpu_to_le32(0x000001900);
2398 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2399 cmd->channel_flags |= cpu_to_le32(0x000000900);
2400
2401 rc = mwl8k_post_cmd(hw, &cmd->header);
2402 kfree(cmd);
2403
2404 return rc;
2405 }
2406
2407 /*
2408 * CMD_SET_AID.
2409 */
2410 #define MWL8K_FRAME_PROT_DISABLED 0x00
2411 #define MWL8K_FRAME_PROT_11G 0x07
2412 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2413 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2414
2415 struct mwl8k_cmd_update_set_aid {
2416 struct mwl8k_cmd_pkt header;
2417 __le16 aid;
2418
2419 /* AP's MAC address (BSSID) */
2420 __u8 bssid[ETH_ALEN];
2421 __le16 protection_mode;
2422 __u8 supp_rates[14];
2423 } __packed;
2424
2425 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2426 {
2427 int i;
2428 int j;
2429
2430 /*
2431 * Clear nonstandard rates 4 and 13.
2432 */
2433 mask &= 0x1fef;
2434
2435 for (i = 0, j = 0; i < 14; i++) {
2436 if (mask & (1 << i))
2437 rates[j++] = mwl8k_rates_24[i].hw_value;
2438 }
2439 }
2440
2441 static int
2442 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2443 struct ieee80211_vif *vif, u32 legacy_rate_mask)
2444 {
2445 struct mwl8k_cmd_update_set_aid *cmd;
2446 u16 prot_mode;
2447 int rc;
2448
2449 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2450 if (cmd == NULL)
2451 return -ENOMEM;
2452
2453 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2454 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2455 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2456 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2457
2458 if (vif->bss_conf.use_cts_prot) {
2459 prot_mode = MWL8K_FRAME_PROT_11G;
2460 } else {
2461 switch (vif->bss_conf.ht_operation_mode &
2462 IEEE80211_HT_OP_MODE_PROTECTION) {
2463 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2464 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2465 break;
2466 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2467 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2468 break;
2469 default:
2470 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2471 break;
2472 }
2473 }
2474 cmd->protection_mode = cpu_to_le16(prot_mode);
2475
2476 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
2477
2478 rc = mwl8k_post_cmd(hw, &cmd->header);
2479 kfree(cmd);
2480
2481 return rc;
2482 }
2483
2484 /*
2485 * CMD_SET_RATE.
2486 */
2487 struct mwl8k_cmd_set_rate {
2488 struct mwl8k_cmd_pkt header;
2489 __u8 legacy_rates[14];
2490
2491 /* Bitmap for supported MCS codes. */
2492 __u8 mcs_set[16];
2493 __u8 reserved[16];
2494 } __packed;
2495
2496 static int
2497 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2498 u32 legacy_rate_mask, u8 *mcs_rates)
2499 {
2500 struct mwl8k_cmd_set_rate *cmd;
2501 int rc;
2502
2503 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2504 if (cmd == NULL)
2505 return -ENOMEM;
2506
2507 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2508 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2509 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2510 memcpy(cmd->mcs_set, mcs_rates, 16);
2511
2512 rc = mwl8k_post_cmd(hw, &cmd->header);
2513 kfree(cmd);
2514
2515 return rc;
2516 }
2517
2518 /*
2519 * CMD_FINALIZE_JOIN.
2520 */
2521 #define MWL8K_FJ_BEACON_MAXLEN 128
2522
2523 struct mwl8k_cmd_finalize_join {
2524 struct mwl8k_cmd_pkt header;
2525 __le32 sleep_interval; /* Number of beacon periods to sleep */
2526 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2527 } __packed;
2528
2529 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2530 int framelen, int dtim)
2531 {
2532 struct mwl8k_cmd_finalize_join *cmd;
2533 struct ieee80211_mgmt *payload = frame;
2534 int payload_len;
2535 int rc;
2536
2537 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2538 if (cmd == NULL)
2539 return -ENOMEM;
2540
2541 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2542 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2543 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2544
2545 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2546 if (payload_len < 0)
2547 payload_len = 0;
2548 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2549 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2550
2551 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2552
2553 rc = mwl8k_post_cmd(hw, &cmd->header);
2554 kfree(cmd);
2555
2556 return rc;
2557 }
2558
2559 /*
2560 * CMD_SET_RTS_THRESHOLD.
2561 */
2562 struct mwl8k_cmd_set_rts_threshold {
2563 struct mwl8k_cmd_pkt header;
2564 __le16 action;
2565 __le16 threshold;
2566 } __packed;
2567
2568 static int
2569 mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
2570 {
2571 struct mwl8k_cmd_set_rts_threshold *cmd;
2572 int rc;
2573
2574 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2575 if (cmd == NULL)
2576 return -ENOMEM;
2577
2578 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2579 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2580 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2581 cmd->threshold = cpu_to_le16(rts_thresh);
2582
2583 rc = mwl8k_post_cmd(hw, &cmd->header);
2584 kfree(cmd);
2585
2586 return rc;
2587 }
2588
2589 /*
2590 * CMD_SET_SLOT.
2591 */
2592 struct mwl8k_cmd_set_slot {
2593 struct mwl8k_cmd_pkt header;
2594 __le16 action;
2595 __u8 short_slot;
2596 } __packed;
2597
2598 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2599 {
2600 struct mwl8k_cmd_set_slot *cmd;
2601 int rc;
2602
2603 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2604 if (cmd == NULL)
2605 return -ENOMEM;
2606
2607 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2608 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2609 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2610 cmd->short_slot = short_slot_time;
2611
2612 rc = mwl8k_post_cmd(hw, &cmd->header);
2613 kfree(cmd);
2614
2615 return rc;
2616 }
2617
2618 /*
2619 * CMD_SET_EDCA_PARAMS.
2620 */
2621 struct mwl8k_cmd_set_edca_params {
2622 struct mwl8k_cmd_pkt header;
2623
2624 /* See MWL8K_SET_EDCA_XXX below */
2625 __le16 action;
2626
2627 /* TX opportunity in units of 32 us */
2628 __le16 txop;
2629
2630 union {
2631 struct {
2632 /* Log exponent of max contention period: 0...15 */
2633 __le32 log_cw_max;
2634
2635 /* Log exponent of min contention period: 0...15 */
2636 __le32 log_cw_min;
2637
2638 /* Adaptive interframe spacing in units of 32us */
2639 __u8 aifs;
2640
2641 /* TX queue to configure */
2642 __u8 txq;
2643 } ap;
2644 struct {
2645 /* Log exponent of max contention period: 0...15 */
2646 __u8 log_cw_max;
2647
2648 /* Log exponent of min contention period: 0...15 */
2649 __u8 log_cw_min;
2650
2651 /* Adaptive interframe spacing in units of 32us */
2652 __u8 aifs;
2653
2654 /* TX queue to configure */
2655 __u8 txq;
2656 } sta;
2657 };
2658 } __packed;
2659
2660 #define MWL8K_SET_EDCA_CW 0x01
2661 #define MWL8K_SET_EDCA_TXOP 0x02
2662 #define MWL8K_SET_EDCA_AIFS 0x04
2663
2664 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2665 MWL8K_SET_EDCA_TXOP | \
2666 MWL8K_SET_EDCA_AIFS)
2667
2668 static int
2669 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2670 __u16 cw_min, __u16 cw_max,
2671 __u8 aifs, __u16 txop)
2672 {
2673 struct mwl8k_priv *priv = hw->priv;
2674 struct mwl8k_cmd_set_edca_params *cmd;
2675 int rc;
2676
2677 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2678 if (cmd == NULL)
2679 return -ENOMEM;
2680
2681 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2682 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2683 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2684 cmd->txop = cpu_to_le16(txop);
2685 if (priv->ap_fw) {
2686 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2687 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2688 cmd->ap.aifs = aifs;
2689 cmd->ap.txq = qnum;
2690 } else {
2691 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2692 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2693 cmd->sta.aifs = aifs;
2694 cmd->sta.txq = qnum;
2695 }
2696
2697 rc = mwl8k_post_cmd(hw, &cmd->header);
2698 kfree(cmd);
2699
2700 return rc;
2701 }
2702
2703 /*
2704 * CMD_SET_WMM_MODE.
2705 */
2706 struct mwl8k_cmd_set_wmm_mode {
2707 struct mwl8k_cmd_pkt header;
2708 __le16 action;
2709 } __packed;
2710
2711 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2712 {
2713 struct mwl8k_priv *priv = hw->priv;
2714 struct mwl8k_cmd_set_wmm_mode *cmd;
2715 int rc;
2716
2717 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2718 if (cmd == NULL)
2719 return -ENOMEM;
2720
2721 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2722 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2723 cmd->action = cpu_to_le16(!!enable);
2724
2725 rc = mwl8k_post_cmd(hw, &cmd->header);
2726 kfree(cmd);
2727
2728 if (!rc)
2729 priv->wmm_enabled = enable;
2730
2731 return rc;
2732 }
2733
2734 /*
2735 * CMD_MIMO_CONFIG.
2736 */
2737 struct mwl8k_cmd_mimo_config {
2738 struct mwl8k_cmd_pkt header;
2739 __le32 action;
2740 __u8 rx_antenna_map;
2741 __u8 tx_antenna_map;
2742 } __packed;
2743
2744 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2745 {
2746 struct mwl8k_cmd_mimo_config *cmd;
2747 int rc;
2748
2749 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2750 if (cmd == NULL)
2751 return -ENOMEM;
2752
2753 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2754 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2755 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2756 cmd->rx_antenna_map = rx;
2757 cmd->tx_antenna_map = tx;
2758
2759 rc = mwl8k_post_cmd(hw, &cmd->header);
2760 kfree(cmd);
2761
2762 return rc;
2763 }
2764
2765 /*
2766 * CMD_USE_FIXED_RATE (STA version).
2767 */
2768 struct mwl8k_cmd_use_fixed_rate_sta {
2769 struct mwl8k_cmd_pkt header;
2770 __le32 action;
2771 __le32 allow_rate_drop;
2772 __le32 num_rates;
2773 struct {
2774 __le32 is_ht_rate;
2775 __le32 enable_retry;
2776 __le32 rate;
2777 __le32 retry_count;
2778 } rate_entry[8];
2779 __le32 rate_type;
2780 __le32 reserved1;
2781 __le32 reserved2;
2782 } __packed;
2783
2784 #define MWL8K_USE_AUTO_RATE 0x0002
2785 #define MWL8K_UCAST_RATE 0
2786
2787 static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
2788 {
2789 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
2790 int rc;
2791
2792 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2793 if (cmd == NULL)
2794 return -ENOMEM;
2795
2796 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2797 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2798 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2799 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
2800
2801 rc = mwl8k_post_cmd(hw, &cmd->header);
2802 kfree(cmd);
2803
2804 return rc;
2805 }
2806
2807 /*
2808 * CMD_USE_FIXED_RATE (AP version).
2809 */
2810 struct mwl8k_cmd_use_fixed_rate_ap {
2811 struct mwl8k_cmd_pkt header;
2812 __le32 action;
2813 __le32 allow_rate_drop;
2814 __le32 num_rates;
2815 struct mwl8k_rate_entry_ap {
2816 __le32 is_ht_rate;
2817 __le32 enable_retry;
2818 __le32 rate;
2819 __le32 retry_count;
2820 } rate_entry[4];
2821 u8 multicast_rate;
2822 u8 multicast_rate_type;
2823 u8 management_rate;
2824 } __packed;
2825
2826 static int
2827 mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2828 {
2829 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2830 int rc;
2831
2832 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2833 if (cmd == NULL)
2834 return -ENOMEM;
2835
2836 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2837 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2838 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2839 cmd->multicast_rate = mcast;
2840 cmd->management_rate = mgmt;
2841
2842 rc = mwl8k_post_cmd(hw, &cmd->header);
2843 kfree(cmd);
2844
2845 return rc;
2846 }
2847
2848 /*
2849 * CMD_ENABLE_SNIFFER.
2850 */
2851 struct mwl8k_cmd_enable_sniffer {
2852 struct mwl8k_cmd_pkt header;
2853 __le32 action;
2854 } __packed;
2855
2856 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2857 {
2858 struct mwl8k_cmd_enable_sniffer *cmd;
2859 int rc;
2860
2861 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2862 if (cmd == NULL)
2863 return -ENOMEM;
2864
2865 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2866 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2867 cmd->action = cpu_to_le32(!!enable);
2868
2869 rc = mwl8k_post_cmd(hw, &cmd->header);
2870 kfree(cmd);
2871
2872 return rc;
2873 }
2874
2875 /*
2876 * CMD_SET_MAC_ADDR.
2877 */
2878 struct mwl8k_cmd_set_mac_addr {
2879 struct mwl8k_cmd_pkt header;
2880 union {
2881 struct {
2882 __le16 mac_type;
2883 __u8 mac_addr[ETH_ALEN];
2884 } mbss;
2885 __u8 mac_addr[ETH_ALEN];
2886 };
2887 } __packed;
2888
2889 #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
2890 #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
2891 #define MWL8K_MAC_TYPE_PRIMARY_AP 2
2892 #define MWL8K_MAC_TYPE_SECONDARY_AP 3
2893
2894 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
2895 struct ieee80211_vif *vif, u8 *mac)
2896 {
2897 struct mwl8k_priv *priv = hw->priv;
2898 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
2899 struct mwl8k_cmd_set_mac_addr *cmd;
2900 int mac_type;
2901 int rc;
2902
2903 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
2904 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
2905 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
2906 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
2907 else
2908 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
2909 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
2910 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
2911 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
2912 else
2913 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
2914 }
2915
2916 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2917 if (cmd == NULL)
2918 return -ENOMEM;
2919
2920 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2921 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2922 if (priv->ap_fw) {
2923 cmd->mbss.mac_type = cpu_to_le16(mac_type);
2924 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2925 } else {
2926 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2927 }
2928
2929 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2930 kfree(cmd);
2931
2932 return rc;
2933 }
2934
2935 /*
2936 * CMD_SET_RATEADAPT_MODE.
2937 */
2938 struct mwl8k_cmd_set_rate_adapt_mode {
2939 struct mwl8k_cmd_pkt header;
2940 __le16 action;
2941 __le16 mode;
2942 } __packed;
2943
2944 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2945 {
2946 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2947 int rc;
2948
2949 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2950 if (cmd == NULL)
2951 return -ENOMEM;
2952
2953 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2954 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2955 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2956 cmd->mode = cpu_to_le16(mode);
2957
2958 rc = mwl8k_post_cmd(hw, &cmd->header);
2959 kfree(cmd);
2960
2961 return rc;
2962 }
2963
2964 /*
2965 * CMD_BSS_START.
2966 */
2967 struct mwl8k_cmd_bss_start {
2968 struct mwl8k_cmd_pkt header;
2969 __le32 enable;
2970 } __packed;
2971
2972 static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
2973 struct ieee80211_vif *vif, int enable)
2974 {
2975 struct mwl8k_cmd_bss_start *cmd;
2976 int rc;
2977
2978 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2979 if (cmd == NULL)
2980 return -ENOMEM;
2981
2982 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
2983 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2984 cmd->enable = cpu_to_le32(enable);
2985
2986 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2987 kfree(cmd);
2988
2989 return rc;
2990 }
2991
2992 /*
2993 * CMD_SET_NEW_STN.
2994 */
2995 struct mwl8k_cmd_set_new_stn {
2996 struct mwl8k_cmd_pkt header;
2997 __le16 aid;
2998 __u8 mac_addr[6];
2999 __le16 stn_id;
3000 __le16 action;
3001 __le16 rsvd;
3002 __le32 legacy_rates;
3003 __u8 ht_rates[4];
3004 __le16 cap_info;
3005 __le16 ht_capabilities_info;
3006 __u8 mac_ht_param_info;
3007 __u8 rev;
3008 __u8 control_channel;
3009 __u8 add_channel;
3010 __le16 op_mode;
3011 __le16 stbc;
3012 __u8 add_qos_info;
3013 __u8 is_qos_sta;
3014 __le32 fw_sta_ptr;
3015 } __packed;
3016
3017 #define MWL8K_STA_ACTION_ADD 0
3018 #define MWL8K_STA_ACTION_REMOVE 2
3019
3020 static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
3021 struct ieee80211_vif *vif,
3022 struct ieee80211_sta *sta)
3023 {
3024 struct mwl8k_cmd_set_new_stn *cmd;
3025 u32 rates;
3026 int rc;
3027
3028 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3029 if (cmd == NULL)
3030 return -ENOMEM;
3031
3032 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3033 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3034 cmd->aid = cpu_to_le16(sta->aid);
3035 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
3036 cmd->stn_id = cpu_to_le16(sta->aid);
3037 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
3038 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3039 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3040 else
3041 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3042 cmd->legacy_rates = cpu_to_le32(rates);
3043 if (sta->ht_cap.ht_supported) {
3044 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
3045 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
3046 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
3047 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
3048 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
3049 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
3050 ((sta->ht_cap.ampdu_density & 7) << 2);
3051 cmd->is_qos_sta = 1;
3052 }
3053
3054 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3055 kfree(cmd);
3056
3057 return rc;
3058 }
3059
3060 static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
3061 struct ieee80211_vif *vif)
3062 {
3063 struct mwl8k_cmd_set_new_stn *cmd;
3064 int rc;
3065
3066 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3067 if (cmd == NULL)
3068 return -ENOMEM;
3069
3070 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3071 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3072 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
3073
3074 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3075 kfree(cmd);
3076
3077 return rc;
3078 }
3079
3080 static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
3081 struct ieee80211_vif *vif, u8 *addr)
3082 {
3083 struct mwl8k_cmd_set_new_stn *cmd;
3084 int rc;
3085
3086 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3087 if (cmd == NULL)
3088 return -ENOMEM;
3089
3090 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3091 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3092 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3093 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
3094
3095 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3096 kfree(cmd);
3097
3098 return rc;
3099 }
3100
3101 /*
3102 * CMD_UPDATE_STADB.
3103 */
3104 struct ewc_ht_info {
3105 __le16 control1;
3106 __le16 control2;
3107 __le16 control3;
3108 } __packed;
3109
3110 struct peer_capability_info {
3111 /* Peer type - AP vs. STA. */
3112 __u8 peer_type;
3113
3114 /* Basic 802.11 capabilities from assoc resp. */
3115 __le16 basic_caps;
3116
3117 /* Set if peer supports 802.11n high throughput (HT). */
3118 __u8 ht_support;
3119
3120 /* Valid if HT is supported. */
3121 __le16 ht_caps;
3122 __u8 extended_ht_caps;
3123 struct ewc_ht_info ewc_info;
3124
3125 /* Legacy rate table. Intersection of our rates and peer rates. */
3126 __u8 legacy_rates[12];
3127
3128 /* HT rate table. Intersection of our rates and peer rates. */
3129 __u8 ht_rates[16];
3130 __u8 pad[16];
3131
3132 /* If set, interoperability mode, no proprietary extensions. */
3133 __u8 interop;
3134 __u8 pad2;
3135 __u8 station_id;
3136 __le16 amsdu_enabled;
3137 } __packed;
3138
3139 struct mwl8k_cmd_update_stadb {
3140 struct mwl8k_cmd_pkt header;
3141
3142 /* See STADB_ACTION_TYPE */
3143 __le32 action;
3144
3145 /* Peer MAC address */
3146 __u8 peer_addr[ETH_ALEN];
3147
3148 __le32 reserved;
3149
3150 /* Peer info - valid during add/update. */
3151 struct peer_capability_info peer_info;
3152 } __packed;
3153
3154 #define MWL8K_STA_DB_MODIFY_ENTRY 1
3155 #define MWL8K_STA_DB_DEL_ENTRY 2
3156
3157 /* Peer Entry flags - used to define the type of the peer node */
3158 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
3159
3160 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
3161 struct ieee80211_vif *vif,
3162 struct ieee80211_sta *sta)
3163 {
3164 struct mwl8k_cmd_update_stadb *cmd;
3165 struct peer_capability_info *p;
3166 u32 rates;
3167 int rc;
3168
3169 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3170 if (cmd == NULL)
3171 return -ENOMEM;
3172
3173 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3174 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3175 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
3176 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
3177
3178 p = &cmd->peer_info;
3179 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
3180 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
3181 p->ht_support = sta->ht_cap.ht_supported;
3182 p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
3183 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
3184 ((sta->ht_cap.ampdu_density & 7) << 2);
3185 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3186 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3187 else
3188 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3189 legacy_rate_mask_to_array(p->legacy_rates, rates);
3190 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
3191 p->interop = 1;
3192 p->amsdu_enabled = 0;
3193
3194 rc = mwl8k_post_cmd(hw, &cmd->header);
3195 kfree(cmd);
3196
3197 return rc ? rc : p->station_id;
3198 }
3199
3200 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
3201 struct ieee80211_vif *vif, u8 *addr)
3202 {
3203 struct mwl8k_cmd_update_stadb *cmd;
3204 int rc;
3205
3206 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3207 if (cmd == NULL)
3208 return -ENOMEM;
3209
3210 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3211 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3212 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
3213 memcpy(cmd->peer_addr, addr, ETH_ALEN);
3214
3215 rc = mwl8k_post_cmd(hw, &cmd->header);
3216 kfree(cmd);
3217
3218 return rc;
3219 }
3220
3221
3222 /*
3223 * Interrupt handling.
3224 */
3225 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
3226 {
3227 struct ieee80211_hw *hw = dev_id;
3228 struct mwl8k_priv *priv = hw->priv;
3229 u32 status;
3230
3231 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3232 if (!status)
3233 return IRQ_NONE;
3234
3235 if (status & MWL8K_A2H_INT_TX_DONE) {
3236 status &= ~MWL8K_A2H_INT_TX_DONE;
3237 tasklet_schedule(&priv->poll_tx_task);
3238 }
3239
3240 if (status & MWL8K_A2H_INT_RX_READY) {
3241 status &= ~MWL8K_A2H_INT_RX_READY;
3242 tasklet_schedule(&priv->poll_rx_task);
3243 }
3244
3245 if (status)
3246 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3247
3248 if (status & MWL8K_A2H_INT_OPC_DONE) {
3249 if (priv->hostcmd_wait != NULL)
3250 complete(priv->hostcmd_wait);
3251 }
3252
3253 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
3254 if (!mutex_is_locked(&priv->fw_mutex) &&
3255 priv->radio_on && priv->pending_tx_pkts)
3256 mwl8k_tx_start(priv);
3257 }
3258
3259 return IRQ_HANDLED;
3260 }
3261
3262 static void mwl8k_tx_poll(unsigned long data)
3263 {
3264 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3265 struct mwl8k_priv *priv = hw->priv;
3266 int limit;
3267 int i;
3268
3269 limit = 32;
3270
3271 spin_lock_bh(&priv->tx_lock);
3272
3273 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3274 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
3275
3276 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
3277 complete(priv->tx_wait);
3278 priv->tx_wait = NULL;
3279 }
3280
3281 spin_unlock_bh(&priv->tx_lock);
3282
3283 if (limit) {
3284 writel(~MWL8K_A2H_INT_TX_DONE,
3285 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3286 } else {
3287 tasklet_schedule(&priv->poll_tx_task);
3288 }
3289 }
3290
3291 static void mwl8k_rx_poll(unsigned long data)
3292 {
3293 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3294 struct mwl8k_priv *priv = hw->priv;
3295 int limit;
3296
3297 limit = 32;
3298 limit -= rxq_process(hw, 0, limit);
3299 limit -= rxq_refill(hw, 0, limit);
3300
3301 if (limit) {
3302 writel(~MWL8K_A2H_INT_RX_READY,
3303 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3304 } else {
3305 tasklet_schedule(&priv->poll_rx_task);
3306 }
3307 }
3308
3309
3310 /*
3311 * Core driver operations.
3312 */
3313 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3314 {
3315 struct mwl8k_priv *priv = hw->priv;
3316 int index = skb_get_queue_mapping(skb);
3317 int rc;
3318
3319 if (!priv->radio_on) {
3320 wiphy_debug(hw->wiphy,
3321 "dropped TX frame since radio disabled\n");
3322 dev_kfree_skb(skb);
3323 return NETDEV_TX_OK;
3324 }
3325
3326 rc = mwl8k_txq_xmit(hw, index, skb);
3327
3328 return rc;
3329 }
3330
3331 static int mwl8k_start(struct ieee80211_hw *hw)
3332 {
3333 struct mwl8k_priv *priv = hw->priv;
3334 int rc;
3335
3336 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3337 IRQF_SHARED, MWL8K_NAME, hw);
3338 if (rc) {
3339 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
3340 return -EIO;
3341 }
3342
3343 /* Enable TX reclaim and RX tasklets. */
3344 tasklet_enable(&priv->poll_tx_task);
3345 tasklet_enable(&priv->poll_rx_task);
3346
3347 /* Enable interrupts */
3348 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3349
3350 rc = mwl8k_fw_lock(hw);
3351 if (!rc) {
3352 rc = mwl8k_cmd_radio_enable(hw);
3353
3354 if (!priv->ap_fw) {
3355 if (!rc)
3356 rc = mwl8k_cmd_enable_sniffer(hw, 0);
3357
3358 if (!rc)
3359 rc = mwl8k_cmd_set_pre_scan(hw);
3360
3361 if (!rc)
3362 rc = mwl8k_cmd_set_post_scan(hw,
3363 "\x00\x00\x00\x00\x00\x00");
3364 }
3365
3366 if (!rc)
3367 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
3368
3369 if (!rc)
3370 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
3371
3372 mwl8k_fw_unlock(hw);
3373 }
3374
3375 if (rc) {
3376 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3377 free_irq(priv->pdev->irq, hw);
3378 tasklet_disable(&priv->poll_tx_task);
3379 tasklet_disable(&priv->poll_rx_task);
3380 }
3381
3382 return rc;
3383 }
3384
3385 static void mwl8k_stop(struct ieee80211_hw *hw)
3386 {
3387 struct mwl8k_priv *priv = hw->priv;
3388 int i;
3389
3390 mwl8k_cmd_radio_disable(hw);
3391
3392 ieee80211_stop_queues(hw);
3393
3394 /* Disable interrupts */
3395 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3396 free_irq(priv->pdev->irq, hw);
3397
3398 /* Stop finalize join worker */
3399 cancel_work_sync(&priv->finalize_join_worker);
3400 if (priv->beacon_skb != NULL)
3401 dev_kfree_skb(priv->beacon_skb);
3402
3403 /* Stop TX reclaim and RX tasklets. */
3404 tasklet_disable(&priv->poll_tx_task);
3405 tasklet_disable(&priv->poll_rx_task);
3406
3407 /* Return all skbs to mac80211 */
3408 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3409 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
3410 }
3411
3412 static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
3413
3414 static int mwl8k_add_interface(struct ieee80211_hw *hw,
3415 struct ieee80211_vif *vif)
3416 {
3417 struct mwl8k_priv *priv = hw->priv;
3418 struct mwl8k_vif *mwl8k_vif;
3419 u32 macids_supported;
3420 int macid, rc;
3421 struct mwl8k_device_info *di;
3422
3423 /*
3424 * Reject interface creation if sniffer mode is active, as
3425 * STA operation is mutually exclusive with hardware sniffer
3426 * mode. (Sniffer mode is only used on STA firmware.)
3427 */
3428 if (priv->sniffer_enabled) {
3429 wiphy_info(hw->wiphy,
3430 "unable to create STA interface because sniffer mode is enabled\n");
3431 return -EINVAL;
3432 }
3433
3434 di = priv->device_info;
3435 switch (vif->type) {
3436 case NL80211_IFTYPE_AP:
3437 if (!priv->ap_fw && di->fw_image_ap) {
3438 /* we must load the ap fw to meet this request */
3439 if (!list_empty(&priv->vif_list))
3440 return -EBUSY;
3441 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
3442 if (rc)
3443 return rc;
3444 }
3445 macids_supported = priv->ap_macids_supported;
3446 break;
3447 case NL80211_IFTYPE_STATION:
3448 if (priv->ap_fw && di->fw_image_sta) {
3449 /* we must load the sta fw to meet this request */
3450 if (!list_empty(&priv->vif_list))
3451 return -EBUSY;
3452 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
3453 if (rc)
3454 return rc;
3455 }
3456 macids_supported = priv->sta_macids_supported;
3457 break;
3458 default:
3459 return -EINVAL;
3460 }
3461
3462 macid = ffs(macids_supported & ~priv->macids_used);
3463 if (!macid--)
3464 return -EBUSY;
3465
3466 /* Setup driver private area. */
3467 mwl8k_vif = MWL8K_VIF(vif);
3468 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
3469 mwl8k_vif->vif = vif;
3470 mwl8k_vif->macid = macid;
3471 mwl8k_vif->seqno = 0;
3472
3473 /* Set the mac address. */
3474 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
3475
3476 if (priv->ap_fw)
3477 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3478
3479 priv->macids_used |= 1 << mwl8k_vif->macid;
3480 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
3481
3482 return 0;
3483 }
3484
3485 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3486 struct ieee80211_vif *vif)
3487 {
3488 struct mwl8k_priv *priv = hw->priv;
3489 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3490
3491 if (priv->ap_fw)
3492 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3493
3494 mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
3495
3496 priv->macids_used &= ~(1 << mwl8k_vif->macid);
3497 list_del(&mwl8k_vif->list);
3498 }
3499
3500 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3501 {
3502 struct ieee80211_conf *conf = &hw->conf;
3503 struct mwl8k_priv *priv = hw->priv;
3504 int rc;
3505
3506 if (conf->flags & IEEE80211_CONF_IDLE) {
3507 mwl8k_cmd_radio_disable(hw);
3508 return 0;
3509 }
3510
3511 rc = mwl8k_fw_lock(hw);
3512 if (rc)
3513 return rc;
3514
3515 rc = mwl8k_cmd_radio_enable(hw);
3516 if (rc)
3517 goto out;
3518
3519 rc = mwl8k_cmd_set_rf_channel(hw, conf);
3520 if (rc)
3521 goto out;
3522
3523 if (conf->power_level > 18)
3524 conf->power_level = 18;
3525
3526 if (priv->ap_fw) {
3527 rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
3528 if (rc)
3529 goto out;
3530
3531 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
3532 if (!rc)
3533 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3534 } else {
3535 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3536 if (rc)
3537 goto out;
3538 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3539 }
3540
3541 out:
3542 mwl8k_fw_unlock(hw);
3543
3544 return rc;
3545 }
3546
3547 static void
3548 mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3549 struct ieee80211_bss_conf *info, u32 changed)
3550 {
3551 struct mwl8k_priv *priv = hw->priv;
3552 u32 ap_legacy_rates;
3553 u8 ap_mcs_rates[16];
3554 int rc;
3555
3556 if (mwl8k_fw_lock(hw))
3557 return;
3558
3559 /*
3560 * No need to capture a beacon if we're no longer associated.
3561 */
3562 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3563 priv->capture_beacon = false;
3564
3565 /*
3566 * Get the AP's legacy and MCS rates.
3567 */
3568 if (vif->bss_conf.assoc) {
3569 struct ieee80211_sta *ap;
3570
3571 rcu_read_lock();
3572
3573 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3574 if (ap == NULL) {
3575 rcu_read_unlock();
3576 goto out;
3577 }
3578
3579 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
3580 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
3581 } else {
3582 ap_legacy_rates =
3583 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3584 }
3585 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3586
3587 rcu_read_unlock();
3588 }
3589
3590 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3591 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3592 if (rc)
3593 goto out;
3594
3595 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3596 if (rc)
3597 goto out;
3598 }
3599
3600 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3601 rc = mwl8k_set_radio_preamble(hw,
3602 vif->bss_conf.use_short_preamble);
3603 if (rc)
3604 goto out;
3605 }
3606
3607 if (changed & BSS_CHANGED_ERP_SLOT) {
3608 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3609 if (rc)
3610 goto out;
3611 }
3612
3613 if (vif->bss_conf.assoc &&
3614 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
3615 BSS_CHANGED_HT))) {
3616 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3617 if (rc)
3618 goto out;
3619 }
3620
3621 if (vif->bss_conf.assoc &&
3622 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
3623 /*
3624 * Finalize the join. Tell rx handler to process
3625 * next beacon from our BSSID.
3626 */
3627 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
3628 priv->capture_beacon = true;
3629 }
3630
3631 out:
3632 mwl8k_fw_unlock(hw);
3633 }
3634
3635 static void
3636 mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3637 struct ieee80211_bss_conf *info, u32 changed)
3638 {
3639 int rc;
3640
3641 if (mwl8k_fw_lock(hw))
3642 return;
3643
3644 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3645 rc = mwl8k_set_radio_preamble(hw,
3646 vif->bss_conf.use_short_preamble);
3647 if (rc)
3648 goto out;
3649 }
3650
3651 if (changed & BSS_CHANGED_BASIC_RATES) {
3652 int idx;
3653 int rate;
3654
3655 /*
3656 * Use lowest supported basic rate for multicasts
3657 * and management frames (such as probe responses --
3658 * beacons will always go out at 1 Mb/s).
3659 */
3660 idx = ffs(vif->bss_conf.basic_rates);
3661 if (idx)
3662 idx--;
3663
3664 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3665 rate = mwl8k_rates_24[idx].hw_value;
3666 else
3667 rate = mwl8k_rates_50[idx].hw_value;
3668
3669 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
3670 }
3671
3672 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
3673 struct sk_buff *skb;
3674
3675 skb = ieee80211_beacon_get(hw, vif);
3676 if (skb != NULL) {
3677 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
3678 kfree_skb(skb);
3679 }
3680 }
3681
3682 if (changed & BSS_CHANGED_BEACON_ENABLED)
3683 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
3684
3685 out:
3686 mwl8k_fw_unlock(hw);
3687 }
3688
3689 static void
3690 mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3691 struct ieee80211_bss_conf *info, u32 changed)
3692 {
3693 struct mwl8k_priv *priv = hw->priv;
3694
3695 if (!priv->ap_fw)
3696 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
3697 else
3698 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
3699 }
3700
3701 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3702 struct netdev_hw_addr_list *mc_list)
3703 {
3704 struct mwl8k_cmd_pkt *cmd;
3705
3706 /*
3707 * Synthesize and return a command packet that programs the
3708 * hardware multicast address filter. At this point we don't
3709 * know whether FIF_ALLMULTI is being requested, but if it is,
3710 * we'll end up throwing this packet away and creating a new
3711 * one in mwl8k_configure_filter().
3712 */
3713 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
3714
3715 return (unsigned long)cmd;
3716 }
3717
3718 static int
3719 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3720 unsigned int changed_flags,
3721 unsigned int *total_flags)
3722 {
3723 struct mwl8k_priv *priv = hw->priv;
3724
3725 /*
3726 * Hardware sniffer mode is mutually exclusive with STA
3727 * operation, so refuse to enable sniffer mode if a STA
3728 * interface is active.
3729 */
3730 if (!list_empty(&priv->vif_list)) {
3731 if (net_ratelimit())
3732 wiphy_info(hw->wiphy,
3733 "not enabling sniffer mode because STA interface is active\n");
3734 return 0;
3735 }
3736
3737 if (!priv->sniffer_enabled) {
3738 if (mwl8k_cmd_enable_sniffer(hw, 1))
3739 return 0;
3740 priv->sniffer_enabled = true;
3741 }
3742
3743 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3744 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3745 FIF_OTHER_BSS;
3746
3747 return 1;
3748 }
3749
3750 static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
3751 {
3752 if (!list_empty(&priv->vif_list))
3753 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
3754
3755 return NULL;
3756 }
3757
3758 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3759 unsigned int changed_flags,
3760 unsigned int *total_flags,
3761 u64 multicast)
3762 {
3763 struct mwl8k_priv *priv = hw->priv;
3764 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3765
3766 /*
3767 * AP firmware doesn't allow fine-grained control over
3768 * the receive filter.
3769 */
3770 if (priv->ap_fw) {
3771 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3772 kfree(cmd);
3773 return;
3774 }
3775
3776 /*
3777 * Enable hardware sniffer mode if FIF_CONTROL or
3778 * FIF_OTHER_BSS is requested.
3779 */
3780 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3781 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3782 kfree(cmd);
3783 return;
3784 }
3785
3786 /* Clear unsupported feature flags */
3787 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3788
3789 if (mwl8k_fw_lock(hw)) {
3790 kfree(cmd);
3791 return;
3792 }
3793
3794 if (priv->sniffer_enabled) {
3795 mwl8k_cmd_enable_sniffer(hw, 0);
3796 priv->sniffer_enabled = false;
3797 }
3798
3799 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3800 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3801 /*
3802 * Disable the BSS filter.
3803 */
3804 mwl8k_cmd_set_pre_scan(hw);
3805 } else {
3806 struct mwl8k_vif *mwl8k_vif;
3807 const u8 *bssid;
3808
3809 /*
3810 * Enable the BSS filter.
3811 *
3812 * If there is an active STA interface, use that
3813 * interface's BSSID, otherwise use a dummy one
3814 * (where the OUI part needs to be nonzero for
3815 * the BSSID to be accepted by POST_SCAN).
3816 */
3817 mwl8k_vif = mwl8k_first_vif(priv);
3818 if (mwl8k_vif != NULL)
3819 bssid = mwl8k_vif->vif->bss_conf.bssid;
3820 else
3821 bssid = "\x01\x00\x00\x00\x00\x00";
3822
3823 mwl8k_cmd_set_post_scan(hw, bssid);
3824 }
3825 }
3826
3827 /*
3828 * If FIF_ALLMULTI is being requested, throw away the command
3829 * packet that ->prepare_multicast() built and replace it with
3830 * a command packet that enables reception of all multicast
3831 * packets.
3832 */
3833 if (*total_flags & FIF_ALLMULTI) {
3834 kfree(cmd);
3835 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
3836 }
3837
3838 if (cmd != NULL) {
3839 mwl8k_post_cmd(hw, cmd);
3840 kfree(cmd);
3841 }
3842
3843 mwl8k_fw_unlock(hw);
3844 }
3845
3846 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3847 {
3848 return mwl8k_cmd_set_rts_threshold(hw, value);
3849 }
3850
3851 static int mwl8k_sta_remove(struct ieee80211_hw *hw,
3852 struct ieee80211_vif *vif,
3853 struct ieee80211_sta *sta)
3854 {
3855 struct mwl8k_priv *priv = hw->priv;
3856
3857 if (priv->ap_fw)
3858 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
3859 else
3860 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
3861 }
3862
3863 static int mwl8k_sta_add(struct ieee80211_hw *hw,
3864 struct ieee80211_vif *vif,
3865 struct ieee80211_sta *sta)
3866 {
3867 struct mwl8k_priv *priv = hw->priv;
3868 int ret;
3869
3870 if (!priv->ap_fw) {
3871 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
3872 if (ret >= 0) {
3873 MWL8K_STA(sta)->peer_id = ret;
3874 return 0;
3875 }
3876
3877 return ret;
3878 }
3879
3880 return mwl8k_cmd_set_new_stn_add(hw, vif, sta);
3881 }
3882
3883 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3884 const struct ieee80211_tx_queue_params *params)
3885 {
3886 struct mwl8k_priv *priv = hw->priv;
3887 int rc;
3888
3889 rc = mwl8k_fw_lock(hw);
3890 if (!rc) {
3891 BUG_ON(queue > MWL8K_TX_QUEUES - 1);
3892 memcpy(&priv->wmm_params[queue], params, sizeof(*params));
3893
3894 if (!priv->wmm_enabled)
3895 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3896
3897 if (!rc)
3898 rc = mwl8k_cmd_set_edca_params(hw, queue,
3899 params->cw_min,
3900 params->cw_max,
3901 params->aifs,
3902 params->txop);
3903
3904 mwl8k_fw_unlock(hw);
3905 }
3906
3907 return rc;
3908 }
3909
3910 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3911 struct ieee80211_low_level_stats *stats)
3912 {
3913 return mwl8k_cmd_get_stat(hw, stats);
3914 }
3915
3916 static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
3917 struct survey_info *survey)
3918 {
3919 struct mwl8k_priv *priv = hw->priv;
3920 struct ieee80211_conf *conf = &hw->conf;
3921
3922 if (idx != 0)
3923 return -ENOENT;
3924
3925 survey->channel = conf->channel;
3926 survey->filled = SURVEY_INFO_NOISE_DBM;
3927 survey->noise = priv->noise;
3928
3929 return 0;
3930 }
3931
3932 static int
3933 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3934 enum ieee80211_ampdu_mlme_action action,
3935 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3936 {
3937 switch (action) {
3938 case IEEE80211_AMPDU_RX_START:
3939 case IEEE80211_AMPDU_RX_STOP:
3940 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3941 return -ENOTSUPP;
3942 return 0;
3943 default:
3944 return -ENOTSUPP;
3945 }
3946 }
3947
3948 static const struct ieee80211_ops mwl8k_ops = {
3949 .tx = mwl8k_tx,
3950 .start = mwl8k_start,
3951 .stop = mwl8k_stop,
3952 .add_interface = mwl8k_add_interface,
3953 .remove_interface = mwl8k_remove_interface,
3954 .config = mwl8k_config,
3955 .bss_info_changed = mwl8k_bss_info_changed,
3956 .prepare_multicast = mwl8k_prepare_multicast,
3957 .configure_filter = mwl8k_configure_filter,
3958 .set_rts_threshold = mwl8k_set_rts_threshold,
3959 .sta_add = mwl8k_sta_add,
3960 .sta_remove = mwl8k_sta_remove,
3961 .conf_tx = mwl8k_conf_tx,
3962 .get_stats = mwl8k_get_stats,
3963 .get_survey = mwl8k_get_survey,
3964 .ampdu_action = mwl8k_ampdu_action,
3965 };
3966
3967 static void mwl8k_finalize_join_worker(struct work_struct *work)
3968 {
3969 struct mwl8k_priv *priv =
3970 container_of(work, struct mwl8k_priv, finalize_join_worker);
3971 struct sk_buff *skb = priv->beacon_skb;
3972 struct ieee80211_mgmt *mgmt = (void *)skb->data;
3973 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
3974 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
3975 mgmt->u.beacon.variable, len);
3976 int dtim_period = 1;
3977
3978 if (tim && tim[1] >= 2)
3979 dtim_period = tim[3];
3980
3981 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
3982
3983 dev_kfree_skb(skb);
3984 priv->beacon_skb = NULL;
3985 }
3986
3987 enum {
3988 MWL8363 = 0,
3989 MWL8687,
3990 MWL8366,
3991 };
3992
3993 #define MWL8K_8366_AP_FW_API 1
3994 #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
3995 #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
3996
3997 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3998 [MWL8363] = {
3999 .part_name = "88w8363",
4000 .helper_image = "mwl8k/helper_8363.fw",
4001 .fw_image_sta = "mwl8k/fmimage_8363.fw",
4002 },
4003 [MWL8687] = {
4004 .part_name = "88w8687",
4005 .helper_image = "mwl8k/helper_8687.fw",
4006 .fw_image_sta = "mwl8k/fmimage_8687.fw",
4007 },
4008 [MWL8366] = {
4009 .part_name = "88w8366",
4010 .helper_image = "mwl8k/helper_8366.fw",
4011 .fw_image_sta = "mwl8k/fmimage_8366.fw",
4012 .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
4013 .fw_api_ap = MWL8K_8366_AP_FW_API,
4014 .ap_rxd_ops = &rxd_8366_ap_ops,
4015 },
4016 };
4017
4018 MODULE_FIRMWARE("mwl8k/helper_8363.fw");
4019 MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
4020 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
4021 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
4022 MODULE_FIRMWARE("mwl8k/helper_8366.fw");
4023 MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
4024 MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
4025
4026 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
4027 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
4028 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
4029 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
4030 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
4031 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
4032 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
4033 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
4034 { },
4035 };
4036 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
4037
4038 static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
4039 {
4040 int rc;
4041 printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
4042 "Trying alternative firmware %s\n", pci_name(priv->pdev),
4043 priv->fw_pref, priv->fw_alt);
4044 rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
4045 if (rc) {
4046 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
4047 pci_name(priv->pdev), priv->fw_alt);
4048 return rc;
4049 }
4050 return 0;
4051 }
4052
4053 static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
4054 static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
4055 {
4056 struct mwl8k_priv *priv = context;
4057 struct mwl8k_device_info *di = priv->device_info;
4058 int rc;
4059
4060 switch (priv->fw_state) {
4061 case FW_STATE_INIT:
4062 if (!fw) {
4063 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
4064 pci_name(priv->pdev), di->helper_image);
4065 goto fail;
4066 }
4067 priv->fw_helper = fw;
4068 rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
4069 true);
4070 if (rc && priv->fw_alt) {
4071 rc = mwl8k_request_alt_fw(priv);
4072 if (rc)
4073 goto fail;
4074 priv->fw_state = FW_STATE_LOADING_ALT;
4075 } else if (rc)
4076 goto fail;
4077 else
4078 priv->fw_state = FW_STATE_LOADING_PREF;
4079 break;
4080
4081 case FW_STATE_LOADING_PREF:
4082 if (!fw) {
4083 if (priv->fw_alt) {
4084 rc = mwl8k_request_alt_fw(priv);
4085 if (rc)
4086 goto fail;
4087 priv->fw_state = FW_STATE_LOADING_ALT;
4088 } else
4089 goto fail;
4090 } else {
4091 priv->fw_ucode = fw;
4092 rc = mwl8k_firmware_load_success(priv);
4093 if (rc)
4094 goto fail;
4095 else
4096 complete(&priv->firmware_loading_complete);
4097 }
4098 break;
4099
4100 case FW_STATE_LOADING_ALT:
4101 if (!fw) {
4102 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
4103 pci_name(priv->pdev), di->helper_image);
4104 goto fail;
4105 }
4106 priv->fw_ucode = fw;
4107 rc = mwl8k_firmware_load_success(priv);
4108 if (rc)
4109 goto fail;
4110 else
4111 complete(&priv->firmware_loading_complete);
4112 break;
4113
4114 default:
4115 printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
4116 MWL8K_NAME, priv->fw_state);
4117 BUG_ON(1);
4118 }
4119
4120 return;
4121
4122 fail:
4123 priv->fw_state = FW_STATE_ERROR;
4124 complete(&priv->firmware_loading_complete);
4125 device_release_driver(&priv->pdev->dev);
4126 mwl8k_release_firmware(priv);
4127 }
4128
4129 static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
4130 bool nowait)
4131 {
4132 struct mwl8k_priv *priv = hw->priv;
4133 int rc;
4134
4135 /* Reset firmware and hardware */
4136 mwl8k_hw_reset(priv);
4137
4138 /* Ask userland hotplug daemon for the device firmware */
4139 rc = mwl8k_request_firmware(priv, fw_image, nowait);
4140 if (rc) {
4141 wiphy_err(hw->wiphy, "Firmware files not found\n");
4142 return rc;
4143 }
4144
4145 if (nowait)
4146 return rc;
4147
4148 /* Load firmware into hardware */
4149 rc = mwl8k_load_firmware(hw);
4150 if (rc)
4151 wiphy_err(hw->wiphy, "Cannot start firmware\n");
4152
4153 /* Reclaim memory once firmware is successfully loaded */
4154 mwl8k_release_firmware(priv);
4155
4156 return rc;
4157 }
4158
4159 /* initialize hw after successfully loading a firmware image */
4160 static int mwl8k_probe_hw(struct ieee80211_hw *hw)
4161 {
4162 struct mwl8k_priv *priv = hw->priv;
4163 int rc = 0;
4164 int i;
4165
4166 if (priv->ap_fw) {
4167 priv->rxd_ops = priv->device_info->ap_rxd_ops;
4168 if (priv->rxd_ops == NULL) {
4169 wiphy_err(hw->wiphy,
4170 "Driver does not have AP firmware image support for this hardware\n");
4171 goto err_stop_firmware;
4172 }
4173 } else {
4174 priv->rxd_ops = &rxd_sta_ops;
4175 }
4176
4177 priv->sniffer_enabled = false;
4178 priv->wmm_enabled = false;
4179 priv->pending_tx_pkts = 0;
4180
4181 rc = mwl8k_rxq_init(hw, 0);
4182 if (rc)
4183 goto err_stop_firmware;
4184 rxq_refill(hw, 0, INT_MAX);
4185
4186 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
4187 rc = mwl8k_txq_init(hw, i);
4188 if (rc)
4189 goto err_free_queues;
4190 }
4191
4192 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4193 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4194 iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
4195 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
4196 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
4197
4198 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
4199 IRQF_SHARED, MWL8K_NAME, hw);
4200 if (rc) {
4201 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
4202 goto err_free_queues;
4203 }
4204
4205 /*
4206 * Temporarily enable interrupts. Initial firmware host
4207 * commands use interrupts and avoid polling. Disable
4208 * interrupts when done.
4209 */
4210 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4211
4212 /* Get config data, mac addrs etc */
4213 if (priv->ap_fw) {
4214 rc = mwl8k_cmd_get_hw_spec_ap(hw);
4215 if (!rc)
4216 rc = mwl8k_cmd_set_hw_spec(hw);
4217 } else {
4218 rc = mwl8k_cmd_get_hw_spec_sta(hw);
4219 }
4220 if (rc) {
4221 wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
4222 goto err_free_irq;
4223 }
4224
4225 /* Turn radio off */
4226 rc = mwl8k_cmd_radio_disable(hw);
4227 if (rc) {
4228 wiphy_err(hw->wiphy, "Cannot disable\n");
4229 goto err_free_irq;
4230 }
4231
4232 /* Clear MAC address */
4233 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
4234 if (rc) {
4235 wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
4236 goto err_free_irq;
4237 }
4238
4239 /* Disable interrupts */
4240 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4241 free_irq(priv->pdev->irq, hw);
4242
4243 wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
4244 priv->device_info->part_name,
4245 priv->hw_rev, hw->wiphy->perm_addr,
4246 priv->ap_fw ? "AP" : "STA",
4247 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
4248 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
4249
4250 return 0;
4251
4252 err_free_irq:
4253 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4254 free_irq(priv->pdev->irq, hw);
4255
4256 err_free_queues:
4257 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4258 mwl8k_txq_deinit(hw, i);
4259 mwl8k_rxq_deinit(hw, 0);
4260
4261 err_stop_firmware:
4262 mwl8k_hw_reset(priv);
4263
4264 return rc;
4265 }
4266
4267 /*
4268 * invoke mwl8k_reload_firmware to change the firmware image after the device
4269 * has already been registered
4270 */
4271 static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
4272 {
4273 int i, rc = 0;
4274 struct mwl8k_priv *priv = hw->priv;
4275
4276 mwl8k_stop(hw);
4277 mwl8k_rxq_deinit(hw, 0);
4278
4279 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4280 mwl8k_txq_deinit(hw, i);
4281
4282 rc = mwl8k_init_firmware(hw, fw_image, false);
4283 if (rc)
4284 goto fail;
4285
4286 rc = mwl8k_probe_hw(hw);
4287 if (rc)
4288 goto fail;
4289
4290 rc = mwl8k_start(hw);
4291 if (rc)
4292 goto fail;
4293
4294 rc = mwl8k_config(hw, ~0);
4295 if (rc)
4296 goto fail;
4297
4298 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
4299 rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]);
4300 if (rc)
4301 goto fail;
4302 }
4303
4304 return rc;
4305
4306 fail:
4307 printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
4308 return rc;
4309 }
4310
4311 static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
4312 {
4313 struct ieee80211_hw *hw = priv->hw;
4314 int i, rc;
4315
4316 rc = mwl8k_load_firmware(hw);
4317 mwl8k_release_firmware(priv);
4318 if (rc) {
4319 wiphy_err(hw->wiphy, "Cannot start firmware\n");
4320 return rc;
4321 }
4322
4323 /*
4324 * Extra headroom is the size of the required DMA header
4325 * minus the size of the smallest 802.11 frame (CTS frame).
4326 */
4327 hw->extra_tx_headroom =
4328 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
4329
4330 hw->channel_change_time = 10;
4331
4332 hw->queues = MWL8K_TX_QUEUES;
4333
4334 /* Set rssi values to dBm */
4335 hw->flags |= IEEE80211_HW_SIGNAL_DBM;
4336 hw->vif_data_size = sizeof(struct mwl8k_vif);
4337 hw->sta_data_size = sizeof(struct mwl8k_sta);
4338
4339 priv->macids_used = 0;
4340 INIT_LIST_HEAD(&priv->vif_list);
4341
4342 /* Set default radio state and preamble */
4343 priv->radio_on = 0;
4344 priv->radio_short_preamble = 0;
4345
4346 /* Finalize join worker */
4347 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
4348
4349 /* TX reclaim and RX tasklets. */
4350 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
4351 tasklet_disable(&priv->poll_tx_task);
4352 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
4353 tasklet_disable(&priv->poll_rx_task);
4354
4355 /* Power management cookie */
4356 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
4357 if (priv->cookie == NULL)
4358 return -ENOMEM;
4359
4360 mutex_init(&priv->fw_mutex);
4361 priv->fw_mutex_owner = NULL;
4362 priv->fw_mutex_depth = 0;
4363 priv->hostcmd_wait = NULL;
4364
4365 spin_lock_init(&priv->tx_lock);
4366
4367 priv->tx_wait = NULL;
4368
4369 rc = mwl8k_probe_hw(hw);
4370 if (rc)
4371 goto err_free_cookie;
4372
4373 hw->wiphy->interface_modes = 0;
4374 if (priv->ap_macids_supported || priv->device_info->fw_image_ap)
4375 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
4376 if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
4377 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
4378
4379 rc = ieee80211_register_hw(hw);
4380 if (rc) {
4381 wiphy_err(hw->wiphy, "Cannot register device\n");
4382 goto err_unprobe_hw;
4383 }
4384
4385 return 0;
4386
4387 err_unprobe_hw:
4388 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4389 mwl8k_txq_deinit(hw, i);
4390 mwl8k_rxq_deinit(hw, 0);
4391
4392 err_free_cookie:
4393 if (priv->cookie != NULL)
4394 pci_free_consistent(priv->pdev, 4,
4395 priv->cookie, priv->cookie_dma);
4396
4397 return rc;
4398 }
4399 static int __devinit mwl8k_probe(struct pci_dev *pdev,
4400 const struct pci_device_id *id)
4401 {
4402 static int printed_version;
4403 struct ieee80211_hw *hw;
4404 struct mwl8k_priv *priv;
4405 struct mwl8k_device_info *di;
4406 int rc;
4407
4408 if (!printed_version) {
4409 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
4410 printed_version = 1;
4411 }
4412
4413
4414 rc = pci_enable_device(pdev);
4415 if (rc) {
4416 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
4417 MWL8K_NAME);
4418 return rc;
4419 }
4420
4421 rc = pci_request_regions(pdev, MWL8K_NAME);
4422 if (rc) {
4423 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
4424 MWL8K_NAME);
4425 goto err_disable_device;
4426 }
4427
4428 pci_set_master(pdev);
4429
4430
4431 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
4432 if (hw == NULL) {
4433 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
4434 rc = -ENOMEM;
4435 goto err_free_reg;
4436 }
4437
4438 SET_IEEE80211_DEV(hw, &pdev->dev);
4439 pci_set_drvdata(pdev, hw);
4440
4441 priv = hw->priv;
4442 priv->hw = hw;
4443 priv->pdev = pdev;
4444 priv->device_info = &mwl8k_info_tbl[id->driver_data];
4445
4446
4447 priv->sram = pci_iomap(pdev, 0, 0x10000);
4448 if (priv->sram == NULL) {
4449 wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
4450 goto err_iounmap;
4451 }
4452
4453 /*
4454 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
4455 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
4456 */
4457 priv->regs = pci_iomap(pdev, 1, 0x10000);
4458 if (priv->regs == NULL) {
4459 priv->regs = pci_iomap(pdev, 2, 0x10000);
4460 if (priv->regs == NULL) {
4461 wiphy_err(hw->wiphy, "Cannot map device registers\n");
4462 goto err_iounmap;
4463 }
4464 }
4465
4466 /*
4467 * Choose the initial fw image depending on user input. If a second
4468 * image is available, make it the alternative image that will be
4469 * loaded if the first one fails.
4470 */
4471 init_completion(&priv->firmware_loading_complete);
4472 di = priv->device_info;
4473 if (ap_mode_default && di->fw_image_ap) {
4474 priv->fw_pref = di->fw_image_ap;
4475 priv->fw_alt = di->fw_image_sta;
4476 } else if (!ap_mode_default && di->fw_image_sta) {
4477 priv->fw_pref = di->fw_image_sta;
4478 priv->fw_alt = di->fw_image_ap;
4479 } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
4480 printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
4481 priv->fw_pref = di->fw_image_sta;
4482 } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
4483 printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
4484 priv->fw_pref = di->fw_image_ap;
4485 }
4486 rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
4487 if (rc)
4488 goto err_stop_firmware;
4489 return rc;
4490
4491 err_stop_firmware:
4492 mwl8k_hw_reset(priv);
4493
4494 err_iounmap:
4495 if (priv->regs != NULL)
4496 pci_iounmap(pdev, priv->regs);
4497
4498 if (priv->sram != NULL)
4499 pci_iounmap(pdev, priv->sram);
4500
4501 pci_set_drvdata(pdev, NULL);
4502 ieee80211_free_hw(hw);
4503
4504 err_free_reg:
4505 pci_release_regions(pdev);
4506
4507 err_disable_device:
4508 pci_disable_device(pdev);
4509
4510 return rc;
4511 }
4512
4513 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
4514 {
4515 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
4516 }
4517
4518 static void __devexit mwl8k_remove(struct pci_dev *pdev)
4519 {
4520 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
4521 struct mwl8k_priv *priv;
4522 int i;
4523
4524 if (hw == NULL)
4525 return;
4526 priv = hw->priv;
4527
4528 wait_for_completion(&priv->firmware_loading_complete);
4529
4530 if (priv->fw_state == FW_STATE_ERROR) {
4531 mwl8k_hw_reset(priv);
4532 goto unmap;
4533 }
4534
4535 ieee80211_stop_queues(hw);
4536
4537 ieee80211_unregister_hw(hw);
4538
4539 /* Remove TX reclaim and RX tasklets. */
4540 tasklet_kill(&priv->poll_tx_task);
4541 tasklet_kill(&priv->poll_rx_task);
4542
4543 /* Stop hardware */
4544 mwl8k_hw_reset(priv);
4545
4546 /* Return all skbs to mac80211 */
4547 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4548 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
4549
4550 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4551 mwl8k_txq_deinit(hw, i);
4552
4553 mwl8k_rxq_deinit(hw, 0);
4554
4555 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
4556
4557 unmap:
4558 pci_iounmap(pdev, priv->regs);
4559 pci_iounmap(pdev, priv->sram);
4560 pci_set_drvdata(pdev, NULL);
4561 ieee80211_free_hw(hw);
4562 pci_release_regions(pdev);
4563 pci_disable_device(pdev);
4564 }
4565
4566 static struct pci_driver mwl8k_driver = {
4567 .name = MWL8K_NAME,
4568 .id_table = mwl8k_pci_id_table,
4569 .probe = mwl8k_probe,
4570 .remove = __devexit_p(mwl8k_remove),
4571 .shutdown = __devexit_p(mwl8k_shutdown),
4572 };
4573
4574 static int __init mwl8k_init(void)
4575 {
4576 return pci_register_driver(&mwl8k_driver);
4577 }
4578
4579 static void __exit mwl8k_exit(void)
4580 {
4581 pci_unregister_driver(&mwl8k_driver);
4582 }
4583
4584 module_init(mwl8k_init);
4585 module_exit(mwl8k_exit);
4586
4587 MODULE_DESCRIPTION(MWL8K_DESC);
4588 MODULE_VERSION(MWL8K_VERSION);
4589 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
4590 MODULE_LICENSE("GPL");
linux-next