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proc: use seq_puts()/seq_putc() where possible
[linux-2.6/next.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
blob6b3b1de46792e96a6119b912eb749e9f43033f67
1 /*
2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21 /*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
27 #include <linux/delay.h>
28 #include <linux/etherdevice.h>
29 #include <linux/init.h>
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/slab.h>
33 #include <linux/usb.h>
34
35 #include "rt2x00.h"
36 #include "rt2x00usb.h"
37 #include "rt2500usb.h"
38
39 /*
40 * Allow hardware encryption to be disabled.
41 */
42 static int modparam_nohwcrypt;
43 module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
44 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
45
46 /*
47 * Register access.
48 * All access to the CSR registers will go through the methods
49 * rt2500usb_register_read and rt2500usb_register_write.
50 * BBP and RF register require indirect register access,
51 * and use the CSR registers BBPCSR and RFCSR to achieve this.
52 * These indirect registers work with busy bits,
53 * and we will try maximal REGISTER_BUSY_COUNT times to access
54 * the register while taking a REGISTER_BUSY_DELAY us delay
55 * between each attampt. When the busy bit is still set at that time,
56 * the access attempt is considered to have failed,
57 * and we will print an error.
58 * If the csr_mutex is already held then the _lock variants must
59 * be used instead.
60 */
61 static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
62 const unsigned int offset,
63 u16 *value)
64 {
65 __le16 reg;
66 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
67 USB_VENDOR_REQUEST_IN, offset,
68 &reg, sizeof(reg), REGISTER_TIMEOUT);
69 *value = le16_to_cpu(reg);
70 }
71
72 static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
73 const unsigned int offset,
74 u16 *value)
75 {
76 __le16 reg;
77 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
78 USB_VENDOR_REQUEST_IN, offset,
79 &reg, sizeof(reg), REGISTER_TIMEOUT);
80 *value = le16_to_cpu(reg);
81 }
82
83 static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
84 const unsigned int offset,
85 void *value, const u16 length)
86 {
87 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
88 USB_VENDOR_REQUEST_IN, offset,
89 value, length,
90 REGISTER_TIMEOUT16(length));
91 }
92
93 static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
94 const unsigned int offset,
95 u16 value)
96 {
97 __le16 reg = cpu_to_le16(value);
98 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
99 USB_VENDOR_REQUEST_OUT, offset,
100 &reg, sizeof(reg), REGISTER_TIMEOUT);
101 }
102
103 static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
104 const unsigned int offset,
105 u16 value)
106 {
107 __le16 reg = cpu_to_le16(value);
108 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
109 USB_VENDOR_REQUEST_OUT, offset,
110 &reg, sizeof(reg), REGISTER_TIMEOUT);
111 }
112
113 static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
114 const unsigned int offset,
115 void *value, const u16 length)
116 {
117 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
118 USB_VENDOR_REQUEST_OUT, offset,
119 value, length,
120 REGISTER_TIMEOUT16(length));
121 }
122
123 static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
124 const unsigned int offset,
125 struct rt2x00_field16 field,
126 u16 *reg)
127 {
128 unsigned int i;
129
130 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
131 rt2500usb_register_read_lock(rt2x00dev, offset, reg);
132 if (!rt2x00_get_field16(*reg, field))
133 return 1;
134 udelay(REGISTER_BUSY_DELAY);
135 }
136
137 ERROR(rt2x00dev, "Indirect register access failed: "
138 "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
139 *reg = ~0;
140
141 return 0;
142 }
143
144 #define WAIT_FOR_BBP(__dev, __reg) \
145 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
146 #define WAIT_FOR_RF(__dev, __reg) \
147 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
148
149 static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
150 const unsigned int word, const u8 value)
151 {
152 u16 reg;
153
154 mutex_lock(&rt2x00dev->csr_mutex);
155
156 /*
157 * Wait until the BBP becomes available, afterwards we
158 * can safely write the new data into the register.
159 */
160 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
161 reg = 0;
162 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
163 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
164 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
165
166 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
167 }
168
169 mutex_unlock(&rt2x00dev->csr_mutex);
170 }
171
172 static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
173 const unsigned int word, u8 *value)
174 {
175 u16 reg;
176
177 mutex_lock(&rt2x00dev->csr_mutex);
178
179 /*
180 * Wait until the BBP becomes available, afterwards we
181 * can safely write the read request into the register.
182 * After the data has been written, we wait until hardware
183 * returns the correct value, if at any time the register
184 * doesn't become available in time, reg will be 0xffffffff
185 * which means we return 0xff to the caller.
186 */
187 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
188 reg = 0;
189 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
190 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
191
192 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
193
194 if (WAIT_FOR_BBP(rt2x00dev, &reg))
195 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
196 }
197
198 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
199
200 mutex_unlock(&rt2x00dev->csr_mutex);
201 }
202
203 static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
204 const unsigned int word, const u32 value)
205 {
206 u16 reg;
207
208 mutex_lock(&rt2x00dev->csr_mutex);
209
210 /*
211 * Wait until the RF becomes available, afterwards we
212 * can safely write the new data into the register.
213 */
214 if (WAIT_FOR_RF(rt2x00dev, &reg)) {
215 reg = 0;
216 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
217 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
218
219 reg = 0;
220 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
221 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
222 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
223 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
224
225 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
226 rt2x00_rf_write(rt2x00dev, word, value);
227 }
228
229 mutex_unlock(&rt2x00dev->csr_mutex);
230 }
231
232 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
233 static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
234 const unsigned int offset,
235 u32 *value)
236 {
237 rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
238 }
239
240 static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
241 const unsigned int offset,
242 u32 value)
243 {
244 rt2500usb_register_write(rt2x00dev, offset, value);
245 }
246
247 static const struct rt2x00debug rt2500usb_rt2x00debug = {
248 .owner = THIS_MODULE,
249 .csr = {
250 .read = _rt2500usb_register_read,
251 .write = _rt2500usb_register_write,
252 .flags = RT2X00DEBUGFS_OFFSET,
253 .word_base = CSR_REG_BASE,
254 .word_size = sizeof(u16),
255 .word_count = CSR_REG_SIZE / sizeof(u16),
256 },
257 .eeprom = {
258 .read = rt2x00_eeprom_read,
259 .write = rt2x00_eeprom_write,
260 .word_base = EEPROM_BASE,
261 .word_size = sizeof(u16),
262 .word_count = EEPROM_SIZE / sizeof(u16),
263 },
264 .bbp = {
265 .read = rt2500usb_bbp_read,
266 .write = rt2500usb_bbp_write,
267 .word_base = BBP_BASE,
268 .word_size = sizeof(u8),
269 .word_count = BBP_SIZE / sizeof(u8),
270 },
271 .rf = {
272 .read = rt2x00_rf_read,
273 .write = rt2500usb_rf_write,
274 .word_base = RF_BASE,
275 .word_size = sizeof(u32),
276 .word_count = RF_SIZE / sizeof(u32),
277 },
278 };
279 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
280
281 static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
282 {
283 u16 reg;
284
285 rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
286 return rt2x00_get_field32(reg, MAC_CSR19_BIT7);
287 }
288
289 #ifdef CONFIG_RT2X00_LIB_LEDS
290 static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
291 enum led_brightness brightness)
292 {
293 struct rt2x00_led *led =
294 container_of(led_cdev, struct rt2x00_led, led_dev);
295 unsigned int enabled = brightness != LED_OFF;
296 u16 reg;
297
298 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
299
300 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
301 rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
302 else if (led->type == LED_TYPE_ACTIVITY)
303 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
304
305 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
306 }
307
308 static int rt2500usb_blink_set(struct led_classdev *led_cdev,
309 unsigned long *delay_on,
310 unsigned long *delay_off)
311 {
312 struct rt2x00_led *led =
313 container_of(led_cdev, struct rt2x00_led, led_dev);
314 u16 reg;
315
316 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
317 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
318 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
319 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
320
321 return 0;
322 }
323
324 static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
325 struct rt2x00_led *led,
326 enum led_type type)
327 {
328 led->rt2x00dev = rt2x00dev;
329 led->type = type;
330 led->led_dev.brightness_set = rt2500usb_brightness_set;
331 led->led_dev.blink_set = rt2500usb_blink_set;
332 led->flags = LED_INITIALIZED;
333 }
334 #endif /* CONFIG_RT2X00_LIB_LEDS */
335
336 /*
337 * Configuration handlers.
338 */
339
340 /*
341 * rt2500usb does not differentiate between shared and pairwise
342 * keys, so we should use the same function for both key types.
343 */
344 static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
345 struct rt2x00lib_crypto *crypto,
346 struct ieee80211_key_conf *key)
347 {
348 u32 mask;
349 u16 reg;
350 enum cipher curr_cipher;
351
352 if (crypto->cmd == SET_KEY) {
353 /*
354 * Disallow to set WEP key other than with index 0,
355 * it is known that not work at least on some hardware.
356 * SW crypto will be used in that case.
357 */
358 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
359 key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
360 key->keyidx != 0)
361 return -EOPNOTSUPP;
362
363 /*
364 * Pairwise key will always be entry 0, but this
365 * could collide with a shared key on the same
366 * position...
367 */
368 mask = TXRX_CSR0_KEY_ID.bit_mask;
369
370 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
371 curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM);
372 reg &= mask;
373
374 if (reg && reg == mask)
375 return -ENOSPC;
376
377 reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
378
379 key->hw_key_idx += reg ? ffz(reg) : 0;
380 /*
381 * Hardware requires that all keys use the same cipher
382 * (e.g. TKIP-only, AES-only, but not TKIP+AES).
383 * If this is not the first key, compare the cipher with the
384 * first one and fall back to SW crypto if not the same.
385 */
386 if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher)
387 return -EOPNOTSUPP;
388
389 rt2500usb_register_multiwrite(rt2x00dev, KEY_ENTRY(key->hw_key_idx),
390 crypto->key, sizeof(crypto->key));
391
392 /*
393 * The driver does not support the IV/EIV generation
394 * in hardware. However it demands the data to be provided
395 * both separately as well as inside the frame.
396 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
397 * to ensure rt2x00lib will not strip the data from the
398 * frame after the copy, now we must tell mac80211
399 * to generate the IV/EIV data.
400 */
401 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
402 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
403 }
404
405 /*
406 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
407 * a particular key is valid.
408 */
409 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
410 rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
411 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
412
413 mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
414 if (crypto->cmd == SET_KEY)
415 mask |= 1 << key->hw_key_idx;
416 else if (crypto->cmd == DISABLE_KEY)
417 mask &= ~(1 << key->hw_key_idx);
418 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
419 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
420
421 return 0;
422 }
423
424 static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
425 const unsigned int filter_flags)
426 {
427 u16 reg;
428
429 /*
430 * Start configuration steps.
431 * Note that the version error will always be dropped
432 * and broadcast frames will always be accepted since
433 * there is no filter for it at this time.
434 */
435 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
436 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
437 !(filter_flags & FIF_FCSFAIL));
438 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
439 !(filter_flags & FIF_PLCPFAIL));
440 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
441 !(filter_flags & FIF_CONTROL));
442 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
443 !(filter_flags & FIF_PROMISC_IN_BSS));
444 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
445 !(filter_flags & FIF_PROMISC_IN_BSS) &&
446 !rt2x00dev->intf_ap_count);
447 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
448 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
449 !(filter_flags & FIF_ALLMULTI));
450 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
451 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
452 }
453
454 static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
455 struct rt2x00_intf *intf,
456 struct rt2x00intf_conf *conf,
457 const unsigned int flags)
458 {
459 unsigned int bcn_preload;
460 u16 reg;
461
462 if (flags & CONFIG_UPDATE_TYPE) {
463 /*
464 * Enable beacon config
465 */
466 bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
467 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
468 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
469 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
470 2 * (conf->type != NL80211_IFTYPE_STATION));
471 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
472
473 /*
474 * Enable synchronisation.
475 */
476 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
477 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
478 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
479
480 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
481 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
482 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
483 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
484 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
485 }
486
487 if (flags & CONFIG_UPDATE_MAC)
488 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
489 (3 * sizeof(__le16)));
490
491 if (flags & CONFIG_UPDATE_BSSID)
492 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
493 (3 * sizeof(__le16)));
494 }
495
496 static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
497 struct rt2x00lib_erp *erp,
498 u32 changed)
499 {
500 u16 reg;
501
502 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
503 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
504 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
505 !!erp->short_preamble);
506 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
507 }
508
509 if (changed & BSS_CHANGED_BASIC_RATES)
510 rt2500usb_register_write(rt2x00dev, TXRX_CSR11,
511 erp->basic_rates);
512
513 if (changed & BSS_CHANGED_BEACON_INT) {
514 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
515 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
516 erp->beacon_int * 4);
517 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
518 }
519
520 if (changed & BSS_CHANGED_ERP_SLOT) {
521 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
522 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
523 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
524 }
525 }
526
527 static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
528 struct antenna_setup *ant)
529 {
530 u8 r2;
531 u8 r14;
532 u16 csr5;
533 u16 csr6;
534
535 /*
536 * We should never come here because rt2x00lib is supposed
537 * to catch this and send us the correct antenna explicitely.
538 */
539 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
540 ant->tx == ANTENNA_SW_DIVERSITY);
541
542 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
543 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
544 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
545 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
546
547 /*
548 * Configure the TX antenna.
549 */
550 switch (ant->tx) {
551 case ANTENNA_HW_DIVERSITY:
552 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
553 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
554 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
555 break;
556 case ANTENNA_A:
557 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
558 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
559 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
560 break;
561 case ANTENNA_B:
562 default:
563 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
564 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
565 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
566 break;
567 }
568
569 /*
570 * Configure the RX antenna.
571 */
572 switch (ant->rx) {
573 case ANTENNA_HW_DIVERSITY:
574 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
575 break;
576 case ANTENNA_A:
577 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
578 break;
579 case ANTENNA_B:
580 default:
581 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
582 break;
583 }
584
585 /*
586 * RT2525E and RT5222 need to flip TX I/Q
587 */
588 if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) {
589 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
590 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
591 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
592
593 /*
594 * RT2525E does not need RX I/Q Flip.
595 */
596 if (rt2x00_rf(rt2x00dev, RF2525E))
597 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
598 } else {
599 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
600 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
601 }
602
603 rt2500usb_bbp_write(rt2x00dev, 2, r2);
604 rt2500usb_bbp_write(rt2x00dev, 14, r14);
605 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
606 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
607 }
608
609 static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
610 struct rf_channel *rf, const int txpower)
611 {
612 /*
613 * Set TXpower.
614 */
615 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
616
617 /*
618 * For RT2525E we should first set the channel to half band higher.
619 */
620 if (rt2x00_rf(rt2x00dev, RF2525E)) {
621 static const u32 vals[] = {
622 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
623 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
624 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
625 0x00000902, 0x00000906
626 };
627
628 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
629 if (rf->rf4)
630 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
631 }
632
633 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
634 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
635 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
636 if (rf->rf4)
637 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
638 }
639
640 static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
641 const int txpower)
642 {
643 u32 rf3;
644
645 rt2x00_rf_read(rt2x00dev, 3, &rf3);
646 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
647 rt2500usb_rf_write(rt2x00dev, 3, rf3);
648 }
649
650 static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
651 struct rt2x00lib_conf *libconf)
652 {
653 enum dev_state state =
654 (libconf->conf->flags & IEEE80211_CONF_PS) ?
655 STATE_SLEEP : STATE_AWAKE;
656 u16 reg;
657
658 if (state == STATE_SLEEP) {
659 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
660 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
661 rt2x00dev->beacon_int - 20);
662 rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
663 libconf->conf->listen_interval - 1);
664
665 /* We must first disable autowake before it can be enabled */
666 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
667 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
668
669 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
670 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
671 } else {
672 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
673 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
674 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
675 }
676
677 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
678 }
679
680 static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
681 struct rt2x00lib_conf *libconf,
682 const unsigned int flags)
683 {
684 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
685 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
686 libconf->conf->power_level);
687 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
688 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
689 rt2500usb_config_txpower(rt2x00dev,
690 libconf->conf->power_level);
691 if (flags & IEEE80211_CONF_CHANGE_PS)
692 rt2500usb_config_ps(rt2x00dev, libconf);
693 }
694
695 /*
696 * Link tuning
697 */
698 static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
699 struct link_qual *qual)
700 {
701 u16 reg;
702
703 /*
704 * Update FCS error count from register.
705 */
706 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
707 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
708
709 /*
710 * Update False CCA count from register.
711 */
712 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
713 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
714 }
715
716 static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
717 struct link_qual *qual)
718 {
719 u16 eeprom;
720 u16 value;
721
722 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
723 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
724 rt2500usb_bbp_write(rt2x00dev, 24, value);
725
726 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
727 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
728 rt2500usb_bbp_write(rt2x00dev, 25, value);
729
730 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
731 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
732 rt2500usb_bbp_write(rt2x00dev, 61, value);
733
734 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
735 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
736 rt2500usb_bbp_write(rt2x00dev, 17, value);
737
738 qual->vgc_level = value;
739 }
740
741 /*
742 * Queue handlers.
743 */
744 static void rt2500usb_start_queue(struct data_queue *queue)
745 {
746 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
747 u16 reg;
748
749 switch (queue->qid) {
750 case QID_RX:
751 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
752 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 0);
753 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
754 break;
755 case QID_BEACON:
756 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
757 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
758 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
759 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
760 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
761 break;
762 default:
763 break;
764 }
765 }
766
767 static void rt2500usb_stop_queue(struct data_queue *queue)
768 {
769 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
770 u16 reg;
771
772 switch (queue->qid) {
773 case QID_RX:
774 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
775 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
776 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
777 break;
778 case QID_BEACON:
779 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
780 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
781 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
782 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
783 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
784 break;
785 default:
786 break;
787 }
788 }
789
790 /*
791 * Initialization functions.
792 */
793 static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
794 {
795 u16 reg;
796
797 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
798 USB_MODE_TEST, REGISTER_TIMEOUT);
799 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
800 0x00f0, REGISTER_TIMEOUT);
801
802 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
803 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
804 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
805
806 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
807 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
808
809 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
810 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
811 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
812 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
813 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
814
815 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
816 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
817 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
818 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
819 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
820
821 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
822 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
823 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
824 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
825 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
826 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
827
828 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
829 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
830 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
831 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
832 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
833 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
834
835 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
836 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
837 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
838 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
839 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
840 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
841
842 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
843 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
844 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
845 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
846 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
847 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
848
849 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
850 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
851 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
852 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
853 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
854 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
855
856 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
857 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
858
859 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
860 return -EBUSY;
861
862 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
863 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
864 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
865 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
866 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
867
868 if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) {
869 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
870 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
871 } else {
872 reg = 0;
873 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
874 rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
875 }
876 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
877
878 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
879 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
880 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
881 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
882
883 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
884 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
885 rt2x00dev->rx->data_size);
886 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
887
888 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
889 rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, CIPHER_NONE);
890 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
891 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
892 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
893
894 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
895 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
896 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
897
898 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
899 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
900 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
901
902 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
903 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
904 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
905
906 return 0;
907 }
908
909 static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
910 {
911 unsigned int i;
912 u8 value;
913
914 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
915 rt2500usb_bbp_read(rt2x00dev, 0, &value);
916 if ((value != 0xff) && (value != 0x00))
917 return 0;
918 udelay(REGISTER_BUSY_DELAY);
919 }
920
921 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
922 return -EACCES;
923 }
924
925 static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
926 {
927 unsigned int i;
928 u16 eeprom;
929 u8 value;
930 u8 reg_id;
931
932 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
933 return -EACCES;
934
935 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
936 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
937 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
938 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
939 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
940 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
941 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
942 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
943 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
944 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
945 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
946 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
947 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
948 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
949 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
950 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
951 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
952 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
953 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
954 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
955 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
956 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
957 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
958 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
959 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
960 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
961 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
962 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
963 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
964 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
965 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
966
967 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
968 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
969
970 if (eeprom != 0xffff && eeprom != 0x0000) {
971 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
972 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
973 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
974 }
975 }
976
977 return 0;
978 }
979
980 /*
981 * Device state switch handlers.
982 */
983 static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
984 {
985 /*
986 * Initialize all registers.
987 */
988 if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
989 rt2500usb_init_bbp(rt2x00dev)))
990 return -EIO;
991
992 return 0;
993 }
994
995 static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
996 {
997 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
998 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
999
1000 /*
1001 * Disable synchronisation.
1002 */
1003 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1004
1005 rt2x00usb_disable_radio(rt2x00dev);
1006 }
1007
1008 static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
1009 enum dev_state state)
1010 {
1011 u16 reg;
1012 u16 reg2;
1013 unsigned int i;
1014 char put_to_sleep;
1015 char bbp_state;
1016 char rf_state;
1017
1018 put_to_sleep = (state != STATE_AWAKE);
1019
1020 reg = 0;
1021 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
1022 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
1023 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
1024 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1025 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
1026 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1027
1028 /*
1029 * Device is not guaranteed to be in the requested state yet.
1030 * We must wait until the register indicates that the
1031 * device has entered the correct state.
1032 */
1033 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1034 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
1035 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
1036 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
1037 if (bbp_state == state && rf_state == state)
1038 return 0;
1039 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1040 msleep(30);
1041 }
1042
1043 return -EBUSY;
1044 }
1045
1046 static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1047 enum dev_state state)
1048 {
1049 int retval = 0;
1050
1051 switch (state) {
1052 case STATE_RADIO_ON:
1053 retval = rt2500usb_enable_radio(rt2x00dev);
1054 break;
1055 case STATE_RADIO_OFF:
1056 rt2500usb_disable_radio(rt2x00dev);
1057 break;
1058 case STATE_RADIO_IRQ_ON:
1059 case STATE_RADIO_IRQ_ON_ISR:
1060 case STATE_RADIO_IRQ_OFF:
1061 case STATE_RADIO_IRQ_OFF_ISR:
1062 /* No support, but no error either */
1063 break;
1064 case STATE_DEEP_SLEEP:
1065 case STATE_SLEEP:
1066 case STATE_STANDBY:
1067 case STATE_AWAKE:
1068 retval = rt2500usb_set_state(rt2x00dev, state);
1069 break;
1070 default:
1071 retval = -ENOTSUPP;
1072 break;
1073 }
1074
1075 if (unlikely(retval))
1076 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1077 state, retval);
1078
1079 return retval;
1080 }
1081
1082 /*
1083 * TX descriptor initialization
1084 */
1085 static void rt2500usb_write_tx_desc(struct queue_entry *entry,
1086 struct txentry_desc *txdesc)
1087 {
1088 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1089 __le32 *txd = (__le32 *) entry->skb->data;
1090 u32 word;
1091
1092 /*
1093 * Start writing the descriptor words.
1094 */
1095 rt2x00_desc_read(txd, 0, &word);
1096 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
1097 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1098 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1099 rt2x00_set_field32(&word, TXD_W0_ACK,
1100 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1101 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1102 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1103 rt2x00_set_field32(&word, TXD_W0_OFDM,
1104 (txdesc->rate_mode == RATE_MODE_OFDM));
1105 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1106 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
1107 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1108 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
1109 rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
1110 rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
1111 rt2x00_desc_write(txd, 0, word);
1112
1113 rt2x00_desc_read(txd, 1, &word);
1114 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
1115 rt2x00_set_field32(&word, TXD_W1_AIFS, entry->queue->aifs);
1116 rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min);
1117 rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max);
1118 rt2x00_desc_write(txd, 1, word);
1119
1120 rt2x00_desc_read(txd, 2, &word);
1121 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1122 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1123 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1124 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
1125 rt2x00_desc_write(txd, 2, word);
1126
1127 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
1128 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
1129 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
1130 }
1131
1132 /*
1133 * Register descriptor details in skb frame descriptor.
1134 */
1135 skbdesc->flags |= SKBDESC_DESC_IN_SKB;
1136 skbdesc->desc = txd;
1137 skbdesc->desc_len = TXD_DESC_SIZE;
1138 }
1139
1140 /*
1141 * TX data initialization
1142 */
1143 static void rt2500usb_beacondone(struct urb *urb);
1144
1145 static void rt2500usb_write_beacon(struct queue_entry *entry,
1146 struct txentry_desc *txdesc)
1147 {
1148 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1149 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
1150 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1151 int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
1152 int length;
1153 u16 reg, reg0;
1154
1155 /*
1156 * Disable beaconing while we are reloading the beacon data,
1157 * otherwise we might be sending out invalid data.
1158 */
1159 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1160 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
1161 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1162
1163 /*
1164 * Add space for the descriptor in front of the skb.
1165 */
1166 skb_push(entry->skb, TXD_DESC_SIZE);
1167 memset(entry->skb->data, 0, TXD_DESC_SIZE);
1168
1169 /*
1170 * Write the TX descriptor for the beacon.
1171 */
1172 rt2500usb_write_tx_desc(entry, txdesc);
1173
1174 /*
1175 * Dump beacon to userspace through debugfs.
1176 */
1177 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb);
1178
1179 /*
1180 * USB devices cannot blindly pass the skb->len as the
1181 * length of the data to usb_fill_bulk_urb. Pass the skb
1182 * to the driver to determine what the length should be.
1183 */
1184 length = rt2x00dev->ops->lib->get_tx_data_len(entry);
1185
1186 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
1187 entry->skb->data, length, rt2500usb_beacondone,
1188 entry);
1189
1190 /*
1191 * Second we need to create the guardian byte.
1192 * We only need a single byte, so lets recycle
1193 * the 'flags' field we are not using for beacons.
1194 */
1195 bcn_priv->guardian_data = 0;
1196 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
1197 &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
1198 entry);
1199
1200 /*
1201 * Send out the guardian byte.
1202 */
1203 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
1204
1205 /*
1206 * Enable beaconing again.
1207 */
1208 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
1209 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
1210 reg0 = reg;
1211 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1212 /*
1213 * Beacon generation will fail initially.
1214 * To prevent this we need to change the TXRX_CSR19
1215 * register several times (reg0 is the same as reg
1216 * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0
1217 * and 1 in reg).
1218 */
1219 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1220 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1221 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1222 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1223 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1224 }
1225
1226 static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
1227 {
1228 int length;
1229
1230 /*
1231 * The length _must_ be a multiple of 2,
1232 * but it must _not_ be a multiple of the USB packet size.
1233 */
1234 length = roundup(entry->skb->len, 2);
1235 length += (2 * !(length % entry->queue->usb_maxpacket));
1236
1237 return length;
1238 }
1239
1240 /*
1241 * RX control handlers
1242 */
1243 static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1244 struct rxdone_entry_desc *rxdesc)
1245 {
1246 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1247 struct queue_entry_priv_usb *entry_priv = entry->priv_data;
1248 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1249 __le32 *rxd =
1250 (__le32 *)(entry->skb->data +
1251 (entry_priv->urb->actual_length -
1252 entry->queue->desc_size));
1253 u32 word0;
1254 u32 word1;
1255
1256 /*
1257 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1258 * frame data in rt2x00usb.
1259 */
1260 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
1261 rxd = (__le32 *)skbdesc->desc;
1262
1263 /*
1264 * It is now safe to read the descriptor on all architectures.
1265 */
1266 rt2x00_desc_read(rxd, 0, &word0);
1267 rt2x00_desc_read(rxd, 1, &word1);
1268
1269 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1270 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1271 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1272 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
1273
1274 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
1275 if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
1276 rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
1277
1278 if (rxdesc->cipher != CIPHER_NONE) {
1279 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
1280 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
1281 rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
1282
1283 /* ICV is located at the end of frame */
1284
1285 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
1286 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
1287 rxdesc->flags |= RX_FLAG_DECRYPTED;
1288 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
1289 rxdesc->flags |= RX_FLAG_MMIC_ERROR;
1290 }
1291
1292 /*
1293 * Obtain the status about this packet.
1294 * When frame was received with an OFDM bitrate,
1295 * the signal is the PLCP value. If it was received with
1296 * a CCK bitrate the signal is the rate in 100kbit/s.
1297 */
1298 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1299 rxdesc->rssi =
1300 rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
1301 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1302
1303 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1304 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1305 else
1306 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
1307 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1308 rxdesc->dev_flags |= RXDONE_MY_BSS;
1309
1310 /*
1311 * Adjust the skb memory window to the frame boundaries.
1312 */
1313 skb_trim(entry->skb, rxdesc->size);
1314 }
1315
1316 /*
1317 * Interrupt functions.
1318 */
1319 static void rt2500usb_beacondone(struct urb *urb)
1320 {
1321 struct queue_entry *entry = (struct queue_entry *)urb->context;
1322 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1323
1324 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
1325 return;
1326
1327 /*
1328 * Check if this was the guardian beacon,
1329 * if that was the case we need to send the real beacon now.
1330 * Otherwise we should free the sk_buffer, the device
1331 * should be doing the rest of the work now.
1332 */
1333 if (bcn_priv->guardian_urb == urb) {
1334 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
1335 } else if (bcn_priv->urb == urb) {
1336 dev_kfree_skb(entry->skb);
1337 entry->skb = NULL;
1338 }
1339 }
1340
1341 /*
1342 * Device probe functions.
1343 */
1344 static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1345 {
1346 u16 word;
1347 u8 *mac;
1348 u8 bbp;
1349
1350 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1351
1352 /*
1353 * Start validation of the data that has been read.
1354 */
1355 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1356 if (!is_valid_ether_addr(mac)) {
1357 random_ether_addr(mac);
1358 EEPROM(rt2x00dev, "MAC: %pM\n", mac);
1359 }
1360
1361 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1362 if (word == 0xffff) {
1363 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1364 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1365 ANTENNA_SW_DIVERSITY);
1366 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1367 ANTENNA_SW_DIVERSITY);
1368 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1369 LED_MODE_DEFAULT);
1370 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1371 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1372 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1373 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1374 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1375 }
1376
1377 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1378 if (word == 0xffff) {
1379 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1380 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1381 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1382 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1383 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1384 }
1385
1386 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1387 if (word == 0xffff) {
1388 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1389 DEFAULT_RSSI_OFFSET);
1390 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1391 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1392 }
1393
1394 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1395 if (word == 0xffff) {
1396 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1397 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1398 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1399 }
1400
1401 /*
1402 * Switch lower vgc bound to current BBP R17 value,
1403 * lower the value a bit for better quality.
1404 */
1405 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1406 bbp -= 6;
1407
1408 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1409 if (word == 0xffff) {
1410 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1411 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1412 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1413 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1414 } else {
1415 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1416 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1417 }
1418
1419 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1420 if (word == 0xffff) {
1421 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1422 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1423 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1424 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1425 }
1426
1427 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1428 if (word == 0xffff) {
1429 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1430 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1431 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1432 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1433 }
1434
1435 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1436 if (word == 0xffff) {
1437 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1438 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1439 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1440 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1441 }
1442
1443 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1444 if (word == 0xffff) {
1445 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1446 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1447 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1448 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1449 }
1450
1451 return 0;
1452 }
1453
1454 static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1455 {
1456 u16 reg;
1457 u16 value;
1458 u16 eeprom;
1459
1460 /*
1461 * Read EEPROM word for configuration.
1462 */
1463 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1464
1465 /*
1466 * Identify RF chipset.
1467 */
1468 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1469 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1470 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1471
1472 if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
1473 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1474 return -ENODEV;
1475 }
1476
1477 if (!rt2x00_rf(rt2x00dev, RF2522) &&
1478 !rt2x00_rf(rt2x00dev, RF2523) &&
1479 !rt2x00_rf(rt2x00dev, RF2524) &&
1480 !rt2x00_rf(rt2x00dev, RF2525) &&
1481 !rt2x00_rf(rt2x00dev, RF2525E) &&
1482 !rt2x00_rf(rt2x00dev, RF5222)) {
1483 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1484 return -ENODEV;
1485 }
1486
1487 /*
1488 * Identify default antenna configuration.
1489 */
1490 rt2x00dev->default_ant.tx =
1491 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1492 rt2x00dev->default_ant.rx =
1493 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1494
1495 /*
1496 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1497 * I am not 100% sure about this, but the legacy drivers do not
1498 * indicate antenna swapping in software is required when
1499 * diversity is enabled.
1500 */
1501 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1502 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1503 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1504 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1505
1506 /*
1507 * Store led mode, for correct led behaviour.
1508 */
1509 #ifdef CONFIG_RT2X00_LIB_LEDS
1510 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1511
1512 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
1513 if (value == LED_MODE_TXRX_ACTIVITY ||
1514 value == LED_MODE_DEFAULT ||
1515 value == LED_MODE_ASUS)
1516 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1517 LED_TYPE_ACTIVITY);
1518 #endif /* CONFIG_RT2X00_LIB_LEDS */
1519
1520 /*
1521 * Detect if this device has an hardware controlled radio.
1522 */
1523 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
1524 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
1525
1526 /*
1527 * Read the RSSI <-> dBm offset information.
1528 */
1529 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1530 rt2x00dev->rssi_offset =
1531 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1532
1533 return 0;
1534 }
1535
1536 /*
1537 * RF value list for RF2522
1538 * Supports: 2.4 GHz
1539 */
1540 static const struct rf_channel rf_vals_bg_2522[] = {
1541 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1542 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1543 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1544 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1545 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1546 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1547 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1548 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1549 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1550 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1551 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1552 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1553 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1554 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1555 };
1556
1557 /*
1558 * RF value list for RF2523
1559 * Supports: 2.4 GHz
1560 */
1561 static const struct rf_channel rf_vals_bg_2523[] = {
1562 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1563 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1564 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1565 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1566 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1567 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1568 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1569 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1570 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1571 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1572 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1573 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1574 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1575 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1576 };
1577
1578 /*
1579 * RF value list for RF2524
1580 * Supports: 2.4 GHz
1581 */
1582 static const struct rf_channel rf_vals_bg_2524[] = {
1583 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1584 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1585 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1586 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1587 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1588 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1589 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1590 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1591 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1592 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1593 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1594 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1595 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1596 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1597 };
1598
1599 /*
1600 * RF value list for RF2525
1601 * Supports: 2.4 GHz
1602 */
1603 static const struct rf_channel rf_vals_bg_2525[] = {
1604 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1605 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1606 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1607 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1608 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1609 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1610 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1611 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1612 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1613 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1614 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1615 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1616 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1617 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1618 };
1619
1620 /*
1621 * RF value list for RF2525e
1622 * Supports: 2.4 GHz
1623 */
1624 static const struct rf_channel rf_vals_bg_2525e[] = {
1625 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1626 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1627 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1628 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1629 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1630 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1631 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1632 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1633 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1634 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1635 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1636 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1637 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1638 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1639 };
1640
1641 /*
1642 * RF value list for RF5222
1643 * Supports: 2.4 GHz & 5.2 GHz
1644 */
1645 static const struct rf_channel rf_vals_5222[] = {
1646 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1647 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1648 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1649 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1650 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1651 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1652 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1653 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1654 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1655 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1656 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1657 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1658 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1659 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1660
1661 /* 802.11 UNI / HyperLan 2 */
1662 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1663 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1664 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1665 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1666 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1667 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1668 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1669 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1670
1671 /* 802.11 HyperLan 2 */
1672 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1673 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1674 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1675 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1676 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1677 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1678 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1679 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1680 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1681 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1682
1683 /* 802.11 UNII */
1684 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1685 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1686 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1687 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1688 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1689 };
1690
1691 static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1692 {
1693 struct hw_mode_spec *spec = &rt2x00dev->spec;
1694 struct channel_info *info;
1695 char *tx_power;
1696 unsigned int i;
1697
1698 /*
1699 * Initialize all hw fields.
1700 *
1701 * Don't set IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING unless we are
1702 * capable of sending the buffered frames out after the DTIM
1703 * transmission using rt2x00lib_beacondone. This will send out
1704 * multicast and broadcast traffic immediately instead of buffering it
1705 * infinitly and thus dropping it after some time.
1706 */
1707 rt2x00dev->hw->flags =
1708 IEEE80211_HW_RX_INCLUDES_FCS |
1709 IEEE80211_HW_SIGNAL_DBM |
1710 IEEE80211_HW_SUPPORTS_PS |
1711 IEEE80211_HW_PS_NULLFUNC_STACK;
1712
1713 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
1714 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1715 rt2x00_eeprom_addr(rt2x00dev,
1716 EEPROM_MAC_ADDR_0));
1717
1718 /*
1719 * Initialize hw_mode information.
1720 */
1721 spec->supported_bands = SUPPORT_BAND_2GHZ;
1722 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1723
1724 if (rt2x00_rf(rt2x00dev, RF2522)) {
1725 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1726 spec->channels = rf_vals_bg_2522;
1727 } else if (rt2x00_rf(rt2x00dev, RF2523)) {
1728 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1729 spec->channels = rf_vals_bg_2523;
1730 } else if (rt2x00_rf(rt2x00dev, RF2524)) {
1731 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1732 spec->channels = rf_vals_bg_2524;
1733 } else if (rt2x00_rf(rt2x00dev, RF2525)) {
1734 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1735 spec->channels = rf_vals_bg_2525;
1736 } else if (rt2x00_rf(rt2x00dev, RF2525E)) {
1737 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1738 spec->channels = rf_vals_bg_2525e;
1739 } else if (rt2x00_rf(rt2x00dev, RF5222)) {
1740 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1741 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1742 spec->channels = rf_vals_5222;
1743 }
1744
1745 /*
1746 * Create channel information array
1747 */
1748 info = kcalloc(spec->num_channels, sizeof(*info), GFP_KERNEL);
1749 if (!info)
1750 return -ENOMEM;
1751
1752 spec->channels_info = info;
1753
1754 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1755 for (i = 0; i < 14; i++) {
1756 info[i].max_power = MAX_TXPOWER;
1757 info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]);
1758 }
1759
1760 if (spec->num_channels > 14) {
1761 for (i = 14; i < spec->num_channels; i++) {
1762 info[i].max_power = MAX_TXPOWER;
1763 info[i].default_power1 = DEFAULT_TXPOWER;
1764 }
1765 }
1766
1767 return 0;
1768 }
1769
1770 static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1771 {
1772 int retval;
1773
1774 /*
1775 * Allocate eeprom data.
1776 */
1777 retval = rt2500usb_validate_eeprom(rt2x00dev);
1778 if (retval)
1779 return retval;
1780
1781 retval = rt2500usb_init_eeprom(rt2x00dev);
1782 if (retval)
1783 return retval;
1784
1785 /*
1786 * Initialize hw specifications.
1787 */
1788 retval = rt2500usb_probe_hw_mode(rt2x00dev);
1789 if (retval)
1790 return retval;
1791
1792 /*
1793 * This device requires the atim queue
1794 */
1795 __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1796 __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
1797 if (!modparam_nohwcrypt) {
1798 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
1799 __set_bit(DRIVER_REQUIRE_COPY_IV, &rt2x00dev->flags);
1800 }
1801 __set_bit(DRIVER_SUPPORT_WATCHDOG, &rt2x00dev->flags);
1802
1803 /*
1804 * Set the rssi offset.
1805 */
1806 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1807
1808 return 0;
1809 }
1810
1811 static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1812 .tx = rt2x00mac_tx,
1813 .start = rt2x00mac_start,
1814 .stop = rt2x00mac_stop,
1815 .add_interface = rt2x00mac_add_interface,
1816 .remove_interface = rt2x00mac_remove_interface,
1817 .config = rt2x00mac_config,
1818 .configure_filter = rt2x00mac_configure_filter,
1819 .set_tim = rt2x00mac_set_tim,
1820 .set_key = rt2x00mac_set_key,
1821 .sw_scan_start = rt2x00mac_sw_scan_start,
1822 .sw_scan_complete = rt2x00mac_sw_scan_complete,
1823 .get_stats = rt2x00mac_get_stats,
1824 .bss_info_changed = rt2x00mac_bss_info_changed,
1825 .conf_tx = rt2x00mac_conf_tx,
1826 .rfkill_poll = rt2x00mac_rfkill_poll,
1827 .flush = rt2x00mac_flush,
1828 };
1829
1830 static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1831 .probe_hw = rt2500usb_probe_hw,
1832 .initialize = rt2x00usb_initialize,
1833 .uninitialize = rt2x00usb_uninitialize,
1834 .clear_entry = rt2x00usb_clear_entry,
1835 .set_device_state = rt2500usb_set_device_state,
1836 .rfkill_poll = rt2500usb_rfkill_poll,
1837 .link_stats = rt2500usb_link_stats,
1838 .reset_tuner = rt2500usb_reset_tuner,
1839 .watchdog = rt2x00usb_watchdog,
1840 .start_queue = rt2500usb_start_queue,
1841 .kick_queue = rt2x00usb_kick_queue,
1842 .stop_queue = rt2500usb_stop_queue,
1843 .flush_queue = rt2x00usb_flush_queue,
1844 .write_tx_desc = rt2500usb_write_tx_desc,
1845 .write_beacon = rt2500usb_write_beacon,
1846 .get_tx_data_len = rt2500usb_get_tx_data_len,
1847 .fill_rxdone = rt2500usb_fill_rxdone,
1848 .config_shared_key = rt2500usb_config_key,
1849 .config_pairwise_key = rt2500usb_config_key,
1850 .config_filter = rt2500usb_config_filter,
1851 .config_intf = rt2500usb_config_intf,
1852 .config_erp = rt2500usb_config_erp,
1853 .config_ant = rt2500usb_config_ant,
1854 .config = rt2500usb_config,
1855 };
1856
1857 static const struct data_queue_desc rt2500usb_queue_rx = {
1858 .entry_num = 32,
1859 .data_size = DATA_FRAME_SIZE,
1860 .desc_size = RXD_DESC_SIZE,
1861 .priv_size = sizeof(struct queue_entry_priv_usb),
1862 };
1863
1864 static const struct data_queue_desc rt2500usb_queue_tx = {
1865 .entry_num = 32,
1866 .data_size = DATA_FRAME_SIZE,
1867 .desc_size = TXD_DESC_SIZE,
1868 .priv_size = sizeof(struct queue_entry_priv_usb),
1869 };
1870
1871 static const struct data_queue_desc rt2500usb_queue_bcn = {
1872 .entry_num = 1,
1873 .data_size = MGMT_FRAME_SIZE,
1874 .desc_size = TXD_DESC_SIZE,
1875 .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
1876 };
1877
1878 static const struct data_queue_desc rt2500usb_queue_atim = {
1879 .entry_num = 8,
1880 .data_size = DATA_FRAME_SIZE,
1881 .desc_size = TXD_DESC_SIZE,
1882 .priv_size = sizeof(struct queue_entry_priv_usb),
1883 };
1884
1885 static const struct rt2x00_ops rt2500usb_ops = {
1886 .name = KBUILD_MODNAME,
1887 .max_sta_intf = 1,
1888 .max_ap_intf = 1,
1889 .eeprom_size = EEPROM_SIZE,
1890 .rf_size = RF_SIZE,
1891 .tx_queues = NUM_TX_QUEUES,
1892 .extra_tx_headroom = TXD_DESC_SIZE,
1893 .rx = &rt2500usb_queue_rx,
1894 .tx = &rt2500usb_queue_tx,
1895 .bcn = &rt2500usb_queue_bcn,
1896 .atim = &rt2500usb_queue_atim,
1897 .lib = &rt2500usb_rt2x00_ops,
1898 .hw = &rt2500usb_mac80211_ops,
1899 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
1900 .debugfs = &rt2500usb_rt2x00debug,
1901 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1902 };
1903
1904 /*
1905 * rt2500usb module information.
1906 */
1907 static struct usb_device_id rt2500usb_device_table[] = {
1908 /* ASUS */
1909 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1910 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1911 /* Belkin */
1912 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1913 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1914 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1915 /* Cisco Systems */
1916 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1917 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1918 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1919 /* CNet */
1920 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt2500usb_ops) },
1921 /* Conceptronic */
1922 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1923 /* D-LINK */
1924 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1925 /* Gigabyte */
1926 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1927 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1928 /* Hercules */
1929 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1930 /* Melco */
1931 { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
1932 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1933 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1934 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1935 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
1936 /* MSI */
1937 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1938 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1939 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1940 /* Ralink */
1941 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1942 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1943 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1944 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1945 /* Sagem */
1946 { USB_DEVICE(0x079b, 0x004b), USB_DEVICE_DATA(&rt2500usb_ops) },
1947 /* Siemens */
1948 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1949 /* SMC */
1950 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1951 /* Spairon */
1952 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
1953 /* SURECOM */
1954 { USB_DEVICE(0x0769, 0x11f3), USB_DEVICE_DATA(&rt2500usb_ops) },
1955 /* Trust */
1956 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1957 /* VTech */
1958 { USB_DEVICE(0x0f88, 0x3012), USB_DEVICE_DATA(&rt2500usb_ops) },
1959 /* Zinwell */
1960 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1961 { 0, }
1962 };
1963
1964 MODULE_AUTHOR(DRV_PROJECT);
1965 MODULE_VERSION(DRV_VERSION);
1966 MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1967 MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1968 MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1969 MODULE_LICENSE("GPL");
1970
1971 static struct usb_driver rt2500usb_driver = {
1972 .name = KBUILD_MODNAME,
1973 .id_table = rt2500usb_device_table,
1974 .probe = rt2x00usb_probe,
1975 .disconnect = rt2x00usb_disconnect,
1976 .suspend = rt2x00usb_suspend,
1977 .resume = rt2x00usb_resume,
1978 };
1979
1980 static int __init rt2500usb_init(void)
1981 {
1982 return usb_register(&rt2500usb_driver);
1983 }
1984
1985 static void __exit rt2500usb_exit(void)
1986 {
1987 usb_deregister(&rt2500usb_driver);
1988 }
1989
1990 module_init(rt2500usb_init);
1991 module_exit(rt2500usb_exit);
linux-next