proc: use seq_puts()/seq_putc() where possible
[linux-2.6/next.git] / drivers / usb / host / ohci-pci.c
blob36ee9a666e937af93cb27af0321b5b409cf49929
1 /*
2 * OHCI HCD (Host Controller Driver) for USB.
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
12 * PCI Bus Glue
14 * This file is licenced under the GPL.
17 #ifndef CONFIG_PCI
18 #error "This file is PCI bus glue. CONFIG_PCI must be defined."
19 #endif
21 #include <linux/pci.h>
22 #include <linux/io.h>
25 /* constants used to work around PM-related transfer
26 * glitches in some AMD 700 series southbridges
28 #define AB_REG_BAR 0xf0
29 #define AB_INDX(addr) ((addr) + 0x00)
30 #define AB_DATA(addr) ((addr) + 0x04)
31 #define AX_INDXC 0X30
32 #define AX_DATAC 0x34
34 #define NB_PCIE_INDX_ADDR 0xe0
35 #define NB_PCIE_INDX_DATA 0xe4
36 #define PCIE_P_CNTL 0x10040
37 #define BIF_NB 0x10002
39 static struct pci_dev *amd_smbus_dev;
40 static struct pci_dev *amd_hb_dev;
41 static int amd_ohci_iso_count;
43 /*-------------------------------------------------------------------------*/
45 static int broken_suspend(struct usb_hcd *hcd)
47 device_init_wakeup(&hcd->self.root_hub->dev, 0);
48 return 0;
51 /* AMD 756, for most chips (early revs), corrupts register
52 * values on read ... so enable the vendor workaround.
54 static int ohci_quirk_amd756(struct usb_hcd *hcd)
56 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
58 ohci->flags = OHCI_QUIRK_AMD756;
59 ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
61 /* also erratum 10 (suspend/resume issues) */
62 return broken_suspend(hcd);
65 /* Apple's OHCI driver has a lot of bizarre workarounds
66 * for this chip. Evidently control and bulk lists
67 * can get confused. (B&W G3 models, and ...)
69 static int ohci_quirk_opti(struct usb_hcd *hcd)
71 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
73 ohci_dbg (ohci, "WARNING: OPTi workarounds unavailable\n");
75 return 0;
78 /* Check for NSC87560. We have to look at the bridge (fn1) to
79 * identify the USB (fn2). This quirk might apply to more or
80 * even all NSC stuff.
82 static int ohci_quirk_ns(struct usb_hcd *hcd)
84 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
85 struct pci_dev *b;
87 b = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
88 if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
89 && b->vendor == PCI_VENDOR_ID_NS) {
90 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
92 ohci->flags |= OHCI_QUIRK_SUPERIO;
93 ohci_dbg (ohci, "Using NSC SuperIO setup\n");
95 pci_dev_put(b);
97 return 0;
100 /* Check for Compaq's ZFMicro chipset, which needs short
101 * delays before control or bulk queues get re-activated
102 * in finish_unlinks()
104 static int ohci_quirk_zfmicro(struct usb_hcd *hcd)
106 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
108 ohci->flags |= OHCI_QUIRK_ZFMICRO;
109 ohci_dbg(ohci, "enabled Compaq ZFMicro chipset quirks\n");
111 return 0;
114 /* Check for Toshiba SCC OHCI which has big endian registers
115 * and little endian in memory data structures
117 static int ohci_quirk_toshiba_scc(struct usb_hcd *hcd)
119 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
121 /* That chip is only present in the southbridge of some
122 * cell based platforms which are supposed to select
123 * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if
124 * that was the case though.
126 #ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
127 ohci->flags |= OHCI_QUIRK_BE_MMIO;
128 ohci_dbg (ohci, "enabled big endian Toshiba quirk\n");
129 return 0;
130 #else
131 ohci_err (ohci, "unsupported big endian Toshiba quirk\n");
132 return -ENXIO;
133 #endif
136 /* Check for NEC chip and apply quirk for allegedly lost interrupts.
139 static void ohci_quirk_nec_worker(struct work_struct *work)
141 struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work);
142 int status;
144 status = ohci_init(ohci);
145 if (status != 0) {
146 ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
147 "ohci_init", status);
148 return;
151 status = ohci_restart(ohci);
152 if (status != 0)
153 ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
154 "ohci_restart", status);
157 static int ohci_quirk_nec(struct usb_hcd *hcd)
159 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
161 ohci->flags |= OHCI_QUIRK_NEC;
162 INIT_WORK(&ohci->nec_work, ohci_quirk_nec_worker);
163 ohci_dbg (ohci, "enabled NEC chipset lost interrupt quirk\n");
165 return 0;
168 static int ohci_quirk_amd700(struct usb_hcd *hcd)
170 struct ohci_hcd *ohci = hcd_to_ohci(hcd);
171 u8 rev = 0;
173 if (!amd_smbus_dev)
174 amd_smbus_dev = pci_get_device(PCI_VENDOR_ID_ATI,
175 PCI_DEVICE_ID_ATI_SBX00_SMBUS, NULL);
176 if (!amd_smbus_dev)
177 return 0;
179 pci_read_config_byte(amd_smbus_dev, PCI_REVISION_ID, &rev);
181 /* SB800 needs pre-fetch fix */
182 if ((rev >= 0x40) && (rev <= 0x4f)) {
183 ohci->flags |= OHCI_QUIRK_AMD_PREFETCH;
184 ohci_dbg(ohci, "enabled AMD prefetch quirk\n");
187 if ((rev > 0x3b) || (rev < 0x30)) {
188 pci_dev_put(amd_smbus_dev);
189 amd_smbus_dev = NULL;
190 return 0;
193 amd_ohci_iso_count++;
195 if (!amd_hb_dev)
196 amd_hb_dev = pci_get_device(PCI_VENDOR_ID_AMD, 0x9600, NULL);
198 ohci->flags |= OHCI_QUIRK_AMD_ISO;
199 ohci_dbg(ohci, "enabled AMD ISO transfers quirk\n");
201 return 0;
204 /* nVidia controllers continue to drive Reset signalling on the bus
205 * even after system shutdown, wasting power. This flag tells the
206 * shutdown routine to leave the controller OPERATIONAL instead of RESET.
208 static int ohci_quirk_nvidia_shutdown(struct usb_hcd *hcd)
210 struct ohci_hcd *ohci = hcd_to_ohci(hcd);
212 ohci->flags |= OHCI_QUIRK_SHUTDOWN;
213 ohci_dbg(ohci, "enabled nVidia shutdown quirk\n");
215 return 0;
219 * The hardware normally enables the A-link power management feature, which
220 * lets the system lower the power consumption in idle states.
222 * Assume the system is configured to have USB 1.1 ISO transfers going
223 * to or from a USB device. Without this quirk, that stream may stutter
224 * or have breaks occasionally. For transfers going to speakers, this
225 * makes a very audible mess...
227 * That audio playback corruption is due to the audio stream getting
228 * interrupted occasionally when the link goes in lower power state
229 * This USB quirk prevents the link going into that lower power state
230 * during audio playback or other ISO operations.
232 static void quirk_amd_pll(int on)
234 u32 addr;
235 u32 val;
236 u32 bit = (on > 0) ? 1 : 0;
238 pci_read_config_dword(amd_smbus_dev, AB_REG_BAR, &addr);
240 /* BIT names/meanings are NDA-protected, sorry ... */
242 outl(AX_INDXC, AB_INDX(addr));
243 outl(0x40, AB_DATA(addr));
244 outl(AX_DATAC, AB_INDX(addr));
245 val = inl(AB_DATA(addr));
246 val &= ~((1 << 3) | (1 << 4) | (1 << 9));
247 val |= (bit << 3) | ((!bit) << 4) | ((!bit) << 9);
248 outl(val, AB_DATA(addr));
250 if (amd_hb_dev) {
251 addr = PCIE_P_CNTL;
252 pci_write_config_dword(amd_hb_dev, NB_PCIE_INDX_ADDR, addr);
254 pci_read_config_dword(amd_hb_dev, NB_PCIE_INDX_DATA, &val);
255 val &= ~(1 | (1 << 3) | (1 << 4) | (1 << 9) | (1 << 12));
256 val |= bit | (bit << 3) | (bit << 12);
257 val |= ((!bit) << 4) | ((!bit) << 9);
258 pci_write_config_dword(amd_hb_dev, NB_PCIE_INDX_DATA, val);
260 addr = BIF_NB;
261 pci_write_config_dword(amd_hb_dev, NB_PCIE_INDX_ADDR, addr);
263 pci_read_config_dword(amd_hb_dev, NB_PCIE_INDX_DATA, &val);
264 val &= ~(1 << 8);
265 val |= bit << 8;
266 pci_write_config_dword(amd_hb_dev, NB_PCIE_INDX_DATA, val);
270 static void amd_iso_dev_put(void)
272 amd_ohci_iso_count--;
273 if (amd_ohci_iso_count == 0) {
274 if (amd_smbus_dev) {
275 pci_dev_put(amd_smbus_dev);
276 amd_smbus_dev = NULL;
278 if (amd_hb_dev) {
279 pci_dev_put(amd_hb_dev);
280 amd_hb_dev = NULL;
286 static void sb800_prefetch(struct ohci_hcd *ohci, int on)
288 struct pci_dev *pdev;
289 u16 misc;
291 pdev = to_pci_dev(ohci_to_hcd(ohci)->self.controller);
292 pci_read_config_word(pdev, 0x50, &misc);
293 if (on == 0)
294 pci_write_config_word(pdev, 0x50, misc & 0xfcff);
295 else
296 pci_write_config_word(pdev, 0x50, misc | 0x0300);
299 /* List of quirks for OHCI */
300 static const struct pci_device_id ohci_pci_quirks[] = {
302 PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x740c),
303 .driver_data = (unsigned long)ohci_quirk_amd756,
306 PCI_DEVICE(PCI_VENDOR_ID_OPTI, 0xc861),
307 .driver_data = (unsigned long)ohci_quirk_opti,
310 PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_ANY_ID),
311 .driver_data = (unsigned long)ohci_quirk_ns,
314 PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xa0f8),
315 .driver_data = (unsigned long)ohci_quirk_zfmicro,
318 PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, 0x01b6),
319 .driver_data = (unsigned long)ohci_quirk_toshiba_scc,
322 PCI_DEVICE(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB),
323 .driver_data = (unsigned long)ohci_quirk_nec,
326 /* Toshiba portege 4000 */
327 .vendor = PCI_VENDOR_ID_AL,
328 .device = 0x5237,
329 .subvendor = PCI_VENDOR_ID_TOSHIBA,
330 .subdevice = 0x0004,
331 .driver_data = (unsigned long) broken_suspend,
334 PCI_DEVICE(PCI_VENDOR_ID_ITE, 0x8152),
335 .driver_data = (unsigned long) broken_suspend,
338 PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4397),
339 .driver_data = (unsigned long)ohci_quirk_amd700,
342 PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4398),
343 .driver_data = (unsigned long)ohci_quirk_amd700,
346 PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4399),
347 .driver_data = (unsigned long)ohci_quirk_amd700,
350 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
351 .driver_data = (unsigned long) ohci_quirk_nvidia_shutdown,
354 /* FIXME for some of the early AMD 760 southbridges, OHCI
355 * won't work at all. blacklist them.
361 static int ohci_pci_reset (struct usb_hcd *hcd)
363 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
364 int ret = 0;
366 if (hcd->self.controller) {
367 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
368 const struct pci_device_id *quirk_id;
370 quirk_id = pci_match_id(ohci_pci_quirks, pdev);
371 if (quirk_id != NULL) {
372 int (*quirk)(struct usb_hcd *ohci);
373 quirk = (void *)quirk_id->driver_data;
374 ret = quirk(hcd);
377 if (ret == 0) {
378 ohci_hcd_init (ohci);
379 return ohci_init (ohci);
381 return ret;
385 static int __devinit ohci_pci_start (struct usb_hcd *hcd)
387 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
388 int ret;
390 #ifdef CONFIG_PM /* avoid warnings about unused pdev */
391 if (hcd->self.controller) {
392 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
394 /* RWC may not be set for add-in PCI cards, since boot
395 * firmware probably ignored them. This transfers PCI
396 * PM wakeup capabilities.
398 if (device_can_wakeup(&pdev->dev))
399 ohci->hc_control |= OHCI_CTRL_RWC;
401 #endif /* CONFIG_PM */
403 ret = ohci_run (ohci);
404 if (ret < 0) {
405 ohci_err (ohci, "can't start\n");
406 ohci_stop (hcd);
408 return ret;
411 #ifdef CONFIG_PM
413 static int ohci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
415 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
416 unsigned long flags;
417 int rc = 0;
419 /* Root hub was already suspended. Disable irq emission and
420 * mark HW unaccessible, bail out if RH has been resumed. Use
421 * the spinlock to properly synchronize with possible pending
422 * RH suspend or resume activity.
424 * This is still racy as hcd->state is manipulated outside of
425 * any locks =P But that will be a different fix.
427 spin_lock_irqsave (&ohci->lock, flags);
428 if (hcd->state != HC_STATE_SUSPENDED) {
429 rc = -EINVAL;
430 goto bail;
432 ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
433 (void)ohci_readl(ohci, &ohci->regs->intrdisable);
435 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
436 bail:
437 spin_unlock_irqrestore (&ohci->lock, flags);
439 return rc;
443 static int ohci_pci_resume(struct usb_hcd *hcd, bool hibernated)
445 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
447 /* Make sure resume from hibernation re-enumerates everything */
448 if (hibernated)
449 ohci_usb_reset(hcd_to_ohci(hcd));
451 ohci_finish_controller_resume(hcd);
452 return 0;
455 #endif /* CONFIG_PM */
458 /*-------------------------------------------------------------------------*/
460 static const struct hc_driver ohci_pci_hc_driver = {
461 .description = hcd_name,
462 .product_desc = "OHCI Host Controller",
463 .hcd_priv_size = sizeof(struct ohci_hcd),
466 * generic hardware linkage
468 .irq = ohci_irq,
469 .flags = HCD_MEMORY | HCD_USB11,
472 * basic lifecycle operations
474 .reset = ohci_pci_reset,
475 .start = ohci_pci_start,
476 .stop = ohci_stop,
477 .shutdown = ohci_shutdown,
479 #ifdef CONFIG_PM
480 .pci_suspend = ohci_pci_suspend,
481 .pci_resume = ohci_pci_resume,
482 #endif
485 * managing i/o requests and associated device resources
487 .urb_enqueue = ohci_urb_enqueue,
488 .urb_dequeue = ohci_urb_dequeue,
489 .endpoint_disable = ohci_endpoint_disable,
492 * scheduling support
494 .get_frame_number = ohci_get_frame,
497 * root hub support
499 .hub_status_data = ohci_hub_status_data,
500 .hub_control = ohci_hub_control,
501 #ifdef CONFIG_PM
502 .bus_suspend = ohci_bus_suspend,
503 .bus_resume = ohci_bus_resume,
504 #endif
505 .start_port_reset = ohci_start_port_reset,
508 /*-------------------------------------------------------------------------*/
511 static const struct pci_device_id pci_ids [] = { {
512 /* handle any USB OHCI controller */
513 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0),
514 .driver_data = (unsigned long) &ohci_pci_hc_driver,
515 }, { /* end: all zeroes */ }
517 MODULE_DEVICE_TABLE (pci, pci_ids);
519 /* pci driver glue; this is a "new style" PCI driver module */
520 static struct pci_driver ohci_pci_driver = {
521 .name = (char *) hcd_name,
522 .id_table = pci_ids,
524 .probe = usb_hcd_pci_probe,
525 .remove = usb_hcd_pci_remove,
526 .shutdown = usb_hcd_pci_shutdown,
528 #ifdef CONFIG_PM_SLEEP
529 .driver = {
530 .pm = &usb_hcd_pci_pm_ops
532 #endif