Add linux-next specific files for 20110831
[linux-2.6/next.git] / arch / arm / include / asm / pgtable.h
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1 /*
2 * arch/arm/include/asm/pgtable.h
4 * Copyright (C) 1995-2002 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #ifndef _ASMARM_PGTABLE_H
11 #define _ASMARM_PGTABLE_H
13 #include <linux/const.h>
14 #include <asm/proc-fns.h>
16 #ifndef CONFIG_MMU
18 #include <asm-generic/4level-fixup.h>
19 #include "pgtable-nommu.h"
21 #else
23 #include <asm-generic/pgtable-nopud.h>
24 #include <asm/memory.h>
25 #include <mach/vmalloc.h>
26 #include <asm/pgtable-hwdef.h>
28 #ifdef CONFIG_ARM_LPAE
29 #include <asm/pgtable-3level.h>
30 #else
31 #include <asm/pgtable-2level.h>
32 #endif
35 * Just any arbitrary offset to the start of the vmalloc VM area: the
36 * current 8MB value just means that there will be a 8MB "hole" after the
37 * physical memory until the kernel virtual memory starts. That means that
38 * any out-of-bounds memory accesses will hopefully be caught.
39 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
40 * area for the same reason. ;)
42 * Note that platforms may override VMALLOC_START, but they must provide
43 * VMALLOC_END. VMALLOC_END defines the (exclusive) limit of this space,
44 * which may not overlap IO space.
46 #ifndef VMALLOC_START
47 #define VMALLOC_OFFSET (8*1024*1024)
48 #define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
49 #endif
51 #define LIBRARY_TEXT_START 0x0c000000
53 #ifndef __ASSEMBLY__
54 extern void __pte_error(const char *file, int line, pte_t);
55 extern void __pmd_error(const char *file, int line, pmd_t);
56 extern void __pgd_error(const char *file, int line, pgd_t);
58 #define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte)
59 #define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd)
60 #define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd)
63 * This is the lowest virtual address we can permit any user space
64 * mapping to be mapped at. This is particularly important for
65 * non-high vector CPUs.
67 #define FIRST_USER_ADDRESS PAGE_SIZE
70 * The pgprot_* and protection_map entries will be fixed up in runtime
71 * to include the cachable and bufferable bits based on memory policy,
72 * as well as any architecture dependent bits like global/ASID and SMP
73 * shared mapping bits.
75 #define _L_PTE_DEFAULT L_PTE_PRESENT | L_PTE_YOUNG
77 extern pgprot_t pgprot_user;
78 extern pgprot_t pgprot_kernel;
80 #define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b))
82 #define PAGE_NONE _MOD_PROT(pgprot_user, L_PTE_XN | L_PTE_RDONLY)
83 #define PAGE_SHARED _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_XN)
84 #define PAGE_SHARED_EXEC _MOD_PROT(pgprot_user, L_PTE_USER)
85 #define PAGE_COPY _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
86 #define PAGE_COPY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY)
87 #define PAGE_READONLY _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
88 #define PAGE_READONLY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY)
89 #define PAGE_KERNEL _MOD_PROT(pgprot_kernel, L_PTE_XN)
90 #define PAGE_KERNEL_EXEC pgprot_kernel
92 #define __PAGE_NONE __pgprot(_L_PTE_DEFAULT | L_PTE_RDONLY | L_PTE_XN)
93 #define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_XN)
94 #define __PAGE_SHARED_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER)
95 #define __PAGE_COPY __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
96 #define __PAGE_COPY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY)
97 #define __PAGE_READONLY __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
98 #define __PAGE_READONLY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY)
100 #define __pgprot_modify(prot,mask,bits) \
101 __pgprot((pgprot_val(prot) & ~(mask)) | (bits))
103 #define pgprot_noncached(prot) \
104 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED)
106 #define pgprot_writecombine(prot) \
107 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE)
109 #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
110 #define pgprot_dmacoherent(prot) \
111 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE | L_PTE_XN)
112 #define __HAVE_PHYS_MEM_ACCESS_PROT
113 struct file;
114 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
115 unsigned long size, pgprot_t vma_prot);
116 #else
117 #define pgprot_dmacoherent(prot) \
118 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED | L_PTE_XN)
119 #endif
121 #endif /* __ASSEMBLY__ */
124 * The table below defines the page protection levels that we insert into our
125 * Linux page table version. These get translated into the best that the
126 * architecture can perform. Note that on most ARM hardware:
127 * 1) We cannot do execute protection
128 * 2) If we could do execute protection, then read is implied
129 * 3) write implies read permissions
131 #define __P000 __PAGE_NONE
132 #define __P001 __PAGE_READONLY
133 #define __P010 __PAGE_COPY
134 #define __P011 __PAGE_COPY
135 #define __P100 __PAGE_READONLY_EXEC
136 #define __P101 __PAGE_READONLY_EXEC
137 #define __P110 __PAGE_COPY_EXEC
138 #define __P111 __PAGE_COPY_EXEC
140 #define __S000 __PAGE_NONE
141 #define __S001 __PAGE_READONLY
142 #define __S010 __PAGE_SHARED
143 #define __S011 __PAGE_SHARED
144 #define __S100 __PAGE_READONLY_EXEC
145 #define __S101 __PAGE_READONLY_EXEC
146 #define __S110 __PAGE_SHARED_EXEC
147 #define __S111 __PAGE_SHARED_EXEC
149 #ifndef __ASSEMBLY__
151 * ZERO_PAGE is a global shared page that is always zero: used
152 * for zero-mapped memory areas etc..
154 extern struct page *empty_zero_page;
155 #define ZERO_PAGE(vaddr) (empty_zero_page)
158 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
160 /* to find an entry in a page-table-directory */
161 #define pgd_index(addr) ((addr) >> PGDIR_SHIFT)
163 #define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr))
165 /* to find an entry in a kernel page-table-directory */
166 #define pgd_offset_k(addr) pgd_offset(&init_mm, addr)
168 #ifdef CONFIG_ARM_LPAE
170 #define pud_none(pud) (!pud_val(pud))
171 #define pud_bad(pud) (!(pud_val(pud) & 2))
172 #define pud_present(pud) (pud_val(pud))
174 #define pud_clear(pudp) \
175 do { \
176 *pudp = __pud(0); \
177 clean_pmd_entry(pudp); \
178 } while (0)
180 #define set_pud(pudp, pud) \
181 do { \
182 *pudp = pud; \
183 flush_pmd_entry(pudp); \
184 } while (0)
186 static inline pmd_t *pud_page_vaddr(pud_t pud)
188 return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK);
191 #else /* !CONFIG_ARM_LPAE */
194 * The "pud_xxx()" functions here are trivial when the pmd is folded into
195 * the pud: the pud entry is never bad, always exists, and can't be set or
196 * cleared.
198 #define pud_none(pud) (0)
199 #define pud_bad(pud) (0)
200 #define pud_present(pud) (1)
201 #define pud_clear(pudp) do { } while (0)
202 #define set_pud(pud,pudp) do { } while (0)
204 #endif /* CONFIG_ARM_LPAE */
206 /* Find an entry in the second-level page table.. */
207 #ifdef CONFIG_ARM_LPAE
208 #define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
209 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
211 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(addr);
213 #else
214 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
216 return (pmd_t *)pud;
218 #endif
220 #define pmd_none(pmd) (!pmd_val(pmd))
221 #define pmd_present(pmd) (pmd_val(pmd))
223 #ifdef CONFIG_ARM_LPAE
225 #define pmd_bad(pmd) (!(pmd_val(pmd) & 2))
227 #define copy_pmd(pmdpd,pmdps) \
228 do { \
229 *pmdpd = *pmdps; \
230 flush_pmd_entry(pmdpd); \
231 } while (0)
233 #define pmd_clear(pmdp) \
234 do { \
235 *pmdp = __pmd(0); \
236 clean_pmd_entry(pmdp); \
237 } while (0)
239 #else /* !CONFIG_ARM_LPAE */
241 #define pmd_bad(pmd) (pmd_val(pmd) & 2)
243 #define copy_pmd(pmdpd,pmdps) \
244 do { \
245 pmdpd[0] = pmdps[0]; \
246 pmdpd[1] = pmdps[1]; \
247 flush_pmd_entry(pmdpd); \
248 } while (0)
250 #define pmd_clear(pmdp) \
251 do { \
252 pmdp[0] = __pmd(0); \
253 pmdp[1] = __pmd(0); \
254 clean_pmd_entry(pmdp); \
255 } while (0)
257 #endif /* CONFIG_ARM_LPAE */
259 static inline pte_t *pmd_page_vaddr(pmd_t pmd)
261 return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK);
264 #define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
266 #ifndef CONFIG_HIGHPTE
267 #define __pte_map(pmd) pmd_page_vaddr(*(pmd))
268 #define __pte_unmap(pte) do { } while (0)
269 #else
270 #define __pte_map(pmd) (pte_t *)kmap_atomic(pmd_page(*(pmd)))
271 #define __pte_unmap(pte) kunmap_atomic(pte)
272 #endif
274 #define pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
276 #define pte_offset_kernel(pmd,addr) (pmd_page_vaddr(*(pmd)) + pte_index(addr))
278 #define pte_offset_map(pmd,addr) (__pte_map(pmd) + pte_index(addr))
279 #define pte_unmap(pte) __pte_unmap(pte)
281 #define pte_pfn(pte) ((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)
282 #define pfn_pte(pfn,prot) __pte(__pfn_to_phys(pfn) | pgprot_val(prot))
284 #define pte_page(pte) pfn_to_page(pte_pfn(pte))
285 #define mk_pte(page,prot) pfn_pte(page_to_pfn(page), prot)
287 #define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0)
289 #ifdef CONFIG_ARM_LPAE
290 #define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,__pte(pte_val(pte)|(ext)))
291 #else
292 #define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext)
293 #endif
295 #if __LINUX_ARM_ARCH__ < 6
296 static inline void __sync_icache_dcache(pte_t pteval)
299 #else
300 extern void __sync_icache_dcache(pte_t pteval);
301 #endif
303 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
304 pte_t *ptep, pte_t pteval)
306 if (addr >= TASK_SIZE)
307 set_pte_ext(ptep, pteval, 0);
308 else {
309 __sync_icache_dcache(pteval);
310 set_pte_ext(ptep, pteval, PTE_EXT_NG);
314 #define pte_none(pte) (!pte_val(pte))
315 #define pte_present(pte) (pte_val(pte) & L_PTE_PRESENT)
316 #define pte_write(pte) (!(pte_val(pte) & L_PTE_RDONLY))
317 #define pte_dirty(pte) (pte_val(pte) & L_PTE_DIRTY)
318 #define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG)
319 #define pte_exec(pte) (!(pte_val(pte) & L_PTE_XN))
320 #define pte_special(pte) (0)
322 #define pte_present_user(pte) \
323 ((pte_val(pte) & (L_PTE_PRESENT | L_PTE_USER)) == \
324 (L_PTE_PRESENT | L_PTE_USER))
326 #define PTE_BIT_FUNC(fn,op) \
327 static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }
329 PTE_BIT_FUNC(wrprotect, |= L_PTE_RDONLY);
330 PTE_BIT_FUNC(mkwrite, &= ~L_PTE_RDONLY);
331 PTE_BIT_FUNC(mkclean, &= ~L_PTE_DIRTY);
332 PTE_BIT_FUNC(mkdirty, |= L_PTE_DIRTY);
333 PTE_BIT_FUNC(mkold, &= ~L_PTE_YOUNG);
334 PTE_BIT_FUNC(mkyoung, |= L_PTE_YOUNG);
336 static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
338 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
340 const pteval_t mask = L_PTE_XN | L_PTE_RDONLY | L_PTE_USER;
341 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
342 return pte;
346 * Encode and decode a swap entry. Swap entries are stored in the Linux
347 * page tables as follows:
349 * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
350 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
351 * <--------------- offset --------------------> <- type --> 0 0 0
353 * This gives us up to 63 swap files and 32GB per swap file. Note that
354 * the offset field is always non-zero.
356 #define __SWP_TYPE_SHIFT 3
357 #define __SWP_TYPE_BITS 6
358 #define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)
359 #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
361 #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
362 #define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT)
363 #define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
365 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
366 #define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
369 * It is an error for the kernel to have more swap files than we can
370 * encode in the PTEs. This ensures that we know when MAX_SWAPFILES
371 * is increased beyond what we presently support.
373 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
376 * Encode and decode a file entry. File entries are stored in the Linux
377 * page tables as follows:
379 * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
380 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
381 * <----------------------- offset ------------------------> 1 0 0
383 #define pte_file(pte) (pte_val(pte) & L_PTE_FILE)
384 #define pte_to_pgoff(x) (pte_val(x) >> 3)
385 #define pgoff_to_pte(x) __pte(((x) << 3) | L_PTE_FILE)
387 #define PTE_FILE_MAX_BITS 29
389 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
390 /* FIXME: this is not correct */
391 #define kern_addr_valid(addr) (1)
393 #include <asm-generic/pgtable.h>
396 * We provide our own arch_get_unmapped_area to cope with VIPT caches.
398 #define HAVE_ARCH_UNMAPPED_AREA
401 * remap a physical page `pfn' of size `size' with page protection `prot'
402 * into virtual address `from'
404 #define io_remap_pfn_range(vma,from,pfn,size,prot) \
405 remap_pfn_range(vma, from, pfn, size, prot)
407 #define pgtable_cache_init() do { } while (0)
409 void identity_mapping_add(pgd_t *, unsigned long, unsigned long);
410 void identity_mapping_del(pgd_t *, unsigned long, unsigned long);
412 #endif /* !__ASSEMBLY__ */
414 #endif /* CONFIG_MMU */
416 #endif /* _ASMARM_PGTABLE_H */