Add linux-next specific files for 20110831
[linux-2.6/next.git] / arch / arm / mach-ep93xx / core.c
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1 /*
2 * arch/arm/mach-ep93xx/core.c
3 * Core routines for Cirrus EP93xx chips.
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
8 * Thanks go to Michael Burian and Ray Lehtiniemi for their key
9 * role in the ep93xx linux community.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
17 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/interrupt.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/timex.h>
25 #include <linux/irq.h>
26 #include <linux/io.h>
27 #include <linux/gpio.h>
28 #include <linux/leds.h>
29 #include <linux/termios.h>
30 #include <linux/amba/bus.h>
31 #include <linux/amba/serial.h>
32 #include <linux/mtd/physmap.h>
33 #include <linux/i2c.h>
34 #include <linux/i2c-gpio.h>
35 #include <linux/spi/spi.h>
36 #include <linux/export.h>
38 #include <mach/hardware.h>
39 #include <mach/fb.h>
40 #include <mach/ep93xx_keypad.h>
41 #include <mach/ep93xx_spi.h>
43 #include <asm/mach/map.h>
44 #include <asm/mach/time.h>
46 #include <asm/hardware/vic.h>
49 /*************************************************************************
50 * Static I/O mappings that are needed for all EP93xx platforms
51 *************************************************************************/
52 static struct map_desc ep93xx_io_desc[] __initdata = {
54 .virtual = EP93XX_AHB_VIRT_BASE,
55 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
56 .length = EP93XX_AHB_SIZE,
57 .type = MT_DEVICE,
58 }, {
59 .virtual = EP93XX_APB_VIRT_BASE,
60 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
61 .length = EP93XX_APB_SIZE,
62 .type = MT_DEVICE,
66 void __init ep93xx_map_io(void)
68 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
72 /*************************************************************************
73 * Timer handling for EP93xx
74 *************************************************************************
75 * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
76 * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
77 * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
78 * is free-running, and can't generate interrupts.
80 * The 508 kHz timers are ideal for use for the timer interrupt, as the
81 * most common values of HZ divide 508 kHz nicely. We pick one of the 16
82 * bit timers (timer 1) since we don't need more than 16 bits of reload
83 * value as long as HZ >= 8.
85 * The higher clock rate of timer 4 makes it a better choice than the
86 * other timers for use in gettimeoffset(), while the fact that it can't
87 * generate interrupts means we don't have to worry about not being able
88 * to use this timer for something else. We also use timer 4 for keeping
89 * track of lost jiffies.
91 #define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
92 #define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
93 #define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
94 #define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
95 #define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7)
96 #define EP93XX_TIMER123_CONTROL_MODE (1 << 6)
97 #define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3)
98 #define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
99 #define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
100 #define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
101 #define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
102 #define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
103 #define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
104 #define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
105 #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
106 #define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
107 #define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
108 #define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
109 #define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
111 #define EP93XX_TIMER123_CLOCK 508469
112 #define EP93XX_TIMER4_CLOCK 983040
114 #define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1)
115 #define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
117 static unsigned int last_jiffy_time;
119 static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
121 /* Writing any value clears the timer interrupt */
122 __raw_writel(1, EP93XX_TIMER1_CLEAR);
124 /* Recover lost jiffies */
125 while ((signed long)
126 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
127 >= TIMER4_TICKS_PER_JIFFY) {
128 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
129 timer_tick();
132 return IRQ_HANDLED;
135 static struct irqaction ep93xx_timer_irq = {
136 .name = "ep93xx timer",
137 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
138 .handler = ep93xx_timer_interrupt,
141 static void __init ep93xx_timer_init(void)
143 u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
144 EP93XX_TIMER123_CONTROL_CLKSEL;
146 /* Enable periodic HZ timer. */
147 __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
148 __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
149 __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
150 EP93XX_TIMER1_CONTROL);
152 /* Enable lost jiffy timer. */
153 __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
154 EP93XX_TIMER4_VALUE_HIGH);
156 setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
159 static unsigned long ep93xx_gettimeoffset(void)
161 int offset;
163 offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
165 /* Calculate (1000000 / 983040) * offset. */
166 return offset + (53 * offset / 3072);
169 struct sys_timer ep93xx_timer = {
170 .init = ep93xx_timer_init,
171 .offset = ep93xx_gettimeoffset,
175 /*************************************************************************
176 * EP93xx IRQ handling
177 *************************************************************************/
178 void __init ep93xx_init_irq(void)
180 vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
181 vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
185 /*************************************************************************
186 * EP93xx System Controller Software Locked register handling
187 *************************************************************************/
190 * syscon_swlock prevents anything else from writing to the syscon
191 * block while a software locked register is being written.
193 static DEFINE_SPINLOCK(syscon_swlock);
195 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
197 unsigned long flags;
199 spin_lock_irqsave(&syscon_swlock, flags);
201 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
202 __raw_writel(val, reg);
204 spin_unlock_irqrestore(&syscon_swlock, flags);
206 EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
208 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
210 unsigned long flags;
211 unsigned int val;
213 spin_lock_irqsave(&syscon_swlock, flags);
215 val = __raw_readl(EP93XX_SYSCON_DEVCFG);
216 val &= ~clear_bits;
217 val |= set_bits;
218 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
219 __raw_writel(val, EP93XX_SYSCON_DEVCFG);
221 spin_unlock_irqrestore(&syscon_swlock, flags);
223 EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
226 * ep93xx_chip_revision() - returns the EP93xx chip revision
228 * See <mach/platform.h> for more information.
230 unsigned int ep93xx_chip_revision(void)
232 unsigned int v;
234 v = __raw_readl(EP93XX_SYSCON_SYSCFG);
235 v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
236 v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
237 return v;
240 /*************************************************************************
241 * EP93xx GPIO
242 *************************************************************************/
243 static struct resource ep93xx_gpio_resource[] = {
245 .start = EP93XX_GPIO_PHYS_BASE,
246 .end = EP93XX_GPIO_PHYS_BASE + 0xcc - 1,
247 .flags = IORESOURCE_MEM,
251 static struct platform_device ep93xx_gpio_device = {
252 .name = "gpio-ep93xx",
253 .id = -1,
254 .num_resources = ARRAY_SIZE(ep93xx_gpio_resource),
255 .resource = ep93xx_gpio_resource,
258 /*************************************************************************
259 * EP93xx peripheral handling
260 *************************************************************************/
261 #define EP93XX_UART_MCR_OFFSET (0x0100)
263 static void ep93xx_uart_set_mctrl(struct amba_device *dev,
264 void __iomem *base, unsigned int mctrl)
266 unsigned int mcr;
268 mcr = 0;
269 if (mctrl & TIOCM_RTS)
270 mcr |= 2;
271 if (mctrl & TIOCM_DTR)
272 mcr |= 1;
274 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
277 static struct amba_pl010_data ep93xx_uart_data = {
278 .set_mctrl = ep93xx_uart_set_mctrl,
281 static struct amba_device uart1_device = {
282 .dev = {
283 .init_name = "apb:uart1",
284 .platform_data = &ep93xx_uart_data,
286 .res = {
287 .start = EP93XX_UART1_PHYS_BASE,
288 .end = EP93XX_UART1_PHYS_BASE + 0x0fff,
289 .flags = IORESOURCE_MEM,
291 .irq = { IRQ_EP93XX_UART1, NO_IRQ },
292 .periphid = 0x00041010,
295 static struct amba_device uart2_device = {
296 .dev = {
297 .init_name = "apb:uart2",
298 .platform_data = &ep93xx_uart_data,
300 .res = {
301 .start = EP93XX_UART2_PHYS_BASE,
302 .end = EP93XX_UART2_PHYS_BASE + 0x0fff,
303 .flags = IORESOURCE_MEM,
305 .irq = { IRQ_EP93XX_UART2, NO_IRQ },
306 .periphid = 0x00041010,
309 static struct amba_device uart3_device = {
310 .dev = {
311 .init_name = "apb:uart3",
312 .platform_data = &ep93xx_uart_data,
314 .res = {
315 .start = EP93XX_UART3_PHYS_BASE,
316 .end = EP93XX_UART3_PHYS_BASE + 0x0fff,
317 .flags = IORESOURCE_MEM,
319 .irq = { IRQ_EP93XX_UART3, NO_IRQ },
320 .periphid = 0x00041010,
324 static struct resource ep93xx_rtc_resource[] = {
326 .start = EP93XX_RTC_PHYS_BASE,
327 .end = EP93XX_RTC_PHYS_BASE + 0x10c - 1,
328 .flags = IORESOURCE_MEM,
332 static struct platform_device ep93xx_rtc_device = {
333 .name = "ep93xx-rtc",
334 .id = -1,
335 .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
336 .resource = ep93xx_rtc_resource,
340 static struct resource ep93xx_ohci_resources[] = {
341 [0] = {
342 .start = EP93XX_USB_PHYS_BASE,
343 .end = EP93XX_USB_PHYS_BASE + 0x0fff,
344 .flags = IORESOURCE_MEM,
346 [1] = {
347 .start = IRQ_EP93XX_USB,
348 .end = IRQ_EP93XX_USB,
349 .flags = IORESOURCE_IRQ,
354 static struct platform_device ep93xx_ohci_device = {
355 .name = "ep93xx-ohci",
356 .id = -1,
357 .dev = {
358 .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask,
359 .coherent_dma_mask = DMA_BIT_MASK(32),
361 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
362 .resource = ep93xx_ohci_resources,
366 /*************************************************************************
367 * EP93xx physmap'ed flash
368 *************************************************************************/
369 static struct physmap_flash_data ep93xx_flash_data;
371 static struct resource ep93xx_flash_resource = {
372 .flags = IORESOURCE_MEM,
375 static struct platform_device ep93xx_flash = {
376 .name = "physmap-flash",
377 .id = 0,
378 .dev = {
379 .platform_data = &ep93xx_flash_data,
381 .num_resources = 1,
382 .resource = &ep93xx_flash_resource,
386 * ep93xx_register_flash() - Register the external flash device.
387 * @width: bank width in octets
388 * @start: resource start address
389 * @size: resource size
391 void __init ep93xx_register_flash(unsigned int width,
392 resource_size_t start, resource_size_t size)
394 ep93xx_flash_data.width = width;
396 ep93xx_flash_resource.start = start;
397 ep93xx_flash_resource.end = start + size - 1;
399 platform_device_register(&ep93xx_flash);
403 /*************************************************************************
404 * EP93xx ethernet peripheral handling
405 *************************************************************************/
406 static struct ep93xx_eth_data ep93xx_eth_data;
408 static struct resource ep93xx_eth_resource[] = {
410 .start = EP93XX_ETHERNET_PHYS_BASE,
411 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
412 .flags = IORESOURCE_MEM,
413 }, {
414 .start = IRQ_EP93XX_ETHERNET,
415 .end = IRQ_EP93XX_ETHERNET,
416 .flags = IORESOURCE_IRQ,
420 static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
422 static struct platform_device ep93xx_eth_device = {
423 .name = "ep93xx-eth",
424 .id = -1,
425 .dev = {
426 .platform_data = &ep93xx_eth_data,
427 .coherent_dma_mask = DMA_BIT_MASK(32),
428 .dma_mask = &ep93xx_eth_dma_mask,
430 .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
431 .resource = ep93xx_eth_resource,
435 * ep93xx_register_eth - Register the built-in ethernet platform device.
436 * @data: platform specific ethernet configuration (__initdata)
437 * @copy_addr: flag indicating that the MAC address should be copied
438 * from the IndAd registers (as programmed by the bootloader)
440 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
442 if (copy_addr)
443 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
445 ep93xx_eth_data = *data;
446 platform_device_register(&ep93xx_eth_device);
450 /*************************************************************************
451 * EP93xx i2c peripheral handling
452 *************************************************************************/
453 static struct i2c_gpio_platform_data ep93xx_i2c_data;
455 static struct platform_device ep93xx_i2c_device = {
456 .name = "i2c-gpio",
457 .id = 0,
458 .dev = {
459 .platform_data = &ep93xx_i2c_data,
464 * ep93xx_register_i2c - Register the i2c platform device.
465 * @data: platform specific i2c-gpio configuration (__initdata)
466 * @devices: platform specific i2c bus device information (__initdata)
467 * @num: the number of devices on the i2c bus
469 void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
470 struct i2c_board_info *devices, int num)
473 * Set the EEPROM interface pin drive type control.
474 * Defines the driver type for the EECLK and EEDAT pins as either
475 * open drain, which will require an external pull-up, or a normal
476 * CMOS driver.
478 if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
479 pr_warning("sda != EEDAT, open drain has no effect\n");
480 if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
481 pr_warning("scl != EECLK, open drain has no effect\n");
483 __raw_writel((data->sda_is_open_drain << 1) |
484 (data->scl_is_open_drain << 0),
485 EP93XX_GPIO_EEDRIVE);
487 ep93xx_i2c_data = *data;
488 i2c_register_board_info(0, devices, num);
489 platform_device_register(&ep93xx_i2c_device);
492 /*************************************************************************
493 * EP93xx SPI peripheral handling
494 *************************************************************************/
495 static struct ep93xx_spi_info ep93xx_spi_master_data;
497 static struct resource ep93xx_spi_resources[] = {
499 .start = EP93XX_SPI_PHYS_BASE,
500 .end = EP93XX_SPI_PHYS_BASE + 0x18 - 1,
501 .flags = IORESOURCE_MEM,
504 .start = IRQ_EP93XX_SSP,
505 .end = IRQ_EP93XX_SSP,
506 .flags = IORESOURCE_IRQ,
510 static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
512 static struct platform_device ep93xx_spi_device = {
513 .name = "ep93xx-spi",
514 .id = 0,
515 .dev = {
516 .platform_data = &ep93xx_spi_master_data,
517 .coherent_dma_mask = DMA_BIT_MASK(32),
518 .dma_mask = &ep93xx_spi_dma_mask,
520 .num_resources = ARRAY_SIZE(ep93xx_spi_resources),
521 .resource = ep93xx_spi_resources,
525 * ep93xx_register_spi() - registers spi platform device
526 * @info: ep93xx board specific spi master info (__initdata)
527 * @devices: SPI devices to register (__initdata)
528 * @num: number of SPI devices to register
530 * This function registers platform device for the EP93xx SPI controller and
531 * also makes sure that SPI pins are muxed so that I2S is not using those pins.
533 void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
534 struct spi_board_info *devices, int num)
537 * When SPI is used, we need to make sure that I2S is muxed off from
538 * SPI pins.
540 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
542 ep93xx_spi_master_data = *info;
543 spi_register_board_info(devices, num);
544 platform_device_register(&ep93xx_spi_device);
547 /*************************************************************************
548 * EP93xx LEDs
549 *************************************************************************/
550 static struct gpio_led ep93xx_led_pins[] = {
552 .name = "platform:grled",
553 .gpio = EP93XX_GPIO_LINE_GRLED,
554 }, {
555 .name = "platform:rdled",
556 .gpio = EP93XX_GPIO_LINE_RDLED,
560 static struct gpio_led_platform_data ep93xx_led_data = {
561 .num_leds = ARRAY_SIZE(ep93xx_led_pins),
562 .leds = ep93xx_led_pins,
565 static struct platform_device ep93xx_leds = {
566 .name = "leds-gpio",
567 .id = -1,
568 .dev = {
569 .platform_data = &ep93xx_led_data,
574 /*************************************************************************
575 * EP93xx pwm peripheral handling
576 *************************************************************************/
577 static struct resource ep93xx_pwm0_resource[] = {
579 .start = EP93XX_PWM_PHYS_BASE,
580 .end = EP93XX_PWM_PHYS_BASE + 0x10 - 1,
581 .flags = IORESOURCE_MEM,
585 static struct platform_device ep93xx_pwm0_device = {
586 .name = "ep93xx-pwm",
587 .id = 0,
588 .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
589 .resource = ep93xx_pwm0_resource,
592 static struct resource ep93xx_pwm1_resource[] = {
594 .start = EP93XX_PWM_PHYS_BASE + 0x20,
595 .end = EP93XX_PWM_PHYS_BASE + 0x30 - 1,
596 .flags = IORESOURCE_MEM,
600 static struct platform_device ep93xx_pwm1_device = {
601 .name = "ep93xx-pwm",
602 .id = 1,
603 .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
604 .resource = ep93xx_pwm1_resource,
607 void __init ep93xx_register_pwm(int pwm0, int pwm1)
609 if (pwm0)
610 platform_device_register(&ep93xx_pwm0_device);
612 /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
613 if (pwm1)
614 platform_device_register(&ep93xx_pwm1_device);
617 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
619 int err;
621 if (pdev->id == 0) {
622 err = 0;
623 } else if (pdev->id == 1) {
624 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
625 dev_name(&pdev->dev));
626 if (err)
627 return err;
628 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
629 if (err)
630 goto fail;
632 /* PWM 1 output on EGPIO[14] */
633 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
634 } else {
635 err = -ENODEV;
638 return err;
640 fail:
641 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
642 return err;
644 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
646 void ep93xx_pwm_release_gpio(struct platform_device *pdev)
648 if (pdev->id == 1) {
649 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
650 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
652 /* EGPIO[14] used for GPIO */
653 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
656 EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
659 /*************************************************************************
660 * EP93xx video peripheral handling
661 *************************************************************************/
662 static struct ep93xxfb_mach_info ep93xxfb_data;
664 static struct resource ep93xx_fb_resource[] = {
666 .start = EP93XX_RASTER_PHYS_BASE,
667 .end = EP93XX_RASTER_PHYS_BASE + 0x800 - 1,
668 .flags = IORESOURCE_MEM,
672 static struct platform_device ep93xx_fb_device = {
673 .name = "ep93xx-fb",
674 .id = -1,
675 .dev = {
676 .platform_data = &ep93xxfb_data,
677 .coherent_dma_mask = DMA_BIT_MASK(32),
678 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
680 .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
681 .resource = ep93xx_fb_resource,
684 static struct platform_device ep93xx_bl_device = {
685 .name = "ep93xx-bl",
686 .id = -1,
690 * ep93xx_register_fb - Register the framebuffer platform device.
691 * @data: platform specific framebuffer configuration (__initdata)
693 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
695 ep93xxfb_data = *data;
696 platform_device_register(&ep93xx_fb_device);
697 platform_device_register(&ep93xx_bl_device);
701 /*************************************************************************
702 * EP93xx matrix keypad peripheral handling
703 *************************************************************************/
704 static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
706 static struct resource ep93xx_keypad_resource[] = {
708 .start = EP93XX_KEY_MATRIX_PHYS_BASE,
709 .end = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,
710 .flags = IORESOURCE_MEM,
711 }, {
712 .start = IRQ_EP93XX_KEY,
713 .end = IRQ_EP93XX_KEY,
714 .flags = IORESOURCE_IRQ,
718 static struct platform_device ep93xx_keypad_device = {
719 .name = "ep93xx-keypad",
720 .id = -1,
721 .dev = {
722 .platform_data = &ep93xx_keypad_data,
724 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
725 .resource = ep93xx_keypad_resource,
729 * ep93xx_register_keypad - Register the keypad platform device.
730 * @data: platform specific keypad configuration (__initdata)
732 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
734 ep93xx_keypad_data = *data;
735 platform_device_register(&ep93xx_keypad_device);
738 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
740 int err;
741 int i;
743 for (i = 0; i < 8; i++) {
744 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
745 if (err)
746 goto fail_gpio_c;
747 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
748 if (err)
749 goto fail_gpio_d;
752 /* Enable the keypad controller; GPIO ports C and D used for keypad */
753 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
754 EP93XX_SYSCON_DEVCFG_GONK);
756 return 0;
758 fail_gpio_d:
759 gpio_free(EP93XX_GPIO_LINE_C(i));
760 fail_gpio_c:
761 for ( ; i >= 0; --i) {
762 gpio_free(EP93XX_GPIO_LINE_C(i));
763 gpio_free(EP93XX_GPIO_LINE_D(i));
765 return err;
767 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
769 void ep93xx_keypad_release_gpio(struct platform_device *pdev)
771 int i;
773 for (i = 0; i < 8; i++) {
774 gpio_free(EP93XX_GPIO_LINE_C(i));
775 gpio_free(EP93XX_GPIO_LINE_D(i));
778 /* Disable the keypad controller; GPIO ports C and D used for GPIO */
779 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
780 EP93XX_SYSCON_DEVCFG_GONK);
782 EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
784 /*************************************************************************
785 * EP93xx I2S audio peripheral handling
786 *************************************************************************/
787 static struct resource ep93xx_i2s_resource[] = {
789 .start = EP93XX_I2S_PHYS_BASE,
790 .end = EP93XX_I2S_PHYS_BASE + 0x100 - 1,
791 .flags = IORESOURCE_MEM,
795 static struct platform_device ep93xx_i2s_device = {
796 .name = "ep93xx-i2s",
797 .id = -1,
798 .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
799 .resource = ep93xx_i2s_resource,
802 static struct platform_device ep93xx_pcm_device = {
803 .name = "ep93xx-pcm-audio",
804 .id = -1,
807 void __init ep93xx_register_i2s(void)
809 platform_device_register(&ep93xx_i2s_device);
810 platform_device_register(&ep93xx_pcm_device);
813 #define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
814 EP93XX_SYSCON_DEVCFG_I2SONAC97)
816 #define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
817 EP93XX_SYSCON_I2SCLKDIV_SPOL)
819 int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config)
821 unsigned val;
823 /* Sanity check */
824 if (i2s_pins & ~EP93XX_SYSCON_DEVCFG_I2S_MASK)
825 return -EINVAL;
826 if (i2s_config & ~EP93XX_I2SCLKDIV_MASK)
827 return -EINVAL;
829 /* Must have only one of I2SONSSP/I2SONAC97 set */
830 if ((i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONSSP) ==
831 (i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONAC97))
832 return -EINVAL;
834 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
835 ep93xx_devcfg_set_bits(i2s_pins);
838 * This is potentially racy with the clock api for i2s_mclk, sclk and
839 * lrclk. Since the i2s driver is the only user of those clocks we
840 * rely on it to prevent parallel use of this function and the
841 * clock api for the i2s clocks.
843 val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
844 val &= ~EP93XX_I2SCLKDIV_MASK;
845 val |= i2s_config;
846 ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
848 return 0;
850 EXPORT_SYMBOL(ep93xx_i2s_acquire);
852 void ep93xx_i2s_release(void)
854 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
856 EXPORT_SYMBOL(ep93xx_i2s_release);
858 /*************************************************************************
859 * EP93xx AC97 audio peripheral handling
860 *************************************************************************/
861 static struct resource ep93xx_ac97_resources[] = {
863 .start = EP93XX_AAC_PHYS_BASE,
864 .end = EP93XX_AAC_PHYS_BASE + 0xac - 1,
865 .flags = IORESOURCE_MEM,
868 .start = IRQ_EP93XX_AACINTR,
869 .end = IRQ_EP93XX_AACINTR,
870 .flags = IORESOURCE_IRQ,
874 static struct platform_device ep93xx_ac97_device = {
875 .name = "ep93xx-ac97",
876 .id = -1,
877 .num_resources = ARRAY_SIZE(ep93xx_ac97_resources),
878 .resource = ep93xx_ac97_resources,
881 void __init ep93xx_register_ac97(void)
884 * Make sure that the AC97 pins are not used by I2S.
886 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
888 platform_device_register(&ep93xx_ac97_device);
889 platform_device_register(&ep93xx_pcm_device);
892 void __init ep93xx_init_devices(void)
894 /* Disallow access to MaverickCrunch initially */
895 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
897 /* Get the GPIO working early, other devices need it */
898 platform_device_register(&ep93xx_gpio_device);
900 amba_device_register(&uart1_device, &iomem_resource);
901 amba_device_register(&uart2_device, &iomem_resource);
902 amba_device_register(&uart3_device, &iomem_resource);
904 platform_device_register(&ep93xx_rtc_device);
905 platform_device_register(&ep93xx_ohci_device);
906 platform_device_register(&ep93xx_leds);