arch/arm/mach-exynos4/include/mach/irqs.h

   1 /* linux/arch/arm/mach-exynos4/include/mach/irqs.h
   2  *
   3  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * EXYNOS4 - IRQ definitions
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 #ifndef __ASM_ARCH_IRQS_H
  14 #define __ASM_ARCH_IRQS_H __FILE__
  15
  16 #include <plat/irqs.h>
  17
  18 /* PPI: Private Peripheral Interrupt */
  19
  20 #define IRQ_PPI(x)              S5P_IRQ(x+16)
  21
  22 /* SPI: Shared Peripheral Interrupt */
  23
  24 #define IRQ_SPI(x)              S5P_IRQ(x+32)
  25
  26 #define IRQ_EINT0               IRQ_SPI(16)
  27 #define IRQ_EINT1               IRQ_SPI(17)
  28 #define IRQ_EINT2               IRQ_SPI(18)
  29 #define IRQ_EINT3               IRQ_SPI(19)
  30 #define IRQ_EINT4               IRQ_SPI(20)
  31 #define IRQ_EINT5               IRQ_SPI(21)
  32 #define IRQ_EINT6               IRQ_SPI(22)
  33 #define IRQ_EINT7               IRQ_SPI(23)
  34 #define IRQ_EINT8               IRQ_SPI(24)
  35 #define IRQ_EINT9               IRQ_SPI(25)
  36 #define IRQ_EINT10              IRQ_SPI(26)
  37 #define IRQ_EINT11              IRQ_SPI(27)
  38 #define IRQ_EINT12              IRQ_SPI(28)
  39 #define IRQ_EINT13              IRQ_SPI(29)
  40 #define IRQ_EINT14              IRQ_SPI(30)
  41 #define IRQ_EINT15              IRQ_SPI(31)
  42 #define IRQ_EINT16_31           IRQ_SPI(32)
  43
  44 #define IRQ_PDMA0               IRQ_SPI(35)
  45 #define IRQ_PDMA1               IRQ_SPI(36)
  46 #define IRQ_TIMER0_VIC          IRQ_SPI(37)
  47 #define IRQ_TIMER1_VIC          IRQ_SPI(38)
  48 #define IRQ_TIMER2_VIC          IRQ_SPI(39)
  49 #define IRQ_TIMER3_VIC          IRQ_SPI(40)
  50 #define IRQ_TIMER4_VIC          IRQ_SPI(41)
  51 #define IRQ_MCT_L0              IRQ_SPI(42)
  52 #define IRQ_WDT                 IRQ_SPI(43)
  53 #define IRQ_RTC_ALARM           IRQ_SPI(44)
  54 #define IRQ_RTC_TIC             IRQ_SPI(45)
  55 #define IRQ_GPIO_XB             IRQ_SPI(46)
  56 #define IRQ_GPIO_XA             IRQ_SPI(47)
  57 #define IRQ_MCT_L1              IRQ_SPI(48)
  58
  59 #define IRQ_UART0               IRQ_SPI(52)
  60 #define IRQ_UART1               IRQ_SPI(53)
  61 #define IRQ_UART2               IRQ_SPI(54)
  62 #define IRQ_UART3               IRQ_SPI(55)
  63 #define IRQ_UART4               IRQ_SPI(56)
  64 #define IRQ_MCT_G0              IRQ_SPI(57)
  65 #define IRQ_IIC                 IRQ_SPI(58)
  66 #define IRQ_IIC1                IRQ_SPI(59)
  67 #define IRQ_IIC2                IRQ_SPI(60)
  68 #define IRQ_IIC3                IRQ_SPI(61)
  69 #define IRQ_IIC4                IRQ_SPI(62)
  70 #define IRQ_IIC5                IRQ_SPI(63)
  71 #define IRQ_IIC6                IRQ_SPI(64)
  72 #define IRQ_IIC7                IRQ_SPI(65)
  73
  74 #define IRQ_USB_HOST            IRQ_SPI(70)
  75 #define IRQ_USB_HSOTG           IRQ_SPI(71)
  76 #define IRQ_MODEM_IF            IRQ_SPI(72)
  77 #define IRQ_HSMMC0              IRQ_SPI(73)
  78 #define IRQ_HSMMC1              IRQ_SPI(74)
  79 #define IRQ_HSMMC2              IRQ_SPI(75)
  80 #define IRQ_HSMMC3              IRQ_SPI(76)
  81 #define IRQ_DWMCI               IRQ_SPI(77)
  82
  83 #define IRQ_MIPI_CSIS0          IRQ_SPI(78)
  84 #define IRQ_MIPI_CSIS1          IRQ_SPI(80)
  85
  86 #define IRQ_ONENAND_AUDI        IRQ_SPI(82)
  87 #define IRQ_ROTATOR             IRQ_SPI(83)
  88 #define IRQ_FIMC0               IRQ_SPI(84)
  89 #define IRQ_FIMC1               IRQ_SPI(85)
  90 #define IRQ_FIMC2               IRQ_SPI(86)
  91 #define IRQ_FIMC3               IRQ_SPI(87)
  92 #define IRQ_JPEG                IRQ_SPI(88)
  93 #define IRQ_2D                  IRQ_SPI(89)
  94 #define IRQ_PCIE                IRQ_SPI(90)
  95
  96 #define IRQ_MFC                 IRQ_SPI(94)
  97
  98 #define IRQ_AUDIO_SS            IRQ_SPI(96)
  99 #define IRQ_I2S0                IRQ_SPI(97)
 100 #define IRQ_I2S1                IRQ_SPI(98)
 101 #define IRQ_I2S2                IRQ_SPI(99)
 102 #define IRQ_AC97                IRQ_SPI(100)
 103
 104 #define IRQ_SPDIF               IRQ_SPI(104)
 105 #define IRQ_ADC0                IRQ_SPI(105)
 106 #define IRQ_PEN0                IRQ_SPI(106)
 107 #define IRQ_ADC1                IRQ_SPI(107)
 108 #define IRQ_PEN1                IRQ_SPI(108)
 109 #define IRQ_KEYPAD              IRQ_SPI(109)
 110 #define IRQ_PMU                 IRQ_SPI(110)
 111 #define IRQ_GPS                 IRQ_SPI(111)
 112 #define IRQ_INTFEEDCTRL_SSS     IRQ_SPI(112)
 113 #define IRQ_SLIMBUS             IRQ_SPI(113)
 114
 115 #define IRQ_TSI                 IRQ_SPI(115)
 116 #define IRQ_SATA                IRQ_SPI(116)
 117
 118 #define MAX_IRQ_IN_COMBINER     8
 119 #define COMBINER_GROUP(x)       ((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(128))
 120 #define COMBINER_IRQ(x, y)      (COMBINER_GROUP(x) + y)
 121
 122 #define IRQ_SYSMMU_MDMA0_0      COMBINER_IRQ(4, 0)
 123 #define IRQ_SYSMMU_SSS_0        COMBINER_IRQ(4, 1)
 124 #define IRQ_SYSMMU_FIMC0_0      COMBINER_IRQ(4, 2)
 125 #define IRQ_SYSMMU_FIMC1_0      COMBINER_IRQ(4, 3)
 126 #define IRQ_SYSMMU_FIMC2_0      COMBINER_IRQ(4, 4)
 127 #define IRQ_SYSMMU_FIMC3_0      COMBINER_IRQ(4, 5)
 128 #define IRQ_SYSMMU_JPEG_0       COMBINER_IRQ(4, 6)
 129 #define IRQ_SYSMMU_2D_0         COMBINER_IRQ(4, 7)
 130
 131 #define IRQ_SYSMMU_ROTATOR_0    COMBINER_IRQ(5, 0)
 132 #define IRQ_SYSMMU_MDMA1_0      COMBINER_IRQ(5, 1)
 133 #define IRQ_SYSMMU_LCD0_M0_0    COMBINER_IRQ(5, 2)
 134 #define IRQ_SYSMMU_LCD1_M1_0    COMBINER_IRQ(5, 3)
 135 #define IRQ_SYSMMU_TV_M0_0      COMBINER_IRQ(5, 4)
 136 #define IRQ_SYSMMU_MFC_M0_0     COMBINER_IRQ(5, 5)
 137 #define IRQ_SYSMMU_MFC_M1_0     COMBINER_IRQ(5, 6)
 138 #define IRQ_SYSMMU_PCIE_0       COMBINER_IRQ(5, 7)
 139
 140 #define IRQ_FIMD0_FIFO          COMBINER_IRQ(11, 0)
 141 #define IRQ_FIMD0_VSYNC         COMBINER_IRQ(11, 1)
 142 #define IRQ_FIMD0_SYSTEM        COMBINER_IRQ(11, 2)
 143
 144 #define MAX_COMBINER_NR         16
 145
 146 #define IRQ_ADC                 IRQ_ADC0
 147 #define IRQ_TC                  IRQ_PEN0
 148
 149 #define S5P_IRQ_EINT_BASE       COMBINER_IRQ(MAX_COMBINER_NR, 0)
 150
 151 #define S5P_EINT_BASE1          (S5P_IRQ_EINT_BASE + 0)
 152 #define S5P_EINT_BASE2          (S5P_IRQ_EINT_BASE + 16)
 153
 154 /* optional GPIO interrupts */
 155 #define S5P_GPIOINT_BASE        (S5P_IRQ_EINT_BASE + 32)
 156 #define IRQ_GPIO1_NR_GROUPS     16
 157 #define IRQ_GPIO2_NR_GROUPS     9
 158 #define IRQ_GPIO_END            (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT)
 159
 160 /* Set the default NR_IRQS */
 161 #define NR_IRQS                 (IRQ_GPIO_END + 64)
 162
 163 #endif /* __ASM_ARCH_IRQS_H */