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Add linux-next specific files for 20110831
[linux-2.6/next.git] / arch / arm / mach-imx / mach-armadillo5x0.c
blobfa2b97df58466f7de29c9e3561f1c822bf6ee711
1 /*
2 * armadillo5x0.c
3 *
4 * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
5 * updates in http://alberdroid.blogspot.com/
6 *
7 * Based on Atmark Techno, Inc. armadillo 500 BSP 2008
8 * Based on mx31ads.c and pcm037.c Great Work!
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
23 * MA 02110-1301, USA.
24 */
25
26 #include <linux/types.h>
27 #include <linux/init.h>
28 #include <linux/clk.h>
29 #include <linux/platform_device.h>
30 #include <linux/gpio.h>
31 #include <linux/smsc911x.h>
32 #include <linux/interrupt.h>
33 #include <linux/irq.h>
34 #include <linux/mtd/physmap.h>
35 #include <linux/io.h>
36 #include <linux/input.h>
37 #include <linux/i2c.h>
38 #include <linux/usb/otg.h>
39 #include <linux/usb/ulpi.h>
40 #include <linux/delay.h>
41
42 #include <mach/hardware.h>
43 #include <asm/mach-types.h>
44 #include <asm/mach/arch.h>
45 #include <asm/mach/time.h>
46 #include <asm/memory.h>
47 #include <asm/mach/map.h>
48
49 #include <mach/common.h>
50 #include <mach/iomux-mx3.h>
51 #include <mach/ulpi.h>
52
53 #include "devices-imx31.h"
54 #include "crmregs-imx31.h"
55
56 static int armadillo5x0_pins[] = {
57 /* UART1 */
58 MX31_PIN_CTS1__CTS1,
59 MX31_PIN_RTS1__RTS1,
60 MX31_PIN_TXD1__TXD1,
61 MX31_PIN_RXD1__RXD1,
62 /* UART2 */
63 MX31_PIN_CTS2__CTS2,
64 MX31_PIN_RTS2__RTS2,
65 MX31_PIN_TXD2__TXD2,
66 MX31_PIN_RXD2__RXD2,
67 /* LAN9118_IRQ */
68 IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO),
69 /* SDHC1 */
70 MX31_PIN_SD1_DATA3__SD1_DATA3,
71 MX31_PIN_SD1_DATA2__SD1_DATA2,
72 MX31_PIN_SD1_DATA1__SD1_DATA1,
73 MX31_PIN_SD1_DATA0__SD1_DATA0,
74 MX31_PIN_SD1_CLK__SD1_CLK,
75 MX31_PIN_SD1_CMD__SD1_CMD,
76 /* Framebuffer */
77 MX31_PIN_LD0__LD0,
78 MX31_PIN_LD1__LD1,
79 MX31_PIN_LD2__LD2,
80 MX31_PIN_LD3__LD3,
81 MX31_PIN_LD4__LD4,
82 MX31_PIN_LD5__LD5,
83 MX31_PIN_LD6__LD6,
84 MX31_PIN_LD7__LD7,
85 MX31_PIN_LD8__LD8,
86 MX31_PIN_LD9__LD9,
87 MX31_PIN_LD10__LD10,
88 MX31_PIN_LD11__LD11,
89 MX31_PIN_LD12__LD12,
90 MX31_PIN_LD13__LD13,
91 MX31_PIN_LD14__LD14,
92 MX31_PIN_LD15__LD15,
93 MX31_PIN_LD16__LD16,
94 MX31_PIN_LD17__LD17,
95 MX31_PIN_VSYNC3__VSYNC3,
96 MX31_PIN_HSYNC__HSYNC,
97 MX31_PIN_FPSHIFT__FPSHIFT,
98 MX31_PIN_DRDY0__DRDY0,
99 IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/
100 /* I2C2 */
101 MX31_PIN_CSPI2_MOSI__SCL,
102 MX31_PIN_CSPI2_MISO__SDA,
103 /* OTG */
104 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
105 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
106 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
107 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
108 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
109 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
110 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
111 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
112 MX31_PIN_USBOTG_CLK__USBOTG_CLK,
113 MX31_PIN_USBOTG_DIR__USBOTG_DIR,
114 MX31_PIN_USBOTG_NXT__USBOTG_NXT,
115 MX31_PIN_USBOTG_STP__USBOTG_STP,
116 /* USB host 2 */
117 IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
118 IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
119 IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
120 IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
121 IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
122 IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
123 IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
124 IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
125 IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
126 IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
127 IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
128 IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
129 };
130
131 /* USB */
132
133 #define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4)
134 #define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6)
135 #define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)
136
137 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
138 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
139
140 static int usbotg_init(struct platform_device *pdev)
141 {
142 int err;
143
144 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
145 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
146 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
147 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
148 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
149 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
150 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
151 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
152 mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
153 mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
154 mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
155 mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
156
157 /* Chip already enabled by hardware */
158 /* OTG phy reset*/
159 err = gpio_request(OTG_RESET, "USB-OTG-RESET");
160 if (err) {
161 pr_err("Failed to request the usb otg reset gpio\n");
162 return err;
163 }
164
165 err = gpio_direction_output(OTG_RESET, 1/*HIGH*/);
166 if (err) {
167 pr_err("Failed to reset the usb otg phy\n");
168 goto otg_free_reset;
169 }
170
171 gpio_set_value(OTG_RESET, 0/*LOW*/);
172 mdelay(5);
173 gpio_set_value(OTG_RESET, 1/*HIGH*/);
174 mdelay(10);
175
176 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
177 MXC_EHCI_INTERFACE_DIFF_UNI);
178
179 otg_free_reset:
180 gpio_free(OTG_RESET);
181 return err;
182 }
183
184 static int usbh2_init(struct platform_device *pdev)
185 {
186 int err;
187
188 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
189 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
190 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
191 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
192 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
193 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
194 mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
195 mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
196 mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
197 mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
198 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
199 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
200
201 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
202
203
204 /* Enable the chip */
205 err = gpio_request(USBH2_CS, "USB-H2-CS");
206 if (err) {
207 pr_err("Failed to request the usb host 2 CS gpio\n");
208 return err;
209 }
210
211 err = gpio_direction_output(USBH2_CS, 0/*Enabled*/);
212 if (err) {
213 pr_err("Failed to drive the usb host 2 CS gpio\n");
214 goto h2_free_cs;
215 }
216
217 /* H2 phy reset*/
218 err = gpio_request(USBH2_RESET, "USB-H2-RESET");
219 if (err) {
220 pr_err("Failed to request the usb host 2 reset gpio\n");
221 goto h2_free_cs;
222 }
223
224 err = gpio_direction_output(USBH2_RESET, 1/*HIGH*/);
225 if (err) {
226 pr_err("Failed to reset the usb host 2 phy\n");
227 goto h2_free_reset;
228 }
229
230 gpio_set_value(USBH2_RESET, 0/*LOW*/);
231 mdelay(5);
232 gpio_set_value(USBH2_RESET, 1/*HIGH*/);
233 mdelay(10);
234
235 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
236 MXC_EHCI_INTERFACE_DIFF_UNI);
237
238 h2_free_reset:
239 gpio_free(USBH2_RESET);
240 h2_free_cs:
241 gpio_free(USBH2_CS);
242 return err;
243 }
244
245 static struct mxc_usbh_platform_data usbotg_pdata __initdata = {
246 .init = usbotg_init,
247 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
248 };
249
250 static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
251 .init = usbh2_init,
252 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
253 };
254
255 /* RTC over I2C*/
256 #define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4)
257
258 static struct i2c_board_info armadillo5x0_i2c_rtc = {
259 I2C_BOARD_INFO("s35390a", 0x30),
260 };
261
262 /* GPIO BUTTONS */
263 static struct gpio_keys_button armadillo5x0_buttons[] = {
264 {
265 .code = KEY_ENTER, /*28*/
266 .gpio = IOMUX_TO_GPIO(MX31_PIN_SCLK0),
267 .active_low = 1,
268 .desc = "menu",
269 .wakeup = 1,
270 }, {
271 .code = KEY_BACK, /*158*/
272 .gpio = IOMUX_TO_GPIO(MX31_PIN_SRST0),
273 .active_low = 1,
274 .desc = "back",
275 .wakeup = 1,
276 }
277 };
278
279 static const struct gpio_keys_platform_data
280 armadillo5x0_button_data __initconst = {
281 .buttons = armadillo5x0_buttons,
282 .nbuttons = ARRAY_SIZE(armadillo5x0_buttons),
283 };
284
285 /*
286 * NAND Flash
287 */
288 static const struct mxc_nand_platform_data
289 armadillo5x0_nand_board_info __initconst = {
290 .width = 1,
291 .hw_ecc = 1,
292 };
293
294 /*
295 * MTD NOR Flash
296 */
297 static struct mtd_partition armadillo5x0_nor_flash_partitions[] = {
298 {
299 .name = "nor.bootloader",
300 .offset = 0x00000000,
301 .size = 4*32*1024,
302 }, {
303 .name = "nor.kernel",
304 .offset = MTDPART_OFS_APPEND,
305 .size = 16*128*1024,
306 }, {
307 .name = "nor.userland",
308 .offset = MTDPART_OFS_APPEND,
309 .size = 110*128*1024,
310 }, {
311 .name = "nor.config",
312 .offset = MTDPART_OFS_APPEND,
313 .size = 1*128*1024,
314 },
315 };
316
317 static const struct physmap_flash_data
318 armadillo5x0_nor_flash_pdata __initconst = {
319 .width = 2,
320 .parts = armadillo5x0_nor_flash_partitions,
321 .nr_parts = ARRAY_SIZE(armadillo5x0_nor_flash_partitions),
322 };
323
324 static const struct resource armadillo5x0_nor_flash_resource __initconst = {
325 .flags = IORESOURCE_MEM,
326 .start = MX31_CS0_BASE_ADDR,
327 .end = MX31_CS0_BASE_ADDR + SZ_64M - 1,
328 };
329
330 /*
331 * FB support
332 */
333 static const struct fb_videomode fb_modedb[] = {
334 { /* 640x480 @ 60 Hz */
335 .name = "CRT-VGA",
336 .refresh = 60,
337 .xres = 640,
338 .yres = 480,
339 .pixclock = 39721,
340 .left_margin = 35,
341 .right_margin = 115,
342 .upper_margin = 43,
343 .lower_margin = 1,
344 .hsync_len = 10,
345 .vsync_len = 1,
346 .sync = FB_SYNC_OE_ACT_HIGH,
347 .vmode = FB_VMODE_NONINTERLACED,
348 .flag = 0,
349 }, {/* 800x600 @ 56 Hz */
350 .name = "CRT-SVGA",
351 .refresh = 56,
352 .xres = 800,
353 .yres = 600,
354 .pixclock = 30000,
355 .left_margin = 30,
356 .right_margin = 108,
357 .upper_margin = 13,
358 .lower_margin = 10,
359 .hsync_len = 10,
360 .vsync_len = 1,
361 .sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_HOR_HIGH_ACT |
362 FB_SYNC_VERT_HIGH_ACT,
363 .vmode = FB_VMODE_NONINTERLACED,
364 .flag = 0,
365 },
366 };
367
368 static const struct ipu_platform_data mx3_ipu_data __initconst = {
369 .irq_base = MXC_IPU_IRQ_START,
370 };
371
372 static struct mx3fb_platform_data mx3fb_pdata __initdata = {
373 .name = "CRT-VGA",
374 .mode = fb_modedb,
375 .num_modes = ARRAY_SIZE(fb_modedb),
376 };
377
378 /*
379 * SDHC 1
380 * MMC support
381 */
382 static int armadillo5x0_sdhc1_get_ro(struct device *dev)
383 {
384 return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
385 }
386
387 static int armadillo5x0_sdhc1_init(struct device *dev,
388 irq_handler_t detect_irq, void *data)
389 {
390 int ret;
391 int gpio_det, gpio_wp;
392
393 gpio_det = IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK);
394 gpio_wp = IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B);
395
396 ret = gpio_request(gpio_det, "sdhc-card-detect");
397 if (ret)
398 return ret;
399
400 gpio_direction_input(gpio_det);
401
402 ret = gpio_request(gpio_wp, "sdhc-write-protect");
403 if (ret)
404 goto err_gpio_free;
405
406 gpio_direction_input(gpio_wp);
407
408 /* When supported the trigger type have to be BOTH */
409 ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), detect_irq,
410 IRQF_DISABLED | IRQF_TRIGGER_FALLING,
411 "sdhc-detect", data);
412
413 if (ret)
414 goto err_gpio_free_2;
415
416 return 0;
417
418 err_gpio_free_2:
419 gpio_free(gpio_wp);
420
421 err_gpio_free:
422 gpio_free(gpio_det);
423
424 return ret;
425
426 }
427
428 static void armadillo5x0_sdhc1_exit(struct device *dev, void *data)
429 {
430 free_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), data);
431 gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK));
432 gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
433 }
434
435 static const struct imxmmc_platform_data sdhc_pdata __initconst = {
436 .get_ro = armadillo5x0_sdhc1_get_ro,
437 .init = armadillo5x0_sdhc1_init,
438 .exit = armadillo5x0_sdhc1_exit,
439 };
440
441 /*
442 * SMSC 9118
443 * Network support
444 */
445 static struct resource armadillo5x0_smc911x_resources[] = {
446 {
447 .start = MX31_CS3_BASE_ADDR,
448 .end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
449 .flags = IORESOURCE_MEM,
450 }, {
451 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
452 .end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
453 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
454 },
455 };
456
457 static struct smsc911x_platform_config smsc911x_info = {
458 .flags = SMSC911X_USE_16BIT,
459 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
460 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
461 };
462
463 static struct platform_device armadillo5x0_smc911x_device = {
464 .name = "smsc911x",
465 .id = -1,
466 .num_resources = ARRAY_SIZE(armadillo5x0_smc911x_resources),
467 .resource = armadillo5x0_smc911x_resources,
468 .dev = {
469 .platform_data = &smsc911x_info,
470 },
471 };
472
473 /* UART device data */
474 static const struct imxuart_platform_data uart_pdata __initconst = {
475 .flags = IMXUART_HAVE_RTSCTS,
476 };
477
478 static struct platform_device *devices[] __initdata = {
479 &armadillo5x0_smc911x_device,
480 };
481
482 /*
483 * Perform board specific initializations
484 */
485 static void __init armadillo5x0_init(void)
486 {
487 imx31_soc_init();
488
489 mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
490 ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
491
492 platform_add_devices(devices, ARRAY_SIZE(devices));
493 imx_add_gpio_keys(&armadillo5x0_button_data);
494 imx31_add_imx_i2c1(NULL);
495
496 /* Register UART */
497 imx31_add_imx_uart0(&uart_pdata);
498 imx31_add_imx_uart1(&uart_pdata);
499
500 /* SMSC9118 IRQ pin */
501 gpio_direction_input(MX31_PIN_GPIO1_0);
502
503 /* Register SDHC */
504 imx31_add_mxc_mmc(0, &sdhc_pdata);
505
506 /* Register FB */
507 imx31_add_ipu_core(&mx3_ipu_data);
508 imx31_add_mx3_sdc_fb(&mx3fb_pdata);
509
510 /* Register NOR Flash */
511 platform_device_register_resndata(NULL, "physmap-flash", -1,
512 &armadillo5x0_nor_flash_resource, 1,
513 &armadillo5x0_nor_flash_pdata,
514 sizeof(armadillo5x0_nor_flash_pdata));
515
516 /* Register NAND Flash */
517 imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
518
519 /* set NAND page size to 2k if not configured via boot mode pins */
520 __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR);
521
522 /* RTC */
523 /* Get RTC IRQ and register the chip */
524 if (gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc") == 0) {
525 if (gpio_direction_input(ARMADILLO5X0_RTC_GPIO) == 0)
526 armadillo5x0_i2c_rtc.irq = gpio_to_irq(ARMADILLO5X0_RTC_GPIO);
527 else
528 gpio_free(ARMADILLO5X0_RTC_GPIO);
529 }
530 if (armadillo5x0_i2c_rtc.irq == 0)
531 pr_warning("armadillo5x0_init: failed to get RTC IRQ\n");
532 i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1);
533
534 /* USB */
535
536 usbotg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
537 ULPI_OTG_DRVVBUS_EXT);
538 if (usbotg_pdata.otg)
539 imx31_add_mxc_ehci_otg(&usbotg_pdata);
540 usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
541 ULPI_OTG_DRVVBUS_EXT);
542 if (usbh2_pdata.otg)
543 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
544 }
545
546 static void __init armadillo5x0_timer_init(void)
547 {
548 mx31_clocks_init(26000000);
549 }
550
551 static struct sys_timer armadillo5x0_timer = {
552 .init = armadillo5x0_timer_init,
553 };
554
555 MACHINE_START(ARMADILLO5X0, "Armadillo-500")
556 /* Maintainer: Alberto Panizzo */
557 .atag_offset = 0x100,
558 .map_io = mx31_map_io,
559 .init_early = imx31_init_early,
560 .init_irq = mx31_init_irq,
561 .timer = &armadillo5x0_timer,
562 .init_machine = armadillo5x0_init,
563 MACHINE_END
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