arch/arm/mach-s3c2440/mach-at2440evb.c

   1 /* linux/arch/arm/mach-s3c2440/mach-at2440evb.c
   2  *
   3  * Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
   4  *      Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
   5  *      and modifications by SBZ <sbz@spgui.org> and
   6  *      Weibing <http://weibing.blogbus.com>
   7  *
   8  * For product information, visit http://www.arm.com/
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13 */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/types.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/list.h>
  19 #include <linux/timer.h>
  20 #include <linux/init.h>
  21 #include <linux/io.h>
  22 #include <linux/serial_core.h>
  23 #include <linux/dm9000.h>
  24 #include <linux/platform_device.h>
  25
  26 #include <asm/mach/arch.h>
  27 #include <asm/mach/map.h>
  28 #include <asm/mach/irq.h>
  29
  30 #include <mach/hardware.h>
  31 #include <mach/fb.h>
  32 #include <asm/irq.h>
  33 #include <asm/mach-types.h>
  34
  35 #include <plat/regs-serial.h>
  36 #include <mach/regs-gpio.h>
  37 #include <mach/regs-mem.h>
  38 #include <mach/regs-lcd.h>
  39 #include <plat/nand.h>
  40 #include <plat/iic.h>
  41
  42 #include <linux/mtd/mtd.h>
  43 #include <linux/mtd/nand.h>
  44 #include <linux/mtd/nand_ecc.h>
  45 #include <linux/mtd/partitions.h>
  46
  47 #include <plat/clock.h>
  48 #include <plat/devs.h>
  49 #include <plat/cpu.h>
  50 #include <plat/mci.h>
  51
  52 static struct map_desc at2440evb_iodesc[] __initdata = {
  53         /* Nothing here */
  54 };
  55
  56 #define UCON S3C2410_UCON_DEFAULT
  57 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
  58 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
  59
  60 static struct s3c24xx_uart_clksrc at2440evb_serial_clocks[] = {
  61         [0] = {
  62                 .name           = "uclk",
  63                 .divisor        = 1,
  64                 .min_baud       = 0,
  65                 .max_baud       = 0,
  66         },
  67         [1] = {
  68                 .name           = "pclk",
  69                 .divisor        = 1,
  70                 .min_baud       = 0,
  71                 .max_baud       = 0,
  72         }
  73 };
  74
  75
  76 static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
  77         [0] = {
  78                 .hwport      = 0,
  79                 .flags       = 0,
  80                 .ucon        = UCON,
  81                 .ulcon       = ULCON,
  82                 .ufcon       = UFCON,
  83                 .clocks      = at2440evb_serial_clocks,
  84                 .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
  85         },
  86         [1] = {
  87                 .hwport      = 1,
  88                 .flags       = 0,
  89                 .ucon        = UCON,
  90                 .ulcon       = ULCON,
  91                 .ufcon       = UFCON,
  92                 .clocks      = at2440evb_serial_clocks,
  93                 .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
  94         },
  95 };
  96
  97 /* NAND Flash on AT2440EVB board */
  98
  99 static struct mtd_partition __initdata at2440evb_default_nand_part[] = {
 100         [0] = {
 101                 .name   = "Boot Agent",
 102                 .size   = SZ_256K,
 103                 .offset = 0,
 104         },
 105         [1] = {
 106                 .name   = "Kernel",
 107                 .size   = SZ_2M,
 108                 .offset = SZ_256K,
 109         },
 110         [2] = {
 111                 .name   = "Root",
 112                 .offset = SZ_256K + SZ_2M,
 113                 .size   = MTDPART_SIZ_FULL,
 114         },
 115 };
 116
 117 static struct s3c2410_nand_set __initdata at2440evb_nand_sets[] = {
 118         [0] = {
 119                 .name           = "nand",
 120                 .nr_chips       = 1,
 121                 .nr_partitions  = ARRAY_SIZE(at2440evb_default_nand_part),
 122                 .partitions     = at2440evb_default_nand_part,
 123         },
 124 };
 125
 126 static struct s3c2410_platform_nand __initdata at2440evb_nand_info = {
 127         .tacls          = 25,
 128         .twrph0         = 55,
 129         .twrph1         = 40,
 130         .nr_sets        = ARRAY_SIZE(at2440evb_nand_sets),
 131         .sets           = at2440evb_nand_sets,
 132 };
 133
 134 /* DM9000AEP 10/100 ethernet controller */
 135
 136 static struct resource at2440evb_dm9k_resource[] = {
 137         [0] = {
 138                 .start = S3C2410_CS3,
 139                 .end   = S3C2410_CS3 + 3,
 140                 .flags = IORESOURCE_MEM
 141         },
 142         [1] = {
 143                 .start = S3C2410_CS3 + 4,
 144                 .end   = S3C2410_CS3 + 7,
 145                 .flags = IORESOURCE_MEM
 146         },
 147         [2] = {
 148                 .start = IRQ_EINT7,
 149                 .end   = IRQ_EINT7,
 150                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 151         }
 152 };
 153
 154 static struct dm9000_plat_data at2440evb_dm9k_pdata = {
 155         .flags          = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
 156 };
 157
 158 static struct platform_device at2440evb_device_eth = {
 159         .name           = "dm9000",
 160         .id             = -1,
 161         .num_resources  = ARRAY_SIZE(at2440evb_dm9k_resource),
 162         .resource       = at2440evb_dm9k_resource,
 163         .dev            = {
 164                 .platform_data  = &at2440evb_dm9k_pdata,
 165         },
 166 };
 167
 168 static struct s3c24xx_mci_pdata at2440evb_mci_pdata __initdata = {
 169         .gpio_detect    = S3C2410_GPG(10),
 170 };
 171
 172 /* 7" LCD panel */
 173
 174 static struct s3c2410fb_display at2440evb_lcd_cfg __initdata = {
 175
 176         .lcdcon5        = S3C2410_LCDCON5_FRM565 |
 177                           S3C2410_LCDCON5_INVVLINE |
 178                           S3C2410_LCDCON5_INVVFRAME |
 179                           S3C2410_LCDCON5_PWREN |
 180                           S3C2410_LCDCON5_HWSWP,
 181
 182         .type           = S3C2410_LCDCON1_TFT,
 183
 184         .width          = 800,
 185         .height         = 480,
 186
 187         .pixclock       = 33333, /* HCLK 60 MHz, divisor 2 */
 188         .xres           = 800,
 189         .yres           = 480,
 190         .bpp            = 16,
 191         .left_margin    = 88,
 192         .right_margin   = 40,
 193         .hsync_len      = 128,
 194         .upper_margin   = 32,
 195         .lower_margin   = 11,
 196         .vsync_len      = 2,
 197 };
 198
 199 static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = {
 200         .displays       = &at2440evb_lcd_cfg,
 201         .num_displays   = 1,
 202         .default_display = 0,
 203 };
 204
 205 static struct platform_device *at2440evb_devices[] __initdata = {
 206         &s3c_device_ohci,
 207         &s3c_device_wdt,
 208         &s3c_device_adc,
 209         &s3c_device_i2c0,
 210         &s3c_device_rtc,
 211         &s3c_device_nand,
 212         &s3c_device_sdi,
 213         &s3c_device_lcd,
 214         &at2440evb_device_eth,
 215 };
 216
 217 static void __init at2440evb_map_io(void)
 218 {
 219         s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
 220         s3c24xx_init_clocks(16934400);
 221         s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs));
 222 }
 223
 224 static void __init at2440evb_init(void)
 225 {
 226         s3c24xx_fb_set_platdata(&at2440evb_fb_info);
 227         s3c24xx_mci_set_platdata(&at2440evb_mci_pdata);
 228         s3c_nand_set_platdata(&at2440evb_nand_info);
 229         s3c_i2c0_set_platdata(NULL);
 230
 231         platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices));
 232 }
 233
 234
 235 MACHINE_START(AT2440EVB, "AT2440EVB")
 236         .atag_offset    = 0x100,
 237         .map_io         = at2440evb_map_io,
 238         .init_machine   = at2440evb_init,
 239         .init_irq       = s3c24xx_init_irq,
 240         .timer          = &s3c24xx_timer,
 241 MACHINE_END