2 * linux/arch/arm/plat-omap/i2c.c
4 * Helper module for board specific I2C bus registration
6 * Copyright (C) 2007 Nokia Corporation.
8 * Contact: Jarkko Nikula <jhnikula@gmail.com>
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
26 #include <linux/kernel.h>
27 #include <linux/platform_device.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c-omap.h>
30 #include <linux/slab.h>
31 #include <linux/err.h>
32 #include <linux/clk.h>
34 #include <mach/irqs.h>
37 #include <plat/omap-pm.h>
38 #include <plat/omap_device.h>
40 #define OMAP_I2C_SIZE 0x3f
41 #define OMAP1_I2C_BASE 0xfffb3800
43 static const char name
[] = "omap_i2c";
45 #define I2C_RESOURCE_BUILDER(base, irq) \
48 .end = (base) + OMAP_I2C_SIZE, \
49 .flags = IORESOURCE_MEM, \
53 .flags = IORESOURCE_IRQ, \
56 static struct resource i2c_resources
[][2] = {
57 { I2C_RESOURCE_BUILDER(0, 0) },
60 #define I2C_DEV_BUILDER(bus_id, res, data) \
64 .num_resources = ARRAY_SIZE(res), \
67 .platform_data = (data), \
71 #define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
72 #define OMAP_I2C_MAX_CONTROLLERS 4
73 static struct omap_i2c_bus_platform_data i2c_pdata
[OMAP_I2C_MAX_CONTROLLERS
];
74 static struct platform_device omap_i2c_devices
[] = {
75 I2C_DEV_BUILDER(1, i2c_resources
[0], &i2c_pdata
[0]),
78 #define OMAP_I2C_CMDLINE_SETUP (BIT(31))
80 static int __init
omap_i2c_nr_ports(void)
84 if (cpu_class_is_omap1())
86 else if (cpu_is_omap24xx())
88 else if (cpu_is_omap34xx())
90 else if (cpu_is_omap44xx())
96 static inline int omap1_i2c_add_bus(int bus_id
)
98 struct platform_device
*pdev
;
99 struct omap_i2c_bus_platform_data
*pdata
;
100 struct resource
*res
;
102 omap1_i2c_mux_pins(bus_id
);
104 pdev
= &omap_i2c_devices
[bus_id
- 1];
105 res
= pdev
->resource
;
106 res
[0].start
= OMAP1_I2C_BASE
;
107 res
[0].end
= res
[0].start
+ OMAP_I2C_SIZE
;
108 res
[1].start
= INT_I2C
;
109 pdata
= &i2c_pdata
[bus_id
- 1];
111 /* all OMAP1 have IP version 1 register set */
112 pdata
->rev
= OMAP_I2C_IP_VERSION_1
;
114 /* all OMAP1 I2C are implemented like this */
115 pdata
->flags
= OMAP_I2C_FLAG_NO_FIFO
|
116 OMAP_I2C_FLAG_SIMPLE_CLOCK
|
117 OMAP_I2C_FLAG_16BIT_DATA_REG
|
118 OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK
;
120 /* how the cpu bus is wired up differs for 7xx only */
122 if (cpu_is_omap7xx())
123 pdata
->flags
|= OMAP_I2C_FLAG_BUS_SHIFT_1
;
125 pdata
->flags
|= OMAP_I2C_FLAG_BUS_SHIFT_2
;
127 return platform_device_register(pdev
);
131 #ifdef CONFIG_ARCH_OMAP2PLUS
133 * XXX This function is a temporary compatibility wrapper - only
134 * needed until the I2C driver can be converted to call
135 * omap_pm_set_max_dev_wakeup_lat() and handle a return code.
137 static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device
*dev
, long t
)
139 omap_pm_set_max_mpu_wakeup_lat(dev
, t
);
142 static struct omap_device_pm_latency omap_i2c_latency
[] = {
144 .deactivate_func
= omap_device_idle_hwmods
,
145 .activate_func
= omap_device_enable_hwmods
,
146 .flags
= OMAP_DEVICE_LATENCY_AUTO_ADJUST
,
150 static inline int omap2_i2c_add_bus(int bus_id
)
153 struct omap_hwmod
*oh
;
154 struct omap_device
*od
;
155 char oh_name
[MAX_OMAP_I2C_HWMOD_NAME_LEN
];
156 struct omap_i2c_bus_platform_data
*pdata
;
157 struct omap_i2c_dev_attr
*dev_attr
;
159 omap2_i2c_mux_pins(bus_id
);
161 l
= snprintf(oh_name
, MAX_OMAP_I2C_HWMOD_NAME_LEN
, "i2c%d", bus_id
);
162 WARN(l
>= MAX_OMAP_I2C_HWMOD_NAME_LEN
,
163 "String buffer overflow in I2C%d device setup\n", bus_id
);
164 oh
= omap_hwmod_lookup(oh_name
);
166 pr_err("Could not look up %s\n", oh_name
);
170 pdata
= &i2c_pdata
[bus_id
- 1];
172 * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
173 * use, and functionality implementation flags, up to the OMAP I2C
174 * driver via platform data
176 pdata
->rev
= oh
->class->rev
;
178 dev_attr
= (struct omap_i2c_dev_attr
*)oh
->dev_attr
;
179 pdata
->flags
= dev_attr
->flags
;
182 * When waiting for completion of a i2c transfer, we need to
183 * set a wake up latency constraint for the MPU. This is to
184 * ensure quick enough wakeup from idle, when transfer
186 * Only omap3 has support for constraints
188 if (cpu_is_omap34xx())
189 pdata
->set_mpu_wkup_lat
= omap_pm_set_max_mpu_wakeup_lat_compat
;
190 od
= omap_device_build(name
, bus_id
, oh
, pdata
,
191 sizeof(struct omap_i2c_bus_platform_data
),
192 omap_i2c_latency
, ARRAY_SIZE(omap_i2c_latency
), 0);
193 WARN(IS_ERR(od
), "Could not build omap_device for %s\n", name
);
198 static inline int omap2_i2c_add_bus(int bus_id
)
204 static int __init
omap_i2c_add_bus(int bus_id
)
206 if (cpu_class_is_omap1())
207 return omap1_i2c_add_bus(bus_id
);
209 return omap2_i2c_add_bus(bus_id
);
213 * omap_i2c_bus_setup - Process command line options for the I2C bus speed
214 * @str: String of options
216 * This function allow to override the default I2C bus speed for given I2C
217 * bus with a command line option.
219 * Format: i2c_bus=bus_id,clkrate (in kHz)
221 * Returns 1 on success, 0 otherwise.
223 static int __init
omap_i2c_bus_setup(char *str
)
228 ports
= omap_i2c_nr_ports();
229 get_options(str
, 3, ints
);
230 if (ints
[0] < 2 || ints
[1] < 1 || ints
[1] > ports
)
232 i2c_pdata
[ints
[1] - 1].clkrate
= ints
[2];
233 i2c_pdata
[ints
[1] - 1].clkrate
|= OMAP_I2C_CMDLINE_SETUP
;
237 __setup("i2c_bus=", omap_i2c_bus_setup
);
240 * Register busses defined in command line but that are not registered with
241 * omap_register_i2c_bus from board initialization code.
243 static int __init
omap_register_i2c_bus_cmdline(void)
247 for (i
= 0; i
< ARRAY_SIZE(i2c_pdata
); i
++)
248 if (i2c_pdata
[i
].clkrate
& OMAP_I2C_CMDLINE_SETUP
) {
249 i2c_pdata
[i
].clkrate
&= ~OMAP_I2C_CMDLINE_SETUP
;
250 err
= omap_i2c_add_bus(i
+ 1);
258 subsys_initcall(omap_register_i2c_bus_cmdline
);
261 * omap_register_i2c_bus - register I2C bus with device descriptors
262 * @bus_id: bus id counting from number 1
263 * @clkrate: clock rate of the bus in kHz
264 * @info: pointer into I2C device descriptor table or NULL
265 * @len: number of descriptors in the table
267 * Returns 0 on success or an error code.
269 int __init
omap_register_i2c_bus(int bus_id
, u32 clkrate
,
270 struct i2c_board_info
const *info
,
275 BUG_ON(bus_id
< 1 || bus_id
> omap_i2c_nr_ports());
278 err
= i2c_register_board_info(bus_id
, info
, len
);
283 if (!i2c_pdata
[bus_id
- 1].clkrate
)
284 i2c_pdata
[bus_id
- 1].clkrate
= clkrate
;
286 i2c_pdata
[bus_id
- 1].clkrate
&= ~OMAP_I2C_CMDLINE_SETUP
;
288 return omap_i2c_add_bus(bus_id
);