arch/mips/alchemy/devboards/db1x00/platform.c

   1 /*
   2  * DBAu1xxx board platform device registration
   3  *
   4  * Copyright (C) 2009 Manuel Lauss
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  */
  20
  21 #include <linux/init.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/platform_device.h>
  24
  25 #include <asm/mach-au1x00/au1000.h>
  26 #include <asm/mach-au1x00/au1000_dma.h>
  27 #include <asm/mach-au1x00/au1xxx.h>
  28 #include <asm/mach-db1x00/bcsr.h>
  29 #include "../platform.h"
  30
  31 /* DB1xxx PCMCIA interrupt sources:
  32  * CD0/1        GPIO0/3
  33  * STSCHG0/1    GPIO1/4
  34  * CARD0/1      GPIO2/5
  35  * Db1550:      0/1, 21/22, 3/5
  36  */
  37
  38 #define DB1XXX_HAS_PCMCIA
  39 #define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT)
  40
  41 #if defined(CONFIG_MIPS_DB1000)
  42 #define DB1XXX_PCMCIA_CD0       AU1000_GPIO0_INT
  43 #define DB1XXX_PCMCIA_STSCHG0   AU1000_GPIO1_INT
  44 #define DB1XXX_PCMCIA_CARD0     AU1000_GPIO2_INT
  45 #define DB1XXX_PCMCIA_CD1       AU1000_GPIO3_INT
  46 #define DB1XXX_PCMCIA_STSCHG1   AU1000_GPIO4_INT
  47 #define DB1XXX_PCMCIA_CARD1     AU1000_GPIO5_INT
  48 #define BOARD_FLASH_SIZE        0x02000000 /* 32MB */
  49 #define BOARD_FLASH_WIDTH       4 /* 32-bits */
  50 #elif defined(CONFIG_MIPS_DB1100)
  51 #define DB1XXX_PCMCIA_CD0       AU1100_GPIO0_INT
  52 #define DB1XXX_PCMCIA_STSCHG0   AU1100_GPIO1_INT
  53 #define DB1XXX_PCMCIA_CARD0     AU1100_GPIO2_INT
  54 #define DB1XXX_PCMCIA_CD1       AU1100_GPIO3_INT
  55 #define DB1XXX_PCMCIA_STSCHG1   AU1100_GPIO4_INT
  56 #define DB1XXX_PCMCIA_CARD1     AU1100_GPIO5_INT
  57 #define BOARD_FLASH_SIZE        0x02000000 /* 32MB */
  58 #define BOARD_FLASH_WIDTH       4 /* 32-bits */
  59 #elif defined(CONFIG_MIPS_DB1500)
  60 #define DB1XXX_PCMCIA_CD0       AU1500_GPIO0_INT
  61 #define DB1XXX_PCMCIA_STSCHG0   AU1500_GPIO1_INT
  62 #define DB1XXX_PCMCIA_CARD0     AU1500_GPIO2_INT
  63 #define DB1XXX_PCMCIA_CD1       AU1500_GPIO3_INT
  64 #define DB1XXX_PCMCIA_STSCHG1   AU1500_GPIO4_INT
  65 #define DB1XXX_PCMCIA_CARD1     AU1500_GPIO5_INT
  66 #define BOARD_FLASH_SIZE        0x02000000 /* 32MB */
  67 #define BOARD_FLASH_WIDTH       4 /* 32-bits */
  68 #elif defined(CONFIG_MIPS_DB1550)
  69 #define DB1XXX_PCMCIA_CD0       AU1550_GPIO0_INT
  70 #define DB1XXX_PCMCIA_STSCHG0   AU1550_GPIO21_INT
  71 #define DB1XXX_PCMCIA_CARD0     AU1550_GPIO3_INT
  72 #define DB1XXX_PCMCIA_CD1       AU1550_GPIO1_INT
  73 #define DB1XXX_PCMCIA_STSCHG1   AU1550_GPIO22_INT
  74 #define DB1XXX_PCMCIA_CARD1     AU1550_GPIO5_INT
  75 #define BOARD_FLASH_SIZE        0x08000000 /* 128MB */
  76 #define BOARD_FLASH_WIDTH       4 /* 32-bits */
  77 #else
  78 /* other board: no PCMCIA */
  79 #undef DB1XXX_HAS_PCMCIA
  80 #undef F_SWAPPED
  81 #define F_SWAPPED 0
  82 #if defined(CONFIG_MIPS_BOSPORUS)
  83 #define BOARD_FLASH_SIZE        0x01000000 /* 16MB */
  84 #define BOARD_FLASH_WIDTH       2 /* 16-bits */
  85 #elif defined(CONFIG_MIPS_MIRAGE)
  86 #define BOARD_FLASH_SIZE        0x04000000 /* 64MB */
  87 #define BOARD_FLASH_WIDTH       4 /* 32-bits */
  88 #endif
  89 #endif
  90
  91 static struct resource alchemy_ac97c_res[] = {
  92         [0] = {
  93                 .start  = AU1000_AC97_PHYS_ADDR,
  94                 .end    = AU1000_AC97_PHYS_ADDR + 0xfff,
  95                 .flags  = IORESOURCE_MEM,
  96         },
  97         [1] = {
  98                 .start  = DMA_ID_AC97C_TX,
  99                 .end    = DMA_ID_AC97C_TX,
 100                 .flags  = IORESOURCE_DMA,
 101         },
 102         [2] = {
 103                 .start  = DMA_ID_AC97C_RX,
 104                 .end    = DMA_ID_AC97C_RX,
 105                 .flags  = IORESOURCE_DMA,
 106         },
 107 };
 108
 109 static struct platform_device alchemy_ac97c_dev = {
 110         .name           = "alchemy-ac97c",
 111         .id             = -1,
 112         .resource       = alchemy_ac97c_res,
 113         .num_resources  = ARRAY_SIZE(alchemy_ac97c_res),
 114 };
 115
 116 static struct platform_device alchemy_ac97c_dma_dev = {
 117         .name           = "alchemy-pcm-dma",
 118         .id             = 0,
 119 };
 120
 121 static struct platform_device db1x00_codec_dev = {
 122         .name           = "ac97-codec",
 123         .id             = -1,
 124 };
 125
 126 static struct platform_device db1x00_audio_dev = {
 127         .name           = "db1000-audio",
 128 };
 129
 130 static int __init db1xxx_dev_init(void)
 131 {
 132 #ifdef DB1XXX_HAS_PCMCIA
 133         db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR,
 134                                     PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
 135                                     PCMCIA_MEM_PHYS_ADDR,
 136                                     PCMCIA_MEM_PHYS_ADDR  + 0x000400000 - 1,
 137                                     PCMCIA_IO_PHYS_ADDR,
 138                                     PCMCIA_IO_PHYS_ADDR   + 0x000010000 - 1,
 139                                     DB1XXX_PCMCIA_CARD0,
 140                                     DB1XXX_PCMCIA_CD0,
 141                                     /*DB1XXX_PCMCIA_STSCHG0*/0,
 142                                     0,
 143                                     0);
 144
 145         db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
 146                                     PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
 147                                     PCMCIA_MEM_PHYS_ADDR  + 0x004000000,
 148                                     PCMCIA_MEM_PHYS_ADDR  + 0x004400000 - 1,
 149                                     PCMCIA_IO_PHYS_ADDR   + 0x004000000,
 150                                     PCMCIA_IO_PHYS_ADDR   + 0x004010000 - 1,
 151                                     DB1XXX_PCMCIA_CARD1,
 152                                     DB1XXX_PCMCIA_CD1,
 153                                     /*DB1XXX_PCMCIA_STSCHG1*/0,
 154                                     0,
 155                                     1);
 156 #endif
 157         db1x_register_norflash(BOARD_FLASH_SIZE, BOARD_FLASH_WIDTH, F_SWAPPED);
 158
 159         platform_device_register(&db1x00_codec_dev);
 160         platform_device_register(&alchemy_ac97c_dma_dev);
 161         platform_device_register(&alchemy_ac97c_dev);
 162         platform_device_register(&db1x00_audio_dev);
 163
 164         return 0;
 165 }
 166 device_initcall(db1xxx_dev_init);