arch/mips/include/asm/octeon/cvmx-mio-defs.h

   1 /***********************license start***************
   2  * Author: Cavium Networks
   3  *
   4  * Contact: support@caviumnetworks.com
   5  * This file is part of the OCTEON SDK
   6  *
   7  * Copyright (c) 2003-2010 Cavium Networks
   8  *
   9  * This file is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License, Version 2, as
  11  * published by the Free Software Foundation.
  12  *
  13  * This file is distributed in the hope that it will be useful, but
  14  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16  * NONINFRINGEMENT.  See the GNU General Public License for more
  17  * details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this file; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  22  * or visit http://www.gnu.org/licenses/.
  23  *
  24  * This file may also be available under a different license from Cavium.
  25  * Contact Cavium Networks for more information
  26  ***********************license end**************************************/
  27
  28 #ifndef __CVMX_MIO_DEFS_H__
  29 #define __CVMX_MIO_DEFS_H__
  30
  31 #define CVMX_MIO_BOOT_BIST_STAT (CVMX_ADD_IO_SEG(0x00011800000000F8ull))
  32 #define CVMX_MIO_BOOT_COMP (CVMX_ADD_IO_SEG(0x00011800000000B8ull))
  33 #define CVMX_MIO_BOOT_DMA_CFGX(offset) (CVMX_ADD_IO_SEG(0x0001180000000100ull) + ((offset) & 3) * 8)
  34 #define CVMX_MIO_BOOT_DMA_INTX(offset) (CVMX_ADD_IO_SEG(0x0001180000000138ull) + ((offset) & 3) * 8)
  35 #define CVMX_MIO_BOOT_DMA_INT_ENX(offset) (CVMX_ADD_IO_SEG(0x0001180000000150ull) + ((offset) & 3) * 8)
  36 #define CVMX_MIO_BOOT_DMA_TIMX(offset) (CVMX_ADD_IO_SEG(0x0001180000000120ull) + ((offset) & 3) * 8)
  37 #define CVMX_MIO_BOOT_ERR (CVMX_ADD_IO_SEG(0x00011800000000A0ull))
  38 #define CVMX_MIO_BOOT_INT (CVMX_ADD_IO_SEG(0x00011800000000A8ull))
  39 #define CVMX_MIO_BOOT_LOC_ADR (CVMX_ADD_IO_SEG(0x0001180000000090ull))
  40 #define CVMX_MIO_BOOT_LOC_CFGX(offset) (CVMX_ADD_IO_SEG(0x0001180000000080ull) + ((offset) & 1) * 8)
  41 #define CVMX_MIO_BOOT_LOC_DAT (CVMX_ADD_IO_SEG(0x0001180000000098ull))
  42 #define CVMX_MIO_BOOT_PIN_DEFS (CVMX_ADD_IO_SEG(0x00011800000000C0ull))
  43 #define CVMX_MIO_BOOT_REG_CFGX(offset) (CVMX_ADD_IO_SEG(0x0001180000000000ull) + ((offset) & 7) * 8)
  44 #define CVMX_MIO_BOOT_REG_TIMX(offset) (CVMX_ADD_IO_SEG(0x0001180000000040ull) + ((offset) & 7) * 8)
  45 #define CVMX_MIO_BOOT_THR (CVMX_ADD_IO_SEG(0x00011800000000B0ull))
  46 #define CVMX_MIO_FUS_BNK_DATX(offset) (CVMX_ADD_IO_SEG(0x0001180000001520ull) + ((offset) & 3) * 8)
  47 #define CVMX_MIO_FUS_DAT0 (CVMX_ADD_IO_SEG(0x0001180000001400ull))
  48 #define CVMX_MIO_FUS_DAT1 (CVMX_ADD_IO_SEG(0x0001180000001408ull))
  49 #define CVMX_MIO_FUS_DAT2 (CVMX_ADD_IO_SEG(0x0001180000001410ull))
  50 #define CVMX_MIO_FUS_DAT3 (CVMX_ADD_IO_SEG(0x0001180000001418ull))
  51 #define CVMX_MIO_FUS_EMA (CVMX_ADD_IO_SEG(0x0001180000001550ull))
  52 #define CVMX_MIO_FUS_PDF (CVMX_ADD_IO_SEG(0x0001180000001420ull))
  53 #define CVMX_MIO_FUS_PLL (CVMX_ADD_IO_SEG(0x0001180000001580ull))
  54 #define CVMX_MIO_FUS_PROG (CVMX_ADD_IO_SEG(0x0001180000001510ull))
  55 #define CVMX_MIO_FUS_PROG_TIMES (CVMX_ADD_IO_SEG(0x0001180000001518ull))
  56 #define CVMX_MIO_FUS_RCMD (CVMX_ADD_IO_SEG(0x0001180000001500ull))
  57 #define CVMX_MIO_FUS_READ_TIMES (CVMX_ADD_IO_SEG(0x0001180000001570ull))
  58 #define CVMX_MIO_FUS_REPAIR_RES0 (CVMX_ADD_IO_SEG(0x0001180000001558ull))
  59 #define CVMX_MIO_FUS_REPAIR_RES1 (CVMX_ADD_IO_SEG(0x0001180000001560ull))
  60 #define CVMX_MIO_FUS_REPAIR_RES2 (CVMX_ADD_IO_SEG(0x0001180000001568ull))
  61 #define CVMX_MIO_FUS_SPR_REPAIR_RES (CVMX_ADD_IO_SEG(0x0001180000001548ull))
  62 #define CVMX_MIO_FUS_SPR_REPAIR_SUM (CVMX_ADD_IO_SEG(0x0001180000001540ull))
  63 #define CVMX_MIO_FUS_UNLOCK (CVMX_ADD_IO_SEG(0x0001180000001578ull))
  64 #define CVMX_MIO_FUS_WADR (CVMX_ADD_IO_SEG(0x0001180000001508ull))
  65 #define CVMX_MIO_GPIO_COMP (CVMX_ADD_IO_SEG(0x00011800000000C8ull))
  66 #define CVMX_MIO_NDF_DMA_CFG (CVMX_ADD_IO_SEG(0x0001180000000168ull))
  67 #define CVMX_MIO_NDF_DMA_INT (CVMX_ADD_IO_SEG(0x0001180000000170ull))
  68 #define CVMX_MIO_NDF_DMA_INT_EN (CVMX_ADD_IO_SEG(0x0001180000000178ull))
  69 #define CVMX_MIO_PLL_CTL (CVMX_ADD_IO_SEG(0x0001180000001448ull))
  70 #define CVMX_MIO_PLL_SETTING (CVMX_ADD_IO_SEG(0x0001180000001440ull))
  71 #define CVMX_MIO_PTP_CLOCK_CFG (CVMX_ADD_IO_SEG(0x0001070000000F00ull))
  72 #define CVMX_MIO_PTP_CLOCK_COMP (CVMX_ADD_IO_SEG(0x0001070000000F18ull))
  73 #define CVMX_MIO_PTP_CLOCK_HI (CVMX_ADD_IO_SEG(0x0001070000000F10ull))
  74 #define CVMX_MIO_PTP_CLOCK_LO (CVMX_ADD_IO_SEG(0x0001070000000F08ull))
  75 #define CVMX_MIO_PTP_EVT_CNT (CVMX_ADD_IO_SEG(0x0001070000000F28ull))
  76 #define CVMX_MIO_PTP_TIMESTAMP (CVMX_ADD_IO_SEG(0x0001070000000F20ull))
  77 #define CVMX_MIO_RST_BOOT (CVMX_ADD_IO_SEG(0x0001180000001600ull))
  78 #define CVMX_MIO_RST_CFG (CVMX_ADD_IO_SEG(0x0001180000001610ull))
  79 #define CVMX_MIO_RST_CTLX(offset) (CVMX_ADD_IO_SEG(0x0001180000001618ull) + ((offset) & 1) * 8)
  80 #define CVMX_MIO_RST_DELAY (CVMX_ADD_IO_SEG(0x0001180000001608ull))
  81 #define CVMX_MIO_RST_INT (CVMX_ADD_IO_SEG(0x0001180000001628ull))
  82 #define CVMX_MIO_RST_INT_EN (CVMX_ADD_IO_SEG(0x0001180000001630ull))
  83 #define CVMX_MIO_TWSX_INT(offset) (CVMX_ADD_IO_SEG(0x0001180000001010ull) + ((offset) & 1) * 512)
  84 #define CVMX_MIO_TWSX_SW_TWSI(offset) (CVMX_ADD_IO_SEG(0x0001180000001000ull) + ((offset) & 1) * 512)
  85 #define CVMX_MIO_TWSX_SW_TWSI_EXT(offset) (CVMX_ADD_IO_SEG(0x0001180000001018ull) + ((offset) & 1) * 512)
  86 #define CVMX_MIO_TWSX_TWSI_SW(offset) (CVMX_ADD_IO_SEG(0x0001180000001008ull) + ((offset) & 1) * 512)
  87 #define CVMX_MIO_UART2_DLH (CVMX_ADD_IO_SEG(0x0001180000000488ull))
  88 #define CVMX_MIO_UART2_DLL (CVMX_ADD_IO_SEG(0x0001180000000480ull))
  89 #define CVMX_MIO_UART2_FAR (CVMX_ADD_IO_SEG(0x0001180000000520ull))
  90 #define CVMX_MIO_UART2_FCR (CVMX_ADD_IO_SEG(0x0001180000000450ull))
  91 #define CVMX_MIO_UART2_HTX (CVMX_ADD_IO_SEG(0x0001180000000708ull))
  92 #define CVMX_MIO_UART2_IER (CVMX_ADD_IO_SEG(0x0001180000000408ull))
  93 #define CVMX_MIO_UART2_IIR (CVMX_ADD_IO_SEG(0x0001180000000410ull))
  94 #define CVMX_MIO_UART2_LCR (CVMX_ADD_IO_SEG(0x0001180000000418ull))
  95 #define CVMX_MIO_UART2_LSR (CVMX_ADD_IO_SEG(0x0001180000000428ull))
  96 #define CVMX_MIO_UART2_MCR (CVMX_ADD_IO_SEG(0x0001180000000420ull))
  97 #define CVMX_MIO_UART2_MSR (CVMX_ADD_IO_SEG(0x0001180000000430ull))
  98 #define CVMX_MIO_UART2_RBR (CVMX_ADD_IO_SEG(0x0001180000000400ull))
  99 #define CVMX_MIO_UART2_RFL (CVMX_ADD_IO_SEG(0x0001180000000608ull))
 100 #define CVMX_MIO_UART2_RFW (CVMX_ADD_IO_SEG(0x0001180000000530ull))
 101 #define CVMX_MIO_UART2_SBCR (CVMX_ADD_IO_SEG(0x0001180000000620ull))
 102 #define CVMX_MIO_UART2_SCR (CVMX_ADD_IO_SEG(0x0001180000000438ull))
 103 #define CVMX_MIO_UART2_SFE (CVMX_ADD_IO_SEG(0x0001180000000630ull))
 104 #define CVMX_MIO_UART2_SRR (CVMX_ADD_IO_SEG(0x0001180000000610ull))
 105 #define CVMX_MIO_UART2_SRT (CVMX_ADD_IO_SEG(0x0001180000000638ull))
 106 #define CVMX_MIO_UART2_SRTS (CVMX_ADD_IO_SEG(0x0001180000000618ull))
 107 #define CVMX_MIO_UART2_STT (CVMX_ADD_IO_SEG(0x0001180000000700ull))
 108 #define CVMX_MIO_UART2_TFL (CVMX_ADD_IO_SEG(0x0001180000000600ull))
 109 #define CVMX_MIO_UART2_TFR (CVMX_ADD_IO_SEG(0x0001180000000528ull))
 110 #define CVMX_MIO_UART2_THR (CVMX_ADD_IO_SEG(0x0001180000000440ull))
 111 #define CVMX_MIO_UART2_USR (CVMX_ADD_IO_SEG(0x0001180000000538ull))
 112 #define CVMX_MIO_UARTX_DLH(offset) (CVMX_ADD_IO_SEG(0x0001180000000888ull) + ((offset) & 1) * 1024)
 113 #define CVMX_MIO_UARTX_DLL(offset) (CVMX_ADD_IO_SEG(0x0001180000000880ull) + ((offset) & 1) * 1024)
 114 #define CVMX_MIO_UARTX_FAR(offset) (CVMX_ADD_IO_SEG(0x0001180000000920ull) + ((offset) & 1) * 1024)
 115 #define CVMX_MIO_UARTX_FCR(offset) (CVMX_ADD_IO_SEG(0x0001180000000850ull) + ((offset) & 1) * 1024)
 116 #define CVMX_MIO_UARTX_HTX(offset) (CVMX_ADD_IO_SEG(0x0001180000000B08ull) + ((offset) & 1) * 1024)
 117 #define CVMX_MIO_UARTX_IER(offset) (CVMX_ADD_IO_SEG(0x0001180000000808ull) + ((offset) & 1) * 1024)
 118 #define CVMX_MIO_UARTX_IIR(offset) (CVMX_ADD_IO_SEG(0x0001180000000810ull) + ((offset) & 1) * 1024)
 119 #define CVMX_MIO_UARTX_LCR(offset) (CVMX_ADD_IO_SEG(0x0001180000000818ull) + ((offset) & 1) * 1024)
 120 #define CVMX_MIO_UARTX_LSR(offset) (CVMX_ADD_IO_SEG(0x0001180000000828ull) + ((offset) & 1) * 1024)
 121 #define CVMX_MIO_UARTX_MCR(offset) (CVMX_ADD_IO_SEG(0x0001180000000820ull) + ((offset) & 1) * 1024)
 122 #define CVMX_MIO_UARTX_MSR(offset) (CVMX_ADD_IO_SEG(0x0001180000000830ull) + ((offset) & 1) * 1024)
 123 #define CVMX_MIO_UARTX_RBR(offset) (CVMX_ADD_IO_SEG(0x0001180000000800ull) + ((offset) & 1) * 1024)
 124 #define CVMX_MIO_UARTX_RFL(offset) (CVMX_ADD_IO_SEG(0x0001180000000A08ull) + ((offset) & 1) * 1024)
 125 #define CVMX_MIO_UARTX_RFW(offset) (CVMX_ADD_IO_SEG(0x0001180000000930ull) + ((offset) & 1) * 1024)
 126 #define CVMX_MIO_UARTX_SBCR(offset) (CVMX_ADD_IO_SEG(0x0001180000000A20ull) + ((offset) & 1) * 1024)
 127 #define CVMX_MIO_UARTX_SCR(offset) (CVMX_ADD_IO_SEG(0x0001180000000838ull) + ((offset) & 1) * 1024)
 128 #define CVMX_MIO_UARTX_SFE(offset) (CVMX_ADD_IO_SEG(0x0001180000000A30ull) + ((offset) & 1) * 1024)
 129 #define CVMX_MIO_UARTX_SRR(offset) (CVMX_ADD_IO_SEG(0x0001180000000A10ull) + ((offset) & 1) * 1024)
 130 #define CVMX_MIO_UARTX_SRT(offset) (CVMX_ADD_IO_SEG(0x0001180000000A38ull) + ((offset) & 1) * 1024)
 131 #define CVMX_MIO_UARTX_SRTS(offset) (CVMX_ADD_IO_SEG(0x0001180000000A18ull) + ((offset) & 1) * 1024)
 132 #define CVMX_MIO_UARTX_STT(offset) (CVMX_ADD_IO_SEG(0x0001180000000B00ull) + ((offset) & 1) * 1024)
 133 #define CVMX_MIO_UARTX_TFL(offset) (CVMX_ADD_IO_SEG(0x0001180000000A00ull) + ((offset) & 1) * 1024)
 134 #define CVMX_MIO_UARTX_TFR(offset) (CVMX_ADD_IO_SEG(0x0001180000000928ull) + ((offset) & 1) * 1024)
 135 #define CVMX_MIO_UARTX_THR(offset) (CVMX_ADD_IO_SEG(0x0001180000000840ull) + ((offset) & 1) * 1024)
 136 #define CVMX_MIO_UARTX_USR(offset) (CVMX_ADD_IO_SEG(0x0001180000000938ull) + ((offset) & 1) * 1024)
 137
 138 union cvmx_mio_boot_bist_stat {
 139         uint64_t u64;
 140         struct cvmx_mio_boot_bist_stat_s {
 141                 uint64_t reserved_0_63:64;
 142         } s;
 143         struct cvmx_mio_boot_bist_stat_cn30xx {
 144                 uint64_t reserved_4_63:60;
 145                 uint64_t ncbo_1:1;
 146                 uint64_t ncbo_0:1;
 147                 uint64_t loc:1;
 148                 uint64_t ncbi:1;
 149         } cn30xx;
 150         struct cvmx_mio_boot_bist_stat_cn30xx cn31xx;
 151         struct cvmx_mio_boot_bist_stat_cn38xx {
 152                 uint64_t reserved_3_63:61;
 153                 uint64_t ncbo_0:1;
 154                 uint64_t loc:1;
 155                 uint64_t ncbi:1;
 156         } cn38xx;
 157         struct cvmx_mio_boot_bist_stat_cn38xx cn38xxp2;
 158         struct cvmx_mio_boot_bist_stat_cn50xx {
 159                 uint64_t reserved_6_63:58;
 160                 uint64_t pcm_1:1;
 161                 uint64_t pcm_0:1;
 162                 uint64_t ncbo_1:1;
 163                 uint64_t ncbo_0:1;
 164                 uint64_t loc:1;
 165                 uint64_t ncbi:1;
 166         } cn50xx;
 167         struct cvmx_mio_boot_bist_stat_cn52xx {
 168                 uint64_t reserved_6_63:58;
 169                 uint64_t ndf:2;
 170                 uint64_t ncbo_0:1;
 171                 uint64_t dma:1;
 172                 uint64_t loc:1;
 173                 uint64_t ncbi:1;
 174         } cn52xx;
 175         struct cvmx_mio_boot_bist_stat_cn52xxp1 {
 176                 uint64_t reserved_4_63:60;
 177                 uint64_t ncbo_0:1;
 178                 uint64_t dma:1;
 179                 uint64_t loc:1;
 180                 uint64_t ncbi:1;
 181         } cn52xxp1;
 182         struct cvmx_mio_boot_bist_stat_cn52xxp1 cn56xx;
 183         struct cvmx_mio_boot_bist_stat_cn52xxp1 cn56xxp1;
 184         struct cvmx_mio_boot_bist_stat_cn38xx cn58xx;
 185         struct cvmx_mio_boot_bist_stat_cn38xx cn58xxp1;
 186         struct cvmx_mio_boot_bist_stat_cn63xx {
 187                 uint64_t reserved_9_63:55;
 188                 uint64_t stat:9;
 189         } cn63xx;
 190         struct cvmx_mio_boot_bist_stat_cn63xx cn63xxp1;
 191 };
 192
 193 union cvmx_mio_boot_comp {
 194         uint64_t u64;
 195         struct cvmx_mio_boot_comp_s {
 196                 uint64_t reserved_0_63:64;
 197         } s;
 198         struct cvmx_mio_boot_comp_cn50xx {
 199                 uint64_t reserved_10_63:54;
 200                 uint64_t pctl:5;
 201                 uint64_t nctl:5;
 202         } cn50xx;
 203         struct cvmx_mio_boot_comp_cn50xx cn52xx;
 204         struct cvmx_mio_boot_comp_cn50xx cn52xxp1;
 205         struct cvmx_mio_boot_comp_cn50xx cn56xx;
 206         struct cvmx_mio_boot_comp_cn50xx cn56xxp1;
 207         struct cvmx_mio_boot_comp_cn63xx {
 208                 uint64_t reserved_12_63:52;
 209                 uint64_t pctl:6;
 210                 uint64_t nctl:6;
 211         } cn63xx;
 212         struct cvmx_mio_boot_comp_cn63xx cn63xxp1;
 213 };
 214
 215 union cvmx_mio_boot_dma_cfgx {
 216         uint64_t u64;
 217         struct cvmx_mio_boot_dma_cfgx_s {
 218                 uint64_t en:1;
 219                 uint64_t rw:1;
 220                 uint64_t clr:1;
 221                 uint64_t reserved_60_60:1;
 222                 uint64_t swap32:1;
 223                 uint64_t swap16:1;
 224                 uint64_t swap8:1;
 225                 uint64_t endian:1;
 226                 uint64_t size:20;
 227                 uint64_t adr:36;
 228         } s;
 229         struct cvmx_mio_boot_dma_cfgx_s cn52xx;
 230         struct cvmx_mio_boot_dma_cfgx_s cn52xxp1;
 231         struct cvmx_mio_boot_dma_cfgx_s cn56xx;
 232         struct cvmx_mio_boot_dma_cfgx_s cn56xxp1;
 233         struct cvmx_mio_boot_dma_cfgx_s cn63xx;
 234         struct cvmx_mio_boot_dma_cfgx_s cn63xxp1;
 235 };
 236
 237 union cvmx_mio_boot_dma_intx {
 238         uint64_t u64;
 239         struct cvmx_mio_boot_dma_intx_s {
 240                 uint64_t reserved_2_63:62;
 241                 uint64_t dmarq:1;
 242                 uint64_t done:1;
 243         } s;
 244         struct cvmx_mio_boot_dma_intx_s cn52xx;
 245         struct cvmx_mio_boot_dma_intx_s cn52xxp1;
 246         struct cvmx_mio_boot_dma_intx_s cn56xx;
 247         struct cvmx_mio_boot_dma_intx_s cn56xxp1;
 248         struct cvmx_mio_boot_dma_intx_s cn63xx;
 249         struct cvmx_mio_boot_dma_intx_s cn63xxp1;
 250 };
 251
 252 union cvmx_mio_boot_dma_int_enx {
 253         uint64_t u64;
 254         struct cvmx_mio_boot_dma_int_enx_s {
 255                 uint64_t reserved_2_63:62;
 256                 uint64_t dmarq:1;
 257                 uint64_t done:1;
 258         } s;
 259         struct cvmx_mio_boot_dma_int_enx_s cn52xx;
 260         struct cvmx_mio_boot_dma_int_enx_s cn52xxp1;
 261         struct cvmx_mio_boot_dma_int_enx_s cn56xx;
 262         struct cvmx_mio_boot_dma_int_enx_s cn56xxp1;
 263         struct cvmx_mio_boot_dma_int_enx_s cn63xx;
 264         struct cvmx_mio_boot_dma_int_enx_s cn63xxp1;
 265 };
 266
 267 union cvmx_mio_boot_dma_timx {
 268         uint64_t u64;
 269         struct cvmx_mio_boot_dma_timx_s {
 270                 uint64_t dmack_pi:1;
 271                 uint64_t dmarq_pi:1;
 272                 uint64_t tim_mult:2;
 273                 uint64_t rd_dly:3;
 274                 uint64_t ddr:1;
 275                 uint64_t width:1;
 276                 uint64_t reserved_48_54:7;
 277                 uint64_t pause:6;
 278                 uint64_t dmack_h:6;
 279                 uint64_t we_n:6;
 280                 uint64_t we_a:6;
 281                 uint64_t oe_n:6;
 282                 uint64_t oe_a:6;
 283                 uint64_t dmack_s:6;
 284                 uint64_t dmarq:6;
 285         } s;
 286         struct cvmx_mio_boot_dma_timx_s cn52xx;
 287         struct cvmx_mio_boot_dma_timx_s cn52xxp1;
 288         struct cvmx_mio_boot_dma_timx_s cn56xx;
 289         struct cvmx_mio_boot_dma_timx_s cn56xxp1;
 290         struct cvmx_mio_boot_dma_timx_s cn63xx;
 291         struct cvmx_mio_boot_dma_timx_s cn63xxp1;
 292 };
 293
 294 union cvmx_mio_boot_err {
 295         uint64_t u64;
 296         struct cvmx_mio_boot_err_s {
 297                 uint64_t reserved_2_63:62;
 298                 uint64_t wait_err:1;
 299                 uint64_t adr_err:1;
 300         } s;
 301         struct cvmx_mio_boot_err_s cn30xx;
 302         struct cvmx_mio_boot_err_s cn31xx;
 303         struct cvmx_mio_boot_err_s cn38xx;
 304         struct cvmx_mio_boot_err_s cn38xxp2;
 305         struct cvmx_mio_boot_err_s cn50xx;
 306         struct cvmx_mio_boot_err_s cn52xx;
 307         struct cvmx_mio_boot_err_s cn52xxp1;
 308         struct cvmx_mio_boot_err_s cn56xx;
 309         struct cvmx_mio_boot_err_s cn56xxp1;
 310         struct cvmx_mio_boot_err_s cn58xx;
 311         struct cvmx_mio_boot_err_s cn58xxp1;
 312         struct cvmx_mio_boot_err_s cn63xx;
 313         struct cvmx_mio_boot_err_s cn63xxp1;
 314 };
 315
 316 union cvmx_mio_boot_int {
 317         uint64_t u64;
 318         struct cvmx_mio_boot_int_s {
 319                 uint64_t reserved_2_63:62;
 320                 uint64_t wait_int:1;
 321                 uint64_t adr_int:1;
 322         } s;
 323         struct cvmx_mio_boot_int_s cn30xx;
 324         struct cvmx_mio_boot_int_s cn31xx;
 325         struct cvmx_mio_boot_int_s cn38xx;
 326         struct cvmx_mio_boot_int_s cn38xxp2;
 327         struct cvmx_mio_boot_int_s cn50xx;
 328         struct cvmx_mio_boot_int_s cn52xx;
 329         struct cvmx_mio_boot_int_s cn52xxp1;
 330         struct cvmx_mio_boot_int_s cn56xx;
 331         struct cvmx_mio_boot_int_s cn56xxp1;
 332         struct cvmx_mio_boot_int_s cn58xx;
 333         struct cvmx_mio_boot_int_s cn58xxp1;
 334         struct cvmx_mio_boot_int_s cn63xx;
 335         struct cvmx_mio_boot_int_s cn63xxp1;
 336 };
 337
 338 union cvmx_mio_boot_loc_adr {
 339         uint64_t u64;
 340         struct cvmx_mio_boot_loc_adr_s {
 341                 uint64_t reserved_8_63:56;
 342                 uint64_t adr:5;
 343                 uint64_t reserved_0_2:3;
 344         } s;
 345         struct cvmx_mio_boot_loc_adr_s cn30xx;
 346         struct cvmx_mio_boot_loc_adr_s cn31xx;
 347         struct cvmx_mio_boot_loc_adr_s cn38xx;
 348         struct cvmx_mio_boot_loc_adr_s cn38xxp2;
 349         struct cvmx_mio_boot_loc_adr_s cn50xx;
 350         struct cvmx_mio_boot_loc_adr_s cn52xx;
 351         struct cvmx_mio_boot_loc_adr_s cn52xxp1;
 352         struct cvmx_mio_boot_loc_adr_s cn56xx;
 353         struct cvmx_mio_boot_loc_adr_s cn56xxp1;
 354         struct cvmx_mio_boot_loc_adr_s cn58xx;
 355         struct cvmx_mio_boot_loc_adr_s cn58xxp1;
 356         struct cvmx_mio_boot_loc_adr_s cn63xx;
 357         struct cvmx_mio_boot_loc_adr_s cn63xxp1;
 358 };
 359
 360 union cvmx_mio_boot_loc_cfgx {
 361         uint64_t u64;
 362         struct cvmx_mio_boot_loc_cfgx_s {
 363                 uint64_t reserved_32_63:32;
 364                 uint64_t en:1;
 365                 uint64_t reserved_28_30:3;
 366                 uint64_t base:25;
 367                 uint64_t reserved_0_2:3;
 368         } s;
 369         struct cvmx_mio_boot_loc_cfgx_s cn30xx;
 370         struct cvmx_mio_boot_loc_cfgx_s cn31xx;
 371         struct cvmx_mio_boot_loc_cfgx_s cn38xx;
 372         struct cvmx_mio_boot_loc_cfgx_s cn38xxp2;
 373         struct cvmx_mio_boot_loc_cfgx_s cn50xx;
 374         struct cvmx_mio_boot_loc_cfgx_s cn52xx;
 375         struct cvmx_mio_boot_loc_cfgx_s cn52xxp1;
 376         struct cvmx_mio_boot_loc_cfgx_s cn56xx;
 377         struct cvmx_mio_boot_loc_cfgx_s cn56xxp1;
 378         struct cvmx_mio_boot_loc_cfgx_s cn58xx;
 379         struct cvmx_mio_boot_loc_cfgx_s cn58xxp1;
 380         struct cvmx_mio_boot_loc_cfgx_s cn63xx;
 381         struct cvmx_mio_boot_loc_cfgx_s cn63xxp1;
 382 };
 383
 384 union cvmx_mio_boot_loc_dat {
 385         uint64_t u64;
 386         struct cvmx_mio_boot_loc_dat_s {
 387                 uint64_t data:64;
 388         } s;
 389         struct cvmx_mio_boot_loc_dat_s cn30xx;
 390         struct cvmx_mio_boot_loc_dat_s cn31xx;
 391         struct cvmx_mio_boot_loc_dat_s cn38xx;
 392         struct cvmx_mio_boot_loc_dat_s cn38xxp2;
 393         struct cvmx_mio_boot_loc_dat_s cn50xx;
 394         struct cvmx_mio_boot_loc_dat_s cn52xx;
 395         struct cvmx_mio_boot_loc_dat_s cn52xxp1;
 396         struct cvmx_mio_boot_loc_dat_s cn56xx;
 397         struct cvmx_mio_boot_loc_dat_s cn56xxp1;
 398         struct cvmx_mio_boot_loc_dat_s cn58xx;
 399         struct cvmx_mio_boot_loc_dat_s cn58xxp1;
 400         struct cvmx_mio_boot_loc_dat_s cn63xx;
 401         struct cvmx_mio_boot_loc_dat_s cn63xxp1;
 402 };
 403
 404 union cvmx_mio_boot_pin_defs {
 405         uint64_t u64;
 406         struct cvmx_mio_boot_pin_defs_s {
 407                 uint64_t reserved_16_63:48;
 408                 uint64_t ale:1;
 409                 uint64_t width:1;
 410                 uint64_t dmack_p2:1;
 411                 uint64_t dmack_p1:1;
 412                 uint64_t dmack_p0:1;
 413                 uint64_t term:2;
 414                 uint64_t nand:1;
 415                 uint64_t reserved_0_7:8;
 416         } s;
 417         struct cvmx_mio_boot_pin_defs_cn52xx {
 418                 uint64_t reserved_16_63:48;
 419                 uint64_t ale:1;
 420                 uint64_t width:1;
 421                 uint64_t reserved_13_13:1;
 422                 uint64_t dmack_p1:1;
 423                 uint64_t dmack_p0:1;
 424                 uint64_t term:2;
 425                 uint64_t nand:1;
 426                 uint64_t reserved_0_7:8;
 427         } cn52xx;
 428         struct cvmx_mio_boot_pin_defs_cn56xx {
 429                 uint64_t reserved_16_63:48;
 430                 uint64_t ale:1;
 431                 uint64_t width:1;
 432                 uint64_t dmack_p2:1;
 433                 uint64_t dmack_p1:1;
 434                 uint64_t dmack_p0:1;
 435                 uint64_t term:2;
 436                 uint64_t reserved_0_8:9;
 437         } cn56xx;
 438         struct cvmx_mio_boot_pin_defs_cn52xx cn63xx;
 439         struct cvmx_mio_boot_pin_defs_cn52xx cn63xxp1;
 440 };
 441
 442 union cvmx_mio_boot_reg_cfgx {
 443         uint64_t u64;
 444         struct cvmx_mio_boot_reg_cfgx_s {
 445                 uint64_t reserved_44_63:20;
 446                 uint64_t dmack:2;
 447                 uint64_t tim_mult:2;
 448                 uint64_t rd_dly:3;
 449                 uint64_t sam:1;
 450                 uint64_t we_ext:2;
 451                 uint64_t oe_ext:2;
 452                 uint64_t en:1;
 453                 uint64_t orbit:1;
 454                 uint64_t ale:1;
 455                 uint64_t width:1;
 456                 uint64_t size:12;
 457                 uint64_t base:16;
 458         } s;
 459         struct cvmx_mio_boot_reg_cfgx_cn30xx {
 460                 uint64_t reserved_37_63:27;
 461                 uint64_t sam:1;
 462                 uint64_t we_ext:2;
 463                 uint64_t oe_ext:2;
 464                 uint64_t en:1;
 465                 uint64_t orbit:1;
 466                 uint64_t ale:1;
 467                 uint64_t width:1;
 468                 uint64_t size:12;
 469                 uint64_t base:16;
 470         } cn30xx;
 471         struct cvmx_mio_boot_reg_cfgx_cn30xx cn31xx;
 472         struct cvmx_mio_boot_reg_cfgx_cn38xx {
 473                 uint64_t reserved_32_63:32;
 474                 uint64_t en:1;
 475                 uint64_t orbit:1;
 476                 uint64_t reserved_28_29:2;
 477                 uint64_t size:12;
 478                 uint64_t base:16;
 479         } cn38xx;
 480         struct cvmx_mio_boot_reg_cfgx_cn38xx cn38xxp2;
 481         struct cvmx_mio_boot_reg_cfgx_cn50xx {
 482                 uint64_t reserved_42_63:22;
 483                 uint64_t tim_mult:2;
 484                 uint64_t rd_dly:3;
 485                 uint64_t sam:1;
 486                 uint64_t we_ext:2;
 487                 uint64_t oe_ext:2;
 488                 uint64_t en:1;
 489                 uint64_t orbit:1;
 490                 uint64_t ale:1;
 491                 uint64_t width:1;
 492                 uint64_t size:12;
 493                 uint64_t base:16;
 494         } cn50xx;
 495         struct cvmx_mio_boot_reg_cfgx_s cn52xx;
 496         struct cvmx_mio_boot_reg_cfgx_s cn52xxp1;
 497         struct cvmx_mio_boot_reg_cfgx_s cn56xx;
 498         struct cvmx_mio_boot_reg_cfgx_s cn56xxp1;
 499         struct cvmx_mio_boot_reg_cfgx_cn30xx cn58xx;
 500         struct cvmx_mio_boot_reg_cfgx_cn30xx cn58xxp1;
 501         struct cvmx_mio_boot_reg_cfgx_s cn63xx;
 502         struct cvmx_mio_boot_reg_cfgx_s cn63xxp1;
 503 };
 504
 505 union cvmx_mio_boot_reg_timx {
 506         uint64_t u64;
 507         struct cvmx_mio_boot_reg_timx_s {
 508                 uint64_t pagem:1;
 509                 uint64_t waitm:1;
 510                 uint64_t pages:2;
 511                 uint64_t ale:6;
 512                 uint64_t page:6;
 513                 uint64_t wait:6;
 514                 uint64_t pause:6;
 515                 uint64_t wr_hld:6;
 516                 uint64_t rd_hld:6;
 517                 uint64_t we:6;
 518                 uint64_t oe:6;
 519                 uint64_t ce:6;
 520                 uint64_t adr:6;
 521         } s;
 522         struct cvmx_mio_boot_reg_timx_s cn30xx;
 523         struct cvmx_mio_boot_reg_timx_s cn31xx;
 524         struct cvmx_mio_boot_reg_timx_cn38xx {
 525                 uint64_t pagem:1;
 526                 uint64_t waitm:1;
 527                 uint64_t pages:2;
 528                 uint64_t reserved_54_59:6;
 529                 uint64_t page:6;
 530                 uint64_t wait:6;
 531                 uint64_t pause:6;
 532                 uint64_t wr_hld:6;
 533                 uint64_t rd_hld:6;
 534                 uint64_t we:6;
 535                 uint64_t oe:6;
 536                 uint64_t ce:6;
 537                 uint64_t adr:6;
 538         } cn38xx;
 539         struct cvmx_mio_boot_reg_timx_cn38xx cn38xxp2;
 540         struct cvmx_mio_boot_reg_timx_s cn50xx;
 541         struct cvmx_mio_boot_reg_timx_s cn52xx;
 542         struct cvmx_mio_boot_reg_timx_s cn52xxp1;
 543         struct cvmx_mio_boot_reg_timx_s cn56xx;
 544         struct cvmx_mio_boot_reg_timx_s cn56xxp1;
 545         struct cvmx_mio_boot_reg_timx_s cn58xx;
 546         struct cvmx_mio_boot_reg_timx_s cn58xxp1;
 547         struct cvmx_mio_boot_reg_timx_s cn63xx;
 548         struct cvmx_mio_boot_reg_timx_s cn63xxp1;
 549 };
 550
 551 union cvmx_mio_boot_thr {
 552         uint64_t u64;
 553         struct cvmx_mio_boot_thr_s {
 554                 uint64_t reserved_22_63:42;
 555                 uint64_t dma_thr:6;
 556                 uint64_t reserved_14_15:2;
 557                 uint64_t fif_cnt:6;
 558                 uint64_t reserved_6_7:2;
 559                 uint64_t fif_thr:6;
 560         } s;
 561         struct cvmx_mio_boot_thr_cn30xx {
 562                 uint64_t reserved_14_63:50;
 563                 uint64_t fif_cnt:6;
 564                 uint64_t reserved_6_7:2;
 565                 uint64_t fif_thr:6;
 566         } cn30xx;
 567         struct cvmx_mio_boot_thr_cn30xx cn31xx;
 568         struct cvmx_mio_boot_thr_cn30xx cn38xx;
 569         struct cvmx_mio_boot_thr_cn30xx cn38xxp2;
 570         struct cvmx_mio_boot_thr_cn30xx cn50xx;
 571         struct cvmx_mio_boot_thr_s cn52xx;
 572         struct cvmx_mio_boot_thr_s cn52xxp1;
 573         struct cvmx_mio_boot_thr_s cn56xx;
 574         struct cvmx_mio_boot_thr_s cn56xxp1;
 575         struct cvmx_mio_boot_thr_cn30xx cn58xx;
 576         struct cvmx_mio_boot_thr_cn30xx cn58xxp1;
 577         struct cvmx_mio_boot_thr_s cn63xx;
 578         struct cvmx_mio_boot_thr_s cn63xxp1;
 579 };
 580
 581 union cvmx_mio_fus_bnk_datx {
 582         uint64_t u64;
 583         struct cvmx_mio_fus_bnk_datx_s {
 584                 uint64_t dat:64;
 585         } s;
 586         struct cvmx_mio_fus_bnk_datx_s cn50xx;
 587         struct cvmx_mio_fus_bnk_datx_s cn52xx;
 588         struct cvmx_mio_fus_bnk_datx_s cn52xxp1;
 589         struct cvmx_mio_fus_bnk_datx_s cn56xx;
 590         struct cvmx_mio_fus_bnk_datx_s cn56xxp1;
 591         struct cvmx_mio_fus_bnk_datx_s cn58xx;
 592         struct cvmx_mio_fus_bnk_datx_s cn58xxp1;
 593         struct cvmx_mio_fus_bnk_datx_s cn63xx;
 594         struct cvmx_mio_fus_bnk_datx_s cn63xxp1;
 595 };
 596
 597 union cvmx_mio_fus_dat0 {
 598         uint64_t u64;
 599         struct cvmx_mio_fus_dat0_s {
 600                 uint64_t reserved_32_63:32;
 601                 uint64_t man_info:32;
 602         } s;
 603         struct cvmx_mio_fus_dat0_s cn30xx;
 604         struct cvmx_mio_fus_dat0_s cn31xx;
 605         struct cvmx_mio_fus_dat0_s cn38xx;
 606         struct cvmx_mio_fus_dat0_s cn38xxp2;
 607         struct cvmx_mio_fus_dat0_s cn50xx;
 608         struct cvmx_mio_fus_dat0_s cn52xx;
 609         struct cvmx_mio_fus_dat0_s cn52xxp1;
 610         struct cvmx_mio_fus_dat0_s cn56xx;
 611         struct cvmx_mio_fus_dat0_s cn56xxp1;
 612         struct cvmx_mio_fus_dat0_s cn58xx;
 613         struct cvmx_mio_fus_dat0_s cn58xxp1;
 614         struct cvmx_mio_fus_dat0_s cn63xx;
 615         struct cvmx_mio_fus_dat0_s cn63xxp1;
 616 };
 617
 618 union cvmx_mio_fus_dat1 {
 619         uint64_t u64;
 620         struct cvmx_mio_fus_dat1_s {
 621                 uint64_t reserved_32_63:32;
 622                 uint64_t man_info:32;
 623         } s;
 624         struct cvmx_mio_fus_dat1_s cn30xx;
 625         struct cvmx_mio_fus_dat1_s cn31xx;
 626         struct cvmx_mio_fus_dat1_s cn38xx;
 627         struct cvmx_mio_fus_dat1_s cn38xxp2;
 628         struct cvmx_mio_fus_dat1_s cn50xx;
 629         struct cvmx_mio_fus_dat1_s cn52xx;
 630         struct cvmx_mio_fus_dat1_s cn52xxp1;
 631         struct cvmx_mio_fus_dat1_s cn56xx;
 632         struct cvmx_mio_fus_dat1_s cn56xxp1;
 633         struct cvmx_mio_fus_dat1_s cn58xx;
 634         struct cvmx_mio_fus_dat1_s cn58xxp1;
 635         struct cvmx_mio_fus_dat1_s cn63xx;
 636         struct cvmx_mio_fus_dat1_s cn63xxp1;
 637 };
 638
 639 union cvmx_mio_fus_dat2 {
 640         uint64_t u64;
 641         struct cvmx_mio_fus_dat2_s {
 642                 uint64_t reserved_35_63:29;
 643                 uint64_t dorm_crypto:1;
 644                 uint64_t fus318:1;
 645                 uint64_t raid_en:1;
 646                 uint64_t reserved_30_31:2;
 647                 uint64_t nokasu:1;
 648                 uint64_t nodfa_cp2:1;
 649                 uint64_t nomul:1;
 650                 uint64_t nocrypto:1;
 651                 uint64_t rst_sht:1;
 652                 uint64_t bist_dis:1;
 653                 uint64_t chip_id:8;
 654                 uint64_t reserved_0_15:16;
 655         } s;
 656         struct cvmx_mio_fus_dat2_cn30xx {
 657                 uint64_t reserved_29_63:35;
 658                 uint64_t nodfa_cp2:1;
 659                 uint64_t nomul:1;
 660                 uint64_t nocrypto:1;
 661                 uint64_t rst_sht:1;
 662                 uint64_t bist_dis:1;
 663                 uint64_t chip_id:8;
 664                 uint64_t pll_off:4;
 665                 uint64_t reserved_1_11:11;
 666                 uint64_t pp_dis:1;
 667         } cn30xx;
 668         struct cvmx_mio_fus_dat2_cn31xx {
 669                 uint64_t reserved_29_63:35;
 670                 uint64_t nodfa_cp2:1;
 671                 uint64_t nomul:1;
 672                 uint64_t nocrypto:1;
 673                 uint64_t rst_sht:1;
 674                 uint64_t bist_dis:1;
 675                 uint64_t chip_id:8;
 676                 uint64_t pll_off:4;
 677                 uint64_t reserved_2_11:10;
 678                 uint64_t pp_dis:2;
 679         } cn31xx;
 680         struct cvmx_mio_fus_dat2_cn38xx {
 681                 uint64_t reserved_29_63:35;
 682                 uint64_t nodfa_cp2:1;
 683                 uint64_t nomul:1;
 684                 uint64_t nocrypto:1;
 685                 uint64_t rst_sht:1;
 686                 uint64_t bist_dis:1;
 687                 uint64_t chip_id:8;
 688                 uint64_t pp_dis:16;
 689         } cn38xx;
 690         struct cvmx_mio_fus_dat2_cn38xx cn38xxp2;
 691         struct cvmx_mio_fus_dat2_cn50xx {
 692                 uint64_t reserved_34_63:30;
 693                 uint64_t fus318:1;
 694                 uint64_t raid_en:1;
 695                 uint64_t reserved_30_31:2;
 696                 uint64_t nokasu:1;
 697                 uint64_t nodfa_cp2:1;
 698                 uint64_t nomul:1;
 699                 uint64_t nocrypto:1;
 700                 uint64_t rst_sht:1;
 701                 uint64_t bist_dis:1;
 702                 uint64_t chip_id:8;
 703                 uint64_t reserved_2_15:14;
 704                 uint64_t pp_dis:2;
 705         } cn50xx;
 706         struct cvmx_mio_fus_dat2_cn52xx {
 707                 uint64_t reserved_34_63:30;
 708                 uint64_t fus318:1;
 709                 uint64_t raid_en:1;
 710                 uint64_t reserved_30_31:2;
 711                 uint64_t nokasu:1;
 712                 uint64_t nodfa_cp2:1;
 713                 uint64_t nomul:1;
 714                 uint64_t nocrypto:1;
 715                 uint64_t rst_sht:1;
 716                 uint64_t bist_dis:1;
 717                 uint64_t chip_id:8;
 718                 uint64_t reserved_4_15:12;
 719                 uint64_t pp_dis:4;
 720         } cn52xx;
 721         struct cvmx_mio_fus_dat2_cn52xx cn52xxp1;
 722         struct cvmx_mio_fus_dat2_cn56xx {
 723                 uint64_t reserved_34_63:30;
 724                 uint64_t fus318:1;
 725                 uint64_t raid_en:1;
 726                 uint64_t reserved_30_31:2;
 727                 uint64_t nokasu:1;
 728                 uint64_t nodfa_cp2:1;
 729                 uint64_t nomul:1;
 730                 uint64_t nocrypto:1;
 731                 uint64_t rst_sht:1;
 732                 uint64_t bist_dis:1;
 733                 uint64_t chip_id:8;
 734                 uint64_t reserved_12_15:4;
 735                 uint64_t pp_dis:12;
 736         } cn56xx;
 737         struct cvmx_mio_fus_dat2_cn56xx cn56xxp1;
 738         struct cvmx_mio_fus_dat2_cn58xx {
 739                 uint64_t reserved_30_63:34;
 740                 uint64_t nokasu:1;
 741                 uint64_t nodfa_cp2:1;
 742                 uint64_t nomul:1;
 743                 uint64_t nocrypto:1;
 744                 uint64_t rst_sht:1;
 745                 uint64_t bist_dis:1;
 746                 uint64_t chip_id:8;
 747                 uint64_t pp_dis:16;
 748         } cn58xx;
 749         struct cvmx_mio_fus_dat2_cn58xx cn58xxp1;
 750         struct cvmx_mio_fus_dat2_cn63xx {
 751                 uint64_t reserved_35_63:29;
 752                 uint64_t dorm_crypto:1;
 753                 uint64_t fus318:1;
 754                 uint64_t raid_en:1;
 755                 uint64_t reserved_29_31:3;
 756                 uint64_t nodfa_cp2:1;
 757                 uint64_t nomul:1;
 758                 uint64_t nocrypto:1;
 759                 uint64_t reserved_24_25:2;
 760                 uint64_t chip_id:8;
 761                 uint64_t reserved_6_15:10;
 762                 uint64_t pp_dis:6;
 763         } cn63xx;
 764         struct cvmx_mio_fus_dat2_cn63xx cn63xxp1;
 765 };
 766
 767 union cvmx_mio_fus_dat3 {
 768         uint64_t u64;
 769         struct cvmx_mio_fus_dat3_s {
 770                 uint64_t reserved_58_63:6;
 771                 uint64_t pll_ctl:10;
 772                 uint64_t dfa_info_dte:3;
 773                 uint64_t dfa_info_clm:4;
 774                 uint64_t reserved_40_40:1;
 775                 uint64_t ema:2;
 776                 uint64_t efus_lck_rsv:1;
 777                 uint64_t efus_lck_man:1;
 778                 uint64_t pll_half_dis:1;
 779                 uint64_t l2c_crip:3;
 780                 uint64_t pll_div4:1;
 781                 uint64_t reserved_29_30:2;
 782                 uint64_t bar2_en:1;
 783                 uint64_t efus_lck:1;
 784                 uint64_t efus_ign:1;
 785                 uint64_t nozip:1;
 786                 uint64_t nodfa_dte:1;
 787                 uint64_t icache:24;
 788         } s;
 789         struct cvmx_mio_fus_dat3_cn30xx {
 790                 uint64_t reserved_32_63:32;
 791                 uint64_t pll_div4:1;
 792                 uint64_t reserved_29_30:2;
 793                 uint64_t bar2_en:1;
 794                 uint64_t efus_lck:1;
 795                 uint64_t efus_ign:1;
 796                 uint64_t nozip:1;
 797                 uint64_t nodfa_dte:1;
 798                 uint64_t icache:24;
 799         } cn30xx;
 800         struct cvmx_mio_fus_dat3_cn31xx {
 801                 uint64_t reserved_32_63:32;
 802                 uint64_t pll_div4:1;
 803                 uint64_t zip_crip:2;
 804                 uint64_t bar2_en:1;
 805                 uint64_t efus_lck:1;
 806                 uint64_t efus_ign:1;
 807                 uint64_t nozip:1;
 808                 uint64_t nodfa_dte:1;
 809                 uint64_t icache:24;
 810         } cn31xx;
 811         struct cvmx_mio_fus_dat3_cn38xx {
 812                 uint64_t reserved_31_63:33;
 813                 uint64_t zip_crip:2;
 814                 uint64_t bar2_en:1;
 815                 uint64_t efus_lck:1;
 816                 uint64_t efus_ign:1;
 817                 uint64_t nozip:1;
 818                 uint64_t nodfa_dte:1;
 819                 uint64_t icache:24;
 820         } cn38xx;
 821         struct cvmx_mio_fus_dat3_cn38xxp2 {
 822                 uint64_t reserved_29_63:35;
 823                 uint64_t bar2_en:1;
 824                 uint64_t efus_lck:1;
 825                 uint64_t efus_ign:1;
 826                 uint64_t nozip:1;
 827                 uint64_t nodfa_dte:1;
 828                 uint64_t icache:24;
 829         } cn38xxp2;
 830         struct cvmx_mio_fus_dat3_cn38xx cn50xx;
 831         struct cvmx_mio_fus_dat3_cn38xx cn52xx;
 832         struct cvmx_mio_fus_dat3_cn38xx cn52xxp1;
 833         struct cvmx_mio_fus_dat3_cn38xx cn56xx;
 834         struct cvmx_mio_fus_dat3_cn38xx cn56xxp1;
 835         struct cvmx_mio_fus_dat3_cn38xx cn58xx;
 836         struct cvmx_mio_fus_dat3_cn38xx cn58xxp1;
 837         struct cvmx_mio_fus_dat3_cn63xx {
 838                 uint64_t reserved_58_63:6;
 839                 uint64_t pll_ctl:10;
 840                 uint64_t dfa_info_dte:3;
 841                 uint64_t dfa_info_clm:4;
 842                 uint64_t reserved_40_40:1;
 843                 uint64_t ema:2;
 844                 uint64_t efus_lck_rsv:1;
 845                 uint64_t efus_lck_man:1;
 846                 uint64_t pll_half_dis:1;
 847                 uint64_t l2c_crip:3;
 848                 uint64_t reserved_31_31:1;
 849                 uint64_t zip_info:2;
 850                 uint64_t bar2_en:1;
 851                 uint64_t efus_lck:1;
 852                 uint64_t efus_ign:1;
 853                 uint64_t nozip:1;
 854                 uint64_t nodfa_dte:1;
 855                 uint64_t reserved_0_23:24;
 856         } cn63xx;
 857         struct cvmx_mio_fus_dat3_cn63xx cn63xxp1;
 858 };
 859
 860 union cvmx_mio_fus_ema {
 861         uint64_t u64;
 862         struct cvmx_mio_fus_ema_s {
 863                 uint64_t reserved_7_63:57;
 864                 uint64_t eff_ema:3;
 865                 uint64_t reserved_3_3:1;
 866                 uint64_t ema:3;
 867         } s;
 868         struct cvmx_mio_fus_ema_s cn50xx;
 869         struct cvmx_mio_fus_ema_s cn52xx;
 870         struct cvmx_mio_fus_ema_s cn52xxp1;
 871         struct cvmx_mio_fus_ema_s cn56xx;
 872         struct cvmx_mio_fus_ema_s cn56xxp1;
 873         struct cvmx_mio_fus_ema_cn58xx {
 874                 uint64_t reserved_2_63:62;
 875                 uint64_t ema:2;
 876         } cn58xx;
 877         struct cvmx_mio_fus_ema_cn58xx cn58xxp1;
 878         struct cvmx_mio_fus_ema_s cn63xx;
 879         struct cvmx_mio_fus_ema_s cn63xxp1;
 880 };
 881
 882 union cvmx_mio_fus_pdf {
 883         uint64_t u64;
 884         struct cvmx_mio_fus_pdf_s {
 885                 uint64_t pdf:64;
 886         } s;
 887         struct cvmx_mio_fus_pdf_s cn50xx;
 888         struct cvmx_mio_fus_pdf_s cn52xx;
 889         struct cvmx_mio_fus_pdf_s cn52xxp1;
 890         struct cvmx_mio_fus_pdf_s cn56xx;
 891         struct cvmx_mio_fus_pdf_s cn56xxp1;
 892         struct cvmx_mio_fus_pdf_s cn58xx;
 893         struct cvmx_mio_fus_pdf_s cn63xx;
 894         struct cvmx_mio_fus_pdf_s cn63xxp1;
 895 };
 896
 897 union cvmx_mio_fus_pll {
 898         uint64_t u64;
 899         struct cvmx_mio_fus_pll_s {
 900                 uint64_t reserved_8_63:56;
 901                 uint64_t c_cout_rst:1;
 902                 uint64_t c_cout_sel:2;
 903                 uint64_t pnr_cout_rst:1;
 904                 uint64_t pnr_cout_sel:2;
 905                 uint64_t rfslip:1;
 906                 uint64_t fbslip:1;
 907         } s;
 908         struct cvmx_mio_fus_pll_cn50xx {
 909                 uint64_t reserved_2_63:62;
 910                 uint64_t rfslip:1;
 911                 uint64_t fbslip:1;
 912         } cn50xx;
 913         struct cvmx_mio_fus_pll_cn50xx cn52xx;
 914         struct cvmx_mio_fus_pll_cn50xx cn52xxp1;
 915         struct cvmx_mio_fus_pll_cn50xx cn56xx;
 916         struct cvmx_mio_fus_pll_cn50xx cn56xxp1;
 917         struct cvmx_mio_fus_pll_cn50xx cn58xx;
 918         struct cvmx_mio_fus_pll_cn50xx cn58xxp1;
 919         struct cvmx_mio_fus_pll_s cn63xx;
 920         struct cvmx_mio_fus_pll_s cn63xxp1;
 921 };
 922
 923 union cvmx_mio_fus_prog {
 924         uint64_t u64;
 925         struct cvmx_mio_fus_prog_s {
 926                 uint64_t reserved_2_63:62;
 927                 uint64_t soft:1;
 928                 uint64_t prog:1;
 929         } s;
 930         struct cvmx_mio_fus_prog_cn30xx {
 931                 uint64_t reserved_1_63:63;
 932                 uint64_t prog:1;
 933         } cn30xx;
 934         struct cvmx_mio_fus_prog_cn30xx cn31xx;
 935         struct cvmx_mio_fus_prog_cn30xx cn38xx;
 936         struct cvmx_mio_fus_prog_cn30xx cn38xxp2;
 937         struct cvmx_mio_fus_prog_cn30xx cn50xx;
 938         struct cvmx_mio_fus_prog_cn30xx cn52xx;
 939         struct cvmx_mio_fus_prog_cn30xx cn52xxp1;
 940         struct cvmx_mio_fus_prog_cn30xx cn56xx;
 941         struct cvmx_mio_fus_prog_cn30xx cn56xxp1;
 942         struct cvmx_mio_fus_prog_cn30xx cn58xx;
 943         struct cvmx_mio_fus_prog_cn30xx cn58xxp1;
 944         struct cvmx_mio_fus_prog_s cn63xx;
 945         struct cvmx_mio_fus_prog_s cn63xxp1;
 946 };
 947
 948 union cvmx_mio_fus_prog_times {
 949         uint64_t u64;
 950         struct cvmx_mio_fus_prog_times_s {
 951                 uint64_t reserved_35_63:29;
 952                 uint64_t vgate_pin:1;
 953                 uint64_t fsrc_pin:1;
 954                 uint64_t prog_pin:1;
 955                 uint64_t reserved_6_31:26;
 956                 uint64_t setup:6;
 957         } s;
 958         struct cvmx_mio_fus_prog_times_cn50xx {
 959                 uint64_t reserved_33_63:31;
 960                 uint64_t prog_pin:1;
 961                 uint64_t out:8;
 962                 uint64_t sclk_lo:4;
 963                 uint64_t sclk_hi:12;
 964                 uint64_t setup:8;
 965         } cn50xx;
 966         struct cvmx_mio_fus_prog_times_cn50xx cn52xx;
 967         struct cvmx_mio_fus_prog_times_cn50xx cn52xxp1;
 968         struct cvmx_mio_fus_prog_times_cn50xx cn56xx;
 969         struct cvmx_mio_fus_prog_times_cn50xx cn56xxp1;
 970         struct cvmx_mio_fus_prog_times_cn50xx cn58xx;
 971         struct cvmx_mio_fus_prog_times_cn50xx cn58xxp1;
 972         struct cvmx_mio_fus_prog_times_cn63xx {
 973                 uint64_t reserved_35_63:29;
 974                 uint64_t vgate_pin:1;
 975                 uint64_t fsrc_pin:1;
 976                 uint64_t prog_pin:1;
 977                 uint64_t out:7;
 978                 uint64_t sclk_lo:4;
 979                 uint64_t sclk_hi:15;
 980                 uint64_t setup:6;
 981         } cn63xx;
 982         struct cvmx_mio_fus_prog_times_cn63xx cn63xxp1;
 983 };
 984
 985 union cvmx_mio_fus_rcmd {
 986         uint64_t u64;
 987         struct cvmx_mio_fus_rcmd_s {
 988                 uint64_t reserved_24_63:40;
 989                 uint64_t dat:8;
 990                 uint64_t reserved_13_15:3;
 991                 uint64_t pend:1;
 992                 uint64_t reserved_9_11:3;
 993                 uint64_t efuse:1;
 994                 uint64_t addr:8;
 995         } s;
 996         struct cvmx_mio_fus_rcmd_cn30xx {
 997                 uint64_t reserved_24_63:40;
 998                 uint64_t dat:8;
 999                 uint64_t reserved_13_15:3;
1000                 uint64_t pend:1;
1001                 uint64_t reserved_9_11:3;
1002                 uint64_t efuse:1;
1003                 uint64_t reserved_7_7:1;
1004                 uint64_t addr:7;
1005         } cn30xx;
1006         struct cvmx_mio_fus_rcmd_cn30xx cn31xx;
1007         struct cvmx_mio_fus_rcmd_cn30xx cn38xx;
1008         struct cvmx_mio_fus_rcmd_cn30xx cn38xxp2;
1009         struct cvmx_mio_fus_rcmd_cn30xx cn50xx;
1010         struct cvmx_mio_fus_rcmd_s cn52xx;
1011         struct cvmx_mio_fus_rcmd_s cn52xxp1;
1012         struct cvmx_mio_fus_rcmd_s cn56xx;
1013         struct cvmx_mio_fus_rcmd_s cn56xxp1;
1014         struct cvmx_mio_fus_rcmd_cn30xx cn58xx;
1015         struct cvmx_mio_fus_rcmd_cn30xx cn58xxp1;
1016         struct cvmx_mio_fus_rcmd_s cn63xx;
1017         struct cvmx_mio_fus_rcmd_s cn63xxp1;
1018 };
1019
1020 union cvmx_mio_fus_read_times {
1021         uint64_t u64;
1022         struct cvmx_mio_fus_read_times_s {
1023                 uint64_t reserved_26_63:38;
1024                 uint64_t sch:4;
1025                 uint64_t fsh:4;
1026                 uint64_t prh:4;
1027                 uint64_t sdh:4;
1028                 uint64_t setup:10;
1029         } s;
1030         struct cvmx_mio_fus_read_times_s cn63xx;
1031         struct cvmx_mio_fus_read_times_s cn63xxp1;
1032 };
1033
1034 union cvmx_mio_fus_repair_res0 {
1035         uint64_t u64;
1036         struct cvmx_mio_fus_repair_res0_s {
1037                 uint64_t reserved_55_63:9;
1038                 uint64_t too_many:1;
1039                 uint64_t repair2:18;
1040                 uint64_t repair1:18;
1041                 uint64_t repair0:18;
1042         } s;
1043         struct cvmx_mio_fus_repair_res0_s cn63xx;
1044         struct cvmx_mio_fus_repair_res0_s cn63xxp1;
1045 };
1046
1047 union cvmx_mio_fus_repair_res1 {
1048         uint64_t u64;
1049         struct cvmx_mio_fus_repair_res1_s {
1050                 uint64_t reserved_54_63:10;
1051                 uint64_t repair5:18;
1052                 uint64_t repair4:18;
1053                 uint64_t repair3:18;
1054         } s;
1055         struct cvmx_mio_fus_repair_res1_s cn63xx;
1056         struct cvmx_mio_fus_repair_res1_s cn63xxp1;
1057 };
1058
1059 union cvmx_mio_fus_repair_res2 {
1060         uint64_t u64;
1061         struct cvmx_mio_fus_repair_res2_s {
1062                 uint64_t reserved_18_63:46;
1063                 uint64_t repair6:18;
1064         } s;
1065         struct cvmx_mio_fus_repair_res2_s cn63xx;
1066         struct cvmx_mio_fus_repair_res2_s cn63xxp1;
1067 };
1068
1069 union cvmx_mio_fus_spr_repair_res {
1070         uint64_t u64;
1071         struct cvmx_mio_fus_spr_repair_res_s {
1072                 uint64_t reserved_42_63:22;
1073                 uint64_t repair2:14;
1074                 uint64_t repair1:14;
1075                 uint64_t repair0:14;
1076         } s;
1077         struct cvmx_mio_fus_spr_repair_res_s cn30xx;
1078         struct cvmx_mio_fus_spr_repair_res_s cn31xx;
1079         struct cvmx_mio_fus_spr_repair_res_s cn38xx;
1080         struct cvmx_mio_fus_spr_repair_res_s cn50xx;
1081         struct cvmx_mio_fus_spr_repair_res_s cn52xx;
1082         struct cvmx_mio_fus_spr_repair_res_s cn52xxp1;
1083         struct cvmx_mio_fus_spr_repair_res_s cn56xx;
1084         struct cvmx_mio_fus_spr_repair_res_s cn56xxp1;
1085         struct cvmx_mio_fus_spr_repair_res_s cn58xx;
1086         struct cvmx_mio_fus_spr_repair_res_s cn58xxp1;
1087         struct cvmx_mio_fus_spr_repair_res_s cn63xx;
1088         struct cvmx_mio_fus_spr_repair_res_s cn63xxp1;
1089 };
1090
1091 union cvmx_mio_fus_spr_repair_sum {
1092         uint64_t u64;
1093         struct cvmx_mio_fus_spr_repair_sum_s {
1094                 uint64_t reserved_1_63:63;
1095                 uint64_t too_many:1;
1096         } s;
1097         struct cvmx_mio_fus_spr_repair_sum_s cn30xx;
1098         struct cvmx_mio_fus_spr_repair_sum_s cn31xx;
1099         struct cvmx_mio_fus_spr_repair_sum_s cn38xx;
1100         struct cvmx_mio_fus_spr_repair_sum_s cn50xx;
1101         struct cvmx_mio_fus_spr_repair_sum_s cn52xx;
1102         struct cvmx_mio_fus_spr_repair_sum_s cn52xxp1;
1103         struct cvmx_mio_fus_spr_repair_sum_s cn56xx;
1104         struct cvmx_mio_fus_spr_repair_sum_s cn56xxp1;
1105         struct cvmx_mio_fus_spr_repair_sum_s cn58xx;
1106         struct cvmx_mio_fus_spr_repair_sum_s cn58xxp1;
1107         struct cvmx_mio_fus_spr_repair_sum_s cn63xx;
1108         struct cvmx_mio_fus_spr_repair_sum_s cn63xxp1;
1109 };
1110
1111 union cvmx_mio_fus_unlock {
1112         uint64_t u64;
1113         struct cvmx_mio_fus_unlock_s {
1114                 uint64_t reserved_24_63:40;
1115                 uint64_t key:24;
1116         } s;
1117         struct cvmx_mio_fus_unlock_s cn30xx;
1118         struct cvmx_mio_fus_unlock_s cn31xx;
1119 };
1120
1121 union cvmx_mio_fus_wadr {
1122         uint64_t u64;
1123         struct cvmx_mio_fus_wadr_s {
1124                 uint64_t reserved_10_63:54;
1125                 uint64_t addr:10;
1126         } s;
1127         struct cvmx_mio_fus_wadr_s cn30xx;
1128         struct cvmx_mio_fus_wadr_s cn31xx;
1129         struct cvmx_mio_fus_wadr_s cn38xx;
1130         struct cvmx_mio_fus_wadr_s cn38xxp2;
1131         struct cvmx_mio_fus_wadr_cn50xx {
1132                 uint64_t reserved_2_63:62;
1133                 uint64_t addr:2;
1134         } cn50xx;
1135         struct cvmx_mio_fus_wadr_cn52xx {
1136                 uint64_t reserved_3_63:61;
1137                 uint64_t addr:3;
1138         } cn52xx;
1139         struct cvmx_mio_fus_wadr_cn52xx cn52xxp1;
1140         struct cvmx_mio_fus_wadr_cn52xx cn56xx;
1141         struct cvmx_mio_fus_wadr_cn52xx cn56xxp1;
1142         struct cvmx_mio_fus_wadr_cn50xx cn58xx;
1143         struct cvmx_mio_fus_wadr_cn50xx cn58xxp1;
1144         struct cvmx_mio_fus_wadr_cn63xx {
1145                 uint64_t reserved_4_63:60;
1146                 uint64_t addr:4;
1147         } cn63xx;
1148         struct cvmx_mio_fus_wadr_cn63xx cn63xxp1;
1149 };
1150
1151 union cvmx_mio_gpio_comp {
1152         uint64_t u64;
1153         struct cvmx_mio_gpio_comp_s {
1154                 uint64_t reserved_12_63:52;
1155                 uint64_t pctl:6;
1156                 uint64_t nctl:6;
1157         } s;
1158         struct cvmx_mio_gpio_comp_s cn63xx;
1159         struct cvmx_mio_gpio_comp_s cn63xxp1;
1160 };
1161
1162 union cvmx_mio_ndf_dma_cfg {
1163         uint64_t u64;
1164         struct cvmx_mio_ndf_dma_cfg_s {
1165                 uint64_t en:1;
1166                 uint64_t rw:1;
1167                 uint64_t clr:1;
1168                 uint64_t reserved_60_60:1;
1169                 uint64_t swap32:1;
1170                 uint64_t swap16:1;
1171                 uint64_t swap8:1;
1172                 uint64_t endian:1;
1173                 uint64_t size:20;
1174                 uint64_t adr:36;
1175         } s;
1176         struct cvmx_mio_ndf_dma_cfg_s cn52xx;
1177         struct cvmx_mio_ndf_dma_cfg_s cn63xx;
1178         struct cvmx_mio_ndf_dma_cfg_s cn63xxp1;
1179 };
1180
1181 union cvmx_mio_ndf_dma_int {
1182         uint64_t u64;
1183         struct cvmx_mio_ndf_dma_int_s {
1184                 uint64_t reserved_1_63:63;
1185                 uint64_t done:1;
1186         } s;
1187         struct cvmx_mio_ndf_dma_int_s cn52xx;
1188         struct cvmx_mio_ndf_dma_int_s cn63xx;
1189         struct cvmx_mio_ndf_dma_int_s cn63xxp1;
1190 };
1191
1192 union cvmx_mio_ndf_dma_int_en {
1193         uint64_t u64;
1194         struct cvmx_mio_ndf_dma_int_en_s {
1195                 uint64_t reserved_1_63:63;
1196                 uint64_t done:1;
1197         } s;
1198         struct cvmx_mio_ndf_dma_int_en_s cn52xx;
1199         struct cvmx_mio_ndf_dma_int_en_s cn63xx;
1200         struct cvmx_mio_ndf_dma_int_en_s cn63xxp1;
1201 };
1202
1203 union cvmx_mio_pll_ctl {
1204         uint64_t u64;
1205         struct cvmx_mio_pll_ctl_s {
1206                 uint64_t reserved_5_63:59;
1207                 uint64_t bw_ctl:5;
1208         } s;
1209         struct cvmx_mio_pll_ctl_s cn30xx;
1210         struct cvmx_mio_pll_ctl_s cn31xx;
1211 };
1212
1213 union cvmx_mio_pll_setting {
1214         uint64_t u64;
1215         struct cvmx_mio_pll_setting_s {
1216                 uint64_t reserved_17_63:47;
1217                 uint64_t setting:17;
1218         } s;
1219         struct cvmx_mio_pll_setting_s cn30xx;
1220         struct cvmx_mio_pll_setting_s cn31xx;
1221 };
1222
1223 union cvmx_mio_ptp_clock_cfg {
1224         uint64_t u64;
1225         struct cvmx_mio_ptp_clock_cfg_s {
1226                 uint64_t reserved_24_63:40;
1227                 uint64_t evcnt_in:6;
1228                 uint64_t evcnt_edge:1;
1229                 uint64_t evcnt_en:1;
1230                 uint64_t tstmp_in:6;
1231                 uint64_t tstmp_edge:1;
1232                 uint64_t tstmp_en:1;
1233                 uint64_t ext_clk_in:6;
1234                 uint64_t ext_clk_en:1;
1235                 uint64_t ptp_en:1;
1236         } s;
1237         struct cvmx_mio_ptp_clock_cfg_s cn63xx;
1238         struct cvmx_mio_ptp_clock_cfg_s cn63xxp1;
1239 };
1240
1241 union cvmx_mio_ptp_clock_comp {
1242         uint64_t u64;
1243         struct cvmx_mio_ptp_clock_comp_s {
1244                 uint64_t nanosec:32;
1245                 uint64_t frnanosec:32;
1246         } s;
1247         struct cvmx_mio_ptp_clock_comp_s cn63xx;
1248         struct cvmx_mio_ptp_clock_comp_s cn63xxp1;
1249 };
1250
1251 union cvmx_mio_ptp_clock_hi {
1252         uint64_t u64;
1253         struct cvmx_mio_ptp_clock_hi_s {
1254                 uint64_t nanosec:64;
1255         } s;
1256         struct cvmx_mio_ptp_clock_hi_s cn63xx;
1257         struct cvmx_mio_ptp_clock_hi_s cn63xxp1;
1258 };
1259
1260 union cvmx_mio_ptp_clock_lo {
1261         uint64_t u64;
1262         struct cvmx_mio_ptp_clock_lo_s {
1263                 uint64_t reserved_32_63:32;
1264                 uint64_t frnanosec:32;
1265         } s;
1266         struct cvmx_mio_ptp_clock_lo_s cn63xx;
1267         struct cvmx_mio_ptp_clock_lo_s cn63xxp1;
1268 };
1269
1270 union cvmx_mio_ptp_evt_cnt {
1271         uint64_t u64;
1272         struct cvmx_mio_ptp_evt_cnt_s {
1273                 uint64_t cntr:64;
1274         } s;
1275         struct cvmx_mio_ptp_evt_cnt_s cn63xx;
1276         struct cvmx_mio_ptp_evt_cnt_s cn63xxp1;
1277 };
1278
1279 union cvmx_mio_ptp_timestamp {
1280         uint64_t u64;
1281         struct cvmx_mio_ptp_timestamp_s {
1282                 uint64_t nanosec:64;
1283         } s;
1284         struct cvmx_mio_ptp_timestamp_s cn63xx;
1285         struct cvmx_mio_ptp_timestamp_s cn63xxp1;
1286 };
1287
1288 union cvmx_mio_rst_boot {
1289         uint64_t u64;
1290         struct cvmx_mio_rst_boot_s {
1291                 uint64_t reserved_36_63:28;
1292                 uint64_t c_mul:6;
1293                 uint64_t pnr_mul:6;
1294                 uint64_t qlm2_spd:4;
1295                 uint64_t qlm1_spd:4;
1296                 uint64_t qlm0_spd:4;
1297                 uint64_t lboot:10;
1298                 uint64_t rboot:1;
1299                 uint64_t rboot_pin:1;
1300         } s;
1301         struct cvmx_mio_rst_boot_s cn63xx;
1302         struct cvmx_mio_rst_boot_s cn63xxp1;
1303 };
1304
1305 union cvmx_mio_rst_cfg {
1306         uint64_t u64;
1307         struct cvmx_mio_rst_cfg_s {
1308                 uint64_t bist_delay:58;
1309                 uint64_t reserved_3_5:3;
1310                 uint64_t cntl_clr_bist:1;
1311                 uint64_t warm_clr_bist:1;
1312                 uint64_t soft_clr_bist:1;
1313         } s;
1314         struct cvmx_mio_rst_cfg_s cn63xx;
1315         struct cvmx_mio_rst_cfg_cn63xxp1 {
1316                 uint64_t bist_delay:58;
1317                 uint64_t reserved_2_5:4;
1318                 uint64_t warm_clr_bist:1;
1319                 uint64_t soft_clr_bist:1;
1320         } cn63xxp1;
1321 };
1322
1323 union cvmx_mio_rst_ctlx {
1324         uint64_t u64;
1325         struct cvmx_mio_rst_ctlx_s {
1326                 uint64_t reserved_10_63:54;
1327                 uint64_t prst_link:1;
1328                 uint64_t rst_done:1;
1329                 uint64_t rst_link:1;
1330                 uint64_t host_mode:1;
1331                 uint64_t prtmode:2;
1332                 uint64_t rst_drv:1;
1333                 uint64_t rst_rcv:1;
1334                 uint64_t rst_chip:1;
1335                 uint64_t rst_val:1;
1336         } s;
1337         struct cvmx_mio_rst_ctlx_s cn63xx;
1338         struct cvmx_mio_rst_ctlx_cn63xxp1 {
1339                 uint64_t reserved_9_63:55;
1340                 uint64_t rst_done:1;
1341                 uint64_t rst_link:1;
1342                 uint64_t host_mode:1;
1343                 uint64_t prtmode:2;
1344                 uint64_t rst_drv:1;
1345                 uint64_t rst_rcv:1;
1346                 uint64_t rst_chip:1;
1347                 uint64_t rst_val:1;
1348         } cn63xxp1;
1349 };
1350
1351 union cvmx_mio_rst_delay {
1352         uint64_t u64;
1353         struct cvmx_mio_rst_delay_s {
1354                 uint64_t reserved_32_63:32;
1355                 uint64_t soft_rst_dly:16;
1356                 uint64_t warm_rst_dly:16;
1357         } s;
1358         struct cvmx_mio_rst_delay_s cn63xx;
1359         struct cvmx_mio_rst_delay_s cn63xxp1;
1360 };
1361
1362 union cvmx_mio_rst_int {
1363         uint64_t u64;
1364         struct cvmx_mio_rst_int_s {
1365                 uint64_t reserved_10_63:54;
1366                 uint64_t perst1:1;
1367                 uint64_t perst0:1;
1368                 uint64_t reserved_2_7:6;
1369                 uint64_t rst_link1:1;
1370                 uint64_t rst_link0:1;
1371         } s;
1372         struct cvmx_mio_rst_int_s cn63xx;
1373         struct cvmx_mio_rst_int_s cn63xxp1;
1374 };
1375
1376 union cvmx_mio_rst_int_en {
1377         uint64_t u64;
1378         struct cvmx_mio_rst_int_en_s {
1379                 uint64_t reserved_10_63:54;
1380                 uint64_t perst1:1;
1381                 uint64_t perst0:1;
1382                 uint64_t reserved_2_7:6;
1383                 uint64_t rst_link1:1;
1384                 uint64_t rst_link0:1;
1385         } s;
1386         struct cvmx_mio_rst_int_en_s cn63xx;
1387         struct cvmx_mio_rst_int_en_s cn63xxp1;
1388 };
1389
1390 union cvmx_mio_twsx_int {
1391         uint64_t u64;
1392         struct cvmx_mio_twsx_int_s {
1393                 uint64_t reserved_12_63:52;
1394                 uint64_t scl:1;
1395                 uint64_t sda:1;
1396                 uint64_t scl_ovr:1;
1397                 uint64_t sda_ovr:1;
1398                 uint64_t reserved_7_7:1;
1399                 uint64_t core_en:1;
1400                 uint64_t ts_en:1;
1401                 uint64_t st_en:1;
1402                 uint64_t reserved_3_3:1;
1403                 uint64_t core_int:1;
1404                 uint64_t ts_int:1;
1405                 uint64_t st_int:1;
1406         } s;
1407         struct cvmx_mio_twsx_int_s cn30xx;
1408         struct cvmx_mio_twsx_int_s cn31xx;
1409         struct cvmx_mio_twsx_int_s cn38xx;
1410         struct cvmx_mio_twsx_int_cn38xxp2 {
1411                 uint64_t reserved_7_63:57;
1412                 uint64_t core_en:1;
1413                 uint64_t ts_en:1;
1414                 uint64_t st_en:1;
1415                 uint64_t reserved_3_3:1;
1416                 uint64_t core_int:1;
1417                 uint64_t ts_int:1;
1418                 uint64_t st_int:1;
1419         } cn38xxp2;
1420         struct cvmx_mio_twsx_int_s cn50xx;
1421         struct cvmx_mio_twsx_int_s cn52xx;
1422         struct cvmx_mio_twsx_int_s cn52xxp1;
1423         struct cvmx_mio_twsx_int_s cn56xx;
1424         struct cvmx_mio_twsx_int_s cn56xxp1;
1425         struct cvmx_mio_twsx_int_s cn58xx;
1426         struct cvmx_mio_twsx_int_s cn58xxp1;
1427         struct cvmx_mio_twsx_int_s cn63xx;
1428         struct cvmx_mio_twsx_int_s cn63xxp1;
1429 };
1430
1431 union cvmx_mio_twsx_sw_twsi {
1432         uint64_t u64;
1433         struct cvmx_mio_twsx_sw_twsi_s {
1434                 uint64_t v:1;
1435                 uint64_t slonly:1;
1436                 uint64_t eia:1;
1437                 uint64_t op:4;
1438                 uint64_t r:1;
1439                 uint64_t sovr:1;
1440                 uint64_t size:3;
1441                 uint64_t scr:2;
1442                 uint64_t a:10;
1443                 uint64_t ia:5;
1444                 uint64_t eop_ia:3;
1445                 uint64_t d:32;
1446         } s;
1447         struct cvmx_mio_twsx_sw_twsi_s cn30xx;
1448         struct cvmx_mio_twsx_sw_twsi_s cn31xx;
1449         struct cvmx_mio_twsx_sw_twsi_s cn38xx;
1450         struct cvmx_mio_twsx_sw_twsi_s cn38xxp2;
1451         struct cvmx_mio_twsx_sw_twsi_s cn50xx;
1452         struct cvmx_mio_twsx_sw_twsi_s cn52xx;
1453         struct cvmx_mio_twsx_sw_twsi_s cn52xxp1;
1454         struct cvmx_mio_twsx_sw_twsi_s cn56xx;
1455         struct cvmx_mio_twsx_sw_twsi_s cn56xxp1;
1456         struct cvmx_mio_twsx_sw_twsi_s cn58xx;
1457         struct cvmx_mio_twsx_sw_twsi_s cn58xxp1;
1458         struct cvmx_mio_twsx_sw_twsi_s cn63xx;
1459         struct cvmx_mio_twsx_sw_twsi_s cn63xxp1;
1460 };
1461
1462 union cvmx_mio_twsx_sw_twsi_ext {
1463         uint64_t u64;
1464         struct cvmx_mio_twsx_sw_twsi_ext_s {
1465                 uint64_t reserved_40_63:24;
1466                 uint64_t ia:8;
1467                 uint64_t d:32;
1468         } s;
1469         struct cvmx_mio_twsx_sw_twsi_ext_s cn30xx;
1470         struct cvmx_mio_twsx_sw_twsi_ext_s cn31xx;
1471         struct cvmx_mio_twsx_sw_twsi_ext_s cn38xx;
1472         struct cvmx_mio_twsx_sw_twsi_ext_s cn38xxp2;
1473         struct cvmx_mio_twsx_sw_twsi_ext_s cn50xx;
1474         struct cvmx_mio_twsx_sw_twsi_ext_s cn52xx;
1475         struct cvmx_mio_twsx_sw_twsi_ext_s cn52xxp1;
1476         struct cvmx_mio_twsx_sw_twsi_ext_s cn56xx;
1477         struct cvmx_mio_twsx_sw_twsi_ext_s cn56xxp1;
1478         struct cvmx_mio_twsx_sw_twsi_ext_s cn58xx;
1479         struct cvmx_mio_twsx_sw_twsi_ext_s cn58xxp1;
1480         struct cvmx_mio_twsx_sw_twsi_ext_s cn63xx;
1481         struct cvmx_mio_twsx_sw_twsi_ext_s cn63xxp1;
1482 };
1483
1484 union cvmx_mio_twsx_twsi_sw {
1485         uint64_t u64;
1486         struct cvmx_mio_twsx_twsi_sw_s {
1487                 uint64_t v:2;
1488                 uint64_t reserved_32_61:30;
1489                 uint64_t d:32;
1490         } s;
1491         struct cvmx_mio_twsx_twsi_sw_s cn30xx;
1492         struct cvmx_mio_twsx_twsi_sw_s cn31xx;
1493         struct cvmx_mio_twsx_twsi_sw_s cn38xx;
1494         struct cvmx_mio_twsx_twsi_sw_s cn38xxp2;
1495         struct cvmx_mio_twsx_twsi_sw_s cn50xx;
1496         struct cvmx_mio_twsx_twsi_sw_s cn52xx;
1497         struct cvmx_mio_twsx_twsi_sw_s cn52xxp1;
1498         struct cvmx_mio_twsx_twsi_sw_s cn56xx;
1499         struct cvmx_mio_twsx_twsi_sw_s cn56xxp1;
1500         struct cvmx_mio_twsx_twsi_sw_s cn58xx;
1501         struct cvmx_mio_twsx_twsi_sw_s cn58xxp1;
1502         struct cvmx_mio_twsx_twsi_sw_s cn63xx;
1503         struct cvmx_mio_twsx_twsi_sw_s cn63xxp1;
1504 };
1505
1506 union cvmx_mio_uartx_dlh {
1507         uint64_t u64;
1508         struct cvmx_mio_uartx_dlh_s {
1509                 uint64_t reserved_8_63:56;
1510                 uint64_t dlh:8;
1511         } s;
1512         struct cvmx_mio_uartx_dlh_s cn30xx;
1513         struct cvmx_mio_uartx_dlh_s cn31xx;
1514         struct cvmx_mio_uartx_dlh_s cn38xx;
1515         struct cvmx_mio_uartx_dlh_s cn38xxp2;
1516         struct cvmx_mio_uartx_dlh_s cn50xx;
1517         struct cvmx_mio_uartx_dlh_s cn52xx;
1518         struct cvmx_mio_uartx_dlh_s cn52xxp1;
1519         struct cvmx_mio_uartx_dlh_s cn56xx;
1520         struct cvmx_mio_uartx_dlh_s cn56xxp1;
1521         struct cvmx_mio_uartx_dlh_s cn58xx;
1522         struct cvmx_mio_uartx_dlh_s cn58xxp1;
1523         struct cvmx_mio_uartx_dlh_s cn63xx;
1524         struct cvmx_mio_uartx_dlh_s cn63xxp1;
1525 };
1526
1527 union cvmx_mio_uartx_dll {
1528         uint64_t u64;
1529         struct cvmx_mio_uartx_dll_s {
1530                 uint64_t reserved_8_63:56;
1531                 uint64_t dll:8;
1532         } s;
1533         struct cvmx_mio_uartx_dll_s cn30xx;
1534         struct cvmx_mio_uartx_dll_s cn31xx;
1535         struct cvmx_mio_uartx_dll_s cn38xx;
1536         struct cvmx_mio_uartx_dll_s cn38xxp2;
1537         struct cvmx_mio_uartx_dll_s cn50xx;
1538         struct cvmx_mio_uartx_dll_s cn52xx;
1539         struct cvmx_mio_uartx_dll_s cn52xxp1;
1540         struct cvmx_mio_uartx_dll_s cn56xx;
1541         struct cvmx_mio_uartx_dll_s cn56xxp1;
1542         struct cvmx_mio_uartx_dll_s cn58xx;
1543         struct cvmx_mio_uartx_dll_s cn58xxp1;
1544         struct cvmx_mio_uartx_dll_s cn63xx;
1545         struct cvmx_mio_uartx_dll_s cn63xxp1;
1546 };
1547
1548 union cvmx_mio_uartx_far {
1549         uint64_t u64;
1550         struct cvmx_mio_uartx_far_s {
1551                 uint64_t reserved_1_63:63;
1552                 uint64_t far:1;
1553         } s;
1554         struct cvmx_mio_uartx_far_s cn30xx;
1555         struct cvmx_mio_uartx_far_s cn31xx;
1556         struct cvmx_mio_uartx_far_s cn38xx;
1557         struct cvmx_mio_uartx_far_s cn38xxp2;
1558         struct cvmx_mio_uartx_far_s cn50xx;
1559         struct cvmx_mio_uartx_far_s cn52xx;
1560         struct cvmx_mio_uartx_far_s cn52xxp1;
1561         struct cvmx_mio_uartx_far_s cn56xx;
1562         struct cvmx_mio_uartx_far_s cn56xxp1;
1563         struct cvmx_mio_uartx_far_s cn58xx;
1564         struct cvmx_mio_uartx_far_s cn58xxp1;
1565         struct cvmx_mio_uartx_far_s cn63xx;
1566         struct cvmx_mio_uartx_far_s cn63xxp1;
1567 };
1568
1569 union cvmx_mio_uartx_fcr {
1570         uint64_t u64;
1571         struct cvmx_mio_uartx_fcr_s {
1572                 uint64_t reserved_8_63:56;
1573                 uint64_t rxtrig:2;
1574                 uint64_t txtrig:2;
1575                 uint64_t reserved_3_3:1;
1576                 uint64_t txfr:1;
1577                 uint64_t rxfr:1;
1578                 uint64_t en:1;
1579         } s;
1580         struct cvmx_mio_uartx_fcr_s cn30xx;
1581         struct cvmx_mio_uartx_fcr_s cn31xx;
1582         struct cvmx_mio_uartx_fcr_s cn38xx;
1583         struct cvmx_mio_uartx_fcr_s cn38xxp2;
1584         struct cvmx_mio_uartx_fcr_s cn50xx;
1585         struct cvmx_mio_uartx_fcr_s cn52xx;
1586         struct cvmx_mio_uartx_fcr_s cn52xxp1;
1587         struct cvmx_mio_uartx_fcr_s cn56xx;
1588         struct cvmx_mio_uartx_fcr_s cn56xxp1;
1589         struct cvmx_mio_uartx_fcr_s cn58xx;
1590         struct cvmx_mio_uartx_fcr_s cn58xxp1;
1591         struct cvmx_mio_uartx_fcr_s cn63xx;
1592         struct cvmx_mio_uartx_fcr_s cn63xxp1;
1593 };
1594
1595 union cvmx_mio_uartx_htx {
1596         uint64_t u64;
1597         struct cvmx_mio_uartx_htx_s {
1598                 uint64_t reserved_1_63:63;
1599                 uint64_t htx:1;
1600         } s;
1601         struct cvmx_mio_uartx_htx_s cn30xx;
1602         struct cvmx_mio_uartx_htx_s cn31xx;
1603         struct cvmx_mio_uartx_htx_s cn38xx;
1604         struct cvmx_mio_uartx_htx_s cn38xxp2;
1605         struct cvmx_mio_uartx_htx_s cn50xx;
1606         struct cvmx_mio_uartx_htx_s cn52xx;
1607         struct cvmx_mio_uartx_htx_s cn52xxp1;
1608         struct cvmx_mio_uartx_htx_s cn56xx;
1609         struct cvmx_mio_uartx_htx_s cn56xxp1;
1610         struct cvmx_mio_uartx_htx_s cn58xx;
1611         struct cvmx_mio_uartx_htx_s cn58xxp1;
1612         struct cvmx_mio_uartx_htx_s cn63xx;
1613         struct cvmx_mio_uartx_htx_s cn63xxp1;
1614 };
1615
1616 union cvmx_mio_uartx_ier {
1617         uint64_t u64;
1618         struct cvmx_mio_uartx_ier_s {
1619                 uint64_t reserved_8_63:56;
1620                 uint64_t ptime:1;
1621                 uint64_t reserved_4_6:3;
1622                 uint64_t edssi:1;
1623                 uint64_t elsi:1;
1624                 uint64_t etbei:1;
1625                 uint64_t erbfi:1;
1626         } s;
1627         struct cvmx_mio_uartx_ier_s cn30xx;
1628         struct cvmx_mio_uartx_ier_s cn31xx;
1629         struct cvmx_mio_uartx_ier_s cn38xx;
1630         struct cvmx_mio_uartx_ier_s cn38xxp2;
1631         struct cvmx_mio_uartx_ier_s cn50xx;
1632         struct cvmx_mio_uartx_ier_s cn52xx;
1633         struct cvmx_mio_uartx_ier_s cn52xxp1;
1634         struct cvmx_mio_uartx_ier_s cn56xx;
1635         struct cvmx_mio_uartx_ier_s cn56xxp1;
1636         struct cvmx_mio_uartx_ier_s cn58xx;
1637         struct cvmx_mio_uartx_ier_s cn58xxp1;
1638         struct cvmx_mio_uartx_ier_s cn63xx;
1639         struct cvmx_mio_uartx_ier_s cn63xxp1;
1640 };
1641
1642 union cvmx_mio_uartx_iir {
1643         uint64_t u64;
1644         struct cvmx_mio_uartx_iir_s {
1645                 uint64_t reserved_8_63:56;
1646                 uint64_t fen:2;
1647                 uint64_t reserved_4_5:2;
1648                 uint64_t iid:4;
1649         } s;
1650         struct cvmx_mio_uartx_iir_s cn30xx;
1651         struct cvmx_mio_uartx_iir_s cn31xx;
1652         struct cvmx_mio_uartx_iir_s cn38xx;
1653         struct cvmx_mio_uartx_iir_s cn38xxp2;
1654         struct cvmx_mio_uartx_iir_s cn50xx;
1655         struct cvmx_mio_uartx_iir_s cn52xx;
1656         struct cvmx_mio_uartx_iir_s cn52xxp1;
1657         struct cvmx_mio_uartx_iir_s cn56xx;
1658         struct cvmx_mio_uartx_iir_s cn56xxp1;
1659         struct cvmx_mio_uartx_iir_s cn58xx;
1660         struct cvmx_mio_uartx_iir_s cn58xxp1;
1661         struct cvmx_mio_uartx_iir_s cn63xx;
1662         struct cvmx_mio_uartx_iir_s cn63xxp1;
1663 };
1664
1665 union cvmx_mio_uartx_lcr {
1666         uint64_t u64;
1667         struct cvmx_mio_uartx_lcr_s {
1668                 uint64_t reserved_8_63:56;
1669                 uint64_t dlab:1;
1670                 uint64_t brk:1;
1671                 uint64_t reserved_5_5:1;
1672                 uint64_t eps:1;
1673                 uint64_t pen:1;
1674                 uint64_t stop:1;
1675                 uint64_t cls:2;
1676         } s;
1677         struct cvmx_mio_uartx_lcr_s cn30xx;
1678         struct cvmx_mio_uartx_lcr_s cn31xx;
1679         struct cvmx_mio_uartx_lcr_s cn38xx;
1680         struct cvmx_mio_uartx_lcr_s cn38xxp2;
1681         struct cvmx_mio_uartx_lcr_s cn50xx;
1682         struct cvmx_mio_uartx_lcr_s cn52xx;
1683         struct cvmx_mio_uartx_lcr_s cn52xxp1;
1684         struct cvmx_mio_uartx_lcr_s cn56xx;
1685         struct cvmx_mio_uartx_lcr_s cn56xxp1;
1686         struct cvmx_mio_uartx_lcr_s cn58xx;
1687         struct cvmx_mio_uartx_lcr_s cn58xxp1;
1688         struct cvmx_mio_uartx_lcr_s cn63xx;
1689         struct cvmx_mio_uartx_lcr_s cn63xxp1;
1690 };
1691
1692 union cvmx_mio_uartx_lsr {
1693         uint64_t u64;
1694         struct cvmx_mio_uartx_lsr_s {
1695                 uint64_t reserved_8_63:56;
1696                 uint64_t ferr:1;
1697                 uint64_t temt:1;
1698                 uint64_t thre:1;
1699                 uint64_t bi:1;
1700                 uint64_t fe:1;
1701                 uint64_t pe:1;
1702                 uint64_t oe:1;
1703                 uint64_t dr:1;
1704         } s;
1705         struct cvmx_mio_uartx_lsr_s cn30xx;
1706         struct cvmx_mio_uartx_lsr_s cn31xx;
1707         struct cvmx_mio_uartx_lsr_s cn38xx;
1708         struct cvmx_mio_uartx_lsr_s cn38xxp2;
1709         struct cvmx_mio_uartx_lsr_s cn50xx;
1710         struct cvmx_mio_uartx_lsr_s cn52xx;
1711         struct cvmx_mio_uartx_lsr_s cn52xxp1;
1712         struct cvmx_mio_uartx_lsr_s cn56xx;
1713         struct cvmx_mio_uartx_lsr_s cn56xxp1;
1714         struct cvmx_mio_uartx_lsr_s cn58xx;
1715         struct cvmx_mio_uartx_lsr_s cn58xxp1;
1716         struct cvmx_mio_uartx_lsr_s cn63xx;
1717         struct cvmx_mio_uartx_lsr_s cn63xxp1;
1718 };
1719
1720 union cvmx_mio_uartx_mcr {
1721         uint64_t u64;
1722         struct cvmx_mio_uartx_mcr_s {
1723                 uint64_t reserved_6_63:58;
1724                 uint64_t afce:1;
1725                 uint64_t loop:1;
1726                 uint64_t out2:1;
1727                 uint64_t out1:1;
1728                 uint64_t rts:1;
1729                 uint64_t dtr:1;
1730         } s;
1731         struct cvmx_mio_uartx_mcr_s cn30xx;
1732         struct cvmx_mio_uartx_mcr_s cn31xx;
1733         struct cvmx_mio_uartx_mcr_s cn38xx;
1734         struct cvmx_mio_uartx_mcr_s cn38xxp2;
1735         struct cvmx_mio_uartx_mcr_s cn50xx;
1736         struct cvmx_mio_uartx_mcr_s cn52xx;
1737         struct cvmx_mio_uartx_mcr_s cn52xxp1;
1738         struct cvmx_mio_uartx_mcr_s cn56xx;
1739         struct cvmx_mio_uartx_mcr_s cn56xxp1;
1740         struct cvmx_mio_uartx_mcr_s cn58xx;
1741         struct cvmx_mio_uartx_mcr_s cn58xxp1;
1742         struct cvmx_mio_uartx_mcr_s cn63xx;
1743         struct cvmx_mio_uartx_mcr_s cn63xxp1;
1744 };
1745
1746 union cvmx_mio_uartx_msr {
1747         uint64_t u64;
1748         struct cvmx_mio_uartx_msr_s {
1749                 uint64_t reserved_8_63:56;
1750                 uint64_t dcd:1;
1751                 uint64_t ri:1;
1752                 uint64_t dsr:1;
1753                 uint64_t cts:1;
1754                 uint64_t ddcd:1;
1755                 uint64_t teri:1;
1756                 uint64_t ddsr:1;
1757                 uint64_t dcts:1;
1758         } s;
1759         struct cvmx_mio_uartx_msr_s cn30xx;
1760         struct cvmx_mio_uartx_msr_s cn31xx;
1761         struct cvmx_mio_uartx_msr_s cn38xx;
1762         struct cvmx_mio_uartx_msr_s cn38xxp2;
1763         struct cvmx_mio_uartx_msr_s cn50xx;
1764         struct cvmx_mio_uartx_msr_s cn52xx;
1765         struct cvmx_mio_uartx_msr_s cn52xxp1;
1766         struct cvmx_mio_uartx_msr_s cn56xx;
1767         struct cvmx_mio_uartx_msr_s cn56xxp1;
1768         struct cvmx_mio_uartx_msr_s cn58xx;
1769         struct cvmx_mio_uartx_msr_s cn58xxp1;
1770         struct cvmx_mio_uartx_msr_s cn63xx;
1771         struct cvmx_mio_uartx_msr_s cn63xxp1;
1772 };
1773
1774 union cvmx_mio_uartx_rbr {
1775         uint64_t u64;
1776         struct cvmx_mio_uartx_rbr_s {
1777                 uint64_t reserved_8_63:56;
1778                 uint64_t rbr:8;
1779         } s;
1780         struct cvmx_mio_uartx_rbr_s cn30xx;
1781         struct cvmx_mio_uartx_rbr_s cn31xx;
1782         struct cvmx_mio_uartx_rbr_s cn38xx;
1783         struct cvmx_mio_uartx_rbr_s cn38xxp2;
1784         struct cvmx_mio_uartx_rbr_s cn50xx;
1785         struct cvmx_mio_uartx_rbr_s cn52xx;
1786         struct cvmx_mio_uartx_rbr_s cn52xxp1;
1787         struct cvmx_mio_uartx_rbr_s cn56xx;
1788         struct cvmx_mio_uartx_rbr_s cn56xxp1;
1789         struct cvmx_mio_uartx_rbr_s cn58xx;
1790         struct cvmx_mio_uartx_rbr_s cn58xxp1;
1791         struct cvmx_mio_uartx_rbr_s cn63xx;
1792         struct cvmx_mio_uartx_rbr_s cn63xxp1;
1793 };
1794
1795 union cvmx_mio_uartx_rfl {
1796         uint64_t u64;
1797         struct cvmx_mio_uartx_rfl_s {
1798                 uint64_t reserved_7_63:57;
1799                 uint64_t rfl:7;
1800         } s;
1801         struct cvmx_mio_uartx_rfl_s cn30xx;
1802         struct cvmx_mio_uartx_rfl_s cn31xx;
1803         struct cvmx_mio_uartx_rfl_s cn38xx;
1804         struct cvmx_mio_uartx_rfl_s cn38xxp2;
1805         struct cvmx_mio_uartx_rfl_s cn50xx;
1806         struct cvmx_mio_uartx_rfl_s cn52xx;
1807         struct cvmx_mio_uartx_rfl_s cn52xxp1;
1808         struct cvmx_mio_uartx_rfl_s cn56xx;
1809         struct cvmx_mio_uartx_rfl_s cn56xxp1;
1810         struct cvmx_mio_uartx_rfl_s cn58xx;
1811         struct cvmx_mio_uartx_rfl_s cn58xxp1;
1812         struct cvmx_mio_uartx_rfl_s cn63xx;
1813         struct cvmx_mio_uartx_rfl_s cn63xxp1;
1814 };
1815
1816 union cvmx_mio_uartx_rfw {
1817         uint64_t u64;
1818         struct cvmx_mio_uartx_rfw_s {
1819                 uint64_t reserved_10_63:54;
1820                 uint64_t rffe:1;
1821                 uint64_t rfpe:1;
1822                 uint64_t rfwd:8;
1823         } s;
1824         struct cvmx_mio_uartx_rfw_s cn30xx;
1825         struct cvmx_mio_uartx_rfw_s cn31xx;
1826         struct cvmx_mio_uartx_rfw_s cn38xx;
1827         struct cvmx_mio_uartx_rfw_s cn38xxp2;
1828         struct cvmx_mio_uartx_rfw_s cn50xx;
1829         struct cvmx_mio_uartx_rfw_s cn52xx;
1830         struct cvmx_mio_uartx_rfw_s cn52xxp1;
1831         struct cvmx_mio_uartx_rfw_s cn56xx;
1832         struct cvmx_mio_uartx_rfw_s cn56xxp1;
1833         struct cvmx_mio_uartx_rfw_s cn58xx;
1834         struct cvmx_mio_uartx_rfw_s cn58xxp1;
1835         struct cvmx_mio_uartx_rfw_s cn63xx;
1836         struct cvmx_mio_uartx_rfw_s cn63xxp1;
1837 };
1838
1839 union cvmx_mio_uartx_sbcr {
1840         uint64_t u64;
1841         struct cvmx_mio_uartx_sbcr_s {
1842                 uint64_t reserved_1_63:63;
1843                 uint64_t sbcr:1;
1844         } s;
1845         struct cvmx_mio_uartx_sbcr_s cn30xx;
1846         struct cvmx_mio_uartx_sbcr_s cn31xx;
1847         struct cvmx_mio_uartx_sbcr_s cn38xx;
1848         struct cvmx_mio_uartx_sbcr_s cn38xxp2;
1849         struct cvmx_mio_uartx_sbcr_s cn50xx;
1850         struct cvmx_mio_uartx_sbcr_s cn52xx;
1851         struct cvmx_mio_uartx_sbcr_s cn52xxp1;
1852         struct cvmx_mio_uartx_sbcr_s cn56xx;
1853         struct cvmx_mio_uartx_sbcr_s cn56xxp1;
1854         struct cvmx_mio_uartx_sbcr_s cn58xx;
1855         struct cvmx_mio_uartx_sbcr_s cn58xxp1;
1856         struct cvmx_mio_uartx_sbcr_s cn63xx;
1857         struct cvmx_mio_uartx_sbcr_s cn63xxp1;
1858 };
1859
1860 union cvmx_mio_uartx_scr {
1861         uint64_t u64;
1862         struct cvmx_mio_uartx_scr_s {
1863                 uint64_t reserved_8_63:56;
1864                 uint64_t scr:8;
1865         } s;
1866         struct cvmx_mio_uartx_scr_s cn30xx;
1867         struct cvmx_mio_uartx_scr_s cn31xx;
1868         struct cvmx_mio_uartx_scr_s cn38xx;
1869         struct cvmx_mio_uartx_scr_s cn38xxp2;
1870         struct cvmx_mio_uartx_scr_s cn50xx;
1871         struct cvmx_mio_uartx_scr_s cn52xx;
1872         struct cvmx_mio_uartx_scr_s cn52xxp1;
1873         struct cvmx_mio_uartx_scr_s cn56xx;
1874         struct cvmx_mio_uartx_scr_s cn56xxp1;
1875         struct cvmx_mio_uartx_scr_s cn58xx;
1876         struct cvmx_mio_uartx_scr_s cn58xxp1;
1877         struct cvmx_mio_uartx_scr_s cn63xx;
1878         struct cvmx_mio_uartx_scr_s cn63xxp1;
1879 };
1880
1881 union cvmx_mio_uartx_sfe {
1882         uint64_t u64;
1883         struct cvmx_mio_uartx_sfe_s {
1884                 uint64_t reserved_1_63:63;
1885                 uint64_t sfe:1;
1886         } s;
1887         struct cvmx_mio_uartx_sfe_s cn30xx;
1888         struct cvmx_mio_uartx_sfe_s cn31xx;
1889         struct cvmx_mio_uartx_sfe_s cn38xx;
1890         struct cvmx_mio_uartx_sfe_s cn38xxp2;
1891         struct cvmx_mio_uartx_sfe_s cn50xx;
1892         struct cvmx_mio_uartx_sfe_s cn52xx;
1893         struct cvmx_mio_uartx_sfe_s cn52xxp1;
1894         struct cvmx_mio_uartx_sfe_s cn56xx;
1895         struct cvmx_mio_uartx_sfe_s cn56xxp1;
1896         struct cvmx_mio_uartx_sfe_s cn58xx;
1897         struct cvmx_mio_uartx_sfe_s cn58xxp1;
1898         struct cvmx_mio_uartx_sfe_s cn63xx;
1899         struct cvmx_mio_uartx_sfe_s cn63xxp1;
1900 };
1901
1902 union cvmx_mio_uartx_srr {
1903         uint64_t u64;
1904         struct cvmx_mio_uartx_srr_s {
1905                 uint64_t reserved_3_63:61;
1906                 uint64_t stfr:1;
1907                 uint64_t srfr:1;
1908                 uint64_t usr:1;
1909         } s;
1910         struct cvmx_mio_uartx_srr_s cn30xx;
1911         struct cvmx_mio_uartx_srr_s cn31xx;
1912         struct cvmx_mio_uartx_srr_s cn38xx;
1913         struct cvmx_mio_uartx_srr_s cn38xxp2;
1914         struct cvmx_mio_uartx_srr_s cn50xx;
1915         struct cvmx_mio_uartx_srr_s cn52xx;
1916         struct cvmx_mio_uartx_srr_s cn52xxp1;
1917         struct cvmx_mio_uartx_srr_s cn56xx;
1918         struct cvmx_mio_uartx_srr_s cn56xxp1;
1919         struct cvmx_mio_uartx_srr_s cn58xx;
1920         struct cvmx_mio_uartx_srr_s cn58xxp1;
1921         struct cvmx_mio_uartx_srr_s cn63xx;
1922         struct cvmx_mio_uartx_srr_s cn63xxp1;
1923 };
1924
1925 union cvmx_mio_uartx_srt {
1926         uint64_t u64;
1927         struct cvmx_mio_uartx_srt_s {
1928                 uint64_t reserved_2_63:62;
1929                 uint64_t srt:2;
1930         } s;
1931         struct cvmx_mio_uartx_srt_s cn30xx;
1932         struct cvmx_mio_uartx_srt_s cn31xx;
1933         struct cvmx_mio_uartx_srt_s cn38xx;
1934         struct cvmx_mio_uartx_srt_s cn38xxp2;
1935         struct cvmx_mio_uartx_srt_s cn50xx;
1936         struct cvmx_mio_uartx_srt_s cn52xx;
1937         struct cvmx_mio_uartx_srt_s cn52xxp1;
1938         struct cvmx_mio_uartx_srt_s cn56xx;
1939         struct cvmx_mio_uartx_srt_s cn56xxp1;
1940         struct cvmx_mio_uartx_srt_s cn58xx;
1941         struct cvmx_mio_uartx_srt_s cn58xxp1;
1942         struct cvmx_mio_uartx_srt_s cn63xx;
1943         struct cvmx_mio_uartx_srt_s cn63xxp1;
1944 };
1945
1946 union cvmx_mio_uartx_srts {
1947         uint64_t u64;
1948         struct cvmx_mio_uartx_srts_s {
1949                 uint64_t reserved_1_63:63;
1950                 uint64_t srts:1;
1951         } s;
1952         struct cvmx_mio_uartx_srts_s cn30xx;
1953         struct cvmx_mio_uartx_srts_s cn31xx;
1954         struct cvmx_mio_uartx_srts_s cn38xx;
1955         struct cvmx_mio_uartx_srts_s cn38xxp2;
1956         struct cvmx_mio_uartx_srts_s cn50xx;
1957         struct cvmx_mio_uartx_srts_s cn52xx;
1958         struct cvmx_mio_uartx_srts_s cn52xxp1;
1959         struct cvmx_mio_uartx_srts_s cn56xx;
1960         struct cvmx_mio_uartx_srts_s cn56xxp1;
1961         struct cvmx_mio_uartx_srts_s cn58xx;
1962         struct cvmx_mio_uartx_srts_s cn58xxp1;
1963         struct cvmx_mio_uartx_srts_s cn63xx;
1964         struct cvmx_mio_uartx_srts_s cn63xxp1;
1965 };
1966
1967 union cvmx_mio_uartx_stt {
1968         uint64_t u64;
1969         struct cvmx_mio_uartx_stt_s {
1970                 uint64_t reserved_2_63:62;
1971                 uint64_t stt:2;
1972         } s;
1973         struct cvmx_mio_uartx_stt_s cn30xx;
1974         struct cvmx_mio_uartx_stt_s cn31xx;
1975         struct cvmx_mio_uartx_stt_s cn38xx;
1976         struct cvmx_mio_uartx_stt_s cn38xxp2;
1977         struct cvmx_mio_uartx_stt_s cn50xx;
1978         struct cvmx_mio_uartx_stt_s cn52xx;
1979         struct cvmx_mio_uartx_stt_s cn52xxp1;
1980         struct cvmx_mio_uartx_stt_s cn56xx;
1981         struct cvmx_mio_uartx_stt_s cn56xxp1;
1982         struct cvmx_mio_uartx_stt_s cn58xx;
1983         struct cvmx_mio_uartx_stt_s cn58xxp1;
1984         struct cvmx_mio_uartx_stt_s cn63xx;
1985         struct cvmx_mio_uartx_stt_s cn63xxp1;
1986 };
1987
1988 union cvmx_mio_uartx_tfl {
1989         uint64_t u64;
1990         struct cvmx_mio_uartx_tfl_s {
1991                 uint64_t reserved_7_63:57;
1992                 uint64_t tfl:7;
1993         } s;
1994         struct cvmx_mio_uartx_tfl_s cn30xx;
1995         struct cvmx_mio_uartx_tfl_s cn31xx;
1996         struct cvmx_mio_uartx_tfl_s cn38xx;
1997         struct cvmx_mio_uartx_tfl_s cn38xxp2;
1998         struct cvmx_mio_uartx_tfl_s cn50xx;
1999         struct cvmx_mio_uartx_tfl_s cn52xx;
2000         struct cvmx_mio_uartx_tfl_s cn52xxp1;
2001         struct cvmx_mio_uartx_tfl_s cn56xx;
2002         struct cvmx_mio_uartx_tfl_s cn56xxp1;
2003         struct cvmx_mio_uartx_tfl_s cn58xx;
2004         struct cvmx_mio_uartx_tfl_s cn58xxp1;
2005         struct cvmx_mio_uartx_tfl_s cn63xx;
2006         struct cvmx_mio_uartx_tfl_s cn63xxp1;
2007 };
2008
2009 union cvmx_mio_uartx_tfr {
2010         uint64_t u64;
2011         struct cvmx_mio_uartx_tfr_s {
2012                 uint64_t reserved_8_63:56;
2013                 uint64_t tfr:8;
2014         } s;
2015         struct cvmx_mio_uartx_tfr_s cn30xx;
2016         struct cvmx_mio_uartx_tfr_s cn31xx;
2017         struct cvmx_mio_uartx_tfr_s cn38xx;
2018         struct cvmx_mio_uartx_tfr_s cn38xxp2;
2019         struct cvmx_mio_uartx_tfr_s cn50xx;
2020         struct cvmx_mio_uartx_tfr_s cn52xx;
2021         struct cvmx_mio_uartx_tfr_s cn52xxp1;
2022         struct cvmx_mio_uartx_tfr_s cn56xx;
2023         struct cvmx_mio_uartx_tfr_s cn56xxp1;
2024         struct cvmx_mio_uartx_tfr_s cn58xx;
2025         struct cvmx_mio_uartx_tfr_s cn58xxp1;
2026         struct cvmx_mio_uartx_tfr_s cn63xx;
2027         struct cvmx_mio_uartx_tfr_s cn63xxp1;
2028 };
2029
2030 union cvmx_mio_uartx_thr {
2031         uint64_t u64;
2032         struct cvmx_mio_uartx_thr_s {
2033                 uint64_t reserved_8_63:56;
2034                 uint64_t thr:8;
2035         } s;
2036         struct cvmx_mio_uartx_thr_s cn30xx;
2037         struct cvmx_mio_uartx_thr_s cn31xx;
2038         struct cvmx_mio_uartx_thr_s cn38xx;
2039         struct cvmx_mio_uartx_thr_s cn38xxp2;
2040         struct cvmx_mio_uartx_thr_s cn50xx;
2041         struct cvmx_mio_uartx_thr_s cn52xx;
2042         struct cvmx_mio_uartx_thr_s cn52xxp1;
2043         struct cvmx_mio_uartx_thr_s cn56xx;
2044         struct cvmx_mio_uartx_thr_s cn56xxp1;
2045         struct cvmx_mio_uartx_thr_s cn58xx;
2046         struct cvmx_mio_uartx_thr_s cn58xxp1;
2047         struct cvmx_mio_uartx_thr_s cn63xx;
2048         struct cvmx_mio_uartx_thr_s cn63xxp1;
2049 };
2050
2051 union cvmx_mio_uartx_usr {
2052         uint64_t u64;
2053         struct cvmx_mio_uartx_usr_s {
2054                 uint64_t reserved_5_63:59;
2055                 uint64_t rff:1;
2056                 uint64_t rfne:1;
2057                 uint64_t tfe:1;
2058                 uint64_t tfnf:1;
2059                 uint64_t busy:1;
2060         } s;
2061         struct cvmx_mio_uartx_usr_s cn30xx;
2062         struct cvmx_mio_uartx_usr_s cn31xx;
2063         struct cvmx_mio_uartx_usr_s cn38xx;
2064         struct cvmx_mio_uartx_usr_s cn38xxp2;
2065         struct cvmx_mio_uartx_usr_s cn50xx;
2066         struct cvmx_mio_uartx_usr_s cn52xx;
2067         struct cvmx_mio_uartx_usr_s cn52xxp1;
2068         struct cvmx_mio_uartx_usr_s cn56xx;
2069         struct cvmx_mio_uartx_usr_s cn56xxp1;
2070         struct cvmx_mio_uartx_usr_s cn58xx;
2071         struct cvmx_mio_uartx_usr_s cn58xxp1;
2072         struct cvmx_mio_uartx_usr_s cn63xx;
2073         struct cvmx_mio_uartx_usr_s cn63xxp1;
2074 };
2075
2076 union cvmx_mio_uart2_dlh {
2077         uint64_t u64;
2078         struct cvmx_mio_uart2_dlh_s {
2079                 uint64_t reserved_8_63:56;
2080                 uint64_t dlh:8;
2081         } s;
2082         struct cvmx_mio_uart2_dlh_s cn52xx;
2083         struct cvmx_mio_uart2_dlh_s cn52xxp1;
2084 };
2085
2086 union cvmx_mio_uart2_dll {
2087         uint64_t u64;
2088         struct cvmx_mio_uart2_dll_s {
2089                 uint64_t reserved_8_63:56;
2090                 uint64_t dll:8;
2091         } s;
2092         struct cvmx_mio_uart2_dll_s cn52xx;
2093         struct cvmx_mio_uart2_dll_s cn52xxp1;
2094 };
2095
2096 union cvmx_mio_uart2_far {
2097         uint64_t u64;
2098         struct cvmx_mio_uart2_far_s {
2099                 uint64_t reserved_1_63:63;
2100                 uint64_t far:1;
2101         } s;
2102         struct cvmx_mio_uart2_far_s cn52xx;
2103         struct cvmx_mio_uart2_far_s cn52xxp1;
2104 };
2105
2106 union cvmx_mio_uart2_fcr {
2107         uint64_t u64;
2108         struct cvmx_mio_uart2_fcr_s {
2109                 uint64_t reserved_8_63:56;
2110                 uint64_t rxtrig:2;
2111                 uint64_t txtrig:2;
2112                 uint64_t reserved_3_3:1;
2113                 uint64_t txfr:1;
2114                 uint64_t rxfr:1;
2115                 uint64_t en:1;
2116         } s;
2117         struct cvmx_mio_uart2_fcr_s cn52xx;
2118         struct cvmx_mio_uart2_fcr_s cn52xxp1;
2119 };
2120
2121 union cvmx_mio_uart2_htx {
2122         uint64_t u64;
2123         struct cvmx_mio_uart2_htx_s {
2124                 uint64_t reserved_1_63:63;
2125                 uint64_t htx:1;
2126         } s;
2127         struct cvmx_mio_uart2_htx_s cn52xx;
2128         struct cvmx_mio_uart2_htx_s cn52xxp1;
2129 };
2130
2131 union cvmx_mio_uart2_ier {
2132         uint64_t u64;
2133         struct cvmx_mio_uart2_ier_s {
2134                 uint64_t reserved_8_63:56;
2135                 uint64_t ptime:1;
2136                 uint64_t reserved_4_6:3;
2137                 uint64_t edssi:1;
2138                 uint64_t elsi:1;
2139                 uint64_t etbei:1;
2140                 uint64_t erbfi:1;
2141         } s;
2142         struct cvmx_mio_uart2_ier_s cn52xx;
2143         struct cvmx_mio_uart2_ier_s cn52xxp1;
2144 };
2145
2146 union cvmx_mio_uart2_iir {
2147         uint64_t u64;
2148         struct cvmx_mio_uart2_iir_s {
2149                 uint64_t reserved_8_63:56;
2150                 uint64_t fen:2;
2151                 uint64_t reserved_4_5:2;
2152                 uint64_t iid:4;
2153         } s;
2154         struct cvmx_mio_uart2_iir_s cn52xx;
2155         struct cvmx_mio_uart2_iir_s cn52xxp1;
2156 };
2157
2158 union cvmx_mio_uart2_lcr {
2159         uint64_t u64;
2160         struct cvmx_mio_uart2_lcr_s {
2161                 uint64_t reserved_8_63:56;
2162                 uint64_t dlab:1;
2163                 uint64_t brk:1;
2164                 uint64_t reserved_5_5:1;
2165                 uint64_t eps:1;
2166                 uint64_t pen:1;
2167                 uint64_t stop:1;
2168                 uint64_t cls:2;
2169         } s;
2170         struct cvmx_mio_uart2_lcr_s cn52xx;
2171         struct cvmx_mio_uart2_lcr_s cn52xxp1;
2172 };
2173
2174 union cvmx_mio_uart2_lsr {
2175         uint64_t u64;
2176         struct cvmx_mio_uart2_lsr_s {
2177                 uint64_t reserved_8_63:56;
2178                 uint64_t ferr:1;
2179                 uint64_t temt:1;
2180                 uint64_t thre:1;
2181                 uint64_t bi:1;
2182                 uint64_t fe:1;
2183                 uint64_t pe:1;
2184                 uint64_t oe:1;
2185                 uint64_t dr:1;
2186         } s;
2187         struct cvmx_mio_uart2_lsr_s cn52xx;
2188         struct cvmx_mio_uart2_lsr_s cn52xxp1;
2189 };
2190
2191 union cvmx_mio_uart2_mcr {
2192         uint64_t u64;
2193         struct cvmx_mio_uart2_mcr_s {
2194                 uint64_t reserved_6_63:58;
2195                 uint64_t afce:1;
2196                 uint64_t loop:1;
2197                 uint64_t out2:1;
2198                 uint64_t out1:1;
2199                 uint64_t rts:1;
2200                 uint64_t dtr:1;
2201         } s;
2202         struct cvmx_mio_uart2_mcr_s cn52xx;
2203         struct cvmx_mio_uart2_mcr_s cn52xxp1;
2204 };
2205
2206 union cvmx_mio_uart2_msr {
2207         uint64_t u64;
2208         struct cvmx_mio_uart2_msr_s {
2209                 uint64_t reserved_8_63:56;
2210                 uint64_t dcd:1;
2211                 uint64_t ri:1;
2212                 uint64_t dsr:1;
2213                 uint64_t cts:1;
2214                 uint64_t ddcd:1;
2215                 uint64_t teri:1;
2216                 uint64_t ddsr:1;
2217                 uint64_t dcts:1;
2218         } s;
2219         struct cvmx_mio_uart2_msr_s cn52xx;
2220         struct cvmx_mio_uart2_msr_s cn52xxp1;
2221 };
2222
2223 union cvmx_mio_uart2_rbr {
2224         uint64_t u64;
2225         struct cvmx_mio_uart2_rbr_s {
2226                 uint64_t reserved_8_63:56;
2227                 uint64_t rbr:8;
2228         } s;
2229         struct cvmx_mio_uart2_rbr_s cn52xx;
2230         struct cvmx_mio_uart2_rbr_s cn52xxp1;
2231 };
2232
2233 union cvmx_mio_uart2_rfl {
2234         uint64_t u64;
2235         struct cvmx_mio_uart2_rfl_s {
2236                 uint64_t reserved_7_63:57;
2237                 uint64_t rfl:7;
2238         } s;
2239         struct cvmx_mio_uart2_rfl_s cn52xx;
2240         struct cvmx_mio_uart2_rfl_s cn52xxp1;
2241 };
2242
2243 union cvmx_mio_uart2_rfw {
2244         uint64_t u64;
2245         struct cvmx_mio_uart2_rfw_s {
2246                 uint64_t reserved_10_63:54;
2247                 uint64_t rffe:1;
2248                 uint64_t rfpe:1;
2249                 uint64_t rfwd:8;
2250         } s;
2251         struct cvmx_mio_uart2_rfw_s cn52xx;
2252         struct cvmx_mio_uart2_rfw_s cn52xxp1;
2253 };
2254
2255 union cvmx_mio_uart2_sbcr {
2256         uint64_t u64;
2257         struct cvmx_mio_uart2_sbcr_s {
2258                 uint64_t reserved_1_63:63;
2259                 uint64_t sbcr:1;
2260         } s;
2261         struct cvmx_mio_uart2_sbcr_s cn52xx;
2262         struct cvmx_mio_uart2_sbcr_s cn52xxp1;
2263 };
2264
2265 union cvmx_mio_uart2_scr {
2266         uint64_t u64;
2267         struct cvmx_mio_uart2_scr_s {
2268                 uint64_t reserved_8_63:56;
2269                 uint64_t scr:8;
2270         } s;
2271         struct cvmx_mio_uart2_scr_s cn52xx;
2272         struct cvmx_mio_uart2_scr_s cn52xxp1;
2273 };
2274
2275 union cvmx_mio_uart2_sfe {
2276         uint64_t u64;
2277         struct cvmx_mio_uart2_sfe_s {
2278                 uint64_t reserved_1_63:63;
2279                 uint64_t sfe:1;
2280         } s;
2281         struct cvmx_mio_uart2_sfe_s cn52xx;
2282         struct cvmx_mio_uart2_sfe_s cn52xxp1;
2283 };
2284
2285 union cvmx_mio_uart2_srr {
2286         uint64_t u64;
2287         struct cvmx_mio_uart2_srr_s {
2288                 uint64_t reserved_3_63:61;
2289                 uint64_t stfr:1;
2290                 uint64_t srfr:1;
2291                 uint64_t usr:1;
2292         } s;
2293         struct cvmx_mio_uart2_srr_s cn52xx;
2294         struct cvmx_mio_uart2_srr_s cn52xxp1;
2295 };
2296
2297 union cvmx_mio_uart2_srt {
2298         uint64_t u64;
2299         struct cvmx_mio_uart2_srt_s {
2300                 uint64_t reserved_2_63:62;
2301                 uint64_t srt:2;
2302         } s;
2303         struct cvmx_mio_uart2_srt_s cn52xx;
2304         struct cvmx_mio_uart2_srt_s cn52xxp1;
2305 };
2306
2307 union cvmx_mio_uart2_srts {
2308         uint64_t u64;
2309         struct cvmx_mio_uart2_srts_s {
2310                 uint64_t reserved_1_63:63;
2311                 uint64_t srts:1;
2312         } s;
2313         struct cvmx_mio_uart2_srts_s cn52xx;
2314         struct cvmx_mio_uart2_srts_s cn52xxp1;
2315 };
2316
2317 union cvmx_mio_uart2_stt {
2318         uint64_t u64;
2319         struct cvmx_mio_uart2_stt_s {
2320                 uint64_t reserved_2_63:62;
2321                 uint64_t stt:2;
2322         } s;
2323         struct cvmx_mio_uart2_stt_s cn52xx;
2324         struct cvmx_mio_uart2_stt_s cn52xxp1;
2325 };
2326
2327 union cvmx_mio_uart2_tfl {
2328         uint64_t u64;
2329         struct cvmx_mio_uart2_tfl_s {
2330                 uint64_t reserved_7_63:57;
2331                 uint64_t tfl:7;
2332         } s;
2333         struct cvmx_mio_uart2_tfl_s cn52xx;
2334         struct cvmx_mio_uart2_tfl_s cn52xxp1;
2335 };
2336
2337 union cvmx_mio_uart2_tfr {
2338         uint64_t u64;
2339         struct cvmx_mio_uart2_tfr_s {
2340                 uint64_t reserved_8_63:56;
2341                 uint64_t tfr:8;
2342         } s;
2343         struct cvmx_mio_uart2_tfr_s cn52xx;
2344         struct cvmx_mio_uart2_tfr_s cn52xxp1;
2345 };
2346
2347 union cvmx_mio_uart2_thr {
2348         uint64_t u64;
2349         struct cvmx_mio_uart2_thr_s {
2350                 uint64_t reserved_8_63:56;
2351                 uint64_t thr:8;
2352         } s;
2353         struct cvmx_mio_uart2_thr_s cn52xx;
2354         struct cvmx_mio_uart2_thr_s cn52xxp1;
2355 };
2356
2357 union cvmx_mio_uart2_usr {
2358         uint64_t u64;
2359         struct cvmx_mio_uart2_usr_s {
2360                 uint64_t reserved_5_63:59;
2361                 uint64_t rff:1;
2362                 uint64_t rfne:1;
2363                 uint64_t tfe:1;
2364                 uint64_t tfnf:1;
2365                 uint64_t busy:1;
2366         } s;
2367         struct cvmx_mio_uart2_usr_s cn52xx;
2368         struct cvmx_mio_uart2_usr_s cn52xxp1;
2369 };
2370
2371 #endif