arch/powerpc/kernel/pci_of_scan.c

   1 /*
   2  * Helper routines to scan the device tree for PCI devices and busses
   3  *
   4  * Migrated out of PowerPC architecture pci_64.c file by Grant Likely
   5  * <grant.likely@secretlab.ca> so that these routines are available for
   6  * 32 bit also.
   7  *
   8  * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
   9  *   Rework, based on alpha PCI code.
  10  * Copyright (c) 2009 Secret Lab Technologies Ltd.
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * version 2 as published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/pci.h>
  18 #include <linux/export.h>
  19 #include <asm/pci-bridge.h>
  20 #include <asm/prom.h>
  21
  22 /**
  23  * get_int_prop - Decode a u32 from a device tree property
  24  */
  25 static u32 get_int_prop(struct device_node *np, const char *name, u32 def)
  26 {
  27         const u32 *prop;
  28         int len;
  29
  30         prop = of_get_property(np, name, &len);
  31         if (prop && len >= 4)
  32                 return *prop;
  33         return def;
  34 }
  35
  36 /**
  37  * pci_parse_of_flags - Parse the flags cell of a device tree PCI address
  38  * @addr0: value of 1st cell of a device tree PCI address.
  39  * @bridge: Set this flag if the address is from a bridge 'ranges' property
  40  */
  41 unsigned int pci_parse_of_flags(u32 addr0, int bridge)
  42 {
  43         unsigned int flags = 0;
  44
  45         if (addr0 & 0x02000000) {
  46                 flags = IORESOURCE_MEM | PCI_BASE_ADDRESS_SPACE_MEMORY;
  47                 flags |= (addr0 >> 22) & PCI_BASE_ADDRESS_MEM_TYPE_64;
  48                 flags |= (addr0 >> 28) & PCI_BASE_ADDRESS_MEM_TYPE_1M;
  49                 if (addr0 & 0x40000000)
  50                         flags |= IORESOURCE_PREFETCH
  51                                  | PCI_BASE_ADDRESS_MEM_PREFETCH;
  52                 /* Note: We don't know whether the ROM has been left enabled
  53                  * by the firmware or not. We mark it as disabled (ie, we do
  54                  * not set the IORESOURCE_ROM_ENABLE flag) for now rather than
  55                  * do a config space read, it will be force-enabled if needed
  56                  */
  57                 if (!bridge && (addr0 & 0xff) == 0x30)
  58                         flags |= IORESOURCE_READONLY;
  59         } else if (addr0 & 0x01000000)
  60                 flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
  61         if (flags)
  62                 flags |= IORESOURCE_SIZEALIGN;
  63         return flags;
  64 }
  65
  66 /**
  67  * of_pci_parse_addrs - Parse PCI addresses assigned in the device tree node
  68  * @node: device tree node for the PCI device
  69  * @dev: pci_dev structure for the device
  70  *
  71  * This function parses the 'assigned-addresses' property of a PCI devices'
  72  * device tree node and writes them into the associated pci_dev structure.
  73  */
  74 static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
  75 {
  76         u64 base, size;
  77         unsigned int flags;
  78         struct resource *res;
  79         const u32 *addrs;
  80         u32 i;
  81         int proplen;
  82
  83         addrs = of_get_property(node, "assigned-addresses", &proplen);
  84         if (!addrs)
  85                 return;
  86         pr_debug("    parse addresses (%d bytes) @ %p\n", proplen, addrs);
  87         for (; proplen >= 20; proplen -= 20, addrs += 5) {
  88                 flags = pci_parse_of_flags(addrs[0], 0);
  89                 if (!flags)
  90                         continue;
  91                 base = of_read_number(&addrs[1], 2);
  92                 size = of_read_number(&addrs[3], 2);
  93                 if (!size)
  94                         continue;
  95                 i = addrs[0] & 0xff;
  96                 pr_debug("  base: %llx, size: %llx, i: %x\n",
  97                          (unsigned long long)base,
  98                          (unsigned long long)size, i);
  99
 100                 if (PCI_BASE_ADDRESS_0 <= i && i <= PCI_BASE_ADDRESS_5) {
 101                         res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
 102                 } else if (i == dev->rom_base_reg) {
 103                         res = &dev->resource[PCI_ROM_RESOURCE];
 104                         flags |= IORESOURCE_READONLY | IORESOURCE_CACHEABLE;
 105                 } else {
 106                         printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
 107                         continue;
 108                 }
 109                 res->start = base;
 110                 res->end = base + size - 1;
 111                 res->flags = flags;
 112                 res->name = pci_name(dev);
 113         }
 114 }
 115
 116 /**
 117  * of_create_pci_dev - Given a device tree node on a pci bus, create a pci_dev
 118  * @node: device tree node pointer
 119  * @bus: bus the device is sitting on
 120  * @devfn: PCI function number, extracted from device tree by caller.
 121  */
 122 struct pci_dev *of_create_pci_dev(struct device_node *node,
 123                                  struct pci_bus *bus, int devfn)
 124 {
 125         struct pci_dev *dev;
 126         const char *type;
 127         struct pci_slot *slot;
 128
 129         dev = alloc_pci_dev();
 130         if (!dev)
 131                 return NULL;
 132         type = of_get_property(node, "device_type", NULL);
 133         if (type == NULL)
 134                 type = "";
 135
 136         pr_debug("    create device, devfn: %x, type: %s\n", devfn, type);
 137
 138         dev->bus = bus;
 139         dev->dev.of_node = of_node_get(node);
 140         dev->dev.parent = bus->bridge;
 141         dev->dev.bus = &pci_bus_type;
 142         dev->devfn = devfn;
 143         dev->multifunction = 0;         /* maybe a lie? */
 144         dev->needs_freset = 0;          /* pcie fundamental reset required */
 145         set_pcie_port_type(dev);
 146
 147         list_for_each_entry(slot, &dev->bus->slots, list)
 148                 if (PCI_SLOT(dev->devfn) == slot->number)
 149                         dev->slot = slot;
 150
 151         dev->vendor = get_int_prop(node, "vendor-id", 0xffff);
 152         dev->device = get_int_prop(node, "device-id", 0xffff);
 153         dev->subsystem_vendor = get_int_prop(node, "subsystem-vendor-id", 0);
 154         dev->subsystem_device = get_int_prop(node, "subsystem-id", 0);
 155
 156         dev->cfg_size = pci_cfg_space_size(dev);
 157
 158         dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(bus),
 159                 dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
 160         dev->class = get_int_prop(node, "class-code", 0);
 161         dev->revision = get_int_prop(node, "revision-id", 0);
 162
 163         pr_debug("    class: 0x%x\n", dev->class);
 164         pr_debug("    revision: 0x%x\n", dev->revision);
 165
 166         dev->current_state = 4;         /* unknown power state */
 167         dev->error_state = pci_channel_io_normal;
 168         dev->dma_mask = 0xffffffff;
 169
 170         /* Early fixups, before probing the BARs */
 171         pci_fixup_device(pci_fixup_early, dev);
 172
 173         if (!strcmp(type, "pci") || !strcmp(type, "pciex")) {
 174                 /* a PCI-PCI bridge */
 175                 dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;
 176                 dev->rom_base_reg = PCI_ROM_ADDRESS1;
 177                 set_pcie_hotplug_bridge(dev);
 178         } else if (!strcmp(type, "cardbus")) {
 179                 dev->hdr_type = PCI_HEADER_TYPE_CARDBUS;
 180         } else {
 181                 dev->hdr_type = PCI_HEADER_TYPE_NORMAL;
 182                 dev->rom_base_reg = PCI_ROM_ADDRESS;
 183                 /* Maybe do a default OF mapping here */
 184                 dev->irq = NO_IRQ;
 185         }
 186
 187         of_pci_parse_addrs(node, dev);
 188
 189         pr_debug("    adding to system ...\n");
 190
 191         pci_device_add(dev, bus);
 192
 193         return dev;
 194 }
 195 EXPORT_SYMBOL(of_create_pci_dev);
 196
 197 /**
 198  * of_scan_pci_bridge - Set up a PCI bridge and scan for child nodes
 199  * @node: device tree node of bridge
 200  * @dev: pci_dev structure for the bridge
 201  *
 202  * of_scan_bus() calls this routine for each PCI bridge that it finds, and
 203  * this routine in turn call of_scan_bus() recusively to scan for more child
 204  * devices.
 205  */
 206 void __devinit of_scan_pci_bridge(struct pci_dev *dev)
 207 {
 208         struct device_node *node = dev->dev.of_node;
 209         struct pci_bus *bus;
 210         const u32 *busrange, *ranges;
 211         int len, i, mode;
 212         struct resource *res;
 213         unsigned int flags;
 214         u64 size;
 215
 216         pr_debug("of_scan_pci_bridge(%s)\n", node->full_name);
 217
 218         /* parse bus-range property */
 219         busrange = of_get_property(node, "bus-range", &len);
 220         if (busrange == NULL || len != 8) {
 221                 printk(KERN_DEBUG "Can't get bus-range for PCI-PCI bridge %s\n",
 222                        node->full_name);
 223                 return;
 224         }
 225         ranges = of_get_property(node, "ranges", &len);
 226         if (ranges == NULL) {
 227                 printk(KERN_DEBUG "Can't get ranges for PCI-PCI bridge %s\n",
 228                        node->full_name);
 229                 return;
 230         }
 231
 232         bus = pci_add_new_bus(dev->bus, dev, busrange[0]);
 233         if (!bus) {
 234                 printk(KERN_ERR "Failed to create pci bus for %s\n",
 235                        node->full_name);
 236                 return;
 237         }
 238
 239         bus->primary = dev->bus->number;
 240         bus->subordinate = busrange[1];
 241         bus->bridge_ctl = 0;
 242
 243         /* parse ranges property */
 244         /* PCI #address-cells == 3 and #size-cells == 2 always */
 245         res = &dev->resource[PCI_BRIDGE_RESOURCES];
 246         for (i = 0; i < PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES; ++i) {
 247                 res->flags = 0;
 248                 bus->resource[i] = res;
 249                 ++res;
 250         }
 251         i = 1;
 252         for (; len >= 32; len -= 32, ranges += 8) {
 253                 flags = pci_parse_of_flags(ranges[0], 1);
 254                 size = of_read_number(&ranges[6], 2);
 255                 if (flags == 0 || size == 0)
 256                         continue;
 257                 if (flags & IORESOURCE_IO) {
 258                         res = bus->resource[0];
 259                         if (res->flags) {
 260                                 printk(KERN_ERR "PCI: ignoring extra I/O range"
 261                                        " for bridge %s\n", node->full_name);
 262                                 continue;
 263                         }
 264                 } else {
 265                         if (i >= PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES) {
 266                                 printk(KERN_ERR "PCI: too many memory ranges"
 267                                        " for bridge %s\n", node->full_name);
 268                                 continue;
 269                         }
 270                         res = bus->resource[i];
 271                         ++i;
 272                 }
 273                 res->start = of_read_number(&ranges[1], 2);
 274                 res->end = res->start + size - 1;
 275                 res->flags = flags;
 276         }
 277         sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
 278                 bus->number);
 279         pr_debug("    bus name: %s\n", bus->name);
 280
 281         mode = PCI_PROBE_NORMAL;
 282         if (ppc_md.pci_probe_mode)
 283                 mode = ppc_md.pci_probe_mode(bus);
 284         pr_debug("    probe mode: %d\n", mode);
 285
 286         if (mode == PCI_PROBE_DEVTREE)
 287                 of_scan_bus(node, bus);
 288         else if (mode == PCI_PROBE_NORMAL)
 289                 pci_scan_child_bus(bus);
 290 }
 291 EXPORT_SYMBOL(of_scan_pci_bridge);
 292
 293 /**
 294  * __of_scan_bus - given a PCI bus node, setup bus and scan for child devices
 295  * @node: device tree node for the PCI bus
 296  * @bus: pci_bus structure for the PCI bus
 297  * @rescan_existing: Flag indicating bus has already been set up
 298  */
 299 static void __devinit __of_scan_bus(struct device_node *node,
 300                                     struct pci_bus *bus, int rescan_existing)
 301 {
 302         struct device_node *child;
 303         const u32 *reg;
 304         int reglen, devfn;
 305         struct pci_dev *dev;
 306
 307         pr_debug("of_scan_bus(%s) bus no %d...\n",
 308                  node->full_name, bus->number);
 309
 310         /* Scan direct children */
 311         for_each_child_of_node(node, child) {
 312                 pr_debug("  * %s\n", child->full_name);
 313                 if (!of_device_is_available(child))
 314                         continue;
 315                 reg = of_get_property(child, "reg", &reglen);
 316                 if (reg == NULL || reglen < 20)
 317                         continue;
 318                 devfn = (reg[0] >> 8) & 0xff;
 319
 320                 /* create a new pci_dev for this device */
 321                 dev = of_create_pci_dev(child, bus, devfn);
 322                 if (!dev)
 323                         continue;
 324                 pr_debug("    dev header type: %x\n", dev->hdr_type);
 325         }
 326
 327         /* Apply all fixups necessary. We don't fixup the bus "self"
 328          * for an existing bridge that is being rescanned
 329          */
 330         if (!rescan_existing)
 331                 pcibios_setup_bus_self(bus);
 332         pcibios_setup_bus_devices(bus);
 333
 334         /* Now scan child busses */
 335         list_for_each_entry(dev, &bus->devices, bus_list) {
 336                 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
 337                     dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
 338                         of_scan_pci_bridge(dev);
 339                 }
 340         }
 341 }
 342
 343 /**
 344  * of_scan_bus - given a PCI bus node, setup bus and scan for child devices
 345  * @node: device tree node for the PCI bus
 346  * @bus: pci_bus structure for the PCI bus
 347  */
 348 void __devinit of_scan_bus(struct device_node *node,
 349                            struct pci_bus *bus)
 350 {
 351         __of_scan_bus(node, bus, 0);
 352 }
 353 EXPORT_SYMBOL_GPL(of_scan_bus);
 354
 355 /**
 356  * of_rescan_bus - given a PCI bus node, scan for child devices
 357  * @node: device tree node for the PCI bus
 358  * @bus: pci_bus structure for the PCI bus
 359  *
 360  * Same as of_scan_bus, but for a pci_bus structure that has already been
 361  * setup.
 362  */
 363 void __devinit of_rescan_bus(struct device_node *node,
 364                              struct pci_bus *bus)
 365 {
 366         __of_scan_bus(node, bus, 1);
 367 }
 368 EXPORT_SYMBOL_GPL(of_rescan_bus);
 369