arch/powerpc/kernel/setup_32.c

   1 /*
   2  * Common prep/pmac/chrp boot and setup code.
   3  */
   4
   5 #include <linux/module.h>
   6 #include <linux/string.h>
   7 #include <linux/sched.h>
   8 #include <linux/init.h>
   9 #include <linux/kernel.h>
  10 #include <linux/reboot.h>
  11 #include <linux/delay.h>
  12 #include <linux/initrd.h>
  13 #include <linux/tty.h>
  14 #include <linux/bootmem.h>
  15 #include <linux/seq_file.h>
  16 #include <linux/root_dev.h>
  17 #include <linux/cpu.h>
  18 #include <linux/console.h>
  19 #include <linux/memblock.h>
  20
  21 #include <asm/io.h>
  22 #include <asm/prom.h>
  23 #include <asm/processor.h>
  24 #include <asm/pgtable.h>
  25 #include <asm/setup.h>
  26 #include <asm/smp.h>
  27 #include <asm/elf.h>
  28 #include <asm/cputable.h>
  29 #include <asm/bootx.h>
  30 #include <asm/btext.h>
  31 #include <asm/machdep.h>
  32 #include <asm/uaccess.h>
  33 #include <asm/system.h>
  34 #include <asm/pmac_feature.h>
  35 #include <asm/sections.h>
  36 #include <asm/nvram.h>
  37 #include <asm/xmon.h>
  38 #include <asm/time.h>
  39 #include <asm/serial.h>
  40 #include <asm/udbg.h>
  41 #include <asm/mmu_context.h>
  42
  43 #include "setup.h"
  44
  45 #define DBG(fmt...)
  46
  47 extern void bootx_init(unsigned long r4, unsigned long phys);
  48
  49 int boot_cpuid = -1;
  50 EXPORT_SYMBOL_GPL(boot_cpuid);
  51 int boot_cpuid_phys;
  52 EXPORT_SYMBOL_GPL(boot_cpuid_phys);
  53
  54 int smp_hw_index[NR_CPUS];
  55
  56 unsigned long ISA_DMA_THRESHOLD;
  57 unsigned int DMA_MODE_READ;
  58 unsigned int DMA_MODE_WRITE;
  59
  60 #ifdef CONFIG_VGA_CONSOLE
  61 unsigned long vgacon_remap_base;
  62 EXPORT_SYMBOL(vgacon_remap_base);
  63 #endif
  64
  65 /*
  66  * These are used in binfmt_elf.c to put aux entries on the stack
  67  * for each elf executable being started.
  68  */
  69 int dcache_bsize;
  70 int icache_bsize;
  71 int ucache_bsize;
  72
  73 /*
  74  * We're called here very early in the boot.  We determine the machine
  75  * type and call the appropriate low-level setup functions.
  76  *  -- Cort <cort@fsmlabs.com>
  77  *
  78  * Note that the kernel may be running at an address which is different
  79  * from the address that it was linked at, so we must use RELOC/PTRRELOC
  80  * to access static data (including strings).  -- paulus
  81  */
  82 notrace unsigned long __init early_init(unsigned long dt_ptr)
  83 {
  84         unsigned long offset = reloc_offset();
  85         struct cpu_spec *spec;
  86
  87         /* First zero the BSS -- use memset_io, some platforms don't have
  88          * caches on yet */
  89         memset_io((void __iomem *)PTRRELOC(&__bss_start), 0,
  90                         __bss_stop - __bss_start);
  91
  92         /*
  93          * Identify the CPU type and fix up code sections
  94          * that depend on which cpu we have.
  95          */
  96         spec = identify_cpu(offset, mfspr(SPRN_PVR));
  97
  98         do_feature_fixups(spec->cpu_features,
  99                           PTRRELOC(&__start___ftr_fixup),
 100                           PTRRELOC(&__stop___ftr_fixup));
 101
 102         do_feature_fixups(spec->mmu_features,
 103                           PTRRELOC(&__start___mmu_ftr_fixup),
 104                           PTRRELOC(&__stop___mmu_ftr_fixup));
 105
 106         do_lwsync_fixups(spec->cpu_features,
 107                          PTRRELOC(&__start___lwsync_fixup),
 108                          PTRRELOC(&__stop___lwsync_fixup));
 109
 110         return KERNELBASE + offset;
 111 }
 112
 113
 114 /*
 115  * Find out what kind of machine we're on and save any data we need
 116  * from the early boot process (devtree is copied on pmac by prom_init()).
 117  * This is called very early on the boot process, after a minimal
 118  * MMU environment has been set up but before MMU_init is called.
 119  */
 120 notrace void __init machine_init(unsigned long dt_ptr)
 121 {
 122         lockdep_init();
 123
 124         /* Enable early debugging if any specified (see udbg.h) */
 125         udbg_early_init();
 126
 127         /* Do some early initialization based on the flat device tree */
 128         early_init_devtree(__va(dt_ptr));
 129
 130         early_init_mmu();
 131
 132         probe_machine();
 133
 134         setup_kdump_trampoline();
 135
 136 #ifdef CONFIG_6xx
 137         if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
 138             cpu_has_feature(CPU_FTR_CAN_NAP))
 139                 ppc_md.power_save = ppc6xx_idle;
 140 #endif
 141
 142 #ifdef CONFIG_E500
 143         if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
 144             cpu_has_feature(CPU_FTR_CAN_NAP))
 145                 ppc_md.power_save = e500_idle;
 146 #endif
 147         if (ppc_md.progress)
 148                 ppc_md.progress("id mach(): done", 0x200);
 149 }
 150
 151 #ifdef CONFIG_BOOKE_WDT
 152 /* Checks wdt=x and wdt_period=xx command-line option */
 153 notrace int __init early_parse_wdt(char *p)
 154 {
 155         if (p && strncmp(p, "0", 1) != 0)
 156                booke_wdt_enabled = 1;
 157
 158         return 0;
 159 }
 160 early_param("wdt", early_parse_wdt);
 161
 162 int __init early_parse_wdt_period (char *p)
 163 {
 164         if (p)
 165                 booke_wdt_period = simple_strtoul(p, NULL, 0);
 166
 167         return 0;
 168 }
 169 early_param("wdt_period", early_parse_wdt_period);
 170 #endif  /* CONFIG_BOOKE_WDT */
 171
 172 /* Checks "l2cr=xxxx" command-line option */
 173 int __init ppc_setup_l2cr(char *str)
 174 {
 175         if (cpu_has_feature(CPU_FTR_L2CR)) {
 176                 unsigned long val = simple_strtoul(str, NULL, 0);
 177                 printk(KERN_INFO "l2cr set to %lx\n", val);
 178                 _set_L2CR(0);           /* force invalidate by disable cache */
 179                 _set_L2CR(val);         /* and enable it */
 180         }
 181         return 1;
 182 }
 183 __setup("l2cr=", ppc_setup_l2cr);
 184
 185 /* Checks "l3cr=xxxx" command-line option */
 186 int __init ppc_setup_l3cr(char *str)
 187 {
 188         if (cpu_has_feature(CPU_FTR_L3CR)) {
 189                 unsigned long val = simple_strtoul(str, NULL, 0);
 190                 printk(KERN_INFO "l3cr set to %lx\n", val);
 191                 _set_L3CR(val);         /* and enable it */
 192         }
 193         return 1;
 194 }
 195 __setup("l3cr=", ppc_setup_l3cr);
 196
 197 #ifdef CONFIG_GENERIC_NVRAM
 198
 199 /* Generic nvram hooks used by drivers/char/gen_nvram.c */
 200 unsigned char nvram_read_byte(int addr)
 201 {
 202         if (ppc_md.nvram_read_val)
 203                 return ppc_md.nvram_read_val(addr);
 204         return 0xff;
 205 }
 206 EXPORT_SYMBOL(nvram_read_byte);
 207
 208 void nvram_write_byte(unsigned char val, int addr)
 209 {
 210         if (ppc_md.nvram_write_val)
 211                 ppc_md.nvram_write_val(addr, val);
 212 }
 213 EXPORT_SYMBOL(nvram_write_byte);
 214
 215 ssize_t nvram_get_size(void)
 216 {
 217         if (ppc_md.nvram_size)
 218                 return ppc_md.nvram_size();
 219         return -1;
 220 }
 221 EXPORT_SYMBOL(nvram_get_size);
 222
 223 void nvram_sync(void)
 224 {
 225         if (ppc_md.nvram_sync)
 226                 ppc_md.nvram_sync();
 227 }
 228 EXPORT_SYMBOL(nvram_sync);
 229
 230 #endif /* CONFIG_NVRAM */
 231
 232 int __init ppc_init(void)
 233 {
 234         /* clear the progress line */
 235         if (ppc_md.progress)
 236                 ppc_md.progress("             ", 0xffff);
 237
 238         /* call platform init */
 239         if (ppc_md.init != NULL) {
 240                 ppc_md.init();
 241         }
 242         return 0;
 243 }
 244
 245 arch_initcall(ppc_init);
 246
 247 static void __init irqstack_early_init(void)
 248 {
 249         unsigned int i;
 250
 251         /* interrupt stacks must be in lowmem, we get that for free on ppc32
 252          * as the memblock is limited to lowmem by default */
 253         for_each_possible_cpu(i) {
 254                 softirq_ctx[i] = (struct thread_info *)
 255                         __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
 256                 hardirq_ctx[i] = (struct thread_info *)
 257                         __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
 258         }
 259 }
 260
 261 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
 262 static void __init exc_lvl_early_init(void)
 263 {
 264         unsigned int i, hw_cpu;
 265
 266         /* interrupt stacks must be in lowmem, we get that for free on ppc32
 267          * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */
 268         for_each_possible_cpu(i) {
 269                 hw_cpu = get_hard_smp_processor_id(i);
 270                 critirq_ctx[hw_cpu] = (struct thread_info *)
 271                         __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
 272 #ifdef CONFIG_BOOKE
 273                 dbgirq_ctx[hw_cpu] = (struct thread_info *)
 274                         __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
 275                 mcheckirq_ctx[hw_cpu] = (struct thread_info *)
 276                         __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
 277 #endif
 278         }
 279 }
 280 #else
 281 #define exc_lvl_early_init()
 282 #endif
 283
 284 /* Warning, IO base is not yet inited */
 285 void __init setup_arch(char **cmdline_p)
 286 {
 287         *cmdline_p = cmd_line;
 288
 289         /* so udelay does something sensible, assume <= 1000 bogomips */
 290         loops_per_jiffy = 500000000 / HZ;
 291
 292         unflatten_device_tree();
 293         check_for_initrd();
 294
 295         if (ppc_md.init_early)
 296                 ppc_md.init_early();
 297
 298         find_legacy_serial_ports();
 299
 300         smp_setup_cpu_maps();
 301
 302         /* Register early console */
 303         register_early_udbg_console();
 304
 305         xmon_setup();
 306
 307         /*
 308          * Set cache line size based on type of cpu as a default.
 309          * Systems with OF can look in the properties on the cpu node(s)
 310          * for a possibly more accurate value.
 311          */
 312         dcache_bsize = cur_cpu_spec->dcache_bsize;
 313         icache_bsize = cur_cpu_spec->icache_bsize;
 314         ucache_bsize = 0;
 315         if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE))
 316                 ucache_bsize = icache_bsize = dcache_bsize;
 317
 318         /* reboot on panic */
 319         panic_timeout = 180;
 320
 321         if (ppc_md.panic)
 322                 setup_panic();
 323
 324         init_mm.start_code = (unsigned long)_stext;
 325         init_mm.end_code = (unsigned long) _etext;
 326         init_mm.end_data = (unsigned long) _edata;
 327         init_mm.brk = klimit;
 328
 329         exc_lvl_early_init();
 330
 331         irqstack_early_init();
 332
 333         /* set up the bootmem stuff with available memory */
 334         do_init_bootmem();
 335         if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
 336
 337 #ifdef CONFIG_DUMMY_CONSOLE
 338         conswitchp = &dummy_con;
 339 #endif
 340
 341         if (ppc_md.setup_arch)
 342                 ppc_md.setup_arch();
 343         if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
 344
 345         paging_init();
 346
 347         /* Initialize the MMU context management stuff */
 348         mmu_context_init();
 349
 350 }