1 menu "Platform support"
3 source "arch/powerpc/platforms/pseries/Kconfig"
4 source "arch/powerpc/platforms/iseries/Kconfig"
5 source "arch/powerpc/platforms/chrp/Kconfig"
6 source "arch/powerpc/platforms/512x/Kconfig"
7 source "arch/powerpc/platforms/52xx/Kconfig"
8 source "arch/powerpc/platforms/powermac/Kconfig"
9 source "arch/powerpc/platforms/prep/Kconfig"
10 source "arch/powerpc/platforms/maple/Kconfig"
11 source "arch/powerpc/platforms/pasemi/Kconfig"
12 source "arch/powerpc/platforms/ps3/Kconfig"
13 source "arch/powerpc/platforms/cell/Kconfig"
14 source "arch/powerpc/platforms/8xx/Kconfig"
15 source "arch/powerpc/platforms/82xx/Kconfig"
16 source "arch/powerpc/platforms/83xx/Kconfig"
17 source "arch/powerpc/platforms/85xx/Kconfig"
18 source "arch/powerpc/platforms/86xx/Kconfig"
19 source "arch/powerpc/platforms/embedded6xx/Kconfig"
20 source "arch/powerpc/platforms/44x/Kconfig"
21 source "arch/powerpc/platforms/40x/Kconfig"
22 source "arch/powerpc/platforms/amigaone/Kconfig"
23 source "arch/powerpc/platforms/wsp/Kconfig"
26 bool "KVM Guest support"
29 This option enables various optimizations for running under the KVM
30 hypervisor. Overhead for the kernel when not running inside KVM should
33 In case of doubt, say Y
37 depends on 6xx || PPC64
39 Support for running natively on the hardware, i.e. without
40 a hypervisor. This option is not user-selectable but should
41 be selected by all platforms that need it.
43 config PPC_OF_BOOT_TRAMPOLINE
44 bool "Support booting from Open Firmware or yaboot"
45 depends on 6xx || PPC64
48 Support from booting from Open Firmware or yaboot using an
49 Open Firmware client interface. This enables the kernel to
50 communicate with open firmware to retrieve system information
51 such as the device tree.
53 In case of doubt, say Y
55 config UDBG_RTAS_CONSOLE
56 bool "RTAS based debug console"
60 config PPC_SMP_MUXED_IPI
63 Select this opton if your platform supports SMP and your
64 interrupt controller provides less than 4 interrupts to each
65 cpu. This will enable the generic code to multiplex the 4
66 messages on to one ipi.
69 bool "BEAT based debug console"
81 config PPC_EPAPR_HV_PIC
102 config RTAS_ERROR_LOGGING
107 config PPC_RTAS_DAEMON
113 bool "Proc interface to RTAS"
118 tristate "Firmware flash interface"
119 depends on PPC64 && RTAS_PROC
125 config MPIC_U3_HT_IRQS
129 config MPIC_BROKEN_REGREAD
133 This option enables a MPIC driver workaround for some chips
134 that have a bug that causes some interrupt source information
135 to not read back properly. It is safe to use on other chips as
136 well, but enabling it uses about 8KB of memory to keep copies
137 of the register contents in software.
140 depends on PPC_PSERIES || PPC_ISERIES
145 depends on PPC_PSERIES
146 bool "Support for GX bus based adapters"
148 Bus device driver for GX bus based adapters.
162 config PPC_INDIRECT_IO
166 config PPC_INDIRECT_PIO
168 select PPC_INDIRECT_IO
170 config PPC_INDIRECT_MMIO
172 select PPC_INDIRECT_IO
174 config PPC_IO_WORKAROUNDS
180 source "drivers/cpufreq/Kconfig"
182 menu "CPU Frequency drivers"
186 bool "Support for Apple PowerBooks"
187 depends on ADB_PMU && PPC32
188 select CPU_FREQ_TABLE
190 This adds support for frequency switching on Apple PowerBooks,
191 this currently includes some models of iBook & Titanium
194 config CPU_FREQ_PMAC64
195 bool "Support for some Apple G5s"
196 depends on PPC_PMAC && PPC64
197 select CPU_FREQ_TABLE
199 This adds support for frequency switching on Apple iMac G5,
200 and some of the more recent desktop G5 machines as well.
202 config PPC_PASEMI_CPUFREQ
203 bool "Support for PA Semi PWRficient"
204 depends on PPC_PASEMI
206 select CPU_FREQ_TABLE
208 This adds the support for frequency switching on PA Semi
209 PWRficient processors.
213 config PPC601_SYNC_FIX
214 bool "Workarounds for PPC601 bugs"
215 depends on 6xx && (PPC_PREP || PPC_PMAC)
217 Some versions of the PPC601 (the first PowerPC chip) have bugs which
218 mean that extra synchronization instructions are required near
219 certain instructions, typically those that make major changes to the
220 CPU state. These extra instructions reduce performance slightly.
221 If you say N here, these extra instructions will not be included,
222 resulting in a kernel which will run faster but may not run at all
223 on some systems with the PPC601 chip.
225 If in doubt, say Y here.
228 bool "On-chip CPU temperature sensor support"
231 G3 and G4 processors have an on-chip temperature sensor called the
232 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
233 temperature within 2-4 degrees Celsius. This option shows the current
234 on-die temperature in /proc/cpuinfo if the cpu supports it.
236 Unfortunately, on some chip revisions, this sensor is very inaccurate
237 and in many cases, does not work at all, so don't assume the cpu
238 temp is actually what /proc/cpuinfo says it is.
241 bool "Interrupt driven TAU driver (DANGEROUS)"
244 The TAU supports an interrupt driven mode which causes an interrupt
245 whenever the temperature goes out of range. This is the fastest way
246 to get notified the temp has exceeded a range. With this option off,
247 a timer is used to re-check the temperature periodically.
249 However, on some cpus it appears that the TAU interrupt hardware
250 is buggy and can cause a situation which would lead unexplained hard
253 Unless you are extending the TAU driver, or enjoy kernel/hardware
254 debugging, leave this option off.
257 bool "Average high and low temp"
260 The TAU hardware can compare the temperature to an upper and lower
261 bound. The default behavior is to show both the upper and lower
262 bound in /proc/cpuinfo. If the range is large, the temperature is
263 either changing a lot, or the TAU hardware is broken (likely on some
264 G4's). If the range is small (around 4 degrees), the temperature is
265 relatively stable. If you say Y here, a single temperature value,
266 halfway between the upper and lower bounds, will be reported in
269 If in doubt, say N here.
272 bool "Freescale QUICC Engine (QE) Support"
273 depends on FSL_SOC && PPC32
277 The QUICC Engine (QE) is a new generation of communications
278 coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
279 Selecting this option means that you wish to build a kernel
280 for a machine with a QE coprocessor.
283 bool "QE GPIO support"
284 depends on QUICC_ENGINE
286 select ARCH_REQUIRE_GPIOLIB
288 Say Y here if you're going to use hardware that connects to the
292 bool "Enable support for the CPM2 (Communications Processor Module)"
293 depends on (FSL_SOC_BOOKE && PPC32) || 8260
296 select PPC_PCI_CHOICE
297 select ARCH_REQUIRE_GPIOLIB
300 The CPM2 (Communications Processor Module) is a coprocessor on
301 embedded CPUs made by Freescale. Selecting this option means that
302 you wish to build a kernel for a machine with a CPM2 coprocessor
303 on it (826x, 827x, 8560).
306 tristate "Axon DDR2 memory device driver"
307 depends on PPC_IBM_CELL_BLADE && BLOCK
310 It registers one block device per Axon's DDR2 memory bank found
311 on a system. Block devices are called axonram?, their major and
312 minor numbers are available in /proc/devices, /proc/partitions or
313 in /sys/block/axonram?/dev.
318 select GENERIC_ISA_DMA
320 Supports for the ULI1575 PCIe south bridge that exists on some
321 Freescale reference boards. The boards all use the ULI in pretty
331 Uses information from the OF or flattened device tree to instantiate
332 platform devices for direct mapped RTC chips like the DS1742 or DS1743.
334 source "arch/powerpc/sysdev/bestcomm/Kconfig"
337 bool "MPC512x/MPC8xxx GPIO support"
338 depends on PPC_MPC512x || PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || \
339 FSL_SOC_BOOKE || PPC_86xx
341 select ARCH_REQUIRE_GPIOLIB
343 Say Y here if you're going to use hardware that connects to the
344 MPC512x/831x/834x/837x/8572/8610 GPIOs.
347 bool "Support for simple, memory-mapped GPIO controllers"
350 select ARCH_REQUIRE_GPIOLIB
352 Say Y here to support simple, memory-mapped GPIO controllers.
353 These are usually BCSRs used to control board's switches, LEDs,
354 chip-selects, Ethernet/USB PHY's power and various other small
355 on-board peripherals.
357 config MCU_MPC8349EMITX
358 tristate "MPC8349E-mITX MCU driver"
359 depends on I2C && PPC_83xx
361 select ARCH_REQUIRE_GPIOLIB
363 Say Y here to enable soft power-off functionality on the Freescale
364 boards with the MPC8349E-mITX-compatible MCU chips. This driver will
365 also register MCU GPIOs with the generic GPIO API, so you'll able
366 to use MCU pins as GPIOs.
369 bool "Xilinx PCI host bridge support"
370 depends on PCI && XILINX_VIRTEX