arch/sparc/kernel/setup_64.c

   1 /*
   2  *  linux/arch/sparc64/kernel/setup.c
   3  *
   4  *  Copyright (C) 1995,1996  David S. Miller (davem@caip.rutgers.edu)
   5  *  Copyright (C) 1997       Jakub Jelinek (jj@sunsite.mff.cuni.cz)
   6  */
   7
   8 #include <linux/errno.h>
   9 #include <linux/sched.h>
  10 #include <linux/kernel.h>
  11 #include <linux/mm.h>
  12 #include <linux/export.h>
  13 #include <linux/stddef.h>
  14 #include <linux/unistd.h>
  15 #include <linux/ptrace.h>
  16 #include <asm/smp.h>
  17 #include <linux/user.h>
  18 #include <linux/screen_info.h>
  19 #include <linux/delay.h>
  20 #include <linux/fs.h>
  21 #include <linux/seq_file.h>
  22 #include <linux/syscalls.h>
  23 #include <linux/kdev_t.h>
  24 #include <linux/major.h>
  25 #include <linux/string.h>
  26 #include <linux/init.h>
  27 #include <linux/inet.h>
  28 #include <linux/console.h>
  29 #include <linux/root_dev.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/cpu.h>
  32 #include <linux/initrd.h>
  33 #include <linux/module.h>
  34
  35 #include <asm/system.h>
  36 #include <asm/io.h>
  37 #include <asm/processor.h>
  38 #include <asm/oplib.h>
  39 #include <asm/page.h>
  40 #include <asm/pgtable.h>
  41 #include <asm/idprom.h>
  42 #include <asm/head.h>
  43 #include <asm/starfire.h>
  44 #include <asm/mmu_context.h>
  45 #include <asm/timer.h>
  46 #include <asm/sections.h>
  47 #include <asm/setup.h>
  48 #include <asm/mmu.h>
  49 #include <asm/ns87303.h>
  50 #include <asm/btext.h>
  51 #include <asm/elf.h>
  52 #include <asm/mdesc.h>
  53
  54 #ifdef CONFIG_IP_PNP
  55 #include <net/ipconfig.h>
  56 #endif
  57
  58 #include "entry.h"
  59 #include "kernel.h"
  60
  61 /* Used to synchronize accesses to NatSemi SUPER I/O chip configure
  62  * operations in asm/ns87303.h
  63  */
  64 DEFINE_SPINLOCK(ns87303_lock);
  65 EXPORT_SYMBOL(ns87303_lock);
  66
  67 struct screen_info screen_info = {
  68         0, 0,                   /* orig-x, orig-y */
  69         0,                      /* unused */
  70         0,                      /* orig-video-page */
  71         0,                      /* orig-video-mode */
  72         128,                    /* orig-video-cols */
  73         0, 0, 0,                /* unused, ega_bx, unused */
  74         54,                     /* orig-video-lines */
  75         0,                      /* orig-video-isVGA */
  76         16                      /* orig-video-points */
  77 };
  78
  79 static void
  80 prom_console_write(struct console *con, const char *s, unsigned n)
  81 {
  82         prom_write(s, n);
  83 }
  84
  85 /* Exported for mm/init.c:paging_init. */
  86 unsigned long cmdline_memory_size = 0;
  87
  88 static struct console prom_early_console = {
  89         .name =         "earlyprom",
  90         .write =        prom_console_write,
  91         .flags =        CON_PRINTBUFFER | CON_BOOT | CON_ANYTIME,
  92         .index =        -1,
  93 };
  94
  95 /*
  96  * Process kernel command line switches that are specific to the
  97  * SPARC or that require special low-level processing.
  98  */
  99 static void __init process_switch(char c)
 100 {
 101         switch (c) {
 102         case 'd':
 103         case 's':
 104                 break;
 105         case 'h':
 106                 prom_printf("boot_flags_init: Halt!\n");
 107                 prom_halt();
 108                 break;
 109         case 'p':
 110                 /* Just ignore, this behavior is now the default.  */
 111                 break;
 112         case 'P':
 113                 /* Force UltraSPARC-III P-Cache on. */
 114                 if (tlb_type != cheetah) {
 115                         printk("BOOT: Ignoring P-Cache force option.\n");
 116                         break;
 117                 }
 118                 cheetah_pcache_forced_on = 1;
 119                 add_taint(TAINT_MACHINE_CHECK);
 120                 cheetah_enable_pcache();
 121                 break;
 122
 123         default:
 124                 printk("Unknown boot switch (-%c)\n", c);
 125                 break;
 126         }
 127 }
 128
 129 static void __init boot_flags_init(char *commands)
 130 {
 131         while (*commands) {
 132                 /* Move to the start of the next "argument". */
 133                 while (*commands && *commands == ' ')
 134                         commands++;
 135
 136                 /* Process any command switches, otherwise skip it. */
 137                 if (*commands == '\0')
 138                         break;
 139                 if (*commands == '-') {
 140                         commands++;
 141                         while (*commands && *commands != ' ')
 142                                 process_switch(*commands++);
 143                         continue;
 144                 }
 145                 if (!strncmp(commands, "mem=", 4)) {
 146                         /*
 147                          * "mem=XXX[kKmM]" overrides the PROM-reported
 148                          * memory size.
 149                          */
 150                         cmdline_memory_size = simple_strtoul(commands + 4,
 151                                                              &commands, 0);
 152                         if (*commands == 'K' || *commands == 'k') {
 153                                 cmdline_memory_size <<= 10;
 154                                 commands++;
 155                         } else if (*commands=='M' || *commands=='m') {
 156                                 cmdline_memory_size <<= 20;
 157                                 commands++;
 158                         }
 159                 }
 160                 while (*commands && *commands != ' ')
 161                         commands++;
 162         }
 163 }
 164
 165 extern unsigned short root_flags;
 166 extern unsigned short root_dev;
 167 extern unsigned short ram_flags;
 168 #define RAMDISK_IMAGE_START_MASK        0x07FF
 169 #define RAMDISK_PROMPT_FLAG             0x8000
 170 #define RAMDISK_LOAD_FLAG               0x4000
 171
 172 extern int root_mountflags;
 173
 174 char reboot_command[COMMAND_LINE_SIZE];
 175
 176 static struct pt_regs fake_swapper_regs = { { 0, }, 0, 0, 0, 0 };
 177
 178 void __init per_cpu_patch(void)
 179 {
 180         struct cpuid_patch_entry *p;
 181         unsigned long ver;
 182         int is_jbus;
 183
 184         if (tlb_type == spitfire && !this_is_starfire)
 185                 return;
 186
 187         is_jbus = 0;
 188         if (tlb_type != hypervisor) {
 189                 __asm__ ("rdpr %%ver, %0" : "=r" (ver));
 190                 is_jbus = ((ver >> 32UL) == __JALAPENO_ID ||
 191                            (ver >> 32UL) == __SERRANO_ID);
 192         }
 193
 194         p = &__cpuid_patch;
 195         while (p < &__cpuid_patch_end) {
 196                 unsigned long addr = p->addr;
 197                 unsigned int *insns;
 198
 199                 switch (tlb_type) {
 200                 case spitfire:
 201                         insns = &p->starfire[0];
 202                         break;
 203                 case cheetah:
 204                 case cheetah_plus:
 205                         if (is_jbus)
 206                                 insns = &p->cheetah_jbus[0];
 207                         else
 208                                 insns = &p->cheetah_safari[0];
 209                         break;
 210                 case hypervisor:
 211                         insns = &p->sun4v[0];
 212                         break;
 213                 default:
 214                         prom_printf("Unknown cpu type, halting.\n");
 215                         prom_halt();
 216                 }
 217
 218                 *(unsigned int *) (addr +  0) = insns[0];
 219                 wmb();
 220                 __asm__ __volatile__("flush     %0" : : "r" (addr +  0));
 221
 222                 *(unsigned int *) (addr +  4) = insns[1];
 223                 wmb();
 224                 __asm__ __volatile__("flush     %0" : : "r" (addr +  4));
 225
 226                 *(unsigned int *) (addr +  8) = insns[2];
 227                 wmb();
 228                 __asm__ __volatile__("flush     %0" : : "r" (addr +  8));
 229
 230                 *(unsigned int *) (addr + 12) = insns[3];
 231                 wmb();
 232                 __asm__ __volatile__("flush     %0" : : "r" (addr + 12));
 233
 234                 p++;
 235         }
 236 }
 237
 238 void __init sun4v_patch(void)
 239 {
 240         extern void sun4v_hvapi_init(void);
 241         struct sun4v_1insn_patch_entry *p1;
 242         struct sun4v_2insn_patch_entry *p2;
 243
 244         if (tlb_type != hypervisor)
 245                 return;
 246
 247         p1 = &__sun4v_1insn_patch;
 248         while (p1 < &__sun4v_1insn_patch_end) {
 249                 unsigned long addr = p1->addr;
 250
 251                 *(unsigned int *) (addr +  0) = p1->insn;
 252                 wmb();
 253                 __asm__ __volatile__("flush     %0" : : "r" (addr +  0));
 254
 255                 p1++;
 256         }
 257
 258         p2 = &__sun4v_2insn_patch;
 259         while (p2 < &__sun4v_2insn_patch_end) {
 260                 unsigned long addr = p2->addr;
 261
 262                 *(unsigned int *) (addr +  0) = p2->insns[0];
 263                 wmb();
 264                 __asm__ __volatile__("flush     %0" : : "r" (addr +  0));
 265
 266                 *(unsigned int *) (addr +  4) = p2->insns[1];
 267                 wmb();
 268                 __asm__ __volatile__("flush     %0" : : "r" (addr +  4));
 269
 270                 p2++;
 271         }
 272
 273         sun4v_hvapi_init();
 274 }
 275
 276 static void __init popc_patch(void)
 277 {
 278         struct popc_3insn_patch_entry *p3;
 279         struct popc_6insn_patch_entry *p6;
 280
 281         p3 = &__popc_3insn_patch;
 282         while (p3 < &__popc_3insn_patch_end) {
 283                 unsigned long i, addr = p3->addr;
 284
 285                 for (i = 0; i < 3; i++) {
 286                         *(unsigned int *) (addr +  (i * 4)) = p3->insns[i];
 287                         wmb();
 288                         __asm__ __volatile__("flush     %0"
 289                                              : : "r" (addr +  (i * 4)));
 290                 }
 291
 292                 p3++;
 293         }
 294
 295         p6 = &__popc_6insn_patch;
 296         while (p6 < &__popc_6insn_patch_end) {
 297                 unsigned long i, addr = p6->addr;
 298
 299                 for (i = 0; i < 6; i++) {
 300                         *(unsigned int *) (addr +  (i * 4)) = p6->insns[i];
 301                         wmb();
 302                         __asm__ __volatile__("flush     %0"
 303                                              : : "r" (addr +  (i * 4)));
 304                 }
 305
 306                 p6++;
 307         }
 308 }
 309
 310 #ifdef CONFIG_SMP
 311 void __init boot_cpu_id_too_large(int cpu)
 312 {
 313         prom_printf("Serious problem, boot cpu id (%d) >= NR_CPUS (%d)\n",
 314                     cpu, NR_CPUS);
 315         prom_halt();
 316 }
 317 #endif
 318
 319 /* On Ultra, we support all of the v8 capabilities. */
 320 unsigned long sparc64_elf_hwcap = (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR |
 321                                    HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV |
 322                                    HWCAP_SPARC_V9);
 323 EXPORT_SYMBOL(sparc64_elf_hwcap);
 324
 325 static const char *hwcaps[] = {
 326         "flush", "stbar", "swap", "muldiv", "v9",
 327         "ultra3", "blkinit", "n2",
 328
 329         /* These strings are as they appear in the machine description
 330          * 'hwcap-list' property for cpu nodes.
 331          */
 332         "mul32", "div32", "fsmuld", "v8plus", "popc", "vis", "vis2",
 333         "ASIBlkInit", "fmaf", "vis3", "hpc", "random", "trans", "fjfmau",
 334         "ima", "cspare",
 335 };
 336
 337 void cpucap_info(struct seq_file *m)
 338 {
 339         unsigned long caps = sparc64_elf_hwcap;
 340         int i, printed = 0;
 341
 342         seq_puts(m, "cpucaps\t\t: ");
 343         for (i = 0; i < ARRAY_SIZE(hwcaps); i++) {
 344                 unsigned long bit = 1UL << i;
 345                 if (caps & bit) {
 346                         seq_printf(m, "%s%s",
 347                                    printed ? "," : "", hwcaps[i]);
 348                         printed++;
 349                 }
 350         }
 351         seq_putc(m, '\n');
 352 }
 353
 354 static void __init report_hwcaps(unsigned long caps)
 355 {
 356         int i, printed = 0;
 357
 358         printk(KERN_INFO "CPU CAPS: [");
 359         for (i = 0; i < ARRAY_SIZE(hwcaps); i++) {
 360                 unsigned long bit = 1UL << i;
 361                 if (caps & bit) {
 362                         printk(KERN_CONT "%s%s",
 363                                printed ? "," : "", hwcaps[i]);
 364                         if (++printed == 8) {
 365                                 printk(KERN_CONT "]\n");
 366                                 printk(KERN_INFO "CPU CAPS: [");
 367                                 printed = 0;
 368                         }
 369                 }
 370         }
 371         printk(KERN_CONT "]\n");
 372 }
 373
 374 static unsigned long __init mdesc_cpu_hwcap_list(void)
 375 {
 376         struct mdesc_handle *hp;
 377         unsigned long caps = 0;
 378         const char *prop;
 379         int len;
 380         u64 pn;
 381
 382         hp = mdesc_grab();
 383         if (!hp)
 384                 return 0;
 385
 386         pn = mdesc_node_by_name(hp, MDESC_NODE_NULL, "cpu");
 387         if (pn == MDESC_NODE_NULL)
 388                 goto out;
 389
 390         prop = mdesc_get_property(hp, pn, "hwcap-list", &len);
 391         if (!prop)
 392                 goto out;
 393
 394         while (len) {
 395                 int i, plen;
 396
 397                 for (i = 0; i < ARRAY_SIZE(hwcaps); i++) {
 398                         unsigned long bit = 1UL << i;
 399
 400                         if (!strcmp(prop, hwcaps[i])) {
 401                                 caps |= bit;
 402                                 break;
 403                         }
 404                 }
 405
 406                 plen = strlen(prop) + 1;
 407                 prop += plen;
 408                 len -= plen;
 409         }
 410
 411 out:
 412         mdesc_release(hp);
 413         return caps;
 414 }
 415
 416 /* This yields a mask that user programs can use to figure out what
 417  * instruction set this cpu supports.
 418  */
 419 static void __init init_sparc64_elf_hwcap(void)
 420 {
 421         unsigned long cap = sparc64_elf_hwcap;
 422         unsigned long mdesc_caps;
 423
 424         if (tlb_type == cheetah || tlb_type == cheetah_plus)
 425                 cap |= HWCAP_SPARC_ULTRA3;
 426         else if (tlb_type == hypervisor) {
 427                 if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 ||
 428                     sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
 429                     sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
 430                         cap |= HWCAP_SPARC_BLKINIT;
 431                 if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
 432                     sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
 433                         cap |= HWCAP_SPARC_N2;
 434         }
 435
 436         cap |= (AV_SPARC_MUL32 | AV_SPARC_DIV32 | AV_SPARC_V8PLUS);
 437
 438         mdesc_caps = mdesc_cpu_hwcap_list();
 439         if (!mdesc_caps) {
 440                 if (tlb_type == spitfire)
 441                         cap |= AV_SPARC_VIS;
 442                 if (tlb_type == cheetah || tlb_type == cheetah_plus)
 443                         cap |= AV_SPARC_VIS | AV_SPARC_VIS2;
 444                 if (tlb_type == cheetah_plus) {
 445                         unsigned long impl, ver;
 446
 447                         __asm__ __volatile__("rdpr %%ver, %0" : "=r" (ver));
 448                         impl = ((ver >> 32) & 0xffff);
 449                         if (impl == PANTHER_IMPL)
 450                                 cap |= AV_SPARC_POPC;
 451                 }
 452                 if (tlb_type == hypervisor) {
 453                         if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1)
 454                                 cap |= AV_SPARC_ASI_BLK_INIT;
 455                         if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
 456                             sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
 457                                 cap |= (AV_SPARC_VIS | AV_SPARC_VIS2 |
 458                                         AV_SPARC_ASI_BLK_INIT |
 459                                         AV_SPARC_POPC);
 460                         if (sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
 461                                 cap |= (AV_SPARC_VIS3 | AV_SPARC_HPC |
 462                                         AV_SPARC_FMAF);
 463                 }
 464         }
 465         sparc64_elf_hwcap = cap | mdesc_caps;
 466
 467         report_hwcaps(sparc64_elf_hwcap);
 468
 469         if (sparc64_elf_hwcap & AV_SPARC_POPC)
 470                 popc_patch();
 471 }
 472
 473 void __init setup_arch(char **cmdline_p)
 474 {
 475         /* Initialize PROM console and command line. */
 476         *cmdline_p = prom_getbootargs();
 477         strcpy(boot_command_line, *cmdline_p);
 478         parse_early_param();
 479
 480         boot_flags_init(*cmdline_p);
 481 #ifdef CONFIG_EARLYFB
 482         if (btext_find_display())
 483 #endif
 484                 register_console(&prom_early_console);
 485
 486         if (tlb_type == hypervisor)
 487                 printk("ARCH: SUN4V\n");
 488         else
 489                 printk("ARCH: SUN4U\n");
 490
 491 #ifdef CONFIG_DUMMY_CONSOLE
 492         conswitchp = &dummy_con;
 493 #endif
 494
 495         idprom_init();
 496
 497         if (!root_flags)
 498                 root_mountflags &= ~MS_RDONLY;
 499         ROOT_DEV = old_decode_dev(root_dev);
 500 #ifdef CONFIG_BLK_DEV_RAM
 501         rd_image_start = ram_flags & RAMDISK_IMAGE_START_MASK;
 502         rd_prompt = ((ram_flags & RAMDISK_PROMPT_FLAG) != 0);
 503         rd_doload = ((ram_flags & RAMDISK_LOAD_FLAG) != 0);
 504 #endif
 505
 506         task_thread_info(&init_task)->kregs = &fake_swapper_regs;
 507
 508 #ifdef CONFIG_IP_PNP
 509         if (!ic_set_manually) {
 510                 phandle chosen = prom_finddevice("/chosen");
 511                 u32 cl, sv, gw;
 512
 513                 cl = prom_getintdefault (chosen, "client-ip", 0);
 514                 sv = prom_getintdefault (chosen, "server-ip", 0);
 515                 gw = prom_getintdefault (chosen, "gateway-ip", 0);
 516                 if (cl && sv) {
 517                         ic_myaddr = cl;
 518                         ic_servaddr = sv;
 519                         if (gw)
 520                                 ic_gateway = gw;
 521 #if defined(CONFIG_IP_PNP_BOOTP) || defined(CONFIG_IP_PNP_RARP)
 522                         ic_proto_enabled = 0;
 523 #endif
 524                 }
 525         }
 526 #endif
 527
 528         /* Get boot processor trap_block[] setup.  */
 529         init_cur_cpu_trap(current_thread_info());
 530
 531         paging_init();
 532         init_sparc64_elf_hwcap();
 533 }
 534
 535 extern int stop_a_enabled;
 536
 537 void sun_do_break(void)
 538 {
 539         if (!stop_a_enabled)
 540                 return;
 541
 542         prom_printf("\n");
 543         flush_user_windows();
 544
 545         prom_cmdline();
 546 }
 547 EXPORT_SYMBOL(sun_do_break);
 548
 549 int stop_a_enabled = 1;
 550 EXPORT_SYMBOL(stop_a_enabled);