2 * CE4100 on Falcon Falls
4 * (c) Copyright 2010 Intel Corporation
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License.
12 model = "intel,falconfalls";
13 compatible = "intel,falconfalls";
23 compatible = "intel,ce4100";
32 compatible = "intel,ce4100-cp";
35 ioapic1: interrupt-controller@fec00000 {
36 #interrupt-cells = <2>;
37 compatible = "intel,ce4100-ioapic";
39 reg = <0xfec00000 0x1000>;
43 compatible = "intel,ce4100-hpet";
44 reg = <0xfed00000 0x200>;
47 lapic0: interrupt-controller@fee00000 {
48 compatible = "intel,ce4100-lapic";
49 reg = <0xfee00000 0x1000>;
55 compatible = "intel,ce4100-pci", "pci";
58 ranges = <0x2000000 0 0xbffff000 0xbffff000 0 0x1000
59 0x2000000 0 0xdffe0000 0xdffe0000 0 0x1000
60 0x0000000 0 0x0 0x0 0 0x100>;
62 /* Secondary IO-APIC */
63 ioapic2: interrupt-controller@0,1 {
64 #interrupt-cells = <2>;
65 compatible = "intel,ce4100-ioapic";
67 reg = <0x100 0x0 0x0 0x0 0x0>;
68 assigned-addresses = <0x02000000 0x0 0xbffff000 0x0 0x1000>;
74 compatible = "intel,ce4100-pci", "pci";
77 reg = <0x0800 0x0 0x0 0x0 0x0>;
78 ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>;
80 interrupt-parent = <&ioapic2>;
83 compatible = "pci8086,2e5b.2",
88 reg = <0x11000 0x0 0x0 0x0 0x0>;
93 compatible = "pci8086,2e5c.2",
98 reg = <0x11800 0x0 0x0 0x0 0x0>;
103 compatible = "pci8086,2e5d.2",
108 reg = <0x12000 0x0 0x0 0x0 0x0>;
113 compatible = "pci8086,2e5e.2",
118 reg = <0x12100 0x0 0x0 0x0 0x0>;
123 compatible = "pci8086,2e5f.2",
128 reg = <0x13000 0x0 0x0 0x0 0x0>;
133 compatible = "pci8086,2e5f.2",
138 reg = <0x13100 0x0 0x0 0x0 0x0>;
143 compatible = "pci8086,2e60.2",
148 reg = <0x13200 0x0 0x0 0x0 0x0>;
153 compatible = "pci8086,2e61.2",
158 reg = <0x14000 0x0 0x0 0x0 0x0>;
163 compatible = "pci8086,2e62.2",
168 reg = <0x14100 0x0 0x0 0x0 0x0>;
173 compatible = "pci8086,2e63.2",
178 reg = <0x14200 0x0 0x0 0x0 0x0>;
182 entertainment-encryption@9,0 {
183 compatible = "pci8086,2e64.2",
188 reg = <0x14800 0x0 0x0 0x0 0x0>;
193 compatible = "pci8086,2e65.2",
198 reg = <0x15000 0x0 0x0 0x0 0x0>;
202 compatible = "pci8086,2e66.2",
207 reg = <0x15800 0x0 0x0 0x0 0x0>;
212 compatible = "pci8086,2e67.2",
218 reg = <0x15900 0x0 0x0 0x0 0x0>;
224 #address-cells = <2>;
226 compatible = "pci8086,2e68.2",
231 reg = <0x15a00 0x0 0x0 0x0 0x0>;
233 ranges = <0 0 0x02000000 0 0xdffe0500 0x100
234 1 0 0x02000000 0 0xdffe0600 0x100
235 2 0 0x02000000 0 0xdffe0700 0x100>;
238 #address-cells = <1>;
240 compatible = "intel,ce4100-i2c-controller";
245 #address-cells = <1>;
247 compatible = "intel,ce4100-i2c-controller";
252 compatible = "ti,pcf8575";
259 #address-cells = <1>;
261 compatible = "intel,ce4100-i2c-controller";
266 compatible = "ti,pcf8575";
274 compatible = "pci8086,2e69.2",
279 reg = <0x15b00 0x0 0x0 0x0 0x0>;
284 #address-cells = <1>;
292 reg = <0x15c00 0x0 0x0 0x0 0x0>;
296 compatible = "ti,pcm1755";
298 spi-max-frequency = <115200>;
302 compatible = "ti,pcm1609a";
304 spi-max-frequency = <115200>;
308 compatible = "atmel,at93c46";
310 spi-max-frequency = <115200>;
315 compatible = "pci8086,2e6d.2",
320 reg = <0x15f00 0x0 0x0 0x0 0x0>;
324 compatible = "pci8086,2e6e.2",
329 reg = <0x16000 0x0 0x0 0x0 0x0>;
334 compatible = "pci8086,2e6f.2",
339 reg = <0x16100 0x0 0x0 0x0 0x0>;
344 compatible = "pci8086,2e70.2",
349 reg = <0x16800 0x0 0x0 0x0 0x0>;
354 compatible = "pci8086,2e70.2",
359 reg = <0x16900 0x0 0x0 0x0 0x0>;
364 compatible = "pci8086,2e71.0",
369 reg = <0x17000 0x0 0x0 0x0 0x0>;
374 compatible = "pci8086,701.1",
379 reg = <0x17800 0x0 0x0 0x0 0x0>;
383 entertainment-encryption@10,0 {
384 compatible = "pci8086,702.1",
389 reg = <0x18000 0x0 0x0 0x0 0x0>;
393 compatible = "pci8086,703.1",
398 reg = <0x18800 0x0 0x0 0x0 0x0>;
403 compatible = "pci8086,704.0",
408 reg = <0x19000 0x0 0x0 0x0 0x0>;
413 #address-cells = <2>;
416 reg = <0xf800 0x0 0x0 0x0 0x0>;
417 ranges = <1 0 0 0 0 0x100>;
420 compatible = "intel,ce4100-rtc", "motorola,mc146818";
422 interrupt-parent = <&ioapic1>;