arch/xtensa/include/asm/system.h

   1 /*
   2  * include/asm-xtensa/system.h
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file "COPYING" in the main directory of this archive
   6  * for more details.
   7  *
   8  * Copyright (C) 2001 - 2005 Tensilica Inc.
   9  */
  10
  11 #ifndef _XTENSA_SYSTEM_H
  12 #define _XTENSA_SYSTEM_H
  13
  14 #include <linux/stringify.h>
  15 #include <linux/irqflags.h>
  16
  17 #include <asm/processor.h>
  18
  19 #define smp_read_barrier_depends() do { } while(0)
  20 #define read_barrier_depends() do { } while(0)
  21
  22 #define mb()  barrier()
  23 #define rmb() mb()
  24 #define wmb() mb()
  25
  26 #ifdef CONFIG_SMP
  27 #error smp_* not defined
  28 #else
  29 #define smp_mb()        barrier()
  30 #define smp_rmb()       barrier()
  31 #define smp_wmb()       barrier()
  32 #endif
  33
  34 #define set_mb(var, value)      do { var = value; mb(); } while (0)
  35
  36 #if !defined (__ASSEMBLY__)
  37
  38 /* * switch_to(n) should switch tasks to task nr n, first
  39  * checking that n isn't the current task, in which case it does nothing.
  40  */
  41 extern void *_switch_to(void *last, void *next);
  42
  43 #endif  /* __ASSEMBLY__ */
  44
  45 #define switch_to(prev,next,last)               \
  46 do {                                            \
  47         (last) = _switch_to(prev, next);        \
  48 } while(0)
  49
  50 /*
  51  * cmpxchg
  52  */
  53
  54 static inline unsigned long
  55 __cmpxchg_u32(volatile int *p, int old, int new)
  56 {
  57   __asm__ __volatile__("rsil    a15, "__stringify(LOCKLEVEL)"\n\t"
  58                        "l32i    %0, %1, 0              \n\t"
  59                        "bne     %0, %2, 1f             \n\t"
  60                        "s32i    %3, %1, 0              \n\t"
  61                        "1:                             \n\t"
  62                        "wsr     a15, "__stringify(PS)" \n\t"
  63                        "rsync                          \n\t"
  64                        : "=&a" (old)
  65                        : "a" (p), "a" (old), "r" (new)
  66                        : "a15", "memory");
  67   return old;
  68 }
  69 /* This function doesn't exist, so you'll get a linker error
  70  * if something tries to do an invalid cmpxchg(). */
  71
  72 extern void __cmpxchg_called_with_bad_pointer(void);
  73
  74 static __inline__ unsigned long
  75 __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
  76 {
  77         switch (size) {
  78         case 4:  return __cmpxchg_u32(ptr, old, new);
  79         default: __cmpxchg_called_with_bad_pointer();
  80                  return old;
  81         }
  82 }
  83
  84 #define cmpxchg(ptr,o,n)                                                      \
  85         ({ __typeof__(*(ptr)) _o_ = (o);                                      \
  86            __typeof__(*(ptr)) _n_ = (n);                                      \
  87            (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_,          \
  88                                         (unsigned long)_n_, sizeof (*(ptr))); \
  89         })
  90
  91 #include <asm-generic/cmpxchg-local.h>
  92
  93 static inline unsigned long __cmpxchg_local(volatile void *ptr,
  94                                       unsigned long old,
  95                                       unsigned long new, int size)
  96 {
  97         switch (size) {
  98         case 4:
  99                 return __cmpxchg_u32(ptr, old, new);
 100         default:
 101                 return __cmpxchg_local_generic(ptr, old, new, size);
 102         }
 103
 104         return old;
 105 }
 106
 107 /*
 108  * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
 109  * them available.
 110  */
 111 #define cmpxchg_local(ptr, o, n)                                               \
 112         ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
 113                         (unsigned long)(n), sizeof(*(ptr))))
 114 #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
 115
 116 /*
 117  * xchg_u32
 118  *
 119  * Note that a15 is used here because the register allocation
 120  * done by the compiler is not guaranteed and a window overflow
 121  * may not occur between the rsil and wsr instructions. By using
 122  * a15 in the rsil, the machine is guaranteed to be in a state
 123  * where no register reference will cause an overflow.
 124  */
 125
 126 static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
 127 {
 128   unsigned long tmp;
 129   __asm__ __volatile__("rsil    a15, "__stringify(LOCKLEVEL)"\n\t"
 130                        "l32i    %0, %1, 0              \n\t"
 131                        "s32i    %2, %1, 0              \n\t"
 132                        "wsr     a15, "__stringify(PS)" \n\t"
 133                        "rsync                          \n\t"
 134                        : "=&a" (tmp)
 135                        : "a" (m), "a" (val)
 136                        : "a15", "memory");
 137   return tmp;
 138 }
 139
 140 #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
 141
 142 /*
 143  * This only works if the compiler isn't horribly bad at optimizing.
 144  * gcc-2.5.8 reportedly can't handle this, but I define that one to
 145  * be dead anyway.
 146  */
 147
 148 extern void __xchg_called_with_bad_pointer(void);
 149
 150 static __inline__ unsigned long
 151 __xchg(unsigned long x, volatile void * ptr, int size)
 152 {
 153         switch (size) {
 154                 case 4:
 155                         return xchg_u32(ptr, x);
 156         }
 157         __xchg_called_with_bad_pointer();
 158         return x;
 159 }
 160
 161 extern void set_except_vector(int n, void *addr);
 162
 163 static inline void spill_registers(void)
 164 {
 165         unsigned int a0, ps;
 166
 167         __asm__ __volatile__ (
 168                 "movi   a14," __stringify (PS_EXCM_BIT) " | 1\n\t"
 169                 "mov    a12, a0\n\t"
 170                 "rsr    a13," __stringify(SAR) "\n\t"
 171                 "xsr    a14," __stringify(PS) "\n\t"
 172                 "movi   a0, _spill_registers\n\t"
 173                 "rsync\n\t"
 174                 "callx0 a0\n\t"
 175                 "mov    a0, a12\n\t"
 176                 "wsr    a13," __stringify(SAR) "\n\t"
 177                 "wsr    a14," __stringify(PS) "\n\t"
 178                 :: "a" (&a0), "a" (&ps)
 179                 : "a2", "a3", "a4", "a7", "a11", "a12", "a13", "a14", "a15", "memory");
 180 }
 181
 182 #define arch_align_stack(x) (x)
 183
 184 #endif  /* _XTENSA_SYSTEM_H */