arch/xtensa/include/asm/thread_info.h

   1 /*
   2  * include/asm-xtensa/thread_info.h
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file "COPYING" in the main directory of this archive
   6  * for more details.
   7  *
   8  * Copyright (C) 2001 - 2005 Tensilica Inc.
   9  */
  10
  11 #ifndef _XTENSA_THREAD_INFO_H
  12 #define _XTENSA_THREAD_INFO_H
  13
  14 #ifdef __KERNEL__
  15
  16 #ifndef __ASSEMBLY__
  17 # include <asm/processor.h>
  18 #endif
  19
  20 /*
  21  * low level task data that entry.S needs immediate access to
  22  * - this struct should fit entirely inside of one cache line
  23  * - this struct shares the supervisor stack pages
  24  * - if the contents of this structure are changed, the assembly constants
  25  *   must also be changed
  26  */
  27
  28 #ifndef __ASSEMBLY__
  29
  30 #if XTENSA_HAVE_COPROCESSORS
  31
  32 typedef struct xtregs_coprocessor {
  33         xtregs_cp0_t cp0;
  34         xtregs_cp1_t cp1;
  35         xtregs_cp2_t cp2;
  36         xtregs_cp3_t cp3;
  37         xtregs_cp4_t cp4;
  38         xtregs_cp5_t cp5;
  39         xtregs_cp6_t cp6;
  40         xtregs_cp7_t cp7;
  41 } xtregs_coprocessor_t;
  42
  43 #endif
  44
  45 struct thread_info {
  46         struct task_struct      *task;          /* main task structure */
  47         struct exec_domain      *exec_domain;   /* execution domain */
  48         unsigned long           flags;          /* low level flags */
  49         unsigned long           status;         /* thread-synchronous flags */
  50         __u32                   cpu;            /* current CPU */
  51         __s32                   preempt_count;  /* 0 => preemptable,< 0 => BUG*/
  52
  53         mm_segment_t            addr_limit;     /* thread address space */
  54         struct restart_block    restart_block;
  55
  56         unsigned long           cpenable;
  57
  58         /* Allocate storage for extra user states and coprocessor states. */
  59 #if XTENSA_HAVE_COPROCESSORS
  60         xtregs_coprocessor_t    xtregs_cp;
  61 #endif
  62         xtregs_user_t           xtregs_user;
  63 };
  64
  65 #else /* !__ASSEMBLY__ */
  66
  67 /* offsets into the thread_info struct for assembly code access */
  68 #define TI_TASK          0x00000000
  69 #define TI_EXEC_DOMAIN   0x00000004
  70 #define TI_FLAGS         0x00000008
  71 #define TI_STATUS        0x0000000C
  72 #define TI_CPU           0x00000010
  73 #define TI_PRE_COUNT     0x00000014
  74 #define TI_ADDR_LIMIT    0x00000018
  75 #define TI_RESTART_BLOCK 0x000001C
  76
  77 #endif
  78
  79 #define PREEMPT_ACTIVE          0x10000000
  80
  81 /*
  82  * macros/functions for gaining access to the thread information structure
  83  */
  84
  85 #ifndef __ASSEMBLY__
  86
  87 #define INIT_THREAD_INFO(tsk)                   \
  88 {                                               \
  89         .task           = &tsk,                 \
  90         .exec_domain    = &default_exec_domain, \
  91         .flags          = 0,                    \
  92         .cpu            = 0,                    \
  93         .preempt_count  = INIT_PREEMPT_COUNT,   \
  94         .addr_limit     = KERNEL_DS,            \
  95         .restart_block = {                      \
  96                 .fn = do_no_restart_syscall,    \
  97         },                                      \
  98 }
  99
 100 #define init_thread_info        (init_thread_union.thread_info)
 101 #define init_stack              (init_thread_union.stack)
 102
 103 /* how to get the thread information struct from C */
 104 static inline struct thread_info *current_thread_info(void)
 105 {
 106         struct thread_info *ti;
 107          __asm__("extui %0,a1,0,13\n\t"
 108                  "xor %0, a1, %0" : "=&r" (ti) : );
 109         return ti;
 110 }
 111
 112 #else /* !__ASSEMBLY__ */
 113
 114 /* how to get the thread information struct from ASM */
 115 #define GET_THREAD_INFO(reg,sp) \
 116         extui reg, sp, 0, 13; \
 117         xor   reg, sp, reg
 118 #endif
 119
 120
 121 /*
 122  * thread information flags
 123  * - these are process state flags that various assembly files may need to access
 124  * - pending work-to-be-done flags are in LSW
 125  * - other flags in MSW
 126  */
 127 #define TIF_SYSCALL_TRACE       0       /* syscall trace active */
 128 #define TIF_SIGPENDING          1       /* signal pending */
 129 #define TIF_NEED_RESCHED        2       /* rescheduling necessary */
 130 #define TIF_SINGLESTEP          3       /* restore singlestep on return to user mode */
 131 #define TIF_IRET                4       /* return with iret */
 132 #define TIF_MEMDIE              5       /* is terminating due to OOM killer */
 133 #define TIF_RESTORE_SIGMASK     6       /* restore signal mask in do_signal() */
 134 #define TIF_POLLING_NRFLAG      16      /* true if poll_idle() is polling TIF_NEED_RESCHED */
 135
 136 #define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
 137 #define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
 138 #define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
 139 #define _TIF_SINGLESTEP         (1<<TIF_SINGLESTEP)
 140 #define _TIF_IRET               (1<<TIF_IRET)
 141 #define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
 142 #define _TIF_RESTORE_SIGMASK    (1<<TIF_RESTORE_SIGMASK)
 143
 144 #define _TIF_WORK_MASK          0x0000FFFE      /* work to do on interrupt/exception return */
 145 #define _TIF_ALLWORK_MASK       0x0000FFFF      /* work to do on any return to u-space */
 146
 147 /*
 148  * Thread-synchronous status.
 149  *
 150  * This is different from the flags in that nobody else
 151  * ever touches our thread-synchronous status, so we don't
 152  * have to worry about atomic accesses.
 153  */
 154 #define TS_USEDFPU              0x0001  /* FPU was used by this task this quantum (SMP) */
 155
 156 #define THREAD_SIZE 8192        //(2*PAGE_SIZE)
 157 #define THREAD_SIZE_ORDER 1
 158
 159 #endif  /* __KERNEL__ */
 160 #endif  /* _XTENSA_THREAD_INFO */