| blob | 0380c5c15f8056a52635962cc9a89b87db8d9ff4 |
1 r600 0x9400
2 0x000287A0 R7xx_CB_SHADER_CONTROL
3 0x00028230 R7xx_PA_SC_EDGERULE
4 0x000286C8 R7xx_SPI_THREAD_GROUPING
5 0x00008D8C R7xx_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ
6 0x000088C4 VGT_CACHE_INVALIDATION
7 0x00028A50 VGT_ENHANCE
8 0x000088CC VGT_ES_PER_GS
9 0x00028A2C VGT_GROUP_DECR
10 0x00028A28 VGT_GROUP_FIRST_DECR
11 0x00028A24 VGT_GROUP_PRIM_TYPE
12 0x00028A30 VGT_GROUP_VECT_0_CNTL
13 0x00028A38 VGT_GROUP_VECT_0_FMT_CNTL
14 0x00028A34 VGT_GROUP_VECT_1_CNTL
15 0x00028A3C VGT_GROUP_VECT_1_FMT_CNTL
16 0x00028A40 VGT_GS_MODE
17 0x00028A6C VGT_GS_OUT_PRIM_TYPE
18 0x000088C8 VGT_GS_PER_ES
19 0x000088E8 VGT_GS_PER_VS
20 0x000088D4 VGT_GS_VERTEX_REUSE
21 0x00028A14 VGT_HOS_CNTL
22 0x00028A18 VGT_HOS_MAX_TESS_LEVEL
23 0x00028A1C VGT_HOS_MIN_TESS_LEVEL
24 0x00028A20 VGT_HOS_REUSE_DEPTH
25 0x0000895C VGT_INDEX_TYPE
26 0x00028408 VGT_INDX_OFFSET
27 0x00028AA0 VGT_INSTANCE_STEP_RATE_0
28 0x00028AA4 VGT_INSTANCE_STEP_RATE_1
29 0x00028400 VGT_MAX_VTX_INDX
30 0x00028404 VGT_MIN_VTX_INDX
31 0x00028A94 VGT_MULTI_PRIM_IB_RESET_EN
32 0x0002840C VGT_MULTI_PRIM_IB_RESET_INDX
33 0x00008970 VGT_NUM_INDICES
34 0x00008974 VGT_NUM_INSTANCES
35 0x00028A10 VGT_OUTPUT_PATH_CNTL
36 0x00028A84 VGT_PRIMITIVEID_EN
37 0x00008958 VGT_PRIMITIVE_TYPE
38 0x00028AB4 VGT_REUSE_OFF
39 0x00028AB8 VGT_VTX_CNT_EN
40 0x000088B0 VGT_VTX_VECT_EJECT_REG
41 0x00028810 PA_CL_CLIP_CNTL
42 0x00008A14 PA_CL_ENHANCE
43 0x00028C14 PA_CL_GB_HORZ_CLIP_ADJ
44 0x00028C18 PA_CL_GB_HORZ_DISC_ADJ
45 0x00028C0C PA_CL_GB_VERT_CLIP_ADJ
46 0x00028C10 PA_CL_GB_VERT_DISC_ADJ
47 0x00028820 PA_CL_NANINF_CNTL
48 0x00028E1C PA_CL_POINT_CULL_RAD
49 0x00028E18 PA_CL_POINT_SIZE
50 0x00028E10 PA_CL_POINT_X_RAD
51 0x00028E14 PA_CL_POINT_Y_RAD
52 0x00028E2C PA_CL_UCP_0_W
53 0x00028E3C PA_CL_UCP_1_W
54 0x00028E4C PA_CL_UCP_2_W
55 0x00028E5C PA_CL_UCP_3_W
56 0x00028E6C PA_CL_UCP_4_W
57 0x00028E7C PA_CL_UCP_5_W
58 0x00028E20 PA_CL_UCP_0_X
59 0x00028E30 PA_CL_UCP_1_X
60 0x00028E40 PA_CL_UCP_2_X
61 0x00028E50 PA_CL_UCP_3_X
62 0x00028E60 PA_CL_UCP_4_X
63 0x00028E70 PA_CL_UCP_5_X
64 0x00028E24 PA_CL_UCP_0_Y
65 0x00028E34 PA_CL_UCP_1_Y
66 0x00028E44 PA_CL_UCP_2_Y
67 0x00028E54 PA_CL_UCP_3_Y
68 0x00028E64 PA_CL_UCP_4_Y
69 0x00028E74 PA_CL_UCP_5_Y
70 0x00028E28 PA_CL_UCP_0_Z
71 0x00028E38 PA_CL_UCP_1_Z
72 0x00028E48 PA_CL_UCP_2_Z
73 0x00028E58 PA_CL_UCP_3_Z
74 0x00028E68 PA_CL_UCP_4_Z
75 0x00028E78 PA_CL_UCP_5_Z
76 0x00028440 PA_CL_VPORT_XOFFSET_0
77 0x00028458 PA_CL_VPORT_XOFFSET_1
78 0x00028470 PA_CL_VPORT_XOFFSET_2
79 0x00028488 PA_CL_VPORT_XOFFSET_3
80 0x000284A0 PA_CL_VPORT_XOFFSET_4
81 0x000284B8 PA_CL_VPORT_XOFFSET_5
82 0x000284D0 PA_CL_VPORT_XOFFSET_6
83 0x000284E8 PA_CL_VPORT_XOFFSET_7
84 0x00028500 PA_CL_VPORT_XOFFSET_8
85 0x00028518 PA_CL_VPORT_XOFFSET_9
86 0x00028530 PA_CL_VPORT_XOFFSET_10
87 0x00028548 PA_CL_VPORT_XOFFSET_11
88 0x00028560 PA_CL_VPORT_XOFFSET_12
89 0x00028578 PA_CL_VPORT_XOFFSET_13
90 0x00028590 PA_CL_VPORT_XOFFSET_14
91 0x000285A8 PA_CL_VPORT_XOFFSET_15
92 0x0002843C PA_CL_VPORT_XSCALE_0
93 0x00028454 PA_CL_VPORT_XSCALE_1
94 0x0002846C PA_CL_VPORT_XSCALE_2
95 0x00028484 PA_CL_VPORT_XSCALE_3
96 0x0002849C PA_CL_VPORT_XSCALE_4
97 0x000284B4 PA_CL_VPORT_XSCALE_5
98 0x000284CC PA_CL_VPORT_XSCALE_6
99 0x000284E4 PA_CL_VPORT_XSCALE_7
100 0x000284FC PA_CL_VPORT_XSCALE_8
101 0x00028514 PA_CL_VPORT_XSCALE_9
102 0x0002852C PA_CL_VPORT_XSCALE_10
103 0x00028544 PA_CL_VPORT_XSCALE_11
104 0x0002855C PA_CL_VPORT_XSCALE_12
105 0x00028574 PA_CL_VPORT_XSCALE_13
106 0x0002858C PA_CL_VPORT_XSCALE_14
107 0x000285A4 PA_CL_VPORT_XSCALE_15
108 0x00028448 PA_CL_VPORT_YOFFSET_0
109 0x00028460 PA_CL_VPORT_YOFFSET_1
110 0x00028478 PA_CL_VPORT_YOFFSET_2
111 0x00028490 PA_CL_VPORT_YOFFSET_3
112 0x000284A8 PA_CL_VPORT_YOFFSET_4
113 0x000284C0 PA_CL_VPORT_YOFFSET_5
114 0x000284D8 PA_CL_VPORT_YOFFSET_6
115 0x000284F0 PA_CL_VPORT_YOFFSET_7
116 0x00028508 PA_CL_VPORT_YOFFSET_8
117 0x00028520 PA_CL_VPORT_YOFFSET_9
118 0x00028538 PA_CL_VPORT_YOFFSET_10
119 0x00028550 PA_CL_VPORT_YOFFSET_11
120 0x00028568 PA_CL_VPORT_YOFFSET_12
121 0x00028580 PA_CL_VPORT_YOFFSET_13
122 0x00028598 PA_CL_VPORT_YOFFSET_14
123 0x000285B0 PA_CL_VPORT_YOFFSET_15
124 0x00028444 PA_CL_VPORT_YSCALE_0
125 0x0002845C PA_CL_VPORT_YSCALE_1
126 0x00028474 PA_CL_VPORT_YSCALE_2
127 0x0002848C PA_CL_VPORT_YSCALE_3
128 0x000284A4 PA_CL_VPORT_YSCALE_4
129 0x000284BC PA_CL_VPORT_YSCALE_5
130 0x000284D4 PA_CL_VPORT_YSCALE_6
131 0x000284EC PA_CL_VPORT_YSCALE_7
132 0x00028504 PA_CL_VPORT_YSCALE_8
133 0x0002851C PA_CL_VPORT_YSCALE_9
134 0x00028534 PA_CL_VPORT_YSCALE_10
135 0x0002854C PA_CL_VPORT_YSCALE_11
136 0x00028564 PA_CL_VPORT_YSCALE_12
137 0x0002857C PA_CL_VPORT_YSCALE_13
138 0x00028594 PA_CL_VPORT_YSCALE_14
139 0x000285AC PA_CL_VPORT_YSCALE_15
140 0x00028450 PA_CL_VPORT_ZOFFSET_0
141 0x00028468 PA_CL_VPORT_ZOFFSET_1
142 0x00028480 PA_CL_VPORT_ZOFFSET_2
143 0x00028498 PA_CL_VPORT_ZOFFSET_3
144 0x000284B0 PA_CL_VPORT_ZOFFSET_4
145 0x000284C8 PA_CL_VPORT_ZOFFSET_5
146 0x000284E0 PA_CL_VPORT_ZOFFSET_6
147 0x000284F8 PA_CL_VPORT_ZOFFSET_7
148 0x00028510 PA_CL_VPORT_ZOFFSET_8
149 0x00028528 PA_CL_VPORT_ZOFFSET_9
150 0x00028540 PA_CL_VPORT_ZOFFSET_10
151 0x00028558 PA_CL_VPORT_ZOFFSET_11
152 0x00028570 PA_CL_VPORT_ZOFFSET_12
153 0x00028588 PA_CL_VPORT_ZOFFSET_13
154 0x000285A0 PA_CL_VPORT_ZOFFSET_14
155 0x000285B8 PA_CL_VPORT_ZOFFSET_15
156 0x0002844C PA_CL_VPORT_ZSCALE_0
157 0x00028464 PA_CL_VPORT_ZSCALE_1
158 0x0002847C PA_CL_VPORT_ZSCALE_2
159 0x00028494 PA_CL_VPORT_ZSCALE_3
160 0x000284AC PA_CL_VPORT_ZSCALE_4
161 0x000284C4 PA_CL_VPORT_ZSCALE_5
162 0x000284DC PA_CL_VPORT_ZSCALE_6
163 0x000284F4 PA_CL_VPORT_ZSCALE_7
164 0x0002850C PA_CL_VPORT_ZSCALE_8
165 0x00028524 PA_CL_VPORT_ZSCALE_9
166 0x0002853C PA_CL_VPORT_ZSCALE_10
167 0x00028554 PA_CL_VPORT_ZSCALE_11
168 0x0002856C PA_CL_VPORT_ZSCALE_12
169 0x00028584 PA_CL_VPORT_ZSCALE_13
170 0x0002859C PA_CL_VPORT_ZSCALE_14
171 0x000285B4 PA_CL_VPORT_ZSCALE_15
172 0x0002881C PA_CL_VS_OUT_CNTL
173 0x00028818 PA_CL_VTE_CNTL
174 0x00028C48 PA_SC_AA_MASK
175 0x00008B40 PA_SC_AA_SAMPLE_LOCS_2S
176 0x00008B44 PA_SC_AA_SAMPLE_LOCS_4S
177 0x00008B48 PA_SC_AA_SAMPLE_LOCS_8S_WD0
178 0x00008B4C PA_SC_AA_SAMPLE_LOCS_8S_WD1
179 0x00028C20 PA_SC_AA_SAMPLE_LOCS_8S_WD1_MCTX
180 0x00028C1C PA_SC_AA_SAMPLE_LOCS_MCTX
181 0x00028214 PA_SC_CLIPRECT_0_BR
182 0x0002821C PA_SC_CLIPRECT_1_BR
183 0x00028224 PA_SC_CLIPRECT_2_BR
184 0x0002822C PA_SC_CLIPRECT_3_BR
185 0x00028210 PA_SC_CLIPRECT_0_TL
186 0x00028218 PA_SC_CLIPRECT_1_TL
187 0x00028220 PA_SC_CLIPRECT_2_TL
188 0x00028228 PA_SC_CLIPRECT_3_TL
189 0x0002820C PA_SC_CLIPRECT_RULE
190 0x00008BF0 PA_SC_ENHANCE
191 0x00028244 PA_SC_GENERIC_SCISSOR_BR
192 0x00028240 PA_SC_GENERIC_SCISSOR_TL
193 0x00028C00 PA_SC_LINE_CNTL
194 0x00028A0C PA_SC_LINE_STIPPLE
195 0x00008B10 PA_SC_LINE_STIPPLE_STATE
196 0x00028A4C PA_SC_MODE_CNTL
197 0x00028A48 PA_SC_MPASS_PS_CNTL
198 0x00008B20 PA_SC_MULTI_CHIP_CNTL
199 0x00028034 PA_SC_SCREEN_SCISSOR_BR
200 0x00028030 PA_SC_SCREEN_SCISSOR_TL
201 0x00028254 PA_SC_VPORT_SCISSOR_0_BR
202 0x0002825C PA_SC_VPORT_SCISSOR_1_BR
203 0x00028264 PA_SC_VPORT_SCISSOR_2_BR
204 0x0002826C PA_SC_VPORT_SCISSOR_3_BR
205 0x00028274 PA_SC_VPORT_SCISSOR_4_BR
206 0x0002827C PA_SC_VPORT_SCISSOR_5_BR
207 0x00028284 PA_SC_VPORT_SCISSOR_6_BR
208 0x0002828C PA_SC_VPORT_SCISSOR_7_BR
209 0x00028294 PA_SC_VPORT_SCISSOR_8_BR
210 0x0002829C PA_SC_VPORT_SCISSOR_9_BR
211 0x000282A4 PA_SC_VPORT_SCISSOR_10_BR
212 0x000282AC PA_SC_VPORT_SCISSOR_11_BR
213 0x000282B4 PA_SC_VPORT_SCISSOR_12_BR
214 0x000282BC PA_SC_VPORT_SCISSOR_13_BR
215 0x000282C4 PA_SC_VPORT_SCISSOR_14_BR
216 0x000282CC PA_SC_VPORT_SCISSOR_15_BR
217 0x00028250 PA_SC_VPORT_SCISSOR_0_TL
218 0x00028258 PA_SC_VPORT_SCISSOR_1_TL
219 0x00028260 PA_SC_VPORT_SCISSOR_2_TL
220 0x00028268 PA_SC_VPORT_SCISSOR_3_TL
221 0x00028270 PA_SC_VPORT_SCISSOR_4_TL
222 0x00028278 PA_SC_VPORT_SCISSOR_5_TL
223 0x00028280 PA_SC_VPORT_SCISSOR_6_TL
224 0x00028288 PA_SC_VPORT_SCISSOR_7_TL
225 0x00028290 PA_SC_VPORT_SCISSOR_8_TL
226 0x00028298 PA_SC_VPORT_SCISSOR_9_TL
227 0x000282A0 PA_SC_VPORT_SCISSOR_10_TL
228 0x000282A8 PA_SC_VPORT_SCISSOR_11_TL
229 0x000282B0 PA_SC_VPORT_SCISSOR_12_TL
230 0x000282B8 PA_SC_VPORT_SCISSOR_13_TL
231 0x000282C0 PA_SC_VPORT_SCISSOR_14_TL
232 0x000282C8 PA_SC_VPORT_SCISSOR_15_TL
233 0x000282D4 PA_SC_VPORT_ZMAX_0
234 0x000282DC PA_SC_VPORT_ZMAX_1
235 0x000282E4 PA_SC_VPORT_ZMAX_2
236 0x000282EC PA_SC_VPORT_ZMAX_3
237 0x000282F4 PA_SC_VPORT_ZMAX_4
238 0x000282FC PA_SC_VPORT_ZMAX_5
239 0x00028304 PA_SC_VPORT_ZMAX_6
240 0x0002830C PA_SC_VPORT_ZMAX_7
241 0x00028314 PA_SC_VPORT_ZMAX_8
242 0x0002831C PA_SC_VPORT_ZMAX_9
243 0x00028324 PA_SC_VPORT_ZMAX_10
244 0x0002832C PA_SC_VPORT_ZMAX_11
245 0x00028334 PA_SC_VPORT_ZMAX_12
246 0x0002833C PA_SC_VPORT_ZMAX_13
247 0x00028344 PA_SC_VPORT_ZMAX_14
248 0x0002834C PA_SC_VPORT_ZMAX_15
249 0x000282D0 PA_SC_VPORT_ZMIN_0
250 0x000282D8 PA_SC_VPORT_ZMIN_1
251 0x000282E0 PA_SC_VPORT_ZMIN_2
252 0x000282E8 PA_SC_VPORT_ZMIN_3
253 0x000282F0 PA_SC_VPORT_ZMIN_4
254 0x000282F8 PA_SC_VPORT_ZMIN_5
255 0x00028300 PA_SC_VPORT_ZMIN_6
256 0x00028308 PA_SC_VPORT_ZMIN_7
257 0x00028310 PA_SC_VPORT_ZMIN_8
258 0x00028318 PA_SC_VPORT_ZMIN_9
259 0x00028320 PA_SC_VPORT_ZMIN_10
260 0x00028328 PA_SC_VPORT_ZMIN_11
261 0x00028330 PA_SC_VPORT_ZMIN_12
262 0x00028338 PA_SC_VPORT_ZMIN_13
263 0x00028340 PA_SC_VPORT_ZMIN_14
264 0x00028348 PA_SC_VPORT_ZMIN_15
265 0x00028200 PA_SC_WINDOW_OFFSET
266 0x00028208 PA_SC_WINDOW_SCISSOR_BR
267 0x00028204 PA_SC_WINDOW_SCISSOR_TL
268 0x00028A08 PA_SU_LINE_CNTL
269 0x00028A04 PA_SU_POINT_MINMAX
270 0x00028A00 PA_SU_POINT_SIZE
271 0x00028E0C PA_SU_POLY_OFFSET_BACK_OFFSET
272 0x00028E08 PA_SU_POLY_OFFSET_BACK_SCALE
273 0x00028DFC PA_SU_POLY_OFFSET_CLAMP
274 0x00028DF8 PA_SU_POLY_OFFSET_DB_FMT_CNTL
275 0x00028E04 PA_SU_POLY_OFFSET_FRONT_OFFSET
276 0x00028E00 PA_SU_POLY_OFFSET_FRONT_SCALE
277 0x00028814 PA_SU_SC_MODE_CNTL
278 0x00028C08 PA_SU_VTX_CNTL
279 0x00008C04 SQ_GPR_RESOURCE_MGMT_1
280 0x00008C08 SQ_GPR_RESOURCE_MGMT_2
281 0x00008C10 SQ_STACK_RESOURCE_MGMT_1
282 0x00008C14 SQ_STACK_RESOURCE_MGMT_2
283 0x00008C0C SQ_THREAD_RESOURCE_MGMT
284 0x00028380 SQ_VTX_SEMANTIC_0
285 0x00028384 SQ_VTX_SEMANTIC_1
286 0x00028388 SQ_VTX_SEMANTIC_2
287 0x0002838C SQ_VTX_SEMANTIC_3
288 0x00028390 SQ_VTX_SEMANTIC_4
289 0x00028394 SQ_VTX_SEMANTIC_5
290 0x00028398 SQ_VTX_SEMANTIC_6
291 0x0002839C SQ_VTX_SEMANTIC_7
292 0x000283A0 SQ_VTX_SEMANTIC_8
293 0x000283A4 SQ_VTX_SEMANTIC_9
294 0x000283A8 SQ_VTX_SEMANTIC_10
295 0x000283AC SQ_VTX_SEMANTIC_11
296 0x000283B0 SQ_VTX_SEMANTIC_12
297 0x000283B4 SQ_VTX_SEMANTIC_13
298 0x000283B8 SQ_VTX_SEMANTIC_14
299 0x000283BC SQ_VTX_SEMANTIC_15
300 0x000283C0 SQ_VTX_SEMANTIC_16
301 0x000283C4 SQ_VTX_SEMANTIC_17
302 0x000283C8 SQ_VTX_SEMANTIC_18
303 0x000283CC SQ_VTX_SEMANTIC_19
304 0x000283D0 SQ_VTX_SEMANTIC_20
305 0x000283D4 SQ_VTX_SEMANTIC_21
306 0x000283D8 SQ_VTX_SEMANTIC_22
307 0x000283DC SQ_VTX_SEMANTIC_23
308 0x000283E0 SQ_VTX_SEMANTIC_24
309 0x000283E4 SQ_VTX_SEMANTIC_25
310 0x000283E8 SQ_VTX_SEMANTIC_26
311 0x000283EC SQ_VTX_SEMANTIC_27
312 0x000283F0 SQ_VTX_SEMANTIC_28
313 0x000283F4 SQ_VTX_SEMANTIC_29
314 0x000283F8 SQ_VTX_SEMANTIC_30
315 0x000283FC SQ_VTX_SEMANTIC_31
316 0x000288E0 SQ_VTX_SEMANTIC_CLEAR
317 0x0003CFF4 SQ_VTX_START_INST_LOC
318 0x000281C0 SQ_ALU_CONST_BUFFER_SIZE_GS_0
319 0x000281C4 SQ_ALU_CONST_BUFFER_SIZE_GS_1
320 0x000281C8 SQ_ALU_CONST_BUFFER_SIZE_GS_2
321 0x000281CC SQ_ALU_CONST_BUFFER_SIZE_GS_3
322 0x000281D0 SQ_ALU_CONST_BUFFER_SIZE_GS_4
323 0x000281D4 SQ_ALU_CONST_BUFFER_SIZE_GS_5
324 0x000281D8 SQ_ALU_CONST_BUFFER_SIZE_GS_6
325 0x000281DC SQ_ALU_CONST_BUFFER_SIZE_GS_7
326 0x000281E0 SQ_ALU_CONST_BUFFER_SIZE_GS_8
327 0x000281E4 SQ_ALU_CONST_BUFFER_SIZE_GS_9
328 0x000281E8 SQ_ALU_CONST_BUFFER_SIZE_GS_10
329 0x000281EC SQ_ALU_CONST_BUFFER_SIZE_GS_11
330 0x000281F0 SQ_ALU_CONST_BUFFER_SIZE_GS_12
331 0x000281F4 SQ_ALU_CONST_BUFFER_SIZE_GS_13
332 0x000281F8 SQ_ALU_CONST_BUFFER_SIZE_GS_14
333 0x000281FC SQ_ALU_CONST_BUFFER_SIZE_GS_15
334 0x00028140 SQ_ALU_CONST_BUFFER_SIZE_PS_0
335 0x00028144 SQ_ALU_CONST_BUFFER_SIZE_PS_1
336 0x00028148 SQ_ALU_CONST_BUFFER_SIZE_PS_2
337 0x0002814C SQ_ALU_CONST_BUFFER_SIZE_PS_3
338 0x00028150 SQ_ALU_CONST_BUFFER_SIZE_PS_4
339 0x00028154 SQ_ALU_CONST_BUFFER_SIZE_PS_5
340 0x00028158 SQ_ALU_CONST_BUFFER_SIZE_PS_6
341 0x0002815C SQ_ALU_CONST_BUFFER_SIZE_PS_7
342 0x00028160 SQ_ALU_CONST_BUFFER_SIZE_PS_8
343 0x00028164 SQ_ALU_CONST_BUFFER_SIZE_PS_9
344 0x00028168 SQ_ALU_CONST_BUFFER_SIZE_PS_10
345 0x0002816C SQ_ALU_CONST_BUFFER_SIZE_PS_11
346 0x00028170 SQ_ALU_CONST_BUFFER_SIZE_PS_12
347 0x00028174 SQ_ALU_CONST_BUFFER_SIZE_PS_13
348 0x00028178 SQ_ALU_CONST_BUFFER_SIZE_PS_14
349 0x0002817C SQ_ALU_CONST_BUFFER_SIZE_PS_15
350 0x00028180 SQ_ALU_CONST_BUFFER_SIZE_VS_0
351 0x00028184 SQ_ALU_CONST_BUFFER_SIZE_VS_1
352 0x00028188 SQ_ALU_CONST_BUFFER_SIZE_VS_2
353 0x0002818C SQ_ALU_CONST_BUFFER_SIZE_VS_3
354 0x00028190 SQ_ALU_CONST_BUFFER_SIZE_VS_4
355 0x00028194 SQ_ALU_CONST_BUFFER_SIZE_VS_5
356 0x00028198 SQ_ALU_CONST_BUFFER_SIZE_VS_6
357 0x0002819C SQ_ALU_CONST_BUFFER_SIZE_VS_7
358 0x000281A0 SQ_ALU_CONST_BUFFER_SIZE_VS_8
359 0x000281A4 SQ_ALU_CONST_BUFFER_SIZE_VS_9
360 0x000281A8 SQ_ALU_CONST_BUFFER_SIZE_VS_10
361 0x000281AC SQ_ALU_CONST_BUFFER_SIZE_VS_11
362 0x000281B0 SQ_ALU_CONST_BUFFER_SIZE_VS_12
363 0x000281B4 SQ_ALU_CONST_BUFFER_SIZE_VS_13
364 0x000281B8 SQ_ALU_CONST_BUFFER_SIZE_VS_14
365 0x000281BC SQ_ALU_CONST_BUFFER_SIZE_VS_15
366 0x000288D8 SQ_PGM_CF_OFFSET_ES
367 0x000288DC SQ_PGM_CF_OFFSET_FS
368 0x000288D4 SQ_PGM_CF_OFFSET_GS
369 0x000288CC SQ_PGM_CF_OFFSET_PS
370 0x000288D0 SQ_PGM_CF_OFFSET_VS
371 0x00028854 SQ_PGM_EXPORTS_PS
372 0x00028890 SQ_PGM_RESOURCES_ES
373 0x000288A4 SQ_PGM_RESOURCES_FS
374 0x0002887C SQ_PGM_RESOURCES_GS
375 0x00028850 SQ_PGM_RESOURCES_PS
376 0x00028868 SQ_PGM_RESOURCES_VS
377 0x00009100 SPI_CONFIG_CNTL
378 0x0000913C SPI_CONFIG_CNTL_1
379 0x000286DC SPI_FOG_CNTL
380 0x000286E4 SPI_FOG_FUNC_BIAS
381 0x000286E0 SPI_FOG_FUNC_SCALE
382 0x000286D8 SPI_INPUT_Z
383 0x000286D4 SPI_INTERP_CONTROL_0
384 0x00028644 SPI_PS_INPUT_CNTL_0
385 0x00028648 SPI_PS_INPUT_CNTL_1
386 0x0002864C SPI_PS_INPUT_CNTL_2
387 0x00028650 SPI_PS_INPUT_CNTL_3
388 0x00028654 SPI_PS_INPUT_CNTL_4
389 0x00028658 SPI_PS_INPUT_CNTL_5
390 0x0002865C SPI_PS_INPUT_CNTL_6
391 0x00028660 SPI_PS_INPUT_CNTL_7
392 0x00028664 SPI_PS_INPUT_CNTL_8
393 0x00028668 SPI_PS_INPUT_CNTL_9
394 0x0002866C SPI_PS_INPUT_CNTL_10
395 0x00028670 SPI_PS_INPUT_CNTL_11
396 0x00028674 SPI_PS_INPUT_CNTL_12
397 0x00028678 SPI_PS_INPUT_CNTL_13
398 0x0002867C SPI_PS_INPUT_CNTL_14
399 0x00028680 SPI_PS_INPUT_CNTL_15
400 0x00028684 SPI_PS_INPUT_CNTL_16
401 0x00028688 SPI_PS_INPUT_CNTL_17
402 0x0002868C SPI_PS_INPUT_CNTL_18
403 0x00028690 SPI_PS_INPUT_CNTL_19
404 0x00028694 SPI_PS_INPUT_CNTL_20
405 0x00028698 SPI_PS_INPUT_CNTL_21
406 0x0002869C SPI_PS_INPUT_CNTL_22
407 0x000286A0 SPI_PS_INPUT_CNTL_23
408 0x000286A4 SPI_PS_INPUT_CNTL_24
409 0x000286A8 SPI_PS_INPUT_CNTL_25
410 0x000286AC SPI_PS_INPUT_CNTL_26
411 0x000286B0 SPI_PS_INPUT_CNTL_27
412 0x000286B4 SPI_PS_INPUT_CNTL_28
413 0x000286B8 SPI_PS_INPUT_CNTL_29
414 0x000286BC SPI_PS_INPUT_CNTL_30
415 0x000286C0 SPI_PS_INPUT_CNTL_31
416 0x000286CC SPI_PS_IN_CONTROL_0
417 0x000286D0 SPI_PS_IN_CONTROL_1
418 0x000286C4 SPI_VS_OUT_CONFIG
419 0x00028614 SPI_VS_OUT_ID_0
420 0x00028618 SPI_VS_OUT_ID_1
421 0x0002861C SPI_VS_OUT_ID_2
422 0x00028620 SPI_VS_OUT_ID_3
423 0x00028624 SPI_VS_OUT_ID_4
424 0x00028628 SPI_VS_OUT_ID_5
425 0x0002862C SPI_VS_OUT_ID_6
426 0x00028630 SPI_VS_OUT_ID_7
427 0x00028634 SPI_VS_OUT_ID_8
428 0x00028638 SPI_VS_OUT_ID_9
429 0x00028438 SX_ALPHA_REF
430 0x00028410 SX_ALPHA_TEST_CONTROL
431 0x00028350 SX_MISC
432 0x00009014 SX_MEMORY_EXPORT_SIZE
433 0x00009604 TC_INVALIDATE
434 0x00009400 TD_FILTER4
435 0x00009404 TD_FILTER4_1
436 0x00009408 TD_FILTER4_2
437 0x0000940C TD_FILTER4_3
438 0x00009410 TD_FILTER4_4
439 0x00009414 TD_FILTER4_5
440 0x00009418 TD_FILTER4_6
441 0x0000941C TD_FILTER4_7
442 0x00009420 TD_FILTER4_8
443 0x00009424 TD_FILTER4_9
444 0x00009428 TD_FILTER4_10
445 0x0000942C TD_FILTER4_11
446 0x00009430 TD_FILTER4_12
447 0x00009434 TD_FILTER4_13
448 0x00009438 TD_FILTER4_14
449 0x0000943C TD_FILTER4_15
450 0x00009440 TD_FILTER4_16
451 0x00009444 TD_FILTER4_17
452 0x00009448 TD_FILTER4_18
453 0x0000944C TD_FILTER4_19
454 0x00009450 TD_FILTER4_20
455 0x00009454 TD_FILTER4_21
456 0x00009458 TD_FILTER4_22
457 0x0000945C TD_FILTER4_23
458 0x00009460 TD_FILTER4_24
459 0x00009464 TD_FILTER4_25
460 0x00009468 TD_FILTER4_26
461 0x0000946C TD_FILTER4_27
462 0x00009470 TD_FILTER4_28
463 0x00009474 TD_FILTER4_29
464 0x00009478 TD_FILTER4_30
465 0x0000947C TD_FILTER4_31
466 0x00009480 TD_FILTER4_32
467 0x00009484 TD_FILTER4_33
468 0x00009488 TD_FILTER4_34
469 0x0000948C TD_FILTER4_35
470 0x0000A80C TD_GS_SAMPLER0_BORDER_ALPHA
471 0x0000A81C TD_GS_SAMPLER1_BORDER_ALPHA
472 0x0000A82C TD_GS_SAMPLER2_BORDER_ALPHA
473 0x0000A83C TD_GS_SAMPLER3_BORDER_ALPHA
474 0x0000A84C TD_GS_SAMPLER4_BORDER_ALPHA
475 0x0000A85C TD_GS_SAMPLER5_BORDER_ALPHA
476 0x0000A86C TD_GS_SAMPLER6_BORDER_ALPHA
477 0x0000A87C TD_GS_SAMPLER7_BORDER_ALPHA
478 0x0000A88C TD_GS_SAMPLER8_BORDER_ALPHA
479 0x0000A89C TD_GS_SAMPLER9_BORDER_ALPHA
480 0x0000A8AC TD_GS_SAMPLER10_BORDER_ALPHA
481 0x0000A8BC TD_GS_SAMPLER11_BORDER_ALPHA
482 0x0000A8CC TD_GS_SAMPLER12_BORDER_ALPHA
483 0x0000A8DC TD_GS_SAMPLER13_BORDER_ALPHA
484 0x0000A8EC TD_GS_SAMPLER14_BORDER_ALPHA
485 0x0000A8FC TD_GS_SAMPLER15_BORDER_ALPHA
486 0x0000A90C TD_GS_SAMPLER16_BORDER_ALPHA
487 0x0000A91C TD_GS_SAMPLER17_BORDER_ALPHA
488 0x0000A808 TD_GS_SAMPLER0_BORDER_BLUE
489 0x0000A818 TD_GS_SAMPLER1_BORDER_BLUE
490 0x0000A828 TD_GS_SAMPLER2_BORDER_BLUE
491 0x0000A838 TD_GS_SAMPLER3_BORDER_BLUE
492 0x0000A848 TD_GS_SAMPLER4_BORDER_BLUE
493 0x0000A858 TD_GS_SAMPLER5_BORDER_BLUE
494 0x0000A868 TD_GS_SAMPLER6_BORDER_BLUE
495 0x0000A878 TD_GS_SAMPLER7_BORDER_BLUE
496 0x0000A888 TD_GS_SAMPLER8_BORDER_BLUE
497 0x0000A898 TD_GS_SAMPLER9_BORDER_BLUE
498 0x0000A8A8 TD_GS_SAMPLER10_BORDER_BLUE
499 0x0000A8B8 TD_GS_SAMPLER11_BORDER_BLUE
500 0x0000A8C8 TD_GS_SAMPLER12_BORDER_BLUE
501 0x0000A8D8 TD_GS_SAMPLER13_BORDER_BLUE
502 0x0000A8E8 TD_GS_SAMPLER14_BORDER_BLUE
503 0x0000A8F8 TD_GS_SAMPLER15_BORDER_BLUE
504 0x0000A908 TD_GS_SAMPLER16_BORDER_BLUE
505 0x0000A918 TD_GS_SAMPLER17_BORDER_BLUE
506 0x0000A804 TD_GS_SAMPLER0_BORDER_GREEN
507 0x0000A814 TD_GS_SAMPLER1_BORDER_GREEN
508 0x0000A824 TD_GS_SAMPLER2_BORDER_GREEN
509 0x0000A834 TD_GS_SAMPLER3_BORDER_GREEN
510 0x0000A844 TD_GS_SAMPLER4_BORDER_GREEN
511 0x0000A854 TD_GS_SAMPLER5_BORDER_GREEN
512 0x0000A864 TD_GS_SAMPLER6_BORDER_GREEN
513 0x0000A874 TD_GS_SAMPLER7_BORDER_GREEN
514 0x0000A884 TD_GS_SAMPLER8_BORDER_GREEN
515 0x0000A894 TD_GS_SAMPLER9_BORDER_GREEN
516 0x0000A8A4 TD_GS_SAMPLER10_BORDER_GREEN
517 0x0000A8B4 TD_GS_SAMPLER11_BORDER_GREEN
518 0x0000A8C4 TD_GS_SAMPLER12_BORDER_GREEN
519 0x0000A8D4 TD_GS_SAMPLER13_BORDER_GREEN
520 0x0000A8E4 TD_GS_SAMPLER14_BORDER_GREEN
521 0x0000A8F4 TD_GS_SAMPLER15_BORDER_GREEN
522 0x0000A904 TD_GS_SAMPLER16_BORDER_GREEN
523 0x0000A914 TD_GS_SAMPLER17_BORDER_GREEN
524 0x0000A800 TD_GS_SAMPLER0_BORDER_RED
525 0x0000A810 TD_GS_SAMPLER1_BORDER_RED
526 0x0000A820 TD_GS_SAMPLER2_BORDER_RED
527 0x0000A830 TD_GS_SAMPLER3_BORDER_RED
528 0x0000A840 TD_GS_SAMPLER4_BORDER_RED
529 0x0000A850 TD_GS_SAMPLER5_BORDER_RED
530 0x0000A860 TD_GS_SAMPLER6_BORDER_RED
531 0x0000A870 TD_GS_SAMPLER7_BORDER_RED
532 0x0000A880 TD_GS_SAMPLER8_BORDER_RED
533 0x0000A890 TD_GS_SAMPLER9_BORDER_RED
534 0x0000A8A0 TD_GS_SAMPLER10_BORDER_RED
535 0x0000A8B0 TD_GS_SAMPLER11_BORDER_RED
536 0x0000A8C0 TD_GS_SAMPLER12_BORDER_RED
537 0x0000A8D0 TD_GS_SAMPLER13_BORDER_RED
538 0x0000A8E0 TD_GS_SAMPLER14_BORDER_RED
539 0x0000A8F0 TD_GS_SAMPLER15_BORDER_RED
540 0x0000A900 TD_GS_SAMPLER16_BORDER_RED
541 0x0000A910 TD_GS_SAMPLER17_BORDER_RED
542 0x0000A40C TD_PS_SAMPLER0_BORDER_ALPHA
543 0x0000A41C TD_PS_SAMPLER1_BORDER_ALPHA
544 0x0000A42C TD_PS_SAMPLER2_BORDER_ALPHA
545 0x0000A43C TD_PS_SAMPLER3_BORDER_ALPHA
546 0x0000A44C TD_PS_SAMPLER4_BORDER_ALPHA
547 0x0000A45C TD_PS_SAMPLER5_BORDER_ALPHA
548 0x0000A46C TD_PS_SAMPLER6_BORDER_ALPHA
549 0x0000A47C TD_PS_SAMPLER7_BORDER_ALPHA
550 0x0000A48C TD_PS_SAMPLER8_BORDER_ALPHA
551 0x0000A49C TD_PS_SAMPLER9_BORDER_ALPHA
552 0x0000A4AC TD_PS_SAMPLER10_BORDER_ALPHA
553 0x0000A4BC TD_PS_SAMPLER11_BORDER_ALPHA
554 0x0000A4CC TD_PS_SAMPLER12_BORDER_ALPHA
555 0x0000A4DC TD_PS_SAMPLER13_BORDER_ALPHA
556 0x0000A4EC TD_PS_SAMPLER14_BORDER_ALPHA
557 0x0000A4FC TD_PS_SAMPLER15_BORDER_ALPHA
558 0x0000A50C TD_PS_SAMPLER16_BORDER_ALPHA
559 0x0000A51C TD_PS_SAMPLER17_BORDER_ALPHA
560 0x0000A408 TD_PS_SAMPLER0_BORDER_BLUE
561 0x0000A418 TD_PS_SAMPLER1_BORDER_BLUE
562 0x0000A428 TD_PS_SAMPLER2_BORDER_BLUE
563 0x0000A438 TD_PS_SAMPLER3_BORDER_BLUE
564 0x0000A448 TD_PS_SAMPLER4_BORDER_BLUE
565 0x0000A458 TD_PS_SAMPLER5_BORDER_BLUE
566 0x0000A468 TD_PS_SAMPLER6_BORDER_BLUE
567 0x0000A478 TD_PS_SAMPLER7_BORDER_BLUE
568 0x0000A488 TD_PS_SAMPLER8_BORDER_BLUE
569 0x0000A498 TD_PS_SAMPLER9_BORDER_BLUE
570 0x0000A4A8 TD_PS_SAMPLER10_BORDER_BLUE
571 0x0000A4B8 TD_PS_SAMPLER11_BORDER_BLUE
572 0x0000A4C8 TD_PS_SAMPLER12_BORDER_BLUE
573 0x0000A4D8 TD_PS_SAMPLER13_BORDER_BLUE
574 0x0000A4E8 TD_PS_SAMPLER14_BORDER_BLUE
575 0x0000A4F8 TD_PS_SAMPLER15_BORDER_BLUE
576 0x0000A508 TD_PS_SAMPLER16_BORDER_BLUE
577 0x0000A518 TD_PS_SAMPLER17_BORDER_BLUE
578 0x0000A404 TD_PS_SAMPLER0_BORDER_GREEN
579 0x0000A414 TD_PS_SAMPLER1_BORDER_GREEN
580 0x0000A424 TD_PS_SAMPLER2_BORDER_GREEN
581 0x0000A434 TD_PS_SAMPLER3_BORDER_GREEN
582 0x0000A444 TD_PS_SAMPLER4_BORDER_GREEN
583 0x0000A454 TD_PS_SAMPLER5_BORDER_GREEN
584 0x0000A464 TD_PS_SAMPLER6_BORDER_GREEN
585 0x0000A474 TD_PS_SAMPLER7_BORDER_GREEN
586 0x0000A484 TD_PS_SAMPLER8_BORDER_GREEN
587 0x0000A494 TD_PS_SAMPLER9_BORDER_GREEN
588 0x0000A4A4 TD_PS_SAMPLER10_BORDER_GREEN
589 0x0000A4B4 TD_PS_SAMPLER11_BORDER_GREEN
590 0x0000A4C4 TD_PS_SAMPLER12_BORDER_GREEN
591 0x0000A4D4 TD_PS_SAMPLER13_BORDER_GREEN
592 0x0000A4E4 TD_PS_SAMPLER14_BORDER_GREEN
593 0x0000A4F4 TD_PS_SAMPLER15_BORDER_GREEN
594 0x0000A504 TD_PS_SAMPLER16_BORDER_GREEN
595 0x0000A514 TD_PS_SAMPLER17_BORDER_GREEN
596 0x0000A400 TD_PS_SAMPLER0_BORDER_RED
597 0x0000A410 TD_PS_SAMPLER1_BORDER_RED
598 0x0000A420 TD_PS_SAMPLER2_BORDER_RED
599 0x0000A430 TD_PS_SAMPLER3_BORDER_RED
600 0x0000A440 TD_PS_SAMPLER4_BORDER_RED
601 0x0000A450 TD_PS_SAMPLER5_BORDER_RED
602 0x0000A460 TD_PS_SAMPLER6_BORDER_RED
603 0x0000A470 TD_PS_SAMPLER7_BORDER_RED
604 0x0000A480 TD_PS_SAMPLER8_BORDER_RED
605 0x0000A490 TD_PS_SAMPLER9_BORDER_RED
606 0x0000A4A0 TD_PS_SAMPLER10_BORDER_RED
607 0x0000A4B0 TD_PS_SAMPLER11_BORDER_RED
608 0x0000A4C0 TD_PS_SAMPLER12_BORDER_RED
609 0x0000A4D0 TD_PS_SAMPLER13_BORDER_RED
610 0x0000A4E0 TD_PS_SAMPLER14_BORDER_RED
611 0x0000A4F0 TD_PS_SAMPLER15_BORDER_RED
612 0x0000A500 TD_PS_SAMPLER16_BORDER_RED
613 0x0000A510 TD_PS_SAMPLER17_BORDER_RED
614 0x0000AA00 TD_PS_SAMPLER0_CLEARTYPE_KERNEL
615 0x0000AA04 TD_PS_SAMPLER1_CLEARTYPE_KERNEL
616 0x0000AA08 TD_PS_SAMPLER2_CLEARTYPE_KERNEL
617 0x0000AA0C TD_PS_SAMPLER3_CLEARTYPE_KERNEL
618 0x0000AA10 TD_PS_SAMPLER4_CLEARTYPE_KERNEL
619 0x0000AA14 TD_PS_SAMPLER5_CLEARTYPE_KERNEL
620 0x0000AA18 TD_PS_SAMPLER6_CLEARTYPE_KERNEL
621 0x0000AA1C TD_PS_SAMPLER7_CLEARTYPE_KERNEL
622 0x0000AA20 TD_PS_SAMPLER8_CLEARTYPE_KERNEL
623 0x0000AA24 TD_PS_SAMPLER9_CLEARTYPE_KERNEL
624 0x0000AA28 TD_PS_SAMPLER10_CLEARTYPE_KERNEL
625 0x0000AA2C TD_PS_SAMPLER11_CLEARTYPE_KERNEL
626 0x0000AA30 TD_PS_SAMPLER12_CLEARTYPE_KERNEL
627 0x0000AA34 TD_PS_SAMPLER13_CLEARTYPE_KERNEL
628 0x0000AA38 TD_PS_SAMPLER14_CLEARTYPE_KERNEL
629 0x0000AA3C TD_PS_SAMPLER15_CLEARTYPE_KERNEL
630 0x0000AA40 TD_PS_SAMPLER16_CLEARTYPE_KERNEL
631 0x0000AA44 TD_PS_SAMPLER17_CLEARTYPE_KERNEL
632 0x0000A60C TD_VS_SAMPLER0_BORDER_ALPHA
633 0x0000A61C TD_VS_SAMPLER1_BORDER_ALPHA
634 0x0000A62C TD_VS_SAMPLER2_BORDER_ALPHA
635 0x0000A63C TD_VS_SAMPLER3_BORDER_ALPHA
636 0x0000A64C TD_VS_SAMPLER4_BORDER_ALPHA
637 0x0000A65C TD_VS_SAMPLER5_BORDER_ALPHA
638 0x0000A66C TD_VS_SAMPLER6_BORDER_ALPHA
639 0x0000A67C TD_VS_SAMPLER7_BORDER_ALPHA
640 0x0000A68C TD_VS_SAMPLER8_BORDER_ALPHA
641 0x0000A69C TD_VS_SAMPLER9_BORDER_ALPHA
642 0x0000A6AC TD_VS_SAMPLER10_BORDER_ALPHA
643 0x0000A6BC TD_VS_SAMPLER11_BORDER_ALPHA
644 0x0000A6CC TD_VS_SAMPLER12_BORDER_ALPHA
645 0x0000A6DC TD_VS_SAMPLER13_BORDER_ALPHA
646 0x0000A6EC TD_VS_SAMPLER14_BORDER_ALPHA
647 0x0000A6FC TD_VS_SAMPLER15_BORDER_ALPHA
648 0x0000A70C TD_VS_SAMPLER16_BORDER_ALPHA
649 0x0000A71C TD_VS_SAMPLER17_BORDER_ALPHA
650 0x0000A608 TD_VS_SAMPLER0_BORDER_BLUE
651 0x0000A618 TD_VS_SAMPLER1_BORDER_BLUE
652 0x0000A628 TD_VS_SAMPLER2_BORDER_BLUE
653 0x0000A638 TD_VS_SAMPLER3_BORDER_BLUE
654 0x0000A648 TD_VS_SAMPLER4_BORDER_BLUE
655 0x0000A658 TD_VS_SAMPLER5_BORDER_BLUE
656 0x0000A668 TD_VS_SAMPLER6_BORDER_BLUE
657 0x0000A678 TD_VS_SAMPLER7_BORDER_BLUE
658 0x0000A688 TD_VS_SAMPLER8_BORDER_BLUE
659 0x0000A698 TD_VS_SAMPLER9_BORDER_BLUE
660 0x0000A6A8 TD_VS_SAMPLER10_BORDER_BLUE
661 0x0000A6B8 TD_VS_SAMPLER11_BORDER_BLUE
662 0x0000A6C8 TD_VS_SAMPLER12_BORDER_BLUE
663 0x0000A6D8 TD_VS_SAMPLER13_BORDER_BLUE
664 0x0000A6E8 TD_VS_SAMPLER14_BORDER_BLUE
665 0x0000A6F8 TD_VS_SAMPLER15_BORDER_BLUE
666 0x0000A708 TD_VS_SAMPLER16_BORDER_BLUE
667 0x0000A718 TD_VS_SAMPLER17_BORDER_BLUE
668 0x0000A604 TD_VS_SAMPLER0_BORDER_GREEN
669 0x0000A614 TD_VS_SAMPLER1_BORDER_GREEN
670 0x0000A624 TD_VS_SAMPLER2_BORDER_GREEN
671 0x0000A634 TD_VS_SAMPLER3_BORDER_GREEN
672 0x0000A644 TD_VS_SAMPLER4_BORDER_GREEN
673 0x0000A654 TD_VS_SAMPLER5_BORDER_GREEN
674 0x0000A664 TD_VS_SAMPLER6_BORDER_GREEN
675 0x0000A674 TD_VS_SAMPLER7_BORDER_GREEN
676 0x0000A684 TD_VS_SAMPLER8_BORDER_GREEN
677 0x0000A694 TD_VS_SAMPLER9_BORDER_GREEN
678 0x0000A6A4 TD_VS_SAMPLER10_BORDER_GREEN
679 0x0000A6B4 TD_VS_SAMPLER11_BORDER_GREEN
680 0x0000A6C4 TD_VS_SAMPLER12_BORDER_GREEN
681 0x0000A6D4 TD_VS_SAMPLER13_BORDER_GREEN
682 0x0000A6E4 TD_VS_SAMPLER14_BORDER_GREEN
683 0x0000A6F4 TD_VS_SAMPLER15_BORDER_GREEN
684 0x0000A704 TD_VS_SAMPLER16_BORDER_GREEN
685 0x0000A714 TD_VS_SAMPLER17_BORDER_GREEN
686 0x0000A600 TD_VS_SAMPLER0_BORDER_RED
687 0x0000A610 TD_VS_SAMPLER1_BORDER_RED
688 0x0000A620 TD_VS_SAMPLER2_BORDER_RED
689 0x0000A630 TD_VS_SAMPLER3_BORDER_RED
690 0x0000A640 TD_VS_SAMPLER4_BORDER_RED
691 0x0000A650 TD_VS_SAMPLER5_BORDER_RED
692 0x0000A660 TD_VS_SAMPLER6_BORDER_RED
693 0x0000A670 TD_VS_SAMPLER7_BORDER_RED
694 0x0000A680 TD_VS_SAMPLER8_BORDER_RED
695 0x0000A690 TD_VS_SAMPLER9_BORDER_RED
696 0x0000A6A0 TD_VS_SAMPLER10_BORDER_RED
697 0x0000A6B0 TD_VS_SAMPLER11_BORDER_RED
698 0x0000A6C0 TD_VS_SAMPLER12_BORDER_RED
699 0x0000A6D0 TD_VS_SAMPLER13_BORDER_RED
700 0x0000A6E0 TD_VS_SAMPLER14_BORDER_RED
701 0x0000A6F0 TD_VS_SAMPLER15_BORDER_RED
702 0x0000A700 TD_VS_SAMPLER16_BORDER_RED
703 0x0000A710 TD_VS_SAMPLER17_BORDER_RED
704 0x00009508 TA_CNTL_AUX
705 0x0002802C DB_DEPTH_CLEAR
706 0x00028D24 DB_HTILE_SURFACE
707 0x00028D34 DB_PREFETCH_LIMIT
708 0x00028D30 DB_PRELOAD_CONTROL
709 0x00028D0C DB_RENDER_CONTROL
710 0x00028D10 DB_RENDER_OVERRIDE
711 0x0002880C DB_SHADER_CONTROL
712 0x00028D28 DB_SRESULTS_COMPARE_STATE0
713 0x00028D2C DB_SRESULTS_COMPARE_STATE1
714 0x00028430 DB_STENCILREFMASK
715 0x00028434 DB_STENCILREFMASK_BF
716 0x00028028 DB_STENCIL_CLEAR
717 0x00028780 CB_BLEND0_CONTROL
718 0x00028784 CB_BLEND1_CONTROL
719 0x00028788 CB_BLEND2_CONTROL
720 0x0002878C CB_BLEND3_CONTROL
721 0x00028790 CB_BLEND4_CONTROL
722 0x00028794 CB_BLEND5_CONTROL
723 0x00028798 CB_BLEND6_CONTROL
724 0x0002879C CB_BLEND7_CONTROL
725 0x00028804 CB_BLEND_CONTROL
726 0x00028420 CB_BLEND_ALPHA
727 0x0002841C CB_BLEND_BLUE
728 0x00028418 CB_BLEND_GREEN
729 0x00028414 CB_BLEND_RED
730 0x0002812C CB_CLEAR_ALPHA
731 0x00028128 CB_CLEAR_BLUE
732 0x00028124 CB_CLEAR_GREEN
733 0x00028120 CB_CLEAR_RED
734 0x00028C30 CB_CLRCMP_CONTROL
735 0x00028C38 CB_CLRCMP_DST
736 0x00028C3C CB_CLRCMP_MSK
737 0x00028C34 CB_CLRCMP_SRC
738 0x00028100 CB_COLOR0_MASK
739 0x00028104 CB_COLOR1_MASK
740 0x00028108 CB_COLOR2_MASK
741 0x0002810C CB_COLOR3_MASK
742 0x00028110 CB_COLOR4_MASK
743 0x00028114 CB_COLOR5_MASK
744 0x00028118 CB_COLOR6_MASK
745 0x0002811C CB_COLOR7_MASK
746 0x00028080 CB_COLOR0_VIEW
747 0x00028084 CB_COLOR1_VIEW
748 0x00028088 CB_COLOR2_VIEW
749 0x0002808C CB_COLOR3_VIEW
750 0x00028090 CB_COLOR4_VIEW
751 0x00028094 CB_COLOR5_VIEW
752 0x00028098 CB_COLOR6_VIEW
753 0x0002809C CB_COLOR7_VIEW
754 0x00028808 CB_COLOR_CONTROL
755 0x0002842C CB_FOG_BLUE
756 0x00028428 CB_FOG_GREEN
757 0x00028424 CB_FOG_RED
758 0x00008040 WAIT_UNTIL
759 0x00009714 VC_ENHANCE
760 0x00009830 DB_DEBUG
761 0x00009838 DB_WATERMARKS
762 0x00028D44 DB_ALPHA_TO_MASK
763 0x00009700 VC_CNTL