Add linux-next specific files for 20110831
[linux-2.6/next.git] / drivers / media / video / mt9m111.c
blob66e3c3c2e60601fb8ac4319397df4b051207de24
1 /*
2 * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina
4 * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #include <linux/videodev2.h>
11 #include <linux/slab.h>
12 #include <linux/i2c.h>
13 #include <linux/log2.h>
14 #include <linux/gpio.h>
15 #include <linux/delay.h>
16 #include <linux/module.h>
18 #include <media/v4l2-common.h>
19 #include <media/v4l2-chip-ident.h>
20 #include <media/soc_camera.h>
23 * MT9M111, MT9M112 and MT9M131:
24 * i2c address is 0x48 or 0x5d (depending on SADDR pin)
25 * The platform has to define i2c_board_info and call i2c_register_board_info()
29 * Sensor core register addresses (0x000..0x0ff)
31 #define MT9M111_CHIP_VERSION 0x000
32 #define MT9M111_ROW_START 0x001
33 #define MT9M111_COLUMN_START 0x002
34 #define MT9M111_WINDOW_HEIGHT 0x003
35 #define MT9M111_WINDOW_WIDTH 0x004
36 #define MT9M111_HORIZONTAL_BLANKING_B 0x005
37 #define MT9M111_VERTICAL_BLANKING_B 0x006
38 #define MT9M111_HORIZONTAL_BLANKING_A 0x007
39 #define MT9M111_VERTICAL_BLANKING_A 0x008
40 #define MT9M111_SHUTTER_WIDTH 0x009
41 #define MT9M111_ROW_SPEED 0x00a
42 #define MT9M111_EXTRA_DELAY 0x00b
43 #define MT9M111_SHUTTER_DELAY 0x00c
44 #define MT9M111_RESET 0x00d
45 #define MT9M111_READ_MODE_B 0x020
46 #define MT9M111_READ_MODE_A 0x021
47 #define MT9M111_FLASH_CONTROL 0x023
48 #define MT9M111_GREEN1_GAIN 0x02b
49 #define MT9M111_BLUE_GAIN 0x02c
50 #define MT9M111_RED_GAIN 0x02d
51 #define MT9M111_GREEN2_GAIN 0x02e
52 #define MT9M111_GLOBAL_GAIN 0x02f
53 #define MT9M111_CONTEXT_CONTROL 0x0c8
54 #define MT9M111_PAGE_MAP 0x0f0
55 #define MT9M111_BYTE_WISE_ADDR 0x0f1
57 #define MT9M111_RESET_SYNC_CHANGES (1 << 15)
58 #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9)
59 #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8)
60 #define MT9M111_RESET_RESET_SOC (1 << 5)
61 #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4)
62 #define MT9M111_RESET_CHIP_ENABLE (1 << 3)
63 #define MT9M111_RESET_ANALOG_STANDBY (1 << 2)
64 #define MT9M111_RESET_RESTART_FRAME (1 << 1)
65 #define MT9M111_RESET_RESET_MODE (1 << 0)
67 #define MT9M111_RM_FULL_POWER_RD (0 << 10)
68 #define MT9M111_RM_LOW_POWER_RD (1 << 10)
69 #define MT9M111_RM_COL_SKIP_4X (1 << 5)
70 #define MT9M111_RM_ROW_SKIP_4X (1 << 4)
71 #define MT9M111_RM_COL_SKIP_2X (1 << 3)
72 #define MT9M111_RM_ROW_SKIP_2X (1 << 2)
73 #define MT9M111_RMB_MIRROR_COLS (1 << 1)
74 #define MT9M111_RMB_MIRROR_ROWS (1 << 0)
75 #define MT9M111_CTXT_CTRL_RESTART (1 << 15)
76 #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12)
77 #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10)
78 #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9)
79 #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8)
80 #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7)
81 #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3)
82 #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2)
83 #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1)
84 #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0)
87 * Colorpipe register addresses (0x100..0x1ff)
89 #define MT9M111_OPER_MODE_CTRL 0x106
90 #define MT9M111_OUTPUT_FORMAT_CTRL 0x108
91 #define MT9M111_REDUCER_XZOOM_B 0x1a0
92 #define MT9M111_REDUCER_XSIZE_B 0x1a1
93 #define MT9M111_REDUCER_YZOOM_B 0x1a3
94 #define MT9M111_REDUCER_YSIZE_B 0x1a4
95 #define MT9M111_REDUCER_XZOOM_A 0x1a6
96 #define MT9M111_REDUCER_XSIZE_A 0x1a7
97 #define MT9M111_REDUCER_YZOOM_A 0x1a9
98 #define MT9M111_REDUCER_YSIZE_A 0x1aa
100 #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a
101 #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b
103 #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14)
104 #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1)
105 #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9)
106 #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8)
107 #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14)
108 #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10)
109 #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9)
110 #define MT9M111_OUTFMT_RGB (1 << 8)
111 #define MT9M111_OUTFMT_RGB565 (0 << 6)
112 #define MT9M111_OUTFMT_RGB555 (1 << 6)
113 #define MT9M111_OUTFMT_RGB444x (2 << 6)
114 #define MT9M111_OUTFMT_RGBx444 (3 << 6)
115 #define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4)
116 #define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4)
117 #define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4)
118 #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4)
119 #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3)
120 #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2)
121 #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1)
122 #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0)
125 * Camera control register addresses (0x200..0x2ff not implemented)
128 #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg)
129 #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val))
130 #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val))
131 #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val))
132 #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \
133 (val), (mask))
135 #define MT9M111_MIN_DARK_ROWS 8
136 #define MT9M111_MIN_DARK_COLS 26
137 #define MT9M111_MAX_HEIGHT 1024
138 #define MT9M111_MAX_WIDTH 1280
140 /* MT9M111 has only one fixed colorspace per pixelcode */
141 struct mt9m111_datafmt {
142 enum v4l2_mbus_pixelcode code;
143 enum v4l2_colorspace colorspace;
146 /* Find a data format by a pixel code in an array */
147 static const struct mt9m111_datafmt *mt9m111_find_datafmt(
148 enum v4l2_mbus_pixelcode code, const struct mt9m111_datafmt *fmt,
149 int n)
151 int i;
152 for (i = 0; i < n; i++)
153 if (fmt[i].code == code)
154 return fmt + i;
156 return NULL;
159 static const struct mt9m111_datafmt mt9m111_colour_fmts[] = {
160 {V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
161 {V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
162 {V4L2_MBUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_JPEG},
163 {V4L2_MBUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_JPEG},
164 {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
165 {V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
166 {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
167 {V4L2_MBUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
168 {V4L2_MBUS_FMT_BGR565_2X8_LE, V4L2_COLORSPACE_SRGB},
169 {V4L2_MBUS_FMT_BGR565_2X8_BE, V4L2_COLORSPACE_SRGB},
170 {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
171 {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
174 enum mt9m111_context {
175 HIGHPOWER = 0,
176 LOWPOWER,
179 struct mt9m111 {
180 struct v4l2_subdev subdev;
181 int model; /* V4L2_IDENT_MT9M111 or V4L2_IDENT_MT9M112 code
182 * from v4l2-chip-ident.h */
183 enum mt9m111_context context;
184 struct v4l2_rect rect;
185 struct mutex power_lock; /* lock to protect power_count */
186 int power_count;
187 const struct mt9m111_datafmt *fmt;
188 unsigned int gain;
189 unsigned char autoexposure;
190 unsigned char datawidth;
191 unsigned int powered:1;
192 unsigned int hflip:1;
193 unsigned int vflip:1;
194 unsigned int autowhitebalance:1;
197 static struct mt9m111 *to_mt9m111(const struct i2c_client *client)
199 return container_of(i2c_get_clientdata(client), struct mt9m111, subdev);
202 static int reg_page_map_set(struct i2c_client *client, const u16 reg)
204 int ret;
205 u16 page;
206 static int lastpage = -1; /* PageMap cache value */
208 page = (reg >> 8);
209 if (page == lastpage)
210 return 0;
211 if (page > 2)
212 return -EINVAL;
214 ret = i2c_smbus_write_word_data(client, MT9M111_PAGE_MAP, swab16(page));
215 if (!ret)
216 lastpage = page;
217 return ret;
220 static int mt9m111_reg_read(struct i2c_client *client, const u16 reg)
222 int ret;
224 ret = reg_page_map_set(client, reg);
225 if (!ret)
226 ret = swab16(i2c_smbus_read_word_data(client, reg & 0xff));
228 dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret);
229 return ret;
232 static int mt9m111_reg_write(struct i2c_client *client, const u16 reg,
233 const u16 data)
235 int ret;
237 ret = reg_page_map_set(client, reg);
238 if (!ret)
239 ret = i2c_smbus_write_word_data(client, reg & 0xff,
240 swab16(data));
241 dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret);
242 return ret;
245 static int mt9m111_reg_set(struct i2c_client *client, const u16 reg,
246 const u16 data)
248 int ret;
250 ret = mt9m111_reg_read(client, reg);
251 if (ret >= 0)
252 ret = mt9m111_reg_write(client, reg, ret | data);
253 return ret;
256 static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg,
257 const u16 data)
259 int ret;
261 ret = mt9m111_reg_read(client, reg);
262 if (ret >= 0)
263 ret = mt9m111_reg_write(client, reg, ret & ~data);
264 return ret;
267 static int mt9m111_reg_mask(struct i2c_client *client, const u16 reg,
268 const u16 data, const u16 mask)
270 int ret;
272 ret = mt9m111_reg_read(client, reg);
273 if (ret >= 0)
274 ret = mt9m111_reg_write(client, reg, (ret & ~mask) | data);
275 return ret;
278 static int mt9m111_set_context(struct mt9m111 *mt9m111,
279 enum mt9m111_context ctxt)
281 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
282 int valB = MT9M111_CTXT_CTRL_RESTART | MT9M111_CTXT_CTRL_DEFECTCOR_B
283 | MT9M111_CTXT_CTRL_RESIZE_B | MT9M111_CTXT_CTRL_CTRL2_B
284 | MT9M111_CTXT_CTRL_GAMMA_B | MT9M111_CTXT_CTRL_READ_MODE_B
285 | MT9M111_CTXT_CTRL_VBLANK_SEL_B
286 | MT9M111_CTXT_CTRL_HBLANK_SEL_B;
287 int valA = MT9M111_CTXT_CTRL_RESTART;
289 if (ctxt == HIGHPOWER)
290 return reg_write(CONTEXT_CONTROL, valB);
291 else
292 return reg_write(CONTEXT_CONTROL, valA);
295 static int mt9m111_setup_rect(struct mt9m111 *mt9m111,
296 struct v4l2_rect *rect)
298 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
299 int ret, is_raw_format;
300 int width = rect->width;
301 int height = rect->height;
303 if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
304 mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE)
305 is_raw_format = 1;
306 else
307 is_raw_format = 0;
309 ret = reg_write(COLUMN_START, rect->left);
310 if (!ret)
311 ret = reg_write(ROW_START, rect->top);
313 if (is_raw_format) {
314 if (!ret)
315 ret = reg_write(WINDOW_WIDTH, width);
316 if (!ret)
317 ret = reg_write(WINDOW_HEIGHT, height);
318 } else {
319 if (!ret)
320 ret = reg_write(REDUCER_XZOOM_B, MT9M111_MAX_WIDTH);
321 if (!ret)
322 ret = reg_write(REDUCER_YZOOM_B, MT9M111_MAX_HEIGHT);
323 if (!ret)
324 ret = reg_write(REDUCER_XSIZE_B, width);
325 if (!ret)
326 ret = reg_write(REDUCER_YSIZE_B, height);
327 if (!ret)
328 ret = reg_write(REDUCER_XZOOM_A, MT9M111_MAX_WIDTH);
329 if (!ret)
330 ret = reg_write(REDUCER_YZOOM_A, MT9M111_MAX_HEIGHT);
331 if (!ret)
332 ret = reg_write(REDUCER_XSIZE_A, width);
333 if (!ret)
334 ret = reg_write(REDUCER_YSIZE_A, height);
337 return ret;
340 static int mt9m111_enable(struct mt9m111 *mt9m111)
342 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
343 int ret;
345 ret = reg_set(RESET, MT9M111_RESET_CHIP_ENABLE);
346 if (!ret)
347 mt9m111->powered = 1;
348 return ret;
351 static int mt9m111_reset(struct mt9m111 *mt9m111)
353 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
354 int ret;
356 ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
357 if (!ret)
358 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC);
359 if (!ret)
360 ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE
361 | MT9M111_RESET_RESET_SOC);
363 return ret;
366 static unsigned long mt9m111_query_bus_param(struct soc_camera_device *icd)
368 struct soc_camera_link *icl = to_soc_camera_link(icd);
369 unsigned long flags = SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |
370 SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH |
371 SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8;
373 return soc_camera_apply_sensor_flags(icl, flags);
376 static int mt9m111_set_bus_param(struct soc_camera_device *icd, unsigned long f)
378 return 0;
381 static int mt9m111_make_rect(struct mt9m111 *mt9m111,
382 struct v4l2_rect *rect)
384 if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
385 mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
386 /* Bayer format - even size lengths */
387 rect->width = ALIGN(rect->width, 2);
388 rect->height = ALIGN(rect->height, 2);
389 /* Let the user play with the starting pixel */
392 /* FIXME: the datasheet doesn't specify minimum sizes */
393 soc_camera_limit_side(&rect->left, &rect->width,
394 MT9M111_MIN_DARK_COLS, 2, MT9M111_MAX_WIDTH);
396 soc_camera_limit_side(&rect->top, &rect->height,
397 MT9M111_MIN_DARK_ROWS, 2, MT9M111_MAX_HEIGHT);
399 return mt9m111_setup_rect(mt9m111, rect);
402 static int mt9m111_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
404 struct v4l2_rect rect = a->c;
405 struct i2c_client *client = v4l2_get_subdevdata(sd);
406 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
407 int ret;
409 dev_dbg(&client->dev, "%s left=%d, top=%d, width=%d, height=%d\n",
410 __func__, rect.left, rect.top, rect.width, rect.height);
412 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
413 return -EINVAL;
415 ret = mt9m111_make_rect(mt9m111, &rect);
416 if (!ret)
417 mt9m111->rect = rect;
418 return ret;
421 static int mt9m111_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
423 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
425 a->c = mt9m111->rect;
426 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
428 return 0;
431 static int mt9m111_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
433 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
434 return -EINVAL;
436 a->bounds.left = MT9M111_MIN_DARK_COLS;
437 a->bounds.top = MT9M111_MIN_DARK_ROWS;
438 a->bounds.width = MT9M111_MAX_WIDTH;
439 a->bounds.height = MT9M111_MAX_HEIGHT;
440 a->defrect = a->bounds;
441 a->pixelaspect.numerator = 1;
442 a->pixelaspect.denominator = 1;
444 return 0;
447 static int mt9m111_g_fmt(struct v4l2_subdev *sd,
448 struct v4l2_mbus_framefmt *mf)
450 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
452 mf->width = mt9m111->rect.width;
453 mf->height = mt9m111->rect.height;
454 mf->code = mt9m111->fmt->code;
455 mf->colorspace = mt9m111->fmt->colorspace;
456 mf->field = V4L2_FIELD_NONE;
458 return 0;
461 static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111,
462 enum v4l2_mbus_pixelcode code)
464 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
465 u16 data_outfmt2, mask_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
466 MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB |
467 MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 |
468 MT9M111_OUTFMT_RGB444x | MT9M111_OUTFMT_RGBx444 |
469 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
470 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
471 int ret;
473 switch (code) {
474 case V4L2_MBUS_FMT_SBGGR8_1X8:
475 data_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
476 MT9M111_OUTFMT_RGB;
477 break;
478 case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
479 data_outfmt2 = MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB;
480 break;
481 case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
482 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555 |
483 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
484 break;
485 case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE:
486 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555;
487 break;
488 case V4L2_MBUS_FMT_RGB565_2X8_LE:
489 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
490 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
491 break;
492 case V4L2_MBUS_FMT_RGB565_2X8_BE:
493 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565;
494 break;
495 case V4L2_MBUS_FMT_BGR565_2X8_BE:
496 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
497 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
498 break;
499 case V4L2_MBUS_FMT_BGR565_2X8_LE:
500 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
501 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
502 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
503 break;
504 case V4L2_MBUS_FMT_UYVY8_2X8:
505 data_outfmt2 = 0;
506 break;
507 case V4L2_MBUS_FMT_VYUY8_2X8:
508 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
509 break;
510 case V4L2_MBUS_FMT_YUYV8_2X8:
511 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
512 break;
513 case V4L2_MBUS_FMT_YVYU8_2X8:
514 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
515 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
516 break;
517 default:
518 dev_err(&client->dev, "Pixel format not handled: %x\n", code);
519 return -EINVAL;
522 ret = reg_mask(OUTPUT_FORMAT_CTRL2_A, data_outfmt2,
523 mask_outfmt2);
524 if (!ret)
525 ret = reg_mask(OUTPUT_FORMAT_CTRL2_B, data_outfmt2,
526 mask_outfmt2);
528 return ret;
531 static int mt9m111_s_fmt(struct v4l2_subdev *sd,
532 struct v4l2_mbus_framefmt *mf)
534 struct i2c_client *client = v4l2_get_subdevdata(sd);
535 const struct mt9m111_datafmt *fmt;
536 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
537 struct v4l2_rect rect = {
538 .left = mt9m111->rect.left,
539 .top = mt9m111->rect.top,
540 .width = mf->width,
541 .height = mf->height,
543 int ret;
545 fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
546 ARRAY_SIZE(mt9m111_colour_fmts));
547 if (!fmt)
548 return -EINVAL;
550 dev_dbg(&client->dev,
551 "%s code=%x left=%d, top=%d, width=%d, height=%d\n", __func__,
552 mf->code, rect.left, rect.top, rect.width, rect.height);
554 ret = mt9m111_make_rect(mt9m111, &rect);
555 if (!ret)
556 ret = mt9m111_set_pixfmt(mt9m111, mf->code);
557 if (!ret) {
558 mt9m111->rect = rect;
559 mt9m111->fmt = fmt;
560 mf->colorspace = fmt->colorspace;
563 return ret;
566 static int mt9m111_try_fmt(struct v4l2_subdev *sd,
567 struct v4l2_mbus_framefmt *mf)
569 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
570 const struct mt9m111_datafmt *fmt;
571 bool bayer = mf->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
572 mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE;
574 fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
575 ARRAY_SIZE(mt9m111_colour_fmts));
576 if (!fmt) {
577 fmt = mt9m111->fmt;
578 mf->code = fmt->code;
582 * With Bayer format enforce even side lengths, but let the user play
583 * with the starting pixel
586 if (mf->height > MT9M111_MAX_HEIGHT)
587 mf->height = MT9M111_MAX_HEIGHT;
588 else if (mf->height < 2)
589 mf->height = 2;
590 else if (bayer)
591 mf->height = ALIGN(mf->height, 2);
593 if (mf->width > MT9M111_MAX_WIDTH)
594 mf->width = MT9M111_MAX_WIDTH;
595 else if (mf->width < 2)
596 mf->width = 2;
597 else if (bayer)
598 mf->width = ALIGN(mf->width, 2);
600 mf->colorspace = fmt->colorspace;
602 return 0;
605 static int mt9m111_g_chip_ident(struct v4l2_subdev *sd,
606 struct v4l2_dbg_chip_ident *id)
608 struct i2c_client *client = v4l2_get_subdevdata(sd);
609 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
611 if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR)
612 return -EINVAL;
614 if (id->match.addr != client->addr)
615 return -ENODEV;
617 id->ident = mt9m111->model;
618 id->revision = 0;
620 return 0;
623 #ifdef CONFIG_VIDEO_ADV_DEBUG
624 static int mt9m111_g_register(struct v4l2_subdev *sd,
625 struct v4l2_dbg_register *reg)
627 struct i2c_client *client = v4l2_get_subdevdata(sd);
628 int val;
630 if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff)
631 return -EINVAL;
632 if (reg->match.addr != client->addr)
633 return -ENODEV;
635 val = mt9m111_reg_read(client, reg->reg);
636 reg->size = 2;
637 reg->val = (u64)val;
639 if (reg->val > 0xffff)
640 return -EIO;
642 return 0;
645 static int mt9m111_s_register(struct v4l2_subdev *sd,
646 struct v4l2_dbg_register *reg)
648 struct i2c_client *client = v4l2_get_subdevdata(sd);
650 if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff)
651 return -EINVAL;
653 if (reg->match.addr != client->addr)
654 return -ENODEV;
656 if (mt9m111_reg_write(client, reg->reg, reg->val) < 0)
657 return -EIO;
659 return 0;
661 #endif
663 static const struct v4l2_queryctrl mt9m111_controls[] = {
665 .id = V4L2_CID_VFLIP,
666 .type = V4L2_CTRL_TYPE_BOOLEAN,
667 .name = "Flip Verticaly",
668 .minimum = 0,
669 .maximum = 1,
670 .step = 1,
671 .default_value = 0,
672 }, {
673 .id = V4L2_CID_HFLIP,
674 .type = V4L2_CTRL_TYPE_BOOLEAN,
675 .name = "Flip Horizontaly",
676 .minimum = 0,
677 .maximum = 1,
678 .step = 1,
679 .default_value = 0,
680 }, { /* gain = 1/32*val (=>gain=1 if val==32) */
681 .id = V4L2_CID_GAIN,
682 .type = V4L2_CTRL_TYPE_INTEGER,
683 .name = "Gain",
684 .minimum = 0,
685 .maximum = 63 * 2 * 2,
686 .step = 1,
687 .default_value = 32,
688 .flags = V4L2_CTRL_FLAG_SLIDER,
689 }, {
690 .id = V4L2_CID_EXPOSURE_AUTO,
691 .type = V4L2_CTRL_TYPE_BOOLEAN,
692 .name = "Auto Exposure",
693 .minimum = 0,
694 .maximum = 1,
695 .step = 1,
696 .default_value = 1,
700 static struct soc_camera_ops mt9m111_ops = {
701 .query_bus_param = mt9m111_query_bus_param,
702 .set_bus_param = mt9m111_set_bus_param,
703 .controls = mt9m111_controls,
704 .num_controls = ARRAY_SIZE(mt9m111_controls),
707 static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask)
709 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
710 int ret;
712 if (mt9m111->context == HIGHPOWER) {
713 if (flip)
714 ret = reg_set(READ_MODE_B, mask);
715 else
716 ret = reg_clear(READ_MODE_B, mask);
717 } else {
718 if (flip)
719 ret = reg_set(READ_MODE_A, mask);
720 else
721 ret = reg_clear(READ_MODE_A, mask);
724 return ret;
727 static int mt9m111_get_global_gain(struct mt9m111 *mt9m111)
729 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
730 int data;
732 data = reg_read(GLOBAL_GAIN);
733 if (data >= 0)
734 return (data & 0x2f) * (1 << ((data >> 10) & 1)) *
735 (1 << ((data >> 9) & 1));
736 return data;
739 static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain)
741 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
742 u16 val;
744 if (gain > 63 * 2 * 2)
745 return -EINVAL;
747 mt9m111->gain = gain;
748 if ((gain >= 64 * 2) && (gain < 63 * 2 * 2))
749 val = (1 << 10) | (1 << 9) | (gain / 4);
750 else if ((gain >= 64) && (gain < 64 * 2))
751 val = (1 << 9) | (gain / 2);
752 else
753 val = gain;
755 return reg_write(GLOBAL_GAIN, val);
758 static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int on)
760 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
761 int ret;
763 if (on)
764 ret = reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
765 else
766 ret = reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
768 if (!ret)
769 mt9m111->autoexposure = on;
771 return ret;
774 static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on)
776 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
777 int ret;
779 if (on)
780 ret = reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
781 else
782 ret = reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
784 if (!ret)
785 mt9m111->autowhitebalance = on;
787 return ret;
790 static int mt9m111_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
792 struct i2c_client *client = v4l2_get_subdevdata(sd);
793 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
794 int data;
796 switch (ctrl->id) {
797 case V4L2_CID_VFLIP:
798 if (mt9m111->context == HIGHPOWER)
799 data = reg_read(READ_MODE_B);
800 else
801 data = reg_read(READ_MODE_A);
803 if (data < 0)
804 return -EIO;
805 ctrl->value = !!(data & MT9M111_RMB_MIRROR_ROWS);
806 break;
807 case V4L2_CID_HFLIP:
808 if (mt9m111->context == HIGHPOWER)
809 data = reg_read(READ_MODE_B);
810 else
811 data = reg_read(READ_MODE_A);
813 if (data < 0)
814 return -EIO;
815 ctrl->value = !!(data & MT9M111_RMB_MIRROR_COLS);
816 break;
817 case V4L2_CID_GAIN:
818 data = mt9m111_get_global_gain(mt9m111);
819 if (data < 0)
820 return data;
821 ctrl->value = data;
822 break;
823 case V4L2_CID_EXPOSURE_AUTO:
824 ctrl->value = mt9m111->autoexposure;
825 break;
826 case V4L2_CID_AUTO_WHITE_BALANCE:
827 ctrl->value = mt9m111->autowhitebalance;
828 break;
830 return 0;
833 static int mt9m111_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
835 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
836 const struct v4l2_queryctrl *qctrl;
837 int ret;
839 qctrl = soc_camera_find_qctrl(&mt9m111_ops, ctrl->id);
840 if (!qctrl)
841 return -EINVAL;
843 switch (ctrl->id) {
844 case V4L2_CID_VFLIP:
845 mt9m111->vflip = ctrl->value;
846 ret = mt9m111_set_flip(mt9m111, ctrl->value,
847 MT9M111_RMB_MIRROR_ROWS);
848 break;
849 case V4L2_CID_HFLIP:
850 mt9m111->hflip = ctrl->value;
851 ret = mt9m111_set_flip(mt9m111, ctrl->value,
852 MT9M111_RMB_MIRROR_COLS);
853 break;
854 case V4L2_CID_GAIN:
855 ret = mt9m111_set_global_gain(mt9m111, ctrl->value);
856 break;
857 case V4L2_CID_EXPOSURE_AUTO:
858 ret = mt9m111_set_autoexposure(mt9m111, ctrl->value);
859 break;
860 case V4L2_CID_AUTO_WHITE_BALANCE:
861 ret = mt9m111_set_autowhitebalance(mt9m111, ctrl->value);
862 break;
863 default:
864 ret = -EINVAL;
867 return ret;
870 static int mt9m111_suspend(struct mt9m111 *mt9m111)
872 mt9m111->gain = mt9m111_get_global_gain(mt9m111);
874 return 0;
877 static void mt9m111_restore_state(struct mt9m111 *mt9m111)
879 mt9m111_set_context(mt9m111, mt9m111->context);
880 mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code);
881 mt9m111_setup_rect(mt9m111, &mt9m111->rect);
882 mt9m111_set_flip(mt9m111, mt9m111->hflip, MT9M111_RMB_MIRROR_COLS);
883 mt9m111_set_flip(mt9m111, mt9m111->vflip, MT9M111_RMB_MIRROR_ROWS);
884 mt9m111_set_global_gain(mt9m111, mt9m111->gain);
885 mt9m111_set_autoexposure(mt9m111, mt9m111->autoexposure);
886 mt9m111_set_autowhitebalance(mt9m111, mt9m111->autowhitebalance);
889 static int mt9m111_resume(struct mt9m111 *mt9m111)
891 int ret = 0;
893 if (mt9m111->powered) {
894 ret = mt9m111_enable(mt9m111);
895 if (!ret)
896 ret = mt9m111_reset(mt9m111);
897 if (!ret)
898 mt9m111_restore_state(mt9m111);
900 return ret;
903 static int mt9m111_init(struct mt9m111 *mt9m111)
905 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
906 int ret;
908 mt9m111->context = HIGHPOWER;
909 ret = mt9m111_enable(mt9m111);
910 if (!ret)
911 ret = mt9m111_reset(mt9m111);
912 if (!ret)
913 ret = mt9m111_set_context(mt9m111, mt9m111->context);
914 if (!ret)
915 ret = mt9m111_set_autoexposure(mt9m111, mt9m111->autoexposure);
916 if (ret)
917 dev_err(&client->dev, "mt9m111 init failed: %d\n", ret);
918 return ret;
922 * Interface active, can use i2c. If it fails, it can indeed mean, that
923 * this wasn't our capture interface, so, we wait for the right one
925 static int mt9m111_video_probe(struct soc_camera_device *icd,
926 struct i2c_client *client)
928 struct mt9m111 *mt9m111 = to_mt9m111(client);
929 s32 data;
930 int ret;
932 /* We must have a parent by now. And it cannot be a wrong one. */
933 BUG_ON(!icd->parent ||
934 to_soc_camera_host(icd->parent)->nr != icd->iface);
936 mt9m111->autoexposure = 1;
937 mt9m111->autowhitebalance = 1;
939 data = reg_read(CHIP_VERSION);
941 switch (data) {
942 case 0x143a: /* MT9M111 or MT9M131 */
943 mt9m111->model = V4L2_IDENT_MT9M111;
944 dev_info(&client->dev,
945 "Detected a MT9M111/MT9M131 chip ID %x\n", data);
946 break;
947 case 0x148c: /* MT9M112 */
948 mt9m111->model = V4L2_IDENT_MT9M112;
949 dev_info(&client->dev, "Detected a MT9M112 chip ID %x\n", data);
950 break;
951 default:
952 ret = -ENODEV;
953 dev_err(&client->dev,
954 "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n",
955 data);
956 goto ei2c;
959 ret = mt9m111_init(mt9m111);
961 ei2c:
962 return ret;
965 static int mt9m111_s_power(struct v4l2_subdev *sd, int on)
967 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
968 struct i2c_client *client = v4l2_get_subdevdata(sd);
969 int ret = 0;
971 mutex_lock(&mt9m111->power_lock);
974 * If the power count is modified from 0 to != 0 or from != 0 to 0,
975 * update the power state.
977 if (mt9m111->power_count == !on) {
978 if (on) {
979 ret = mt9m111_resume(mt9m111);
980 if (ret) {
981 dev_err(&client->dev,
982 "Failed to resume the sensor: %d\n", ret);
983 goto out;
985 } else {
986 mt9m111_suspend(mt9m111);
990 /* Update the power count. */
991 mt9m111->power_count += on ? 1 : -1;
992 WARN_ON(mt9m111->power_count < 0);
994 out:
995 mutex_unlock(&mt9m111->power_lock);
996 return ret;
999 static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = {
1000 .g_ctrl = mt9m111_g_ctrl,
1001 .s_ctrl = mt9m111_s_ctrl,
1002 .g_chip_ident = mt9m111_g_chip_ident,
1003 .s_power = mt9m111_s_power,
1004 #ifdef CONFIG_VIDEO_ADV_DEBUG
1005 .g_register = mt9m111_g_register,
1006 .s_register = mt9m111_s_register,
1007 #endif
1010 static int mt9m111_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
1011 enum v4l2_mbus_pixelcode *code)
1013 if (index >= ARRAY_SIZE(mt9m111_colour_fmts))
1014 return -EINVAL;
1016 *code = mt9m111_colour_fmts[index].code;
1017 return 0;
1020 static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = {
1021 .s_mbus_fmt = mt9m111_s_fmt,
1022 .g_mbus_fmt = mt9m111_g_fmt,
1023 .try_mbus_fmt = mt9m111_try_fmt,
1024 .s_crop = mt9m111_s_crop,
1025 .g_crop = mt9m111_g_crop,
1026 .cropcap = mt9m111_cropcap,
1027 .enum_mbus_fmt = mt9m111_enum_fmt,
1030 static struct v4l2_subdev_ops mt9m111_subdev_ops = {
1031 .core = &mt9m111_subdev_core_ops,
1032 .video = &mt9m111_subdev_video_ops,
1035 static int mt9m111_probe(struct i2c_client *client,
1036 const struct i2c_device_id *did)
1038 struct mt9m111 *mt9m111;
1039 struct soc_camera_device *icd = client->dev.platform_data;
1040 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
1041 struct soc_camera_link *icl;
1042 int ret;
1044 if (!icd) {
1045 dev_err(&client->dev, "mt9m111: soc-camera data missing!\n");
1046 return -EINVAL;
1049 icl = to_soc_camera_link(icd);
1050 if (!icl) {
1051 dev_err(&client->dev, "mt9m111: driver needs platform data\n");
1052 return -EINVAL;
1055 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
1056 dev_warn(&adapter->dev,
1057 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
1058 return -EIO;
1061 mt9m111 = kzalloc(sizeof(struct mt9m111), GFP_KERNEL);
1062 if (!mt9m111)
1063 return -ENOMEM;
1065 v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops);
1067 /* Second stage probe - when a capture adapter is there */
1068 icd->ops = &mt9m111_ops;
1070 mt9m111->rect.left = MT9M111_MIN_DARK_COLS;
1071 mt9m111->rect.top = MT9M111_MIN_DARK_ROWS;
1072 mt9m111->rect.width = MT9M111_MAX_WIDTH;
1073 mt9m111->rect.height = MT9M111_MAX_HEIGHT;
1074 mt9m111->fmt = &mt9m111_colour_fmts[0];
1076 ret = mt9m111_video_probe(icd, client);
1077 if (ret) {
1078 icd->ops = NULL;
1079 kfree(mt9m111);
1082 return ret;
1085 static int mt9m111_remove(struct i2c_client *client)
1087 struct mt9m111 *mt9m111 = to_mt9m111(client);
1088 struct soc_camera_device *icd = client->dev.platform_data;
1090 icd->ops = NULL;
1091 kfree(mt9m111);
1093 return 0;
1096 static const struct i2c_device_id mt9m111_id[] = {
1097 { "mt9m111", 0 },
1100 MODULE_DEVICE_TABLE(i2c, mt9m111_id);
1102 static struct i2c_driver mt9m111_i2c_driver = {
1103 .driver = {
1104 .name = "mt9m111",
1106 .probe = mt9m111_probe,
1107 .remove = mt9m111_remove,
1108 .id_table = mt9m111_id,
1111 static int __init mt9m111_mod_init(void)
1113 return i2c_add_driver(&mt9m111_i2c_driver);
1116 static void __exit mt9m111_mod_exit(void)
1118 i2c_del_driver(&mt9m111_i2c_driver);
1121 module_init(mt9m111_mod_init);
1122 module_exit(mt9m111_mod_exit);
1124 MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver");
1125 MODULE_AUTHOR("Robert Jarzmik");
1126 MODULE_LICENSE("GPL");