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Add linux-next specific files for 20110831
[linux-2.6/next.git] / drivers / media / video / omap3isp / isp.c
bloba4baa6165c2c78ce2924d0d83caa0806cc0ae0cb
1 /*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
43 *
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
48 *
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
52 * 02110-1301 USA
53 */
54
55 #include <asm/cacheflush.h>
56
57 #include <linux/clk.h>
58 #include <linux/delay.h>
59 #include <linux/device.h>
60 #include <linux/dma-mapping.h>
61 #include <linux/i2c.h>
62 #include <linux/interrupt.h>
63 #include <linux/module.h>
64 #include <linux/platform_device.h>
65 #include <linux/regulator/consumer.h>
66 #include <linux/slab.h>
67 #include <linux/sched.h>
68 #include <linux/vmalloc.h>
69
70 #include <media/v4l2-common.h>
71 #include <media/v4l2-device.h>
72
73 #include "isp.h"
74 #include "ispreg.h"
75 #include "ispccdc.h"
76 #include "isppreview.h"
77 #include "ispresizer.h"
78 #include "ispcsi2.h"
79 #include "ispccp2.h"
80 #include "isph3a.h"
81 #include "isphist.h"
82
83 /*
84 * this is provided as an interim solution until omap3isp doesn't need
85 * any omap-specific iommu API
86 */
87 #define to_iommu(dev) \
88 (struct omap_iommu *)platform_get_drvdata(to_platform_device(dev))
89
90 static unsigned int autoidle;
91 module_param(autoidle, int, 0444);
92 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
93
94 static void isp_save_ctx(struct isp_device *isp);
95
96 static void isp_restore_ctx(struct isp_device *isp);
97
98 static const struct isp_res_mapping isp_res_maps[] = {
99 {
100 .isp_rev = ISP_REVISION_2_0,
101 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
102 1 << OMAP3_ISP_IOMEM_CCP2 |
103 1 << OMAP3_ISP_IOMEM_CCDC |
104 1 << OMAP3_ISP_IOMEM_HIST |
105 1 << OMAP3_ISP_IOMEM_H3A |
106 1 << OMAP3_ISP_IOMEM_PREV |
107 1 << OMAP3_ISP_IOMEM_RESZ |
108 1 << OMAP3_ISP_IOMEM_SBL |
109 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
110 1 << OMAP3_ISP_IOMEM_CSIPHY2,
111 },
112 {
113 .isp_rev = ISP_REVISION_15_0,
114 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
115 1 << OMAP3_ISP_IOMEM_CCP2 |
116 1 << OMAP3_ISP_IOMEM_CCDC |
117 1 << OMAP3_ISP_IOMEM_HIST |
118 1 << OMAP3_ISP_IOMEM_H3A |
119 1 << OMAP3_ISP_IOMEM_PREV |
120 1 << OMAP3_ISP_IOMEM_RESZ |
121 1 << OMAP3_ISP_IOMEM_SBL |
122 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
123 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
124 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
125 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
126 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
127 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2,
128 },
129 };
130
131 /* Structure for saving/restoring ISP module registers */
132 static struct isp_reg isp_reg_list[] = {
133 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
134 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
135 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
136 {0, ISP_TOK_TERM, 0}
137 };
138
139 /*
140 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
141 * @isp: OMAP3 ISP device
142 *
143 * In order to force posting of pending writes, we need to write and
144 * readback the same register, in this case the revision register.
145 *
146 * See this link for reference:
147 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
148 */
149 void omap3isp_flush(struct isp_device *isp)
150 {
151 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
152 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
153 }
154
155 /*
156 * isp_enable_interrupts - Enable ISP interrupts.
157 * @isp: OMAP3 ISP device
158 */
159 static void isp_enable_interrupts(struct isp_device *isp)
160 {
161 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
162 | IRQ0ENABLE_CSIB_IRQ
163 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
164 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
165 | IRQ0ENABLE_CCDC_VD0_IRQ
166 | IRQ0ENABLE_CCDC_VD1_IRQ
167 | IRQ0ENABLE_HS_VS_IRQ
168 | IRQ0ENABLE_HIST_DONE_IRQ
169 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
170 | IRQ0ENABLE_H3A_AF_DONE_IRQ
171 | IRQ0ENABLE_PRV_DONE_IRQ
172 | IRQ0ENABLE_RSZ_DONE_IRQ;
173
174 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
175 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
176 }
177
178 /*
179 * isp_disable_interrupts - Disable ISP interrupts.
180 * @isp: OMAP3 ISP device
181 */
182 static void isp_disable_interrupts(struct isp_device *isp)
183 {
184 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
185 }
186
187 /**
188 * isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
189 * @isp: OMAP3 ISP device
190 * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
191 * @xclksel: XCLK to configure (0 = A, 1 = B).
192 *
193 * Configures the specified MCLK divisor in the ISP timing control register
194 * (TCTRL_CTRL) to generate the desired xclk clock value.
195 *
196 * Divisor = cam_mclk_hz / xclk
197 *
198 * Returns the final frequency that is actually being generated
199 **/
200 static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
201 {
202 u32 divisor;
203 u32 currentxclk;
204 unsigned long mclk_hz;
205
206 if (!omap3isp_get(isp))
207 return 0;
208
209 mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
210
211 if (xclk >= mclk_hz) {
212 divisor = ISPTCTRL_CTRL_DIV_BYPASS;
213 currentxclk = mclk_hz;
214 } else if (xclk >= 2) {
215 divisor = mclk_hz / xclk;
216 if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
217 divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
218 currentxclk = mclk_hz / divisor;
219 } else {
220 divisor = xclk;
221 currentxclk = 0;
222 }
223
224 switch (xclksel) {
225 case ISP_XCLK_A:
226 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
227 ISPTCTRL_CTRL_DIVA_MASK,
228 divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
229 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
230 currentxclk);
231 break;
232 case ISP_XCLK_B:
233 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
234 ISPTCTRL_CTRL_DIVB_MASK,
235 divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
236 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
237 currentxclk);
238 break;
239 case ISP_XCLK_NONE:
240 default:
241 omap3isp_put(isp);
242 dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
243 "xclk. Must be 0 (A) or 1 (B).\n");
244 return -EINVAL;
245 }
246
247 /* Do we go from stable whatever to clock? */
248 if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
249 omap3isp_get(isp);
250 /* Stopping the clock. */
251 else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
252 omap3isp_put(isp);
253
254 isp->xclk_divisor[xclksel - 1] = divisor;
255
256 omap3isp_put(isp);
257
258 return currentxclk;
259 }
260
261 /*
262 * isp_power_settings - Sysconfig settings, for Power Management.
263 * @isp: OMAP3 ISP device
264 * @idle: Consider idle state.
265 *
266 * Sets the power settings for the ISP, and SBL bus.
267 */
268 static void isp_power_settings(struct isp_device *isp, int idle)
269 {
270 isp_reg_writel(isp,
271 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
272 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
273 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
274 ((isp->revision == ISP_REVISION_15_0) ?
275 ISP_SYSCONFIG_AUTOIDLE : 0),
276 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
277
278 if (isp->autoidle)
279 isp_reg_writel(isp, ISPCTRL_SBL_AUTOIDLE, OMAP3_ISP_IOMEM_MAIN,
280 ISP_CTRL);
281 }
282
283 /*
284 * Configure the bridge and lane shifter. Valid inputs are
285 *
286 * CCDC_INPUT_PARALLEL: Parallel interface
287 * CCDC_INPUT_CSI2A: CSI2a receiver
288 * CCDC_INPUT_CCP2B: CCP2b receiver
289 * CCDC_INPUT_CSI2C: CSI2c receiver
290 *
291 * The bridge and lane shifter are configured according to the selected input
292 * and the ISP platform data.
293 */
294 void omap3isp_configure_bridge(struct isp_device *isp,
295 enum ccdc_input_entity input,
296 const struct isp_parallel_platform_data *pdata,
297 unsigned int shift)
298 {
299 u32 ispctrl_val;
300
301 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
302 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
303 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
304 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
305 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
306
307 switch (input) {
308 case CCDC_INPUT_PARALLEL:
309 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
310 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
311 ispctrl_val |= pdata->bridge << ISPCTRL_PAR_BRIDGE_SHIFT;
312 shift += pdata->data_lane_shift * 2;
313 break;
314
315 case CCDC_INPUT_CSI2A:
316 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
317 break;
318
319 case CCDC_INPUT_CCP2B:
320 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
321 break;
322
323 case CCDC_INPUT_CSI2C:
324 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
325 break;
326
327 default:
328 return;
329 }
330
331 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
332
333 ispctrl_val &= ~ISPCTRL_SYNC_DETECT_MASK;
334 ispctrl_val |= ISPCTRL_SYNC_DETECT_VSRISE;
335
336 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
337 }
338
339 /**
340 * isp_set_pixel_clock - Configures the ISP pixel clock
341 * @isp: OMAP3 ISP device
342 * @pixelclk: Average pixel clock in Hz
343 *
344 * Set the average pixel clock required by the sensor. The ISP will use the
345 * lowest possible memory bandwidth settings compatible with the clock.
346 **/
347 static void isp_set_pixel_clock(struct isp_device *isp, unsigned int pixelclk)
348 {
349 isp->isp_ccdc.vpcfg.pixelclk = pixelclk;
350 }
351
352 void omap3isp_hist_dma_done(struct isp_device *isp)
353 {
354 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
355 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
356 /* Histogram cannot be enabled in this frame anymore */
357 atomic_set(&isp->isp_hist.buf_err, 1);
358 dev_dbg(isp->dev, "hist: Out of synchronization with "
359 "CCDC. Ignoring next buffer.\n");
360 }
361 }
362
363 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
364 {
365 static const char *name[] = {
366 "CSIA_IRQ",
367 "res1",
368 "res2",
369 "CSIB_LCM_IRQ",
370 "CSIB_IRQ",
371 "res5",
372 "res6",
373 "res7",
374 "CCDC_VD0_IRQ",
375 "CCDC_VD1_IRQ",
376 "CCDC_VD2_IRQ",
377 "CCDC_ERR_IRQ",
378 "H3A_AF_DONE_IRQ",
379 "H3A_AWB_DONE_IRQ",
380 "res14",
381 "res15",
382 "HIST_DONE_IRQ",
383 "CCDC_LSC_DONE",
384 "CCDC_LSC_PREFETCH_COMPLETED",
385 "CCDC_LSC_PREFETCH_ERROR",
386 "PRV_DONE_IRQ",
387 "CBUFF_IRQ",
388 "res22",
389 "res23",
390 "RSZ_DONE_IRQ",
391 "OVF_IRQ",
392 "res26",
393 "res27",
394 "MMU_ERR_IRQ",
395 "OCP_ERR_IRQ",
396 "SEC_ERR_IRQ",
397 "HS_VS_IRQ",
398 };
399 int i;
400
401 dev_dbg(isp->dev, "ISP IRQ: ");
402
403 for (i = 0; i < ARRAY_SIZE(name); i++) {
404 if ((1 << i) & irqstatus)
405 printk(KERN_CONT "%s ", name[i]);
406 }
407 printk(KERN_CONT "\n");
408 }
409
410 static void isp_isr_sbl(struct isp_device *isp)
411 {
412 struct device *dev = isp->dev;
413 u32 sbl_pcr;
414
415 /*
416 * Handle shared buffer logic overflows for video buffers.
417 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
418 */
419 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
420 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
421 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
422
423 if (sbl_pcr)
424 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
425
426 if (sbl_pcr & (ISPSBL_PCR_CCDC_WBL_OVF | ISPSBL_PCR_CSIA_WBL_OVF
427 | ISPSBL_PCR_CSIB_WBL_OVF)) {
428 isp->isp_ccdc.error = 1;
429 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
430 isp->isp_prev.error = 1;
431 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
432 isp->isp_res.error = 1;
433 }
434
435 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
436 isp->isp_prev.error = 1;
437 if (isp->isp_res.input == RESIZER_INPUT_VP &&
438 !(isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER))
439 isp->isp_res.error = 1;
440 }
441
442 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
443 | ISPSBL_PCR_RSZ2_WBL_OVF
444 | ISPSBL_PCR_RSZ3_WBL_OVF
445 | ISPSBL_PCR_RSZ4_WBL_OVF))
446 isp->isp_res.error = 1;
447
448 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
449 omap3isp_stat_sbl_overflow(&isp->isp_af);
450
451 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
452 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
453 }
454
455 /*
456 * isp_isr - Interrupt Service Routine for Camera ISP module.
457 * @irq: Not used currently.
458 * @_isp: Pointer to the OMAP3 ISP device
459 *
460 * Handles the corresponding callback if plugged in.
461 *
462 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
463 * IRQ wasn't handled.
464 */
465 static irqreturn_t isp_isr(int irq, void *_isp)
466 {
467 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
468 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
469 IRQ0STATUS_CCDC_VD0_IRQ |
470 IRQ0STATUS_CCDC_VD1_IRQ |
471 IRQ0STATUS_HS_VS_IRQ;
472 struct isp_device *isp = _isp;
473 u32 irqstatus;
474 int ret;
475
476 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
477 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
478
479 isp_isr_sbl(isp);
480
481 if (irqstatus & IRQ0STATUS_CSIA_IRQ) {
482 ret = omap3isp_csi2_isr(&isp->isp_csi2a);
483 if (ret)
484 isp->isp_ccdc.error = 1;
485 }
486
487 if (irqstatus & IRQ0STATUS_CSIB_IRQ) {
488 ret = omap3isp_ccp2_isr(&isp->isp_ccp2);
489 if (ret)
490 isp->isp_ccdc.error = 1;
491 }
492
493 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
494 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
495 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
496 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
497 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
498 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
499 omap3isp_stat_isr_frame_sync(&isp->isp_af);
500 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
501 }
502
503 if (irqstatus & ccdc_events)
504 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
505
506 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
507 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
508 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
509 omap3isp_preview_isr(&isp->isp_prev);
510 }
511
512 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
513 omap3isp_resizer_isr(&isp->isp_res);
514
515 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
516 omap3isp_stat_isr(&isp->isp_aewb);
517
518 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
519 omap3isp_stat_isr(&isp->isp_af);
520
521 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
522 omap3isp_stat_isr(&isp->isp_hist);
523
524 omap3isp_flush(isp);
525
526 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
527 isp_isr_dbg(isp, irqstatus);
528 #endif
529
530 return IRQ_HANDLED;
531 }
532
533 /* -----------------------------------------------------------------------------
534 * Pipeline power management
535 *
536 * Entities must be powered up when part of a pipeline that contains at least
537 * one open video device node.
538 *
539 * To achieve this use the entity use_count field to track the number of users.
540 * For entities corresponding to video device nodes the use_count field stores
541 * the users count of the node. For entities corresponding to subdevs the
542 * use_count field stores the total number of users of all video device nodes
543 * in the pipeline.
544 *
545 * The omap3isp_pipeline_pm_use() function must be called in the open() and
546 * close() handlers of video device nodes. It increments or decrements the use
547 * count of all subdev entities in the pipeline.
548 *
549 * To react to link management on powered pipelines, the link setup notification
550 * callback updates the use count of all entities in the source and sink sides
551 * of the link.
552 */
553
554 /*
555 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
556 * @entity: The entity
557 *
558 * Return the total number of users of all video device nodes in the pipeline.
559 */
560 static int isp_pipeline_pm_use_count(struct media_entity *entity)
561 {
562 struct media_entity_graph graph;
563 int use = 0;
564
565 media_entity_graph_walk_start(&graph, entity);
566
567 while ((entity = media_entity_graph_walk_next(&graph))) {
568 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
569 use += entity->use_count;
570 }
571
572 return use;
573 }
574
575 /*
576 * isp_pipeline_pm_power_one - Apply power change to an entity
577 * @entity: The entity
578 * @change: Use count change
579 *
580 * Change the entity use count by @change. If the entity is a subdev update its
581 * power state by calling the core::s_power operation when the use count goes
582 * from 0 to != 0 or from != 0 to 0.
583 *
584 * Return 0 on success or a negative error code on failure.
585 */
586 static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
587 {
588 struct v4l2_subdev *subdev;
589 int ret;
590
591 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
592 ? media_entity_to_v4l2_subdev(entity) : NULL;
593
594 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
595 ret = v4l2_subdev_call(subdev, core, s_power, 1);
596 if (ret < 0 && ret != -ENOIOCTLCMD)
597 return ret;
598 }
599
600 entity->use_count += change;
601 WARN_ON(entity->use_count < 0);
602
603 if (entity->use_count == 0 && change < 0 && subdev != NULL)
604 v4l2_subdev_call(subdev, core, s_power, 0);
605
606 return 0;
607 }
608
609 /*
610 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
611 * @entity: The entity
612 * @change: Use count change
613 *
614 * Walk the pipeline to update the use count and the power state of all non-node
615 * entities.
616 *
617 * Return 0 on success or a negative error code on failure.
618 */
619 static int isp_pipeline_pm_power(struct media_entity *entity, int change)
620 {
621 struct media_entity_graph graph;
622 struct media_entity *first = entity;
623 int ret = 0;
624
625 if (!change)
626 return 0;
627
628 media_entity_graph_walk_start(&graph, entity);
629
630 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
631 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
632 ret = isp_pipeline_pm_power_one(entity, change);
633
634 if (!ret)
635 return 0;
636
637 media_entity_graph_walk_start(&graph, first);
638
639 while ((first = media_entity_graph_walk_next(&graph))
640 && first != entity)
641 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
642 isp_pipeline_pm_power_one(first, -change);
643
644 return ret;
645 }
646
647 /*
648 * omap3isp_pipeline_pm_use - Update the use count of an entity
649 * @entity: The entity
650 * @use: Use (1) or stop using (0) the entity
651 *
652 * Update the use count of all entities in the pipeline and power entities on or
653 * off accordingly.
654 *
655 * Return 0 on success or a negative error code on failure. Powering entities
656 * off is assumed to never fail. No failure can occur when the use parameter is
657 * set to 0.
658 */
659 int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
660 {
661 int change = use ? 1 : -1;
662 int ret;
663
664 mutex_lock(&entity->parent->graph_mutex);
665
666 /* Apply use count to node. */
667 entity->use_count += change;
668 WARN_ON(entity->use_count < 0);
669
670 /* Apply power change to connected non-nodes. */
671 ret = isp_pipeline_pm_power(entity, change);
672 if (ret < 0)
673 entity->use_count -= change;
674
675 mutex_unlock(&entity->parent->graph_mutex);
676
677 return ret;
678 }
679
680 /*
681 * isp_pipeline_link_notify - Link management notification callback
682 * @source: Pad at the start of the link
683 * @sink: Pad at the end of the link
684 * @flags: New link flags that will be applied
685 *
686 * React to link management on powered pipelines by updating the use count of
687 * all entities in the source and sink sides of the link. Entities are powered
688 * on or off accordingly.
689 *
690 * Return 0 on success or a negative error code on failure. Powering entities
691 * off is assumed to never fail. This function will not fail for disconnection
692 * events.
693 */
694 static int isp_pipeline_link_notify(struct media_pad *source,
695 struct media_pad *sink, u32 flags)
696 {
697 int source_use = isp_pipeline_pm_use_count(source->entity);
698 int sink_use = isp_pipeline_pm_use_count(sink->entity);
699 int ret;
700
701 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
702 /* Powering off entities is assumed to never fail. */
703 isp_pipeline_pm_power(source->entity, -sink_use);
704 isp_pipeline_pm_power(sink->entity, -source_use);
705 return 0;
706 }
707
708 ret = isp_pipeline_pm_power(source->entity, sink_use);
709 if (ret < 0)
710 return ret;
711
712 ret = isp_pipeline_pm_power(sink->entity, source_use);
713 if (ret < 0)
714 isp_pipeline_pm_power(source->entity, -sink_use);
715
716 return ret;
717 }
718
719 /* -----------------------------------------------------------------------------
720 * Pipeline stream management
721 */
722
723 /*
724 * isp_pipeline_enable - Enable streaming on a pipeline
725 * @pipe: ISP pipeline
726 * @mode: Stream mode (single shot or continuous)
727 *
728 * Walk the entities chain starting at the pipeline output video node and start
729 * all modules in the chain in the given mode.
730 *
731 * Return 0 if successful, or the return value of the failed video::s_stream
732 * operation otherwise.
733 */
734 static int isp_pipeline_enable(struct isp_pipeline *pipe,
735 enum isp_pipeline_stream_state mode)
736 {
737 struct isp_device *isp = pipe->output->isp;
738 struct media_entity *entity;
739 struct media_pad *pad;
740 struct v4l2_subdev *subdev;
741 unsigned long flags;
742 int ret = 0;
743
744 spin_lock_irqsave(&pipe->lock, flags);
745 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
746 spin_unlock_irqrestore(&pipe->lock, flags);
747
748 pipe->do_propagation = false;
749
750 entity = &pipe->output->video.entity;
751 while (1) {
752 pad = &entity->pads[0];
753 if (!(pad->flags & MEDIA_PAD_FL_SINK))
754 break;
755
756 pad = media_entity_remote_source(pad);
757 if (pad == NULL ||
758 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
759 break;
760
761 entity = pad->entity;
762 subdev = media_entity_to_v4l2_subdev(entity);
763
764 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
765 if (ret < 0 && ret != -ENOIOCTLCMD)
766 break;
767
768 if (subdev == &isp->isp_ccdc.subdev) {
769 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
770 s_stream, mode);
771 v4l2_subdev_call(&isp->isp_af.subdev, video,
772 s_stream, mode);
773 v4l2_subdev_call(&isp->isp_hist.subdev, video,
774 s_stream, mode);
775 pipe->do_propagation = true;
776 }
777 }
778
779 /* Frame number propagation. In continuous streaming mode the number
780 * is incremented in the frame start ISR. In mem-to-mem mode
781 * singleshot is used and frame start IRQs are not available.
782 * Thus we have to increment the number here.
783 */
784 if (pipe->do_propagation && mode == ISP_PIPELINE_STREAM_SINGLESHOT)
785 atomic_inc(&pipe->frame_number);
786
787 return ret;
788 }
789
790 static int isp_pipeline_wait_resizer(struct isp_device *isp)
791 {
792 return omap3isp_resizer_busy(&isp->isp_res);
793 }
794
795 static int isp_pipeline_wait_preview(struct isp_device *isp)
796 {
797 return omap3isp_preview_busy(&isp->isp_prev);
798 }
799
800 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
801 {
802 return omap3isp_stat_busy(&isp->isp_af)
803 || omap3isp_stat_busy(&isp->isp_aewb)
804 || omap3isp_stat_busy(&isp->isp_hist)
805 || omap3isp_ccdc_busy(&isp->isp_ccdc);
806 }
807
808 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
809
810 static int isp_pipeline_wait(struct isp_device *isp,
811 int(*busy)(struct isp_device *isp))
812 {
813 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
814
815 while (!time_after(jiffies, timeout)) {
816 if (!busy(isp))
817 return 0;
818 }
819
820 return 1;
821 }
822
823 /*
824 * isp_pipeline_disable - Disable streaming on a pipeline
825 * @pipe: ISP pipeline
826 *
827 * Walk the entities chain starting at the pipeline output video node and stop
828 * all modules in the chain. Wait synchronously for the modules to be stopped if
829 * necessary.
830 *
831 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
832 * can't be stopped (in which case a software reset of the ISP is probably
833 * necessary).
834 */
835 static int isp_pipeline_disable(struct isp_pipeline *pipe)
836 {
837 struct isp_device *isp = pipe->output->isp;
838 struct media_entity *entity;
839 struct media_pad *pad;
840 struct v4l2_subdev *subdev;
841 int failure = 0;
842 int ret;
843
844 /*
845 * We need to stop all the modules after CCDC first or they'll
846 * never stop since they may not get a full frame from CCDC.
847 */
848 entity = &pipe->output->video.entity;
849 while (1) {
850 pad = &entity->pads[0];
851 if (!(pad->flags & MEDIA_PAD_FL_SINK))
852 break;
853
854 pad = media_entity_remote_source(pad);
855 if (pad == NULL ||
856 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
857 break;
858
859 entity = pad->entity;
860 subdev = media_entity_to_v4l2_subdev(entity);
861
862 if (subdev == &isp->isp_ccdc.subdev) {
863 v4l2_subdev_call(&isp->isp_aewb.subdev,
864 video, s_stream, 0);
865 v4l2_subdev_call(&isp->isp_af.subdev,
866 video, s_stream, 0);
867 v4l2_subdev_call(&isp->isp_hist.subdev,
868 video, s_stream, 0);
869 }
870
871 v4l2_subdev_call(subdev, video, s_stream, 0);
872
873 if (subdev == &isp->isp_res.subdev)
874 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
875 else if (subdev == &isp->isp_prev.subdev)
876 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
877 else if (subdev == &isp->isp_ccdc.subdev)
878 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
879 else
880 ret = 0;
881
882 if (ret) {
883 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
884 failure = -ETIMEDOUT;
885 }
886 }
887
888 if (failure < 0)
889 isp->needs_reset = true;
890
891 return failure;
892 }
893
894 /*
895 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
896 * @pipe: ISP pipeline
897 * @state: Stream state (stopped, single shot or continuous)
898 *
899 * Set the pipeline to the given stream state. Pipelines can be started in
900 * single-shot or continuous mode.
901 *
902 * Return 0 if successful, or the return value of the failed video::s_stream
903 * operation otherwise. The pipeline state is not updated when the operation
904 * fails, except when stopping the pipeline.
905 */
906 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
907 enum isp_pipeline_stream_state state)
908 {
909 int ret;
910
911 if (state == ISP_PIPELINE_STREAM_STOPPED)
912 ret = isp_pipeline_disable(pipe);
913 else
914 ret = isp_pipeline_enable(pipe, state);
915
916 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
917 pipe->stream_state = state;
918
919 return ret;
920 }
921
922 /*
923 * isp_pipeline_resume - Resume streaming on a pipeline
924 * @pipe: ISP pipeline
925 *
926 * Resume video output and input and re-enable pipeline.
927 */
928 static void isp_pipeline_resume(struct isp_pipeline *pipe)
929 {
930 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
931
932 omap3isp_video_resume(pipe->output, !singleshot);
933 if (singleshot)
934 omap3isp_video_resume(pipe->input, 0);
935 isp_pipeline_enable(pipe, pipe->stream_state);
936 }
937
938 /*
939 * isp_pipeline_suspend - Suspend streaming on a pipeline
940 * @pipe: ISP pipeline
941 *
942 * Suspend pipeline.
943 */
944 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
945 {
946 isp_pipeline_disable(pipe);
947 }
948
949 /*
950 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
951 * video node
952 * @me: ISP module's media entity
953 *
954 * Returns 1 if the entity has an enabled link to the output video node or 0
955 * otherwise. It's true only while pipeline can have no more than one output
956 * node.
957 */
958 static int isp_pipeline_is_last(struct media_entity *me)
959 {
960 struct isp_pipeline *pipe;
961 struct media_pad *pad;
962
963 if (!me->pipe)
964 return 0;
965 pipe = to_isp_pipeline(me);
966 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
967 return 0;
968 pad = media_entity_remote_source(&pipe->output->pad);
969 return pad->entity == me;
970 }
971
972 /*
973 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
974 * @me: ISP module's media entity
975 *
976 * Suspend the whole pipeline if module's entity has an enabled link to the
977 * output video node. It works only while pipeline can have no more than one
978 * output node.
979 */
980 static void isp_suspend_module_pipeline(struct media_entity *me)
981 {
982 if (isp_pipeline_is_last(me))
983 isp_pipeline_suspend(to_isp_pipeline(me));
984 }
985
986 /*
987 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
988 * @me: ISP module's media entity
989 *
990 * Resume the whole pipeline if module's entity has an enabled link to the
991 * output video node. It works only while pipeline can have no more than one
992 * output node.
993 */
994 static void isp_resume_module_pipeline(struct media_entity *me)
995 {
996 if (isp_pipeline_is_last(me))
997 isp_pipeline_resume(to_isp_pipeline(me));
998 }
999
1000 /*
1001 * isp_suspend_modules - Suspend ISP submodules.
1002 * @isp: OMAP3 ISP device
1003 *
1004 * Returns 0 if suspend left in idle state all the submodules properly,
1005 * or returns 1 if a general Reset is required to suspend the submodules.
1006 */
1007 static int isp_suspend_modules(struct isp_device *isp)
1008 {
1009 unsigned long timeout;
1010
1011 omap3isp_stat_suspend(&isp->isp_aewb);
1012 omap3isp_stat_suspend(&isp->isp_af);
1013 omap3isp_stat_suspend(&isp->isp_hist);
1014 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1015 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1016 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1017 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1018 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1019
1020 timeout = jiffies + ISP_STOP_TIMEOUT;
1021 while (omap3isp_stat_busy(&isp->isp_af)
1022 || omap3isp_stat_busy(&isp->isp_aewb)
1023 || omap3isp_stat_busy(&isp->isp_hist)
1024 || omap3isp_preview_busy(&isp->isp_prev)
1025 || omap3isp_resizer_busy(&isp->isp_res)
1026 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1027 if (time_after(jiffies, timeout)) {
1028 dev_info(isp->dev, "can't stop modules.\n");
1029 return 1;
1030 }
1031 msleep(1);
1032 }
1033
1034 return 0;
1035 }
1036
1037 /*
1038 * isp_resume_modules - Resume ISP submodules.
1039 * @isp: OMAP3 ISP device
1040 */
1041 static void isp_resume_modules(struct isp_device *isp)
1042 {
1043 omap3isp_stat_resume(&isp->isp_aewb);
1044 omap3isp_stat_resume(&isp->isp_af);
1045 omap3isp_stat_resume(&isp->isp_hist);
1046 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1047 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1048 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1049 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1050 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1051 }
1052
1053 /*
1054 * isp_reset - Reset ISP with a timeout wait for idle.
1055 * @isp: OMAP3 ISP device
1056 */
1057 static int isp_reset(struct isp_device *isp)
1058 {
1059 unsigned long timeout = 0;
1060
1061 isp_reg_writel(isp,
1062 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1063 | ISP_SYSCONFIG_SOFTRESET,
1064 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1065 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1066 ISP_SYSSTATUS) & 0x1)) {
1067 if (timeout++ > 10000) {
1068 dev_alert(isp->dev, "cannot reset ISP\n");
1069 return -ETIMEDOUT;
1070 }
1071 udelay(1);
1072 }
1073
1074 return 0;
1075 }
1076
1077 /*
1078 * isp_save_context - Saves the values of the ISP module registers.
1079 * @isp: OMAP3 ISP device
1080 * @reg_list: Structure containing pairs of register address and value to
1081 * modify on OMAP.
1082 */
1083 static void
1084 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1085 {
1086 struct isp_reg *next = reg_list;
1087
1088 for (; next->reg != ISP_TOK_TERM; next++)
1089 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1090 }
1091
1092 /*
1093 * isp_restore_context - Restores the values of the ISP module registers.
1094 * @isp: OMAP3 ISP device
1095 * @reg_list: Structure containing pairs of register address and value to
1096 * modify on OMAP.
1097 */
1098 static void
1099 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1100 {
1101 struct isp_reg *next = reg_list;
1102
1103 for (; next->reg != ISP_TOK_TERM; next++)
1104 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1105 }
1106
1107 /*
1108 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1109 * @isp: OMAP3 ISP device
1110 *
1111 * Routine for saving the context of each module in the ISP.
1112 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1113 */
1114 static void isp_save_ctx(struct isp_device *isp)
1115 {
1116 isp_save_context(isp, isp_reg_list);
1117 if (isp->iommu)
1118 omap_iommu_save_ctx(isp->iommu);
1119 }
1120
1121 /*
1122 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1123 * @isp: OMAP3 ISP device
1124 *
1125 * Routine for restoring the context of each module in the ISP.
1126 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1127 */
1128 static void isp_restore_ctx(struct isp_device *isp)
1129 {
1130 isp_restore_context(isp, isp_reg_list);
1131 if (isp->iommu)
1132 omap_iommu_restore_ctx(isp->iommu);
1133 omap3isp_ccdc_restore_context(isp);
1134 omap3isp_preview_restore_context(isp);
1135 }
1136
1137 /* -----------------------------------------------------------------------------
1138 * SBL resources management
1139 */
1140 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1141 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1142 OMAP3_ISP_SBL_PREVIEW_READ | \
1143 OMAP3_ISP_SBL_RESIZER_READ)
1144 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1145 OMAP3_ISP_SBL_CSI2A_WRITE | \
1146 OMAP3_ISP_SBL_CSI2C_WRITE | \
1147 OMAP3_ISP_SBL_CCDC_WRITE | \
1148 OMAP3_ISP_SBL_PREVIEW_WRITE)
1149
1150 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1151 {
1152 u32 sbl = 0;
1153
1154 isp->sbl_resources |= res;
1155
1156 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1157 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1158
1159 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1160 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1161
1162 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1163 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1164
1165 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1166 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1167
1168 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1169 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1170
1171 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1172 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1173
1174 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1175 }
1176
1177 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1178 {
1179 u32 sbl = 0;
1180
1181 isp->sbl_resources &= ~res;
1182
1183 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1184 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1185
1186 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1187 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1188
1189 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1190 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1191
1192 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1193 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1194
1195 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1196 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1197
1198 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1199 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1200
1201 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1202 }
1203
1204 /*
1205 * isp_module_sync_idle - Helper to sync module with its idle state
1206 * @me: ISP submodule's media entity
1207 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1208 * @stopping: flag which tells module wants to stop
1209 *
1210 * This function checks if ISP submodule needs to wait for next interrupt. If
1211 * yes, makes the caller to sleep while waiting for such event.
1212 */
1213 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1214 atomic_t *stopping)
1215 {
1216 struct isp_pipeline *pipe = to_isp_pipeline(me);
1217
1218 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1219 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1220 !isp_pipeline_ready(pipe)))
1221 return 0;
1222
1223 /*
1224 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1225 * scenario. We'll call it here to avoid race conditions.
1226 */
1227 atomic_set(stopping, 1);
1228 smp_mb();
1229
1230 /*
1231 * If module is the last one, it's writing to memory. In this case,
1232 * it's necessary to check if the module is already paused due to
1233 * DMA queue underrun or if it has to wait for next interrupt to be
1234 * idle.
1235 * If it isn't the last one, the function won't sleep but *stopping
1236 * will still be set to warn next submodule caller's interrupt the
1237 * module wants to be idle.
1238 */
1239 if (isp_pipeline_is_last(me)) {
1240 struct isp_video *video = pipe->output;
1241 unsigned long flags;
1242 spin_lock_irqsave(&video->queue->irqlock, flags);
1243 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1244 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1245 atomic_set(stopping, 0);
1246 smp_mb();
1247 return 0;
1248 }
1249 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1250 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1251 msecs_to_jiffies(1000))) {
1252 atomic_set(stopping, 0);
1253 smp_mb();
1254 return -ETIMEDOUT;
1255 }
1256 }
1257
1258 return 0;
1259 }
1260
1261 /*
1262 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
1263 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1264 * @stopping: flag which tells module wants to stop
1265 *
1266 * This function checks if ISP submodule was stopping. In case of yes, it
1267 * notices the caller by setting stopping to 0 and waking up the wait queue.
1268 * Returns 1 if it was stopping or 0 otherwise.
1269 */
1270 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1271 atomic_t *stopping)
1272 {
1273 if (atomic_cmpxchg(stopping, 1, 0)) {
1274 wake_up(wait);
1275 return 1;
1276 }
1277
1278 return 0;
1279 }
1280
1281 /* --------------------------------------------------------------------------
1282 * Clock management
1283 */
1284
1285 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1286 ISPCTRL_HIST_CLK_EN | \
1287 ISPCTRL_RSZ_CLK_EN | \
1288 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1289 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1290
1291 static void __isp_subclk_update(struct isp_device *isp)
1292 {
1293 u32 clk = 0;
1294
1295 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_H3A)
1296 clk |= ISPCTRL_H3A_CLK_EN;
1297
1298 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1299 clk |= ISPCTRL_HIST_CLK_EN;
1300
1301 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1302 clk |= ISPCTRL_RSZ_CLK_EN;
1303
1304 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1305 * RAM as well.
1306 */
1307 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1308 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1309
1310 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1311 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1312
1313 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1314 ISPCTRL_CLKS_MASK, clk);
1315 }
1316
1317 void omap3isp_subclk_enable(struct isp_device *isp,
1318 enum isp_subclk_resource res)
1319 {
1320 isp->subclk_resources |= res;
1321
1322 __isp_subclk_update(isp);
1323 }
1324
1325 void omap3isp_subclk_disable(struct isp_device *isp,
1326 enum isp_subclk_resource res)
1327 {
1328 isp->subclk_resources &= ~res;
1329
1330 __isp_subclk_update(isp);
1331 }
1332
1333 /*
1334 * isp_enable_clocks - Enable ISP clocks
1335 * @isp: OMAP3 ISP device
1336 *
1337 * Return 0 if successful, or clk_enable return value if any of tthem fails.
1338 */
1339 static int isp_enable_clocks(struct isp_device *isp)
1340 {
1341 int r;
1342 unsigned long rate;
1343 int divisor;
1344
1345 /*
1346 * cam_mclk clock chain:
1347 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
1348 *
1349 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
1350 * set to the same value. Hence the rate set for dpll4_m5
1351 * has to be twice of what is set on OMAP3430 to get
1352 * the required value for cam_mclk
1353 */
1354 if (cpu_is_omap3630())
1355 divisor = 1;
1356 else
1357 divisor = 2;
1358
1359 r = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
1360 if (r) {
1361 dev_err(isp->dev, "clk_enable cam_ick failed\n");
1362 goto out_clk_enable_ick;
1363 }
1364 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK],
1365 CM_CAM_MCLK_HZ/divisor);
1366 if (r) {
1367 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n");
1368 goto out_clk_enable_mclk;
1369 }
1370 r = clk_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1371 if (r) {
1372 dev_err(isp->dev, "clk_enable cam_mclk failed\n");
1373 goto out_clk_enable_mclk;
1374 }
1375 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1376 if (rate != CM_CAM_MCLK_HZ)
1377 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1378 " expected : %d\n"
1379 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1380 r = clk_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1381 if (r) {
1382 dev_err(isp->dev, "clk_enable csi2_fck failed\n");
1383 goto out_clk_enable_csi2_fclk;
1384 }
1385 return 0;
1386
1387 out_clk_enable_csi2_fclk:
1388 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1389 out_clk_enable_mclk:
1390 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1391 out_clk_enable_ick:
1392 return r;
1393 }
1394
1395 /*
1396 * isp_disable_clocks - Disable ISP clocks
1397 * @isp: OMAP3 ISP device
1398 */
1399 static void isp_disable_clocks(struct isp_device *isp)
1400 {
1401 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1402 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1403 clk_disable(isp->clock[ISP_CLK_CSI2_FCK]);
1404 }
1405
1406 static const char *isp_clocks[] = {
1407 "cam_ick",
1408 "cam_mclk",
1409 "dpll4_m5_ck",
1410 "csi2_96m_fck",
1411 "l3_ick",
1412 };
1413
1414 static void isp_put_clocks(struct isp_device *isp)
1415 {
1416 unsigned int i;
1417
1418 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1419 if (isp->clock[i]) {
1420 clk_put(isp->clock[i]);
1421 isp->clock[i] = NULL;
1422 }
1423 }
1424 }
1425
1426 static int isp_get_clocks(struct isp_device *isp)
1427 {
1428 struct clk *clk;
1429 unsigned int i;
1430
1431 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1432 clk = clk_get(isp->dev, isp_clocks[i]);
1433 if (IS_ERR(clk)) {
1434 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1435 isp_put_clocks(isp);
1436 return PTR_ERR(clk);
1437 }
1438
1439 isp->clock[i] = clk;
1440 }
1441
1442 return 0;
1443 }
1444
1445 /*
1446 * omap3isp_get - Acquire the ISP resource.
1447 *
1448 * Initializes the clocks for the first acquire.
1449 *
1450 * Increment the reference count on the ISP. If the first reference is taken,
1451 * enable clocks and power-up all submodules.
1452 *
1453 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1454 */
1455 struct isp_device *omap3isp_get(struct isp_device *isp)
1456 {
1457 struct isp_device *__isp = isp;
1458
1459 if (isp == NULL)
1460 return NULL;
1461
1462 mutex_lock(&isp->isp_mutex);
1463 if (isp->ref_count > 0)
1464 goto out;
1465
1466 if (isp_enable_clocks(isp) < 0) {
1467 __isp = NULL;
1468 goto out;
1469 }
1470
1471 /* We don't want to restore context before saving it! */
1472 if (isp->has_context)
1473 isp_restore_ctx(isp);
1474 else
1475 isp->has_context = 1;
1476
1477 isp_enable_interrupts(isp);
1478
1479 out:
1480 if (__isp != NULL)
1481 isp->ref_count++;
1482 mutex_unlock(&isp->isp_mutex);
1483
1484 return __isp;
1485 }
1486
1487 /*
1488 * omap3isp_put - Release the ISP
1489 *
1490 * Decrement the reference count on the ISP. If the last reference is released,
1491 * power-down all submodules, disable clocks and free temporary buffers.
1492 */
1493 void omap3isp_put(struct isp_device *isp)
1494 {
1495 if (isp == NULL)
1496 return;
1497
1498 mutex_lock(&isp->isp_mutex);
1499 BUG_ON(isp->ref_count == 0);
1500 if (--isp->ref_count == 0) {
1501 isp_disable_interrupts(isp);
1502 isp_save_ctx(isp);
1503 if (isp->needs_reset) {
1504 isp_reset(isp);
1505 isp->needs_reset = false;
1506 }
1507 isp_disable_clocks(isp);
1508 }
1509 mutex_unlock(&isp->isp_mutex);
1510 }
1511
1512 /* --------------------------------------------------------------------------
1513 * Platform device driver
1514 */
1515
1516 /*
1517 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1518 * @isp: OMAP3 ISP device
1519 */
1520 #define ISP_PRINT_REGISTER(isp, name)\
1521 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1522 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1523 #define SBL_PRINT_REGISTER(isp, name)\
1524 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1525 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1526
1527 void omap3isp_print_status(struct isp_device *isp)
1528 {
1529 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1530
1531 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1532 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1533 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1534 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1535 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1536 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1537 ISP_PRINT_REGISTER(isp, CTRL);
1538 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1539 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1540 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1541 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1542 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1543 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1544 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1545 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1546
1547 SBL_PRINT_REGISTER(isp, PCR);
1548 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1549
1550 dev_dbg(isp->dev, "--------------------------------------------\n");
1551 }
1552
1553 #ifdef CONFIG_PM
1554
1555 /*
1556 * Power management support.
1557 *
1558 * As the ISP can't properly handle an input video stream interruption on a non
1559 * frame boundary, the ISP pipelines need to be stopped before sensors get
1560 * suspended. However, as suspending the sensors can require a running clock,
1561 * which can be provided by the ISP, the ISP can't be completely suspended
1562 * before the sensor.
1563 *
1564 * To solve this problem power management support is split into prepare/complete
1565 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1566 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1567 * resume(), and the the pipelines are restarted in complete().
1568 *
1569 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
1570 * yet.
1571 */
1572 static int isp_pm_prepare(struct device *dev)
1573 {
1574 struct isp_device *isp = dev_get_drvdata(dev);
1575 int reset;
1576
1577 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1578
1579 if (isp->ref_count == 0)
1580 return 0;
1581
1582 reset = isp_suspend_modules(isp);
1583 isp_disable_interrupts(isp);
1584 isp_save_ctx(isp);
1585 if (reset)
1586 isp_reset(isp);
1587
1588 return 0;
1589 }
1590
1591 static int isp_pm_suspend(struct device *dev)
1592 {
1593 struct isp_device *isp = dev_get_drvdata(dev);
1594
1595 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1596
1597 if (isp->ref_count)
1598 isp_disable_clocks(isp);
1599
1600 return 0;
1601 }
1602
1603 static int isp_pm_resume(struct device *dev)
1604 {
1605 struct isp_device *isp = dev_get_drvdata(dev);
1606
1607 if (isp->ref_count == 0)
1608 return 0;
1609
1610 return isp_enable_clocks(isp);
1611 }
1612
1613 static void isp_pm_complete(struct device *dev)
1614 {
1615 struct isp_device *isp = dev_get_drvdata(dev);
1616
1617 if (isp->ref_count == 0)
1618 return;
1619
1620 isp_restore_ctx(isp);
1621 isp_enable_interrupts(isp);
1622 isp_resume_modules(isp);
1623 }
1624
1625 #else
1626
1627 #define isp_pm_prepare NULL
1628 #define isp_pm_suspend NULL
1629 #define isp_pm_resume NULL
1630 #define isp_pm_complete NULL
1631
1632 #endif /* CONFIG_PM */
1633
1634 static void isp_unregister_entities(struct isp_device *isp)
1635 {
1636 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1637 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1638 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1639 omap3isp_preview_unregister_entities(&isp->isp_prev);
1640 omap3isp_resizer_unregister_entities(&isp->isp_res);
1641 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1642 omap3isp_stat_unregister_entities(&isp->isp_af);
1643 omap3isp_stat_unregister_entities(&isp->isp_hist);
1644
1645 v4l2_device_unregister(&isp->v4l2_dev);
1646 media_device_unregister(&isp->media_dev);
1647 }
1648
1649 /*
1650 * isp_register_subdev_group - Register a group of subdevices
1651 * @isp: OMAP3 ISP device
1652 * @board_info: I2C subdevs board information array
1653 *
1654 * Register all I2C subdevices in the board_info array. The array must be
1655 * terminated by a NULL entry, and the first entry must be the sensor.
1656 *
1657 * Return a pointer to the sensor media entity if it has been successfully
1658 * registered, or NULL otherwise.
1659 */
1660 static struct v4l2_subdev *
1661 isp_register_subdev_group(struct isp_device *isp,
1662 struct isp_subdev_i2c_board_info *board_info)
1663 {
1664 struct v4l2_subdev *sensor = NULL;
1665 unsigned int first;
1666
1667 if (board_info->board_info == NULL)
1668 return NULL;
1669
1670 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1671 struct v4l2_subdev *subdev;
1672 struct i2c_adapter *adapter;
1673
1674 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1675 if (adapter == NULL) {
1676 printk(KERN_ERR "%s: Unable to get I2C adapter %d for "
1677 "device %s\n", __func__,
1678 board_info->i2c_adapter_id,
1679 board_info->board_info->type);
1680 continue;
1681 }
1682
1683 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1684 board_info->board_info, NULL);
1685 if (subdev == NULL) {
1686 printk(KERN_ERR "%s: Unable to register subdev %s\n",
1687 __func__, board_info->board_info->type);
1688 continue;
1689 }
1690
1691 if (first)
1692 sensor = subdev;
1693 }
1694
1695 return sensor;
1696 }
1697
1698 static int isp_register_entities(struct isp_device *isp)
1699 {
1700 struct isp_platform_data *pdata = isp->pdata;
1701 struct isp_v4l2_subdevs_group *subdevs;
1702 int ret;
1703
1704 isp->media_dev.dev = isp->dev;
1705 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1706 sizeof(isp->media_dev.model));
1707 isp->media_dev.link_notify = isp_pipeline_link_notify;
1708 ret = media_device_register(&isp->media_dev);
1709 if (ret < 0) {
1710 printk(KERN_ERR "%s: Media device registration failed (%d)\n",
1711 __func__, ret);
1712 return ret;
1713 }
1714
1715 isp->v4l2_dev.mdev = &isp->media_dev;
1716 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1717 if (ret < 0) {
1718 printk(KERN_ERR "%s: V4L2 device registration failed (%d)\n",
1719 __func__, ret);
1720 goto done;
1721 }
1722
1723 /* Register internal entities */
1724 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1725 if (ret < 0)
1726 goto done;
1727
1728 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1729 if (ret < 0)
1730 goto done;
1731
1732 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1733 if (ret < 0)
1734 goto done;
1735
1736 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1737 &isp->v4l2_dev);
1738 if (ret < 0)
1739 goto done;
1740
1741 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1742 if (ret < 0)
1743 goto done;
1744
1745 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1746 if (ret < 0)
1747 goto done;
1748
1749 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1750 if (ret < 0)
1751 goto done;
1752
1753 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1754 if (ret < 0)
1755 goto done;
1756
1757 /* Register external entities */
1758 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
1759 struct v4l2_subdev *sensor;
1760 struct media_entity *input;
1761 unsigned int flags;
1762 unsigned int pad;
1763
1764 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1765 if (sensor == NULL)
1766 continue;
1767
1768 sensor->host_priv = subdevs;
1769
1770 /* Connect the sensor to the correct interface module. Parallel
1771 * sensors are connected directly to the CCDC, while serial
1772 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1773 * through CSIPHY1 or CSIPHY2.
1774 */
1775 switch (subdevs->interface) {
1776 case ISP_INTERFACE_PARALLEL:
1777 input = &isp->isp_ccdc.subdev.entity;
1778 pad = CCDC_PAD_SINK;
1779 flags = 0;
1780 break;
1781
1782 case ISP_INTERFACE_CSI2A_PHY2:
1783 input = &isp->isp_csi2a.subdev.entity;
1784 pad = CSI2_PAD_SINK;
1785 flags = MEDIA_LNK_FL_IMMUTABLE
1786 | MEDIA_LNK_FL_ENABLED;
1787 break;
1788
1789 case ISP_INTERFACE_CCP2B_PHY1:
1790 case ISP_INTERFACE_CCP2B_PHY2:
1791 input = &isp->isp_ccp2.subdev.entity;
1792 pad = CCP2_PAD_SINK;
1793 flags = 0;
1794 break;
1795
1796 case ISP_INTERFACE_CSI2C_PHY1:
1797 input = &isp->isp_csi2c.subdev.entity;
1798 pad = CSI2_PAD_SINK;
1799 flags = MEDIA_LNK_FL_IMMUTABLE
1800 | MEDIA_LNK_FL_ENABLED;
1801 break;
1802
1803 default:
1804 printk(KERN_ERR "%s: invalid interface type %u\n",
1805 __func__, subdevs->interface);
1806 ret = -EINVAL;
1807 goto done;
1808 }
1809
1810 ret = media_entity_create_link(&sensor->entity, 0, input, pad,
1811 flags);
1812 if (ret < 0)
1813 goto done;
1814 }
1815
1816 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1817
1818 done:
1819 if (ret < 0)
1820 isp_unregister_entities(isp);
1821
1822 return ret;
1823 }
1824
1825 static void isp_cleanup_modules(struct isp_device *isp)
1826 {
1827 omap3isp_h3a_aewb_cleanup(isp);
1828 omap3isp_h3a_af_cleanup(isp);
1829 omap3isp_hist_cleanup(isp);
1830 omap3isp_resizer_cleanup(isp);
1831 omap3isp_preview_cleanup(isp);
1832 omap3isp_ccdc_cleanup(isp);
1833 omap3isp_ccp2_cleanup(isp);
1834 omap3isp_csi2_cleanup(isp);
1835 }
1836
1837 static int isp_initialize_modules(struct isp_device *isp)
1838 {
1839 int ret;
1840
1841 ret = omap3isp_csiphy_init(isp);
1842 if (ret < 0) {
1843 dev_err(isp->dev, "CSI PHY initialization failed\n");
1844 goto error_csiphy;
1845 }
1846
1847 ret = omap3isp_csi2_init(isp);
1848 if (ret < 0) {
1849 dev_err(isp->dev, "CSI2 initialization failed\n");
1850 goto error_csi2;
1851 }
1852
1853 ret = omap3isp_ccp2_init(isp);
1854 if (ret < 0) {
1855 dev_err(isp->dev, "CCP2 initialization failed\n");
1856 goto error_ccp2;
1857 }
1858
1859 ret = omap3isp_ccdc_init(isp);
1860 if (ret < 0) {
1861 dev_err(isp->dev, "CCDC initialization failed\n");
1862 goto error_ccdc;
1863 }
1864
1865 ret = omap3isp_preview_init(isp);
1866 if (ret < 0) {
1867 dev_err(isp->dev, "Preview initialization failed\n");
1868 goto error_preview;
1869 }
1870
1871 ret = omap3isp_resizer_init(isp);
1872 if (ret < 0) {
1873 dev_err(isp->dev, "Resizer initialization failed\n");
1874 goto error_resizer;
1875 }
1876
1877 ret = omap3isp_hist_init(isp);
1878 if (ret < 0) {
1879 dev_err(isp->dev, "Histogram initialization failed\n");
1880 goto error_hist;
1881 }
1882
1883 ret = omap3isp_h3a_aewb_init(isp);
1884 if (ret < 0) {
1885 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1886 goto error_h3a_aewb;
1887 }
1888
1889 ret = omap3isp_h3a_af_init(isp);
1890 if (ret < 0) {
1891 dev_err(isp->dev, "H3A AF initialization failed\n");
1892 goto error_h3a_af;
1893 }
1894
1895 /* Connect the submodules. */
1896 ret = media_entity_create_link(
1897 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1898 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1899 if (ret < 0)
1900 goto error_link;
1901
1902 ret = media_entity_create_link(
1903 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1904 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1905 if (ret < 0)
1906 goto error_link;
1907
1908 ret = media_entity_create_link(
1909 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1910 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1911 if (ret < 0)
1912 goto error_link;
1913
1914 ret = media_entity_create_link(
1915 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1916 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1917 if (ret < 0)
1918 goto error_link;
1919
1920 ret = media_entity_create_link(
1921 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1922 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1923 if (ret < 0)
1924 goto error_link;
1925
1926 ret = media_entity_create_link(
1927 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1928 &isp->isp_aewb.subdev.entity, 0,
1929 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1930 if (ret < 0)
1931 goto error_link;
1932
1933 ret = media_entity_create_link(
1934 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1935 &isp->isp_af.subdev.entity, 0,
1936 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1937 if (ret < 0)
1938 goto error_link;
1939
1940 ret = media_entity_create_link(
1941 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1942 &isp->isp_hist.subdev.entity, 0,
1943 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1944 if (ret < 0)
1945 goto error_link;
1946
1947 return 0;
1948
1949 error_link:
1950 omap3isp_h3a_af_cleanup(isp);
1951 error_h3a_af:
1952 omap3isp_h3a_aewb_cleanup(isp);
1953 error_h3a_aewb:
1954 omap3isp_hist_cleanup(isp);
1955 error_hist:
1956 omap3isp_resizer_cleanup(isp);
1957 error_resizer:
1958 omap3isp_preview_cleanup(isp);
1959 error_preview:
1960 omap3isp_ccdc_cleanup(isp);
1961 error_ccdc:
1962 omap3isp_ccp2_cleanup(isp);
1963 error_ccp2:
1964 omap3isp_csi2_cleanup(isp);
1965 error_csi2:
1966 error_csiphy:
1967 return ret;
1968 }
1969
1970 /*
1971 * isp_remove - Remove ISP platform device
1972 * @pdev: Pointer to ISP platform device
1973 *
1974 * Always returns 0.
1975 */
1976 static int isp_remove(struct platform_device *pdev)
1977 {
1978 struct isp_device *isp = platform_get_drvdata(pdev);
1979 int i;
1980
1981 isp_unregister_entities(isp);
1982 isp_cleanup_modules(isp);
1983
1984 omap3isp_get(isp);
1985 iommu_detach_device(isp->domain, isp->iommu_dev);
1986 iommu_domain_free(isp->domain);
1987 omap3isp_put(isp);
1988
1989 free_irq(isp->irq_num, isp);
1990 isp_put_clocks(isp);
1991
1992 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
1993 if (isp->mmio_base[i]) {
1994 iounmap(isp->mmio_base[i]);
1995 isp->mmio_base[i] = NULL;
1996 }
1997
1998 if (isp->mmio_base_phys[i]) {
1999 release_mem_region(isp->mmio_base_phys[i],
2000 isp->mmio_size[i]);
2001 isp->mmio_base_phys[i] = 0;
2002 }
2003 }
2004
2005 regulator_put(isp->isp_csiphy1.vdd);
2006 regulator_put(isp->isp_csiphy2.vdd);
2007 kfree(isp);
2008
2009 return 0;
2010 }
2011
2012 static int isp_map_mem_resource(struct platform_device *pdev,
2013 struct isp_device *isp,
2014 enum isp_mem_resources res)
2015 {
2016 struct resource *mem;
2017
2018 /* request the mem region for the camera registers */
2019
2020 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2021 if (!mem) {
2022 dev_err(isp->dev, "no mem resource?\n");
2023 return -ENODEV;
2024 }
2025
2026 if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) {
2027 dev_err(isp->dev,
2028 "cannot reserve camera register I/O region\n");
2029 return -ENODEV;
2030 }
2031 isp->mmio_base_phys[res] = mem->start;
2032 isp->mmio_size[res] = resource_size(mem);
2033
2034 /* map the region */
2035 isp->mmio_base[res] = ioremap_nocache(isp->mmio_base_phys[res],
2036 isp->mmio_size[res]);
2037 if (!isp->mmio_base[res]) {
2038 dev_err(isp->dev, "cannot map camera register I/O region\n");
2039 return -ENODEV;
2040 }
2041
2042 return 0;
2043 }
2044
2045 /*
2046 * isp_probe - Probe ISP platform device
2047 * @pdev: Pointer to ISP platform device
2048 *
2049 * Returns 0 if successful,
2050 * -ENOMEM if no memory available,
2051 * -ENODEV if no platform device resources found
2052 * or no space for remapping registers,
2053 * -EINVAL if couldn't install ISR,
2054 * or clk_get return error value.
2055 */
2056 static int isp_probe(struct platform_device *pdev)
2057 {
2058 struct isp_platform_data *pdata = pdev->dev.platform_data;
2059 struct isp_device *isp;
2060 int ret;
2061 int i, m;
2062
2063 if (pdata == NULL)
2064 return -EINVAL;
2065
2066 isp = kzalloc(sizeof(*isp), GFP_KERNEL);
2067 if (!isp) {
2068 dev_err(&pdev->dev, "could not allocate memory\n");
2069 return -ENOMEM;
2070 }
2071
2072 isp->autoidle = autoidle;
2073 isp->platform_cb.set_xclk = isp_set_xclk;
2074 isp->platform_cb.set_pixel_clock = isp_set_pixel_clock;
2075
2076 mutex_init(&isp->isp_mutex);
2077 spin_lock_init(&isp->stat_lock);
2078
2079 isp->dev = &pdev->dev;
2080 isp->pdata = pdata;
2081 isp->ref_count = 0;
2082
2083 isp->raw_dmamask = DMA_BIT_MASK(32);
2084 isp->dev->dma_mask = &isp->raw_dmamask;
2085 isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
2086
2087 platform_set_drvdata(pdev, isp);
2088
2089 /* Regulators */
2090 isp->isp_csiphy1.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY1");
2091 isp->isp_csiphy2.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY2");
2092
2093 /* Clocks */
2094 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2095 if (ret < 0)
2096 goto error;
2097
2098 ret = isp_get_clocks(isp);
2099 if (ret < 0)
2100 goto error;
2101
2102 if (omap3isp_get(isp) == NULL)
2103 goto error;
2104
2105 ret = isp_reset(isp);
2106 if (ret < 0)
2107 goto error_isp;
2108
2109 /* Memory resources */
2110 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2111 dev_info(isp->dev, "Revision %d.%d found\n",
2112 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2113
2114 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2115 if (isp->revision == isp_res_maps[m].isp_rev)
2116 break;
2117
2118 if (m == ARRAY_SIZE(isp_res_maps)) {
2119 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2120 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2121 ret = -ENODEV;
2122 goto error_isp;
2123 }
2124
2125 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2126 if (isp_res_maps[m].map & 1 << i) {
2127 ret = isp_map_mem_resource(pdev, isp, i);
2128 if (ret)
2129 goto error_isp;
2130 }
2131 }
2132
2133 /* IOMMU */
2134 isp->iommu_dev = omap_find_iommu_device("isp");
2135 if (!isp->iommu_dev) {
2136 dev_err(isp->dev, "omap_find_iommu_device failed\n");
2137 ret = -ENODEV;
2138 goto error_isp;
2139 }
2140
2141 /* to be removed once iommu migration is complete */
2142 isp->iommu = to_iommu(isp->iommu_dev);
2143
2144 isp->domain = iommu_domain_alloc();
2145 if (!isp->domain) {
2146 dev_err(isp->dev, "can't alloc iommu domain\n");
2147 ret = -ENOMEM;
2148 goto error_isp;
2149 }
2150
2151 ret = iommu_attach_device(isp->domain, isp->iommu_dev);
2152 if (ret) {
2153 dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
2154 goto free_domain;
2155 }
2156
2157 /* Interrupt */
2158 isp->irq_num = platform_get_irq(pdev, 0);
2159 if (isp->irq_num <= 0) {
2160 dev_err(isp->dev, "No IRQ resource\n");
2161 ret = -ENODEV;
2162 goto detach_dev;
2163 }
2164
2165 if (request_irq(isp->irq_num, isp_isr, IRQF_SHARED, "OMAP3 ISP", isp)) {
2166 dev_err(isp->dev, "Unable to request IRQ\n");
2167 ret = -EINVAL;
2168 goto detach_dev;
2169 }
2170
2171 /* Entities */
2172 ret = isp_initialize_modules(isp);
2173 if (ret < 0)
2174 goto error_irq;
2175
2176 ret = isp_register_entities(isp);
2177 if (ret < 0)
2178 goto error_modules;
2179
2180 isp_power_settings(isp, 1);
2181 omap3isp_put(isp);
2182
2183 return 0;
2184
2185 error_modules:
2186 isp_cleanup_modules(isp);
2187 error_irq:
2188 free_irq(isp->irq_num, isp);
2189 detach_dev:
2190 iommu_detach_device(isp->domain, isp->iommu_dev);
2191 free_domain:
2192 iommu_domain_free(isp->domain);
2193 error_isp:
2194 omap3isp_put(isp);
2195 error:
2196 isp_put_clocks(isp);
2197
2198 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2199 if (isp->mmio_base[i]) {
2200 iounmap(isp->mmio_base[i]);
2201 isp->mmio_base[i] = NULL;
2202 }
2203
2204 if (isp->mmio_base_phys[i]) {
2205 release_mem_region(isp->mmio_base_phys[i],
2206 isp->mmio_size[i]);
2207 isp->mmio_base_phys[i] = 0;
2208 }
2209 }
2210 regulator_put(isp->isp_csiphy2.vdd);
2211 regulator_put(isp->isp_csiphy1.vdd);
2212 platform_set_drvdata(pdev, NULL);
2213 kfree(isp);
2214
2215 return ret;
2216 }
2217
2218 static const struct dev_pm_ops omap3isp_pm_ops = {
2219 .prepare = isp_pm_prepare,
2220 .suspend = isp_pm_suspend,
2221 .resume = isp_pm_resume,
2222 .complete = isp_pm_complete,
2223 };
2224
2225 static struct platform_device_id omap3isp_id_table[] = {
2226 { "omap3isp", 0 },
2227 { },
2228 };
2229 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2230
2231 static struct platform_driver omap3isp_driver = {
2232 .probe = isp_probe,
2233 .remove = isp_remove,
2234 .id_table = omap3isp_id_table,
2235 .driver = {
2236 .owner = THIS_MODULE,
2237 .name = "omap3isp",
2238 .pm = &omap3isp_pm_ops,
2239 },
2240 };
2241
2242 /*
2243 * isp_init - ISP module initialization.
2244 */
2245 static int __init isp_init(void)
2246 {
2247 return platform_driver_register(&omap3isp_driver);
2248 }
2249
2250 /*
2251 * isp_cleanup - ISP module cleanup.
2252 */
2253 static void __exit isp_cleanup(void)
2254 {
2255 platform_driver_unregister(&omap3isp_driver);
2256 }
2257
2258 module_init(isp_init);
2259 module_exit(isp_cleanup);
2260
2261 MODULE_AUTHOR("Nokia Corporation");
2262 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2263 MODULE_LICENSE("GPL");
2264 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);
linux-next