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Add linux-next specific files for 20110831
[linux-2.6/next.git] / drivers / media / video / omap3isp / ispccdc.c
blob9891dde2af77e6a218b2922d5535fa12639de604
1 /*
2 * ispccdc.c
3 *
4 * TI OMAP3 ISP - CCDC module
5 *
6 * Copyright (C) 2009-2010 Nokia Corporation
7 * Copyright (C) 2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */
26
27 #include <linux/module.h>
28 #include <linux/uaccess.h>
29 #include <linux/delay.h>
30 #include <linux/device.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/mm.h>
33 #include <linux/sched.h>
34 #include <media/v4l2-event.h>
35
36 #include "isp.h"
37 #include "ispreg.h"
38 #include "ispccdc.h"
39
40 static struct v4l2_mbus_framefmt *
41 __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
42 unsigned int pad, enum v4l2_subdev_format_whence which);
43
44 static const unsigned int ccdc_fmts[] = {
45 V4L2_MBUS_FMT_Y8_1X8,
46 V4L2_MBUS_FMT_Y10_1X10,
47 V4L2_MBUS_FMT_Y12_1X12,
48 V4L2_MBUS_FMT_SGRBG8_1X8,
49 V4L2_MBUS_FMT_SRGGB8_1X8,
50 V4L2_MBUS_FMT_SBGGR8_1X8,
51 V4L2_MBUS_FMT_SGBRG8_1X8,
52 V4L2_MBUS_FMT_SGRBG10_1X10,
53 V4L2_MBUS_FMT_SRGGB10_1X10,
54 V4L2_MBUS_FMT_SBGGR10_1X10,
55 V4L2_MBUS_FMT_SGBRG10_1X10,
56 V4L2_MBUS_FMT_SGRBG12_1X12,
57 V4L2_MBUS_FMT_SRGGB12_1X12,
58 V4L2_MBUS_FMT_SBGGR12_1X12,
59 V4L2_MBUS_FMT_SGBRG12_1X12,
60 };
61
62 /*
63 * ccdc_print_status - Print current CCDC Module register values.
64 * @ccdc: Pointer to ISP CCDC device.
65 *
66 * Also prints other debug information stored in the CCDC module.
67 */
68 #define CCDC_PRINT_REGISTER(isp, name)\
69 dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
70 isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
71
72 static void ccdc_print_status(struct isp_ccdc_device *ccdc)
73 {
74 struct isp_device *isp = to_isp_device(ccdc);
75
76 dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
77
78 CCDC_PRINT_REGISTER(isp, PCR);
79 CCDC_PRINT_REGISTER(isp, SYN_MODE);
80 CCDC_PRINT_REGISTER(isp, HD_VD_WID);
81 CCDC_PRINT_REGISTER(isp, PIX_LINES);
82 CCDC_PRINT_REGISTER(isp, HORZ_INFO);
83 CCDC_PRINT_REGISTER(isp, VERT_START);
84 CCDC_PRINT_REGISTER(isp, VERT_LINES);
85 CCDC_PRINT_REGISTER(isp, CULLING);
86 CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
87 CCDC_PRINT_REGISTER(isp, SDOFST);
88 CCDC_PRINT_REGISTER(isp, SDR_ADDR);
89 CCDC_PRINT_REGISTER(isp, CLAMP);
90 CCDC_PRINT_REGISTER(isp, DCSUB);
91 CCDC_PRINT_REGISTER(isp, COLPTN);
92 CCDC_PRINT_REGISTER(isp, BLKCMP);
93 CCDC_PRINT_REGISTER(isp, FPC);
94 CCDC_PRINT_REGISTER(isp, FPC_ADDR);
95 CCDC_PRINT_REGISTER(isp, VDINT);
96 CCDC_PRINT_REGISTER(isp, ALAW);
97 CCDC_PRINT_REGISTER(isp, REC656IF);
98 CCDC_PRINT_REGISTER(isp, CFG);
99 CCDC_PRINT_REGISTER(isp, FMTCFG);
100 CCDC_PRINT_REGISTER(isp, FMT_HORZ);
101 CCDC_PRINT_REGISTER(isp, FMT_VERT);
102 CCDC_PRINT_REGISTER(isp, PRGEVEN0);
103 CCDC_PRINT_REGISTER(isp, PRGEVEN1);
104 CCDC_PRINT_REGISTER(isp, PRGODD0);
105 CCDC_PRINT_REGISTER(isp, PRGODD1);
106 CCDC_PRINT_REGISTER(isp, VP_OUT);
107 CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
108 CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
109 CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
110 CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
111
112 dev_dbg(isp->dev, "--------------------------------------------\n");
113 }
114
115 /*
116 * omap3isp_ccdc_busy - Get busy state of the CCDC.
117 * @ccdc: Pointer to ISP CCDC device.
118 */
119 int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
120 {
121 struct isp_device *isp = to_isp_device(ccdc);
122
123 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
124 ISPCCDC_PCR_BUSY;
125 }
126
127 /* -----------------------------------------------------------------------------
128 * Lens Shading Compensation
129 */
130
131 /*
132 * ccdc_lsc_validate_config - Check that LSC configuration is valid.
133 * @ccdc: Pointer to ISP CCDC device.
134 * @lsc_cfg: the LSC configuration to check.
135 *
136 * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
137 */
138 static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
139 struct omap3isp_ccdc_lsc_config *lsc_cfg)
140 {
141 struct isp_device *isp = to_isp_device(ccdc);
142 struct v4l2_mbus_framefmt *format;
143 unsigned int paxel_width, paxel_height;
144 unsigned int paxel_shift_x, paxel_shift_y;
145 unsigned int min_width, min_height, min_size;
146 unsigned int input_width, input_height;
147
148 paxel_shift_x = lsc_cfg->gain_mode_m;
149 paxel_shift_y = lsc_cfg->gain_mode_n;
150
151 if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
152 (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
153 dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
154 return -EINVAL;
155 }
156
157 if (lsc_cfg->offset & 3) {
158 dev_dbg(isp->dev, "CCDC: LSC: Offset must be a multiple of "
159 "4\n");
160 return -EINVAL;
161 }
162
163 if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
164 dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
165 return -EINVAL;
166 }
167
168 format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
169 V4L2_SUBDEV_FORMAT_ACTIVE);
170 input_width = format->width;
171 input_height = format->height;
172
173 /* Calculate minimum bytesize for validation */
174 paxel_width = 1 << paxel_shift_x;
175 min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
176 >> paxel_shift_x) + 1;
177
178 paxel_height = 1 << paxel_shift_y;
179 min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
180 >> paxel_shift_y) + 1;
181
182 min_size = 4 * min_width * min_height;
183 if (min_size > lsc_cfg->size) {
184 dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
185 return -EINVAL;
186 }
187 if (lsc_cfg->offset < (min_width * 4)) {
188 dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
189 return -EINVAL;
190 }
191 if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
192 dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
193 return -EINVAL;
194 }
195 return 0;
196 }
197
198 /*
199 * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
200 * @ccdc: Pointer to ISP CCDC device.
201 */
202 static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc, u32 addr)
203 {
204 isp_reg_writel(to_isp_device(ccdc), addr,
205 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
206 }
207
208 /*
209 * ccdc_lsc_setup_regs - Configures the lens shading compensation module
210 * @ccdc: Pointer to ISP CCDC device.
211 */
212 static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
213 struct omap3isp_ccdc_lsc_config *cfg)
214 {
215 struct isp_device *isp = to_isp_device(ccdc);
216 int reg;
217
218 isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
219 ISPCCDC_LSC_TABLE_OFFSET);
220
221 reg = 0;
222 reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
223 reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
224 reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
225 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
226
227 reg = 0;
228 reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
229 reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
230 reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
231 reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
232 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
233 ISPCCDC_LSC_INITIAL);
234 }
235
236 static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
237 {
238 struct isp_device *isp = to_isp_device(ccdc);
239 unsigned int wait;
240
241 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
242 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
243
244 /* timeout 1 ms */
245 for (wait = 0; wait < 1000; wait++) {
246 if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
247 IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
248 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
249 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
250 return 0;
251 }
252
253 rmb();
254 udelay(1);
255 }
256
257 return -ETIMEDOUT;
258 }
259
260 /*
261 * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
262 * @ccdc: Pointer to ISP CCDC device.
263 * @enable: 0 Disables LSC, 1 Enables LSC.
264 */
265 static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
266 {
267 struct isp_device *isp = to_isp_device(ccdc);
268 const struct v4l2_mbus_framefmt *format =
269 __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
270 V4L2_SUBDEV_FORMAT_ACTIVE);
271
272 if ((format->code != V4L2_MBUS_FMT_SGRBG10_1X10) &&
273 (format->code != V4L2_MBUS_FMT_SRGGB10_1X10) &&
274 (format->code != V4L2_MBUS_FMT_SBGGR10_1X10) &&
275 (format->code != V4L2_MBUS_FMT_SGBRG10_1X10))
276 return -EINVAL;
277
278 if (enable)
279 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
280
281 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
282 ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
283
284 if (enable) {
285 if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
286 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
287 ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
288 ccdc->lsc.state = LSC_STATE_STOPPED;
289 dev_warn(to_device(ccdc), "LSC prefecth timeout\n");
290 return -ETIMEDOUT;
291 }
292 ccdc->lsc.state = LSC_STATE_RUNNING;
293 } else {
294 ccdc->lsc.state = LSC_STATE_STOPPING;
295 }
296
297 return 0;
298 }
299
300 static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
301 {
302 struct isp_device *isp = to_isp_device(ccdc);
303
304 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
305 ISPCCDC_LSC_BUSY;
306 }
307
308 /* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
309 * @ccdc: Pointer to ISP CCDC device
310 * @req: New configuration request
311 *
312 * context: in_interrupt()
313 */
314 static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
315 struct ispccdc_lsc_config_req *req)
316 {
317 if (!req->enable)
318 return -EINVAL;
319
320 if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
321 dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
322 return -EINVAL;
323 }
324
325 if (ccdc_lsc_busy(ccdc))
326 return -EBUSY;
327
328 ccdc_lsc_setup_regs(ccdc, &req->config);
329 ccdc_lsc_program_table(ccdc, req->table);
330 return 0;
331 }
332
333 /*
334 * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
335 * @ccdc: Pointer to ISP CCDC device.
336 *
337 * Disables LSC, and defers enablement to shadow registers update time.
338 */
339 static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
340 {
341 struct isp_device *isp = to_isp_device(ccdc);
342 /*
343 * From OMAP3 TRM: When this event is pending, the module
344 * goes into transparent mode (output =input). Normal
345 * operation can be resumed at the start of the next frame
346 * after:
347 * 1) Clearing this event
348 * 2) Disabling the LSC module
349 * 3) Enabling it
350 */
351 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
352 ISPCCDC_LSC_ENABLE);
353 ccdc->lsc.state = LSC_STATE_STOPPED;
354 }
355
356 static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
357 struct ispccdc_lsc_config_req *req)
358 {
359 struct isp_device *isp = to_isp_device(ccdc);
360
361 if (req == NULL)
362 return;
363
364 if (req->iovm)
365 dma_unmap_sg(isp->dev, req->iovm->sgt->sgl,
366 req->iovm->sgt->nents, DMA_TO_DEVICE);
367 if (req->table)
368 omap_iommu_vfree(isp->domain, isp->iommu, req->table);
369 kfree(req);
370 }
371
372 static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
373 struct list_head *queue)
374 {
375 struct ispccdc_lsc_config_req *req, *n;
376 unsigned long flags;
377
378 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
379 list_for_each_entry_safe(req, n, queue, list) {
380 list_del(&req->list);
381 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
382 ccdc_lsc_free_request(ccdc, req);
383 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
384 }
385 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
386 }
387
388 static void ccdc_lsc_free_table_work(struct work_struct *work)
389 {
390 struct isp_ccdc_device *ccdc;
391 struct ispccdc_lsc *lsc;
392
393 lsc = container_of(work, struct ispccdc_lsc, table_work);
394 ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
395
396 ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
397 }
398
399 /*
400 * ccdc_lsc_config - Configure the LSC module from a userspace request
401 *
402 * Store the request LSC configuration in the LSC engine request pointer. The
403 * configuration will be applied to the hardware when the CCDC will be enabled,
404 * or at the next LSC interrupt if the CCDC is already running.
405 */
406 static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
407 struct omap3isp_ccdc_update_config *config)
408 {
409 struct isp_device *isp = to_isp_device(ccdc);
410 struct ispccdc_lsc_config_req *req;
411 unsigned long flags;
412 void *table;
413 u16 update;
414 int ret;
415
416 update = config->update &
417 (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
418 if (!update)
419 return 0;
420
421 if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
422 dev_dbg(to_device(ccdc), "%s: Both LSC configuration and table "
423 "need to be supplied\n", __func__);
424 return -EINVAL;
425 }
426
427 req = kzalloc(sizeof(*req), GFP_KERNEL);
428 if (req == NULL)
429 return -ENOMEM;
430
431 if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
432 if (copy_from_user(&req->config, config->lsc_cfg,
433 sizeof(req->config))) {
434 ret = -EFAULT;
435 goto done;
436 }
437
438 req->enable = 1;
439
440 req->table = omap_iommu_vmalloc(isp->domain, isp->iommu, 0,
441 req->config.size, IOMMU_FLAG);
442 if (IS_ERR_VALUE(req->table)) {
443 req->table = 0;
444 ret = -ENOMEM;
445 goto done;
446 }
447
448 req->iovm = omap_find_iovm_area(isp->iommu, req->table);
449 if (req->iovm == NULL) {
450 ret = -ENOMEM;
451 goto done;
452 }
453
454 if (!dma_map_sg(isp->dev, req->iovm->sgt->sgl,
455 req->iovm->sgt->nents, DMA_TO_DEVICE)) {
456 ret = -ENOMEM;
457 req->iovm = NULL;
458 goto done;
459 }
460
461 dma_sync_sg_for_cpu(isp->dev, req->iovm->sgt->sgl,
462 req->iovm->sgt->nents, DMA_TO_DEVICE);
463
464 table = omap_da_to_va(isp->iommu, req->table);
465 if (copy_from_user(table, config->lsc, req->config.size)) {
466 ret = -EFAULT;
467 goto done;
468 }
469
470 dma_sync_sg_for_device(isp->dev, req->iovm->sgt->sgl,
471 req->iovm->sgt->nents, DMA_TO_DEVICE);
472 }
473
474 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
475 if (ccdc->lsc.request) {
476 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
477 schedule_work(&ccdc->lsc.table_work);
478 }
479 ccdc->lsc.request = req;
480 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
481
482 ret = 0;
483
484 done:
485 if (ret < 0)
486 ccdc_lsc_free_request(ccdc, req);
487
488 return ret;
489 }
490
491 static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
492 {
493 unsigned long flags;
494
495 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
496 if (ccdc->lsc.active) {
497 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
498 return 1;
499 }
500 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
501 return 0;
502 }
503
504 static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
505 {
506 struct ispccdc_lsc *lsc = &ccdc->lsc;
507
508 if (lsc->state != LSC_STATE_STOPPED)
509 return -EINVAL;
510
511 if (lsc->active) {
512 list_add_tail(&lsc->active->list, &lsc->free_queue);
513 lsc->active = NULL;
514 }
515
516 if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
517 omap3isp_sbl_disable(to_isp_device(ccdc),
518 OMAP3_ISP_SBL_CCDC_LSC_READ);
519 list_add_tail(&lsc->request->list, &lsc->free_queue);
520 lsc->request = NULL;
521 goto done;
522 }
523
524 lsc->active = lsc->request;
525 lsc->request = NULL;
526 __ccdc_lsc_enable(ccdc, 1);
527
528 done:
529 if (!list_empty(&lsc->free_queue))
530 schedule_work(&lsc->table_work);
531
532 return 0;
533 }
534
535 /* -----------------------------------------------------------------------------
536 * Parameters configuration
537 */
538
539 /*
540 * ccdc_configure_clamp - Configure optical-black or digital clamping
541 * @ccdc: Pointer to ISP CCDC device.
542 *
543 * The CCDC performs either optical-black or digital clamp. Configure and enable
544 * the selected clamp method.
545 */
546 static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
547 {
548 struct isp_device *isp = to_isp_device(ccdc);
549 u32 clamp;
550
551 if (ccdc->obclamp) {
552 clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
553 clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
554 clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
555 clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
556 isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
557 } else {
558 isp_reg_writel(isp, ccdc->clamp.dcsubval,
559 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
560 }
561
562 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
563 ISPCCDC_CLAMP_CLAMPEN,
564 ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
565 }
566
567 /*
568 * ccdc_configure_fpc - Configure Faulty Pixel Correction
569 * @ccdc: Pointer to ISP CCDC device.
570 */
571 static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
572 {
573 struct isp_device *isp = to_isp_device(ccdc);
574
575 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
576
577 if (!ccdc->fpc_en)
578 return;
579
580 isp_reg_writel(isp, ccdc->fpc.fpcaddr, OMAP3_ISP_IOMEM_CCDC,
581 ISPCCDC_FPC_ADDR);
582 /* The FPNUM field must be set before enabling FPC. */
583 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
584 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
585 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
586 ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
587 }
588
589 /*
590 * ccdc_configure_black_comp - Configure Black Level Compensation.
591 * @ccdc: Pointer to ISP CCDC device.
592 */
593 static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
594 {
595 struct isp_device *isp = to_isp_device(ccdc);
596 u32 blcomp;
597
598 blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
599 blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
600 blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
601 blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
602
603 isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
604 }
605
606 /*
607 * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
608 * @ccdc: Pointer to ISP CCDC device.
609 */
610 static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
611 {
612 struct isp_device *isp = to_isp_device(ccdc);
613
614 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
615 ISPCCDC_SYN_MODE_LPF,
616 ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
617 }
618
619 /*
620 * ccdc_configure_alaw - Configure A-law compression.
621 * @ccdc: Pointer to ISP CCDC device.
622 */
623 static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
624 {
625 struct isp_device *isp = to_isp_device(ccdc);
626 u32 alaw = 0;
627
628 switch (ccdc->syncif.datsz) {
629 case 8:
630 return;
631
632 case 10:
633 alaw = ISPCCDC_ALAW_GWDI_9_0;
634 break;
635 case 11:
636 alaw = ISPCCDC_ALAW_GWDI_10_1;
637 break;
638 case 12:
639 alaw = ISPCCDC_ALAW_GWDI_11_2;
640 break;
641 case 13:
642 alaw = ISPCCDC_ALAW_GWDI_12_3;
643 break;
644 }
645
646 if (ccdc->alaw)
647 alaw |= ISPCCDC_ALAW_CCDTBL;
648
649 isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
650 }
651
652 /*
653 * ccdc_config_imgattr - Configure sensor image specific attributes.
654 * @ccdc: Pointer to ISP CCDC device.
655 * @colptn: Color pattern of the sensor.
656 */
657 static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
658 {
659 struct isp_device *isp = to_isp_device(ccdc);
660
661 isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
662 }
663
664 /*
665 * ccdc_config - Set CCDC configuration from userspace
666 * @ccdc: Pointer to ISP CCDC device.
667 * @userspace_add: Structure containing CCDC configuration sent from userspace.
668 *
669 * Returns 0 if successful, -EINVAL if the pointer to the configuration
670 * structure is null, or the copy_from_user function fails to copy user space
671 * memory to kernel space memory.
672 */
673 static int ccdc_config(struct isp_ccdc_device *ccdc,
674 struct omap3isp_ccdc_update_config *ccdc_struct)
675 {
676 struct isp_device *isp = to_isp_device(ccdc);
677 unsigned long flags;
678
679 spin_lock_irqsave(&ccdc->lock, flags);
680 ccdc->shadow_update = 1;
681 spin_unlock_irqrestore(&ccdc->lock, flags);
682
683 if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
684 ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
685 ccdc->update |= OMAP3ISP_CCDC_ALAW;
686 }
687
688 if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
689 ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
690 ccdc->update |= OMAP3ISP_CCDC_LPF;
691 }
692
693 if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
694 if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
695 sizeof(ccdc->clamp))) {
696 ccdc->shadow_update = 0;
697 return -EFAULT;
698 }
699
700 ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
701 ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
702 }
703
704 if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
705 if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
706 sizeof(ccdc->blcomp))) {
707 ccdc->shadow_update = 0;
708 return -EFAULT;
709 }
710
711 ccdc->update |= OMAP3ISP_CCDC_BCOMP;
712 }
713
714 ccdc->shadow_update = 0;
715
716 if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
717 u32 table_old = 0;
718 u32 table_new;
719 u32 size;
720
721 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
722 return -EBUSY;
723
724 ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
725
726 if (ccdc->fpc_en) {
727 if (copy_from_user(&ccdc->fpc, ccdc_struct->fpc,
728 sizeof(ccdc->fpc)))
729 return -EFAULT;
730
731 /*
732 * table_new must be 64-bytes aligned, but it's
733 * already done by omap_iommu_vmalloc().
734 */
735 size = ccdc->fpc.fpnum * 4;
736 table_new = omap_iommu_vmalloc(isp->domain, isp->iommu,
737 0, size, IOMMU_FLAG);
738 if (IS_ERR_VALUE(table_new))
739 return -ENOMEM;
740
741 if (copy_from_user(omap_da_to_va(isp->iommu, table_new),
742 (__force void __user *)
743 ccdc->fpc.fpcaddr, size)) {
744 omap_iommu_vfree(isp->domain, isp->iommu,
745 table_new);
746 return -EFAULT;
747 }
748
749 table_old = ccdc->fpc.fpcaddr;
750 ccdc->fpc.fpcaddr = table_new;
751 }
752
753 ccdc_configure_fpc(ccdc);
754 if (table_old != 0)
755 omap_iommu_vfree(isp->domain, isp->iommu, table_old);
756 }
757
758 return ccdc_lsc_config(ccdc, ccdc_struct);
759 }
760
761 static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
762 {
763 if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
764 ccdc_configure_alaw(ccdc);
765 ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
766 }
767
768 if (ccdc->update & OMAP3ISP_CCDC_LPF) {
769 ccdc_configure_lpf(ccdc);
770 ccdc->update &= ~OMAP3ISP_CCDC_LPF;
771 }
772
773 if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
774 ccdc_configure_clamp(ccdc);
775 ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
776 }
777
778 if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
779 ccdc_configure_black_comp(ccdc);
780 ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
781 }
782 }
783
784 /*
785 * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
786 * @dev: Pointer to ISP device
787 */
788 void omap3isp_ccdc_restore_context(struct isp_device *isp)
789 {
790 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
791
792 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
793
794 ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
795 | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
796 ccdc_apply_controls(ccdc);
797 ccdc_configure_fpc(ccdc);
798 }
799
800 /* -----------------------------------------------------------------------------
801 * Format- and pipeline-related configuration helpers
802 */
803
804 /*
805 * ccdc_config_vp - Configure the Video Port.
806 * @ccdc: Pointer to ISP CCDC device.
807 */
808 static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
809 {
810 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
811 struct isp_device *isp = to_isp_device(ccdc);
812 unsigned long l3_ick = pipe->l3_ick;
813 unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
814 unsigned int div = 0;
815 u32 fmtcfg_vp;
816
817 fmtcfg_vp = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG)
818 & ~(ISPCCDC_FMTCFG_VPIN_MASK | ISPCCDC_FMTCFG_VPIF_FRQ_MASK);
819
820 switch (ccdc->syncif.datsz) {
821 case 8:
822 case 10:
823 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0;
824 break;
825 case 11:
826 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1;
827 break;
828 case 12:
829 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2;
830 break;
831 case 13:
832 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3;
833 break;
834 };
835
836 if (pipe->input)
837 div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
838 else if (ccdc->vpcfg.pixelclk)
839 div = l3_ick / ccdc->vpcfg.pixelclk;
840
841 div = clamp(div, 2U, max_div);
842 fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
843
844 isp_reg_writel(isp, fmtcfg_vp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
845 }
846
847 /*
848 * ccdc_enable_vp - Enable Video Port.
849 * @ccdc: Pointer to ISP CCDC device.
850 * @enable: 0 Disables VP, 1 Enables VP
851 *
852 * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
853 */
854 static void ccdc_enable_vp(struct isp_ccdc_device *ccdc, u8 enable)
855 {
856 struct isp_device *isp = to_isp_device(ccdc);
857
858 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG,
859 ISPCCDC_FMTCFG_VPEN, enable ? ISPCCDC_FMTCFG_VPEN : 0);
860 }
861
862 /*
863 * ccdc_config_outlineoffset - Configure memory saving output line offset
864 * @ccdc: Pointer to ISP CCDC device.
865 * @offset: Address offset to start a new line. Must be twice the
866 * Output width and aligned on 32 byte boundary
867 * @oddeven: Specifies the odd/even line pattern to be chosen to store the
868 * output.
869 * @numlines: Set the value 0-3 for +1-4lines, 4-7 for -1-4lines.
870 *
871 * - Configures the output line offset when stored in memory
872 * - Sets the odd/even line pattern to store the output
873 * (EVENEVEN (1), ODDEVEN (2), EVENODD (3), ODDODD (4))
874 * - Configures the number of even and odd line fields in case of rearranging
875 * the lines.
876 */
877 static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
878 u32 offset, u8 oddeven, u8 numlines)
879 {
880 struct isp_device *isp = to_isp_device(ccdc);
881
882 isp_reg_writel(isp, offset & 0xffff,
883 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HSIZE_OFF);
884
885 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
886 ISPCCDC_SDOFST_FINV);
887
888 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
889 ISPCCDC_SDOFST_FOFST_4L);
890
891 switch (oddeven) {
892 case EVENEVEN:
893 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
894 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT);
895 break;
896 case ODDEVEN:
897 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
898 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT);
899 break;
900 case EVENODD:
901 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
902 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT);
903 break;
904 case ODDODD:
905 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
906 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT);
907 break;
908 default:
909 break;
910 }
911 }
912
913 /*
914 * ccdc_set_outaddr - Set memory address to save output image
915 * @ccdc: Pointer to ISP CCDC device.
916 * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
917 *
918 * Sets the memory address where the output will be saved.
919 */
920 static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
921 {
922 struct isp_device *isp = to_isp_device(ccdc);
923
924 isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
925 }
926
927 /*
928 * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
929 * @ccdc: Pointer to ISP CCDC device.
930 * @max_rate: Maximum calculated data rate.
931 *
932 * Returns in *max_rate less value between calculated and passed
933 */
934 void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
935 unsigned int *max_rate)
936 {
937 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
938 unsigned int rate;
939
940 if (pipe == NULL)
941 return;
942
943 /*
944 * TRM says that for parallel sensors the maximum data rate
945 * should be 90% form L3/2 clock, otherwise just L3/2.
946 */
947 if (ccdc->input == CCDC_INPUT_PARALLEL)
948 rate = pipe->l3_ick / 2 * 9 / 10;
949 else
950 rate = pipe->l3_ick / 2;
951
952 *max_rate = min(*max_rate, rate);
953 }
954
955 /*
956 * ccdc_config_sync_if - Set CCDC sync interface configuration
957 * @ccdc: Pointer to ISP CCDC device.
958 * @syncif: Structure containing the sync parameters like field state, CCDC in
959 * master/slave mode, raw/yuv data, polarity of data, field, hs, vs
960 * signals.
961 */
962 static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
963 struct ispccdc_syncif *syncif)
964 {
965 struct isp_device *isp = to_isp_device(ccdc);
966 u32 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC,
967 ISPCCDC_SYN_MODE);
968
969 syn_mode |= ISPCCDC_SYN_MODE_VDHDEN;
970
971 if (syncif->fldstat)
972 syn_mode |= ISPCCDC_SYN_MODE_FLDSTAT;
973 else
974 syn_mode &= ~ISPCCDC_SYN_MODE_FLDSTAT;
975
976 syn_mode &= ~ISPCCDC_SYN_MODE_DATSIZ_MASK;
977 switch (syncif->datsz) {
978 case 8:
979 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
980 break;
981 case 10:
982 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
983 break;
984 case 11:
985 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
986 break;
987 case 12:
988 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
989 break;
990 };
991
992 if (syncif->fldmode)
993 syn_mode |= ISPCCDC_SYN_MODE_FLDMODE;
994 else
995 syn_mode &= ~ISPCCDC_SYN_MODE_FLDMODE;
996
997 if (syncif->datapol)
998 syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
999 else
1000 syn_mode &= ~ISPCCDC_SYN_MODE_DATAPOL;
1001
1002 if (syncif->fldpol)
1003 syn_mode |= ISPCCDC_SYN_MODE_FLDPOL;
1004 else
1005 syn_mode &= ~ISPCCDC_SYN_MODE_FLDPOL;
1006
1007 if (syncif->hdpol)
1008 syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
1009 else
1010 syn_mode &= ~ISPCCDC_SYN_MODE_HDPOL;
1011
1012 if (syncif->vdpol)
1013 syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
1014 else
1015 syn_mode &= ~ISPCCDC_SYN_MODE_VDPOL;
1016
1017 if (syncif->ccdc_mastermode) {
1018 syn_mode |= ISPCCDC_SYN_MODE_FLDOUT | ISPCCDC_SYN_MODE_VDHDOUT;
1019 isp_reg_writel(isp,
1020 syncif->hs_width << ISPCCDC_HD_VD_WID_HDW_SHIFT
1021 | syncif->vs_width << ISPCCDC_HD_VD_WID_VDW_SHIFT,
1022 OMAP3_ISP_IOMEM_CCDC,
1023 ISPCCDC_HD_VD_WID);
1024
1025 isp_reg_writel(isp,
1026 syncif->ppln << ISPCCDC_PIX_LINES_PPLN_SHIFT
1027 | syncif->hlprf << ISPCCDC_PIX_LINES_HLPRF_SHIFT,
1028 OMAP3_ISP_IOMEM_CCDC,
1029 ISPCCDC_PIX_LINES);
1030 } else
1031 syn_mode &= ~(ISPCCDC_SYN_MODE_FLDOUT |
1032 ISPCCDC_SYN_MODE_VDHDOUT);
1033
1034 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1035
1036 if (!syncif->bt_r656_en)
1037 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1038 ISPCCDC_REC656IF_R656ON);
1039 }
1040
1041 /* CCDC formats descriptions */
1042 static const u32 ccdc_sgrbg_pattern =
1043 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1044 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1045 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1046 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1047 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1048 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1049 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1050 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1051 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1052 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1053 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1054 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1055 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1056 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1057 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1058 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1059
1060 static const u32 ccdc_srggb_pattern =
1061 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1062 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1063 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1064 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1065 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1066 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1067 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1068 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1069 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1070 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1071 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1072 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1073 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1074 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1075 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1076 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1077
1078 static const u32 ccdc_sbggr_pattern =
1079 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1080 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1081 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1082 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1083 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1084 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1085 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1086 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1087 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1088 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1089 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1090 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1091 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1092 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1093 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1094 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1095
1096 static const u32 ccdc_sgbrg_pattern =
1097 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1098 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1099 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1100 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1101 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1102 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1103 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1104 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1105 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1106 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1107 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1108 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1109 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1110 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1111 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1112 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1113
1114 static void ccdc_configure(struct isp_ccdc_device *ccdc)
1115 {
1116 struct isp_device *isp = to_isp_device(ccdc);
1117 struct isp_parallel_platform_data *pdata = NULL;
1118 struct v4l2_subdev *sensor;
1119 struct v4l2_mbus_framefmt *format;
1120 const struct isp_format_info *fmt_info;
1121 struct v4l2_subdev_format fmt_src;
1122 unsigned int depth_out;
1123 unsigned int depth_in = 0;
1124 struct media_pad *pad;
1125 unsigned long flags;
1126 unsigned int shift;
1127 u32 syn_mode;
1128 u32 ccdc_pattern;
1129
1130 pad = media_entity_remote_source(&ccdc->pads[CCDC_PAD_SINK]);
1131 sensor = media_entity_to_v4l2_subdev(pad->entity);
1132 if (ccdc->input == CCDC_INPUT_PARALLEL)
1133 pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
1134 ->bus.parallel;
1135
1136 /* Compute shift value for lane shifter to configure the bridge. */
1137 fmt_src.pad = pad->index;
1138 fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1139 if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
1140 fmt_info = omap3isp_video_format_info(fmt_src.format.code);
1141 depth_in = fmt_info->bpp;
1142 }
1143
1144 fmt_info = omap3isp_video_format_info
1145 (isp->isp_ccdc.formats[CCDC_PAD_SINK].code);
1146 depth_out = fmt_info->bpp;
1147
1148 shift = depth_in - depth_out;
1149 omap3isp_configure_bridge(isp, ccdc->input, pdata, shift);
1150
1151 ccdc->syncif.datsz = depth_out;
1152 ccdc->syncif.hdpol = pdata ? pdata->hs_pol : 0;
1153 ccdc->syncif.vdpol = pdata ? pdata->vs_pol : 0;
1154 ccdc_config_sync_if(ccdc, &ccdc->syncif);
1155
1156 /* CCDC_PAD_SINK */
1157 format = &ccdc->formats[CCDC_PAD_SINK];
1158
1159 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1160
1161 /* Use the raw, unprocessed data when writing to memory. The H3A and
1162 * histogram modules are still fed with lens shading corrected data.
1163 */
1164 syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
1165
1166 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1167 syn_mode |= ISPCCDC_SYN_MODE_WEN;
1168 else
1169 syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
1170
1171 if (ccdc->output & CCDC_OUTPUT_RESIZER)
1172 syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
1173 else
1174 syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
1175
1176 /* Use PACK8 mode for 1byte per pixel formats. */
1177 if (omap3isp_video_format_info(format->code)->bpp <= 8)
1178 syn_mode |= ISPCCDC_SYN_MODE_PACK8;
1179 else
1180 syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
1181
1182 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1183
1184 /* Mosaic filter */
1185 switch (format->code) {
1186 case V4L2_MBUS_FMT_SRGGB10_1X10:
1187 case V4L2_MBUS_FMT_SRGGB12_1X12:
1188 ccdc_pattern = ccdc_srggb_pattern;
1189 break;
1190 case V4L2_MBUS_FMT_SBGGR10_1X10:
1191 case V4L2_MBUS_FMT_SBGGR12_1X12:
1192 ccdc_pattern = ccdc_sbggr_pattern;
1193 break;
1194 case V4L2_MBUS_FMT_SGBRG10_1X10:
1195 case V4L2_MBUS_FMT_SGBRG12_1X12:
1196 ccdc_pattern = ccdc_sgbrg_pattern;
1197 break;
1198 default:
1199 /* Use GRBG */
1200 ccdc_pattern = ccdc_sgrbg_pattern;
1201 break;
1202 }
1203 ccdc_config_imgattr(ccdc, ccdc_pattern);
1204
1205 /* Generate VD0 on the last line of the image and VD1 on the
1206 * 2/3 height line.
1207 */
1208 isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
1209 ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
1210 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
1211
1212 /* CCDC_PAD_SOURCE_OF */
1213 format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
1214
1215 isp_reg_writel(isp, (0 << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
1216 ((format->width - 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT),
1217 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
1218 isp_reg_writel(isp, 0 << ISPCCDC_VERT_START_SLV0_SHIFT,
1219 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
1220 isp_reg_writel(isp, (format->height - 1)
1221 << ISPCCDC_VERT_LINES_NLV_SHIFT,
1222 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
1223
1224 ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value, 0, 0);
1225
1226 /* CCDC_PAD_SOURCE_VP */
1227 format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
1228
1229 isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
1230 (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
1231 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
1232 isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
1233 ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
1234 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
1235
1236 isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
1237 (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
1238 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
1239
1240 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1241 if (ccdc->lsc.request == NULL)
1242 goto unlock;
1243
1244 WARN_ON(ccdc->lsc.active);
1245
1246 /* Get last good LSC configuration. If it is not supported for
1247 * the current active resolution discard it.
1248 */
1249 if (ccdc->lsc.active == NULL &&
1250 __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
1251 ccdc->lsc.active = ccdc->lsc.request;
1252 } else {
1253 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
1254 schedule_work(&ccdc->lsc.table_work);
1255 }
1256
1257 ccdc->lsc.request = NULL;
1258
1259 unlock:
1260 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1261
1262 ccdc_apply_controls(ccdc);
1263 }
1264
1265 static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
1266 {
1267 struct isp_device *isp = to_isp_device(ccdc);
1268
1269 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
1270 ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
1271 }
1272
1273 static int ccdc_disable(struct isp_ccdc_device *ccdc)
1274 {
1275 unsigned long flags;
1276 int ret = 0;
1277
1278 spin_lock_irqsave(&ccdc->lock, flags);
1279 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1280 ccdc->stopping = CCDC_STOP_REQUEST;
1281 spin_unlock_irqrestore(&ccdc->lock, flags);
1282
1283 ret = wait_event_timeout(ccdc->wait,
1284 ccdc->stopping == CCDC_STOP_FINISHED,
1285 msecs_to_jiffies(2000));
1286 if (ret == 0) {
1287 ret = -ETIMEDOUT;
1288 dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
1289 }
1290
1291 omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
1292
1293 mutex_lock(&ccdc->ioctl_lock);
1294 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
1295 ccdc->lsc.request = ccdc->lsc.active;
1296 ccdc->lsc.active = NULL;
1297 cancel_work_sync(&ccdc->lsc.table_work);
1298 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
1299 mutex_unlock(&ccdc->ioctl_lock);
1300
1301 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
1302
1303 return ret > 0 ? 0 : ret;
1304 }
1305
1306 static void ccdc_enable(struct isp_ccdc_device *ccdc)
1307 {
1308 if (ccdc_lsc_is_configured(ccdc))
1309 __ccdc_lsc_enable(ccdc, 1);
1310 __ccdc_enable(ccdc, 1);
1311 }
1312
1313 /* -----------------------------------------------------------------------------
1314 * Interrupt handling
1315 */
1316
1317 /*
1318 * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
1319 * @ccdc: Pointer to ISP CCDC device.
1320 *
1321 * Returns zero if the CCDC is idle and the image has been written to
1322 * memory, too.
1323 */
1324 static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
1325 {
1326 struct isp_device *isp = to_isp_device(ccdc);
1327
1328 return omap3isp_ccdc_busy(ccdc)
1329 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
1330 ISPSBL_CCDC_WR_0_DATA_READY)
1331 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
1332 ISPSBL_CCDC_WR_0_DATA_READY)
1333 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
1334 ISPSBL_CCDC_WR_0_DATA_READY)
1335 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
1336 ISPSBL_CCDC_WR_0_DATA_READY);
1337 }
1338
1339 /*
1340 * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
1341 * @ccdc: Pointer to ISP CCDC device.
1342 * @max_wait: Max retry count in us for wait for idle/busy transition.
1343 */
1344 static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
1345 unsigned int max_wait)
1346 {
1347 unsigned int wait = 0;
1348
1349 if (max_wait == 0)
1350 max_wait = 10000; /* 10 ms */
1351
1352 for (wait = 0; wait <= max_wait; wait++) {
1353 if (!ccdc_sbl_busy(ccdc))
1354 return 0;
1355
1356 rmb();
1357 udelay(1);
1358 }
1359
1360 return -EBUSY;
1361 }
1362
1363 /* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
1364 * @ccdc: Pointer to ISP CCDC device.
1365 * @event: Pointing which event trigger handler
1366 *
1367 * Return 1 when the event and stopping request combination is satisfied,
1368 * zero otherwise.
1369 */
1370 static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
1371 {
1372 int rval = 0;
1373
1374 switch ((ccdc->stopping & 3) | event) {
1375 case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
1376 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1377 __ccdc_lsc_enable(ccdc, 0);
1378 __ccdc_enable(ccdc, 0);
1379 ccdc->stopping = CCDC_STOP_EXECUTED;
1380 return 1;
1381
1382 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
1383 ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
1384 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1385 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1386 rval = 1;
1387 break;
1388
1389 case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
1390 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1391 rval = 1;
1392 break;
1393
1394 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
1395 return 1;
1396 }
1397
1398 if (ccdc->stopping == CCDC_STOP_FINISHED) {
1399 wake_up(&ccdc->wait);
1400 rval = 1;
1401 }
1402
1403 return rval;
1404 }
1405
1406 static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
1407 {
1408 struct video_device *vdev = &ccdc->subdev.devnode;
1409 struct v4l2_event event;
1410
1411 memset(&event, 0, sizeof(event));
1412 event.type = V4L2_EVENT_OMAP3ISP_HS_VS;
1413
1414 v4l2_event_queue(vdev, &event);
1415 }
1416
1417 /*
1418 * ccdc_lsc_isr - Handle LSC events
1419 * @ccdc: Pointer to ISP CCDC device.
1420 * @events: LSC events
1421 */
1422 static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
1423 {
1424 unsigned long flags;
1425
1426 if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
1427 ccdc_lsc_error_handler(ccdc);
1428 ccdc->error = 1;
1429 dev_dbg(to_device(ccdc), "lsc prefetch error\n");
1430 }
1431
1432 if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
1433 return;
1434
1435 /* LSC_DONE interrupt occur, there are two cases
1436 * 1. stopping for reconfiguration
1437 * 2. stopping because of STREAM OFF command
1438 */
1439 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1440
1441 if (ccdc->lsc.state == LSC_STATE_STOPPING)
1442 ccdc->lsc.state = LSC_STATE_STOPPED;
1443
1444 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
1445 goto done;
1446
1447 if (ccdc->lsc.state != LSC_STATE_RECONFIG)
1448 goto done;
1449
1450 /* LSC is in STOPPING state, change to the new state */
1451 ccdc->lsc.state = LSC_STATE_STOPPED;
1452
1453 /* This is an exception. Start of frame and LSC_DONE interrupt
1454 * have been received on the same time. Skip this event and wait
1455 * for better times.
1456 */
1457 if (events & IRQ0STATUS_HS_VS_IRQ)
1458 goto done;
1459
1460 /* The LSC engine is stopped at this point. Enable it if there's a
1461 * pending request.
1462 */
1463 if (ccdc->lsc.request == NULL)
1464 goto done;
1465
1466 ccdc_lsc_enable(ccdc);
1467
1468 done:
1469 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1470 }
1471
1472 static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1473 {
1474 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1475 struct isp_device *isp = to_isp_device(ccdc);
1476 struct isp_buffer *buffer;
1477 int restart = 0;
1478
1479 /* The CCDC generates VD0 interrupts even when disabled (the datasheet
1480 * doesn't explicitly state if that's supposed to happen or not, so it
1481 * can be considered as a hardware bug or as a feature, but we have to
1482 * deal with it anyway). Disabling the CCDC when no buffer is available
1483 * would thus not be enough, we need to handle the situation explicitly.
1484 */
1485 if (list_empty(&ccdc->video_out.dmaqueue))
1486 goto done;
1487
1488 /* We're in continuous mode, and memory writes were disabled due to a
1489 * buffer underrun. Reenable them now that we have a buffer. The buffer
1490 * address has been set in ccdc_video_queue.
1491 */
1492 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
1493 restart = 1;
1494 ccdc->underrun = 0;
1495 goto done;
1496 }
1497
1498 if (ccdc_sbl_wait_idle(ccdc, 1000)) {
1499 dev_info(isp->dev, "CCDC won't become idle!\n");
1500 goto done;
1501 }
1502
1503 buffer = omap3isp_video_buffer_next(&ccdc->video_out, ccdc->error);
1504 if (buffer != NULL) {
1505 ccdc_set_outaddr(ccdc, buffer->isp_addr);
1506 restart = 1;
1507 }
1508
1509 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1510
1511 if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1512 isp_pipeline_ready(pipe))
1513 omap3isp_pipeline_set_stream(pipe,
1514 ISP_PIPELINE_STREAM_SINGLESHOT);
1515
1516 done:
1517 ccdc->error = 0;
1518 return restart;
1519 }
1520
1521 /*
1522 * ccdc_vd0_isr - Handle VD0 event
1523 * @ccdc: Pointer to ISP CCDC device.
1524 *
1525 * Executes LSC deferred enablement before next frame starts.
1526 */
1527 static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
1528 {
1529 unsigned long flags;
1530 int restart = 0;
1531
1532 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1533 restart = ccdc_isr_buffer(ccdc);
1534
1535 spin_lock_irqsave(&ccdc->lock, flags);
1536 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
1537 spin_unlock_irqrestore(&ccdc->lock, flags);
1538 return;
1539 }
1540
1541 if (!ccdc->shadow_update)
1542 ccdc_apply_controls(ccdc);
1543 spin_unlock_irqrestore(&ccdc->lock, flags);
1544
1545 if (restart)
1546 ccdc_enable(ccdc);
1547 }
1548
1549 /*
1550 * ccdc_vd1_isr - Handle VD1 event
1551 * @ccdc: Pointer to ISP CCDC device.
1552 */
1553 static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
1554 {
1555 unsigned long flags;
1556
1557 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1558
1559 /*
1560 * Depending on the CCDC pipeline state, CCDC stopping should be
1561 * handled differently. In SINGLESHOT we emulate an internal CCDC
1562 * stopping because the CCDC hw works only in continuous mode.
1563 * When CONTINUOUS pipeline state is used and the CCDC writes it's
1564 * data to memory the CCDC and LSC are stopped immediately but
1565 * without change the CCDC stopping state machine. The CCDC
1566 * stopping state machine should be used only when user request
1567 * for stopping is received (SINGLESHOT is an exeption).
1568 */
1569 switch (ccdc->state) {
1570 case ISP_PIPELINE_STREAM_SINGLESHOT:
1571 ccdc->stopping = CCDC_STOP_REQUEST;
1572 break;
1573
1574 case ISP_PIPELINE_STREAM_CONTINUOUS:
1575 if (ccdc->output & CCDC_OUTPUT_MEMORY) {
1576 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1577 __ccdc_lsc_enable(ccdc, 0);
1578 __ccdc_enable(ccdc, 0);
1579 }
1580 break;
1581
1582 case ISP_PIPELINE_STREAM_STOPPED:
1583 break;
1584 }
1585
1586 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
1587 goto done;
1588
1589 if (ccdc->lsc.request == NULL)
1590 goto done;
1591
1592 /*
1593 * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
1594 * do the appropriate changes in registers
1595 */
1596 if (ccdc->lsc.state == LSC_STATE_RUNNING) {
1597 __ccdc_lsc_enable(ccdc, 0);
1598 ccdc->lsc.state = LSC_STATE_RECONFIG;
1599 goto done;
1600 }
1601
1602 /* LSC has been in STOPPED state, enable it */
1603 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1604 ccdc_lsc_enable(ccdc);
1605
1606 done:
1607 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1608 }
1609
1610 /*
1611 * omap3isp_ccdc_isr - Configure CCDC during interframe time.
1612 * @ccdc: Pointer to ISP CCDC device.
1613 * @events: CCDC events
1614 */
1615 int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
1616 {
1617 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
1618 return 0;
1619
1620 if (events & IRQ0STATUS_CCDC_VD1_IRQ)
1621 ccdc_vd1_isr(ccdc);
1622
1623 ccdc_lsc_isr(ccdc, events);
1624
1625 if (events & IRQ0STATUS_CCDC_VD0_IRQ)
1626 ccdc_vd0_isr(ccdc);
1627
1628 if (events & IRQ0STATUS_HS_VS_IRQ)
1629 ccdc_hs_vs_isr(ccdc);
1630
1631 return 0;
1632 }
1633
1634 /* -----------------------------------------------------------------------------
1635 * ISP video operations
1636 */
1637
1638 static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
1639 {
1640 struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
1641
1642 if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
1643 return -ENODEV;
1644
1645 ccdc_set_outaddr(ccdc, buffer->isp_addr);
1646
1647 /* We now have a buffer queued on the output, restart the pipeline
1648 * on the next CCDC interrupt if running in continuous mode (or when
1649 * starting the stream).
1650 */
1651 ccdc->underrun = 1;
1652
1653 return 0;
1654 }
1655
1656 static const struct isp_video_operations ccdc_video_ops = {
1657 .queue = ccdc_video_queue,
1658 };
1659
1660 /* -----------------------------------------------------------------------------
1661 * V4L2 subdev operations
1662 */
1663
1664 /*
1665 * ccdc_ioctl - CCDC module private ioctl's
1666 * @sd: ISP CCDC V4L2 subdevice
1667 * @cmd: ioctl command
1668 * @arg: ioctl argument
1669 *
1670 * Return 0 on success or a negative error code otherwise.
1671 */
1672 static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1673 {
1674 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1675 int ret;
1676
1677 switch (cmd) {
1678 case VIDIOC_OMAP3ISP_CCDC_CFG:
1679 mutex_lock(&ccdc->ioctl_lock);
1680 ret = ccdc_config(ccdc, arg);
1681 mutex_unlock(&ccdc->ioctl_lock);
1682 break;
1683
1684 default:
1685 return -ENOIOCTLCMD;
1686 }
1687
1688 return ret;
1689 }
1690
1691 static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1692 struct v4l2_event_subscription *sub)
1693 {
1694 if (sub->type != V4L2_EVENT_OMAP3ISP_HS_VS)
1695 return -EINVAL;
1696
1697 return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS);
1698 }
1699
1700 static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1701 struct v4l2_event_subscription *sub)
1702 {
1703 return v4l2_event_unsubscribe(fh, sub);
1704 }
1705
1706 /*
1707 * ccdc_set_stream - Enable/Disable streaming on the CCDC module
1708 * @sd: ISP CCDC V4L2 subdevice
1709 * @enable: Enable/disable stream
1710 *
1711 * When writing to memory, the CCDC hardware can't be enabled without a memory
1712 * buffer to write to. As the s_stream operation is called in response to a
1713 * STREAMON call without any buffer queued yet, just update the enabled field
1714 * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
1715 *
1716 * When not writing to memory enable the CCDC immediately.
1717 */
1718 static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
1719 {
1720 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1721 struct isp_device *isp = to_isp_device(ccdc);
1722 int ret = 0;
1723
1724 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
1725 if (enable == ISP_PIPELINE_STREAM_STOPPED)
1726 return 0;
1727
1728 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
1729 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1730 ISPCCDC_CFG_VDLC);
1731
1732 ccdc_configure(ccdc);
1733
1734 /* TODO: Don't configure the video port if all of its output
1735 * links are inactive.
1736 */
1737 ccdc_config_vp(ccdc);
1738 ccdc_enable_vp(ccdc, 1);
1739 ccdc->error = 0;
1740 ccdc_print_status(ccdc);
1741 }
1742
1743 switch (enable) {
1744 case ISP_PIPELINE_STREAM_CONTINUOUS:
1745 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1746 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1747
1748 if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
1749 ccdc_enable(ccdc);
1750
1751 ccdc->underrun = 0;
1752 break;
1753
1754 case ISP_PIPELINE_STREAM_SINGLESHOT:
1755 if (ccdc->output & CCDC_OUTPUT_MEMORY &&
1756 ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
1757 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1758
1759 ccdc_enable(ccdc);
1760 break;
1761
1762 case ISP_PIPELINE_STREAM_STOPPED:
1763 ret = ccdc_disable(ccdc);
1764 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1765 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1766 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
1767 ccdc->underrun = 0;
1768 break;
1769 }
1770
1771 ccdc->state = enable;
1772 return ret;
1773 }
1774
1775 static struct v4l2_mbus_framefmt *
1776 __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1777 unsigned int pad, enum v4l2_subdev_format_whence which)
1778 {
1779 if (which == V4L2_SUBDEV_FORMAT_TRY)
1780 return v4l2_subdev_get_try_format(fh, pad);
1781 else
1782 return &ccdc->formats[pad];
1783 }
1784
1785 /*
1786 * ccdc_try_format - Try video format on a pad
1787 * @ccdc: ISP CCDC device
1788 * @fh : V4L2 subdev file handle
1789 * @pad: Pad number
1790 * @fmt: Format
1791 */
1792 static void
1793 ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1794 unsigned int pad, struct v4l2_mbus_framefmt *fmt,
1795 enum v4l2_subdev_format_whence which)
1796 {
1797 struct v4l2_mbus_framefmt *format;
1798 const struct isp_format_info *info;
1799 unsigned int width = fmt->width;
1800 unsigned int height = fmt->height;
1801 unsigned int i;
1802
1803 switch (pad) {
1804 case CCDC_PAD_SINK:
1805 /* TODO: If the CCDC output formatter pad is connected directly
1806 * to the resizer, only YUV formats can be used.
1807 */
1808 for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
1809 if (fmt->code == ccdc_fmts[i])
1810 break;
1811 }
1812
1813 /* If not found, use SGRBG10 as default */
1814 if (i >= ARRAY_SIZE(ccdc_fmts))
1815 fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
1816
1817 /* Clamp the input size. */
1818 fmt->width = clamp_t(u32, width, 32, 4096);
1819 fmt->height = clamp_t(u32, height, 32, 4096);
1820 break;
1821
1822 case CCDC_PAD_SOURCE_OF:
1823 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
1824 memcpy(fmt, format, sizeof(*fmt));
1825
1826 /* The data formatter truncates the number of horizontal output
1827 * pixels to a multiple of 16. To avoid clipping data, allow
1828 * callers to request an output size bigger than the input size
1829 * up to the nearest multiple of 16.
1830 */
1831 fmt->width = clamp_t(u32, width, 32, (fmt->width + 15) & ~15);
1832 fmt->width &= ~15;
1833 fmt->height = clamp_t(u32, height, 32, fmt->height);
1834 break;
1835
1836 case CCDC_PAD_SOURCE_VP:
1837 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
1838 memcpy(fmt, format, sizeof(*fmt));
1839
1840 /* The video port interface truncates the data to 10 bits. */
1841 info = omap3isp_video_format_info(fmt->code);
1842 fmt->code = info->truncated;
1843
1844 /* The number of lines that can be clocked out from the video
1845 * port output must be at least one line less than the number
1846 * of input lines.
1847 */
1848 fmt->width = clamp_t(u32, width, 32, fmt->width);
1849 fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
1850 break;
1851 }
1852
1853 /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
1854 * stored on 2 bytes.
1855 */
1856 fmt->colorspace = V4L2_COLORSPACE_SRGB;
1857 fmt->field = V4L2_FIELD_NONE;
1858 }
1859
1860 /*
1861 * ccdc_enum_mbus_code - Handle pixel format enumeration
1862 * @sd : pointer to v4l2 subdev structure
1863 * @fh : V4L2 subdev file handle
1864 * @code : pointer to v4l2_subdev_mbus_code_enum structure
1865 * return -EINVAL or zero on success
1866 */
1867 static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
1868 struct v4l2_subdev_fh *fh,
1869 struct v4l2_subdev_mbus_code_enum *code)
1870 {
1871 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1872 struct v4l2_mbus_framefmt *format;
1873
1874 switch (code->pad) {
1875 case CCDC_PAD_SINK:
1876 if (code->index >= ARRAY_SIZE(ccdc_fmts))
1877 return -EINVAL;
1878
1879 code->code = ccdc_fmts[code->index];
1880 break;
1881
1882 case CCDC_PAD_SOURCE_OF:
1883 case CCDC_PAD_SOURCE_VP:
1884 /* No format conversion inside CCDC */
1885 if (code->index != 0)
1886 return -EINVAL;
1887
1888 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK,
1889 V4L2_SUBDEV_FORMAT_TRY);
1890
1891 code->code = format->code;
1892 break;
1893
1894 default:
1895 return -EINVAL;
1896 }
1897
1898 return 0;
1899 }
1900
1901 static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
1902 struct v4l2_subdev_fh *fh,
1903 struct v4l2_subdev_frame_size_enum *fse)
1904 {
1905 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1906 struct v4l2_mbus_framefmt format;
1907
1908 if (fse->index != 0)
1909 return -EINVAL;
1910
1911 format.code = fse->code;
1912 format.width = 1;
1913 format.height = 1;
1914 ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
1915 fse->min_width = format.width;
1916 fse->min_height = format.height;
1917
1918 if (format.code != fse->code)
1919 return -EINVAL;
1920
1921 format.code = fse->code;
1922 format.width = -1;
1923 format.height = -1;
1924 ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
1925 fse->max_width = format.width;
1926 fse->max_height = format.height;
1927
1928 return 0;
1929 }
1930
1931 /*
1932 * ccdc_get_format - Retrieve the video format on a pad
1933 * @sd : ISP CCDC V4L2 subdevice
1934 * @fh : V4L2 subdev file handle
1935 * @fmt: Format
1936 *
1937 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
1938 * to the format type.
1939 */
1940 static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
1941 struct v4l2_subdev_format *fmt)
1942 {
1943 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1944 struct v4l2_mbus_framefmt *format;
1945
1946 format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
1947 if (format == NULL)
1948 return -EINVAL;
1949
1950 fmt->format = *format;
1951 return 0;
1952 }
1953
1954 /*
1955 * ccdc_set_format - Set the video format on a pad
1956 * @sd : ISP CCDC V4L2 subdevice
1957 * @fh : V4L2 subdev file handle
1958 * @fmt: Format
1959 *
1960 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
1961 * to the format type.
1962 */
1963 static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
1964 struct v4l2_subdev_format *fmt)
1965 {
1966 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1967 struct v4l2_mbus_framefmt *format;
1968
1969 format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
1970 if (format == NULL)
1971 return -EINVAL;
1972
1973 ccdc_try_format(ccdc, fh, fmt->pad, &fmt->format, fmt->which);
1974 *format = fmt->format;
1975
1976 /* Propagate the format from sink to source */
1977 if (fmt->pad == CCDC_PAD_SINK) {
1978 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF,
1979 fmt->which);
1980 *format = fmt->format;
1981 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format,
1982 fmt->which);
1983
1984 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_VP,
1985 fmt->which);
1986 *format = fmt->format;
1987 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_VP, format,
1988 fmt->which);
1989 }
1990
1991 return 0;
1992 }
1993
1994 /*
1995 * ccdc_init_formats - Initialize formats on all pads
1996 * @sd: ISP CCDC V4L2 subdevice
1997 * @fh: V4L2 subdev file handle
1998 *
1999 * Initialize all pad formats with default values. If fh is not NULL, try
2000 * formats are initialized on the file handle. Otherwise active formats are
2001 * initialized on the device.
2002 */
2003 static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2004 {
2005 struct v4l2_subdev_format format;
2006
2007 memset(&format, 0, sizeof(format));
2008 format.pad = CCDC_PAD_SINK;
2009 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2010 format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
2011 format.format.width = 4096;
2012 format.format.height = 4096;
2013 ccdc_set_format(sd, fh, &format);
2014
2015 return 0;
2016 }
2017
2018 /* V4L2 subdev core operations */
2019 static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
2020 .ioctl = ccdc_ioctl,
2021 .subscribe_event = ccdc_subscribe_event,
2022 .unsubscribe_event = ccdc_unsubscribe_event,
2023 };
2024
2025 /* V4L2 subdev video operations */
2026 static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
2027 .s_stream = ccdc_set_stream,
2028 };
2029
2030 /* V4L2 subdev pad operations */
2031 static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
2032 .enum_mbus_code = ccdc_enum_mbus_code,
2033 .enum_frame_size = ccdc_enum_frame_size,
2034 .get_fmt = ccdc_get_format,
2035 .set_fmt = ccdc_set_format,
2036 };
2037
2038 /* V4L2 subdev operations */
2039 static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
2040 .core = &ccdc_v4l2_core_ops,
2041 .video = &ccdc_v4l2_video_ops,
2042 .pad = &ccdc_v4l2_pad_ops,
2043 };
2044
2045 /* V4L2 subdev internal operations */
2046 static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
2047 .open = ccdc_init_formats,
2048 };
2049
2050 /* -----------------------------------------------------------------------------
2051 * Media entity operations
2052 */
2053
2054 /*
2055 * ccdc_link_setup - Setup CCDC connections
2056 * @entity: CCDC media entity
2057 * @local: Pad at the local end of the link
2058 * @remote: Pad at the remote end of the link
2059 * @flags: Link flags
2060 *
2061 * return -EINVAL or zero on success
2062 */
2063 static int ccdc_link_setup(struct media_entity *entity,
2064 const struct media_pad *local,
2065 const struct media_pad *remote, u32 flags)
2066 {
2067 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2068 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2069 struct isp_device *isp = to_isp_device(ccdc);
2070
2071 switch (local->index | media_entity_type(remote->entity)) {
2072 case CCDC_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
2073 /* Read from the sensor (parallel interface), CCP2, CSI2a or
2074 * CSI2c.
2075 */
2076 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
2077 ccdc->input = CCDC_INPUT_NONE;
2078 break;
2079 }
2080
2081 if (ccdc->input != CCDC_INPUT_NONE)
2082 return -EBUSY;
2083
2084 if (remote->entity == &isp->isp_ccp2.subdev.entity)
2085 ccdc->input = CCDC_INPUT_CCP2B;
2086 else if (remote->entity == &isp->isp_csi2a.subdev.entity)
2087 ccdc->input = CCDC_INPUT_CSI2A;
2088 else if (remote->entity == &isp->isp_csi2c.subdev.entity)
2089 ccdc->input = CCDC_INPUT_CSI2C;
2090 else
2091 ccdc->input = CCDC_INPUT_PARALLEL;
2092
2093 break;
2094
2095 /*
2096 * The ISP core doesn't support pipelines with multiple video outputs.
2097 * Revisit this when it will be implemented, and return -EBUSY for now.
2098 */
2099
2100 case CCDC_PAD_SOURCE_VP | MEDIA_ENT_T_V4L2_SUBDEV:
2101 /* Write to preview engine, histogram and H3A. When none of
2102 * those links are active, the video port can be disabled.
2103 */
2104 if (flags & MEDIA_LNK_FL_ENABLED) {
2105 if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
2106 return -EBUSY;
2107 ccdc->output |= CCDC_OUTPUT_PREVIEW;
2108 } else {
2109 ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
2110 }
2111 break;
2112
2113 case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_DEVNODE:
2114 /* Write to memory */
2115 if (flags & MEDIA_LNK_FL_ENABLED) {
2116 if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
2117 return -EBUSY;
2118 ccdc->output |= CCDC_OUTPUT_MEMORY;
2119 } else {
2120 ccdc->output &= ~CCDC_OUTPUT_MEMORY;
2121 }
2122 break;
2123
2124 case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_V4L2_SUBDEV:
2125 /* Write to resizer */
2126 if (flags & MEDIA_LNK_FL_ENABLED) {
2127 if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
2128 return -EBUSY;
2129 ccdc->output |= CCDC_OUTPUT_RESIZER;
2130 } else {
2131 ccdc->output &= ~CCDC_OUTPUT_RESIZER;
2132 }
2133 break;
2134
2135 default:
2136 return -EINVAL;
2137 }
2138
2139 return 0;
2140 }
2141
2142 /* media operations */
2143 static const struct media_entity_operations ccdc_media_ops = {
2144 .link_setup = ccdc_link_setup,
2145 };
2146
2147 /*
2148 * ccdc_init_entities - Initialize V4L2 subdev and media entity
2149 * @ccdc: ISP CCDC module
2150 *
2151 * Return 0 on success and a negative error code on failure.
2152 */
2153 static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
2154 {
2155 struct v4l2_subdev *sd = &ccdc->subdev;
2156 struct media_pad *pads = ccdc->pads;
2157 struct media_entity *me = &sd->entity;
2158 int ret;
2159
2160 ccdc->input = CCDC_INPUT_NONE;
2161
2162 v4l2_subdev_init(sd, &ccdc_v4l2_ops);
2163 sd->internal_ops = &ccdc_v4l2_internal_ops;
2164 strlcpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
2165 sd->grp_id = 1 << 16; /* group ID for isp subdevs */
2166 v4l2_set_subdevdata(sd, ccdc);
2167 sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
2168
2169 pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
2170 pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
2171 pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
2172
2173 me->ops = &ccdc_media_ops;
2174 ret = media_entity_init(me, CCDC_PADS_NUM, pads, 0);
2175 if (ret < 0)
2176 return ret;
2177
2178 ccdc_init_formats(sd, NULL);
2179
2180 ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2181 ccdc->video_out.ops = &ccdc_video_ops;
2182 ccdc->video_out.isp = to_isp_device(ccdc);
2183 ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
2184 ccdc->video_out.bpl_alignment = 32;
2185
2186 ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
2187 if (ret < 0)
2188 return ret;
2189
2190 /* Connect the CCDC subdev to the video node. */
2191 ret = media_entity_create_link(&ccdc->subdev.entity, CCDC_PAD_SOURCE_OF,
2192 &ccdc->video_out.video.entity, 0, 0);
2193 if (ret < 0)
2194 return ret;
2195
2196 return 0;
2197 }
2198
2199 void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
2200 {
2201 media_entity_cleanup(&ccdc->subdev.entity);
2202
2203 v4l2_device_unregister_subdev(&ccdc->subdev);
2204 omap3isp_video_unregister(&ccdc->video_out);
2205 }
2206
2207 int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
2208 struct v4l2_device *vdev)
2209 {
2210 int ret;
2211
2212 /* Register the subdev and video node. */
2213 ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
2214 if (ret < 0)
2215 goto error;
2216
2217 ret = omap3isp_video_register(&ccdc->video_out, vdev);
2218 if (ret < 0)
2219 goto error;
2220
2221 return 0;
2222
2223 error:
2224 omap3isp_ccdc_unregister_entities(ccdc);
2225 return ret;
2226 }
2227
2228 /* -----------------------------------------------------------------------------
2229 * ISP CCDC initialisation and cleanup
2230 */
2231
2232 /*
2233 * omap3isp_ccdc_init - CCDC module initialization.
2234 * @dev: Device pointer specific to the OMAP3 ISP.
2235 *
2236 * TODO: Get the initialisation values from platform data.
2237 *
2238 * Return 0 on success or a negative error code otherwise.
2239 */
2240 int omap3isp_ccdc_init(struct isp_device *isp)
2241 {
2242 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2243
2244 spin_lock_init(&ccdc->lock);
2245 init_waitqueue_head(&ccdc->wait);
2246 mutex_init(&ccdc->ioctl_lock);
2247
2248 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
2249
2250 INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
2251 ccdc->lsc.state = LSC_STATE_STOPPED;
2252 INIT_LIST_HEAD(&ccdc->lsc.free_queue);
2253 spin_lock_init(&ccdc->lsc.req_lock);
2254
2255 ccdc->syncif.ccdc_mastermode = 0;
2256 ccdc->syncif.datapol = 0;
2257 ccdc->syncif.datsz = 0;
2258 ccdc->syncif.fldmode = 0;
2259 ccdc->syncif.fldout = 0;
2260 ccdc->syncif.fldpol = 0;
2261 ccdc->syncif.fldstat = 0;
2262
2263 ccdc->clamp.oblen = 0;
2264 ccdc->clamp.dcsubval = 0;
2265
2266 ccdc->vpcfg.pixelclk = 0;
2267
2268 ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
2269 ccdc_apply_controls(ccdc);
2270
2271 return ccdc_init_entities(ccdc);
2272 }
2273
2274 /*
2275 * omap3isp_ccdc_cleanup - CCDC module cleanup.
2276 * @dev: Device pointer specific to the OMAP3 ISP.
2277 */
2278 void omap3isp_ccdc_cleanup(struct isp_device *isp)
2279 {
2280 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2281
2282 /* Free LSC requests. As the CCDC is stopped there's no active request,
2283 * so only the pending request and the free queue need to be handled.
2284 */
2285 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
2286 cancel_work_sync(&ccdc->lsc.table_work);
2287 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
2288
2289 if (ccdc->fpc.fpcaddr != 0)
2290 omap_iommu_vfree(isp->domain, isp->iommu, ccdc->fpc.fpcaddr);
2291 }
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