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Add linux-next specific files for 20110831
[linux-2.6/next.git] / drivers / media / video / rj54n1cb0c.c
blob985965f744ffdb16f366e352b40cc70fb481fbbf
1 /*
2 * Driver for RJ54N1CB0C CMOS Image Sensor from Sharp
3 *
4 * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 #include <linux/delay.h>
12 #include <linux/i2c.h>
13 #include <linux/slab.h>
14 #include <linux/videodev2.h>
15 #include <linux/module.h>
16
17 #include <media/rj54n1cb0c.h>
18 #include <media/soc_camera.h>
19 #include <media/soc_mediabus.h>
20 #include <media/v4l2-subdev.h>
21 #include <media/v4l2-chip-ident.h>
22
23 #define RJ54N1_DEV_CODE 0x0400
24 #define RJ54N1_DEV_CODE2 0x0401
25 #define RJ54N1_OUT_SEL 0x0403
26 #define RJ54N1_XY_OUTPUT_SIZE_S_H 0x0404
27 #define RJ54N1_X_OUTPUT_SIZE_S_L 0x0405
28 #define RJ54N1_Y_OUTPUT_SIZE_S_L 0x0406
29 #define RJ54N1_XY_OUTPUT_SIZE_P_H 0x0407
30 #define RJ54N1_X_OUTPUT_SIZE_P_L 0x0408
31 #define RJ54N1_Y_OUTPUT_SIZE_P_L 0x0409
32 #define RJ54N1_LINE_LENGTH_PCK_S_H 0x040a
33 #define RJ54N1_LINE_LENGTH_PCK_S_L 0x040b
34 #define RJ54N1_LINE_LENGTH_PCK_P_H 0x040c
35 #define RJ54N1_LINE_LENGTH_PCK_P_L 0x040d
36 #define RJ54N1_RESIZE_N 0x040e
37 #define RJ54N1_RESIZE_N_STEP 0x040f
38 #define RJ54N1_RESIZE_STEP 0x0410
39 #define RJ54N1_RESIZE_HOLD_H 0x0411
40 #define RJ54N1_RESIZE_HOLD_L 0x0412
41 #define RJ54N1_H_OBEN_OFS 0x0413
42 #define RJ54N1_V_OBEN_OFS 0x0414
43 #define RJ54N1_RESIZE_CONTROL 0x0415
44 #define RJ54N1_STILL_CONTROL 0x0417
45 #define RJ54N1_INC_USE_SEL_H 0x0425
46 #define RJ54N1_INC_USE_SEL_L 0x0426
47 #define RJ54N1_MIRROR_STILL_MODE 0x0427
48 #define RJ54N1_INIT_START 0x0428
49 #define RJ54N1_SCALE_1_2_LEV 0x0429
50 #define RJ54N1_SCALE_4_LEV 0x042a
51 #define RJ54N1_Y_GAIN 0x04d8
52 #define RJ54N1_APT_GAIN_UP 0x04fa
53 #define RJ54N1_RA_SEL_UL 0x0530
54 #define RJ54N1_BYTE_SWAP 0x0531
55 #define RJ54N1_OUT_SIGPO 0x053b
56 #define RJ54N1_WB_SEL_WEIGHT_I 0x054e
57 #define RJ54N1_BIT8_WB 0x0569
58 #define RJ54N1_HCAPS_WB 0x056a
59 #define RJ54N1_VCAPS_WB 0x056b
60 #define RJ54N1_HCAPE_WB 0x056c
61 #define RJ54N1_VCAPE_WB 0x056d
62 #define RJ54N1_EXPOSURE_CONTROL 0x058c
63 #define RJ54N1_FRAME_LENGTH_S_H 0x0595
64 #define RJ54N1_FRAME_LENGTH_S_L 0x0596
65 #define RJ54N1_FRAME_LENGTH_P_H 0x0597
66 #define RJ54N1_FRAME_LENGTH_P_L 0x0598
67 #define RJ54N1_PEAK_H 0x05b7
68 #define RJ54N1_PEAK_50 0x05b8
69 #define RJ54N1_PEAK_60 0x05b9
70 #define RJ54N1_PEAK_DIFF 0x05ba
71 #define RJ54N1_IOC 0x05ef
72 #define RJ54N1_TG_BYPASS 0x0700
73 #define RJ54N1_PLL_L 0x0701
74 #define RJ54N1_PLL_N 0x0702
75 #define RJ54N1_PLL_EN 0x0704
76 #define RJ54N1_RATIO_TG 0x0706
77 #define RJ54N1_RATIO_T 0x0707
78 #define RJ54N1_RATIO_R 0x0708
79 #define RJ54N1_RAMP_TGCLK_EN 0x0709
80 #define RJ54N1_OCLK_DSP 0x0710
81 #define RJ54N1_RATIO_OP 0x0711
82 #define RJ54N1_RATIO_O 0x0712
83 #define RJ54N1_OCLK_SEL_EN 0x0713
84 #define RJ54N1_CLK_RST 0x0717
85 #define RJ54N1_RESET_STANDBY 0x0718
86 #define RJ54N1_FWFLG 0x07fe
87
88 #define E_EXCLK (1 << 7)
89 #define SOFT_STDBY (1 << 4)
90 #define SEN_RSTX (1 << 2)
91 #define TG_RSTX (1 << 1)
92 #define DSP_RSTX (1 << 0)
93
94 #define RESIZE_HOLD_SEL (1 << 2)
95 #define RESIZE_GO (1 << 1)
96
97 /*
98 * When cropping, the camera automatically centers the cropped region, there
99 * doesn't seem to be a way to specify an explicit location of the rectangle.
100 */
101 #define RJ54N1_COLUMN_SKIP 0
102 #define RJ54N1_ROW_SKIP 0
103 #define RJ54N1_MAX_WIDTH 1600
104 #define RJ54N1_MAX_HEIGHT 1200
105
106 #define PLL_L 2
107 #define PLL_N 0x31
108
109 /* I2C addresses: 0x50, 0x51, 0x60, 0x61 */
110
111 /* RJ54N1CB0C has only one fixed colorspace per pixelcode */
112 struct rj54n1_datafmt {
113 enum v4l2_mbus_pixelcode code;
114 enum v4l2_colorspace colorspace;
115 };
116
117 /* Find a data format by a pixel code in an array */
118 static const struct rj54n1_datafmt *rj54n1_find_datafmt(
119 enum v4l2_mbus_pixelcode code, const struct rj54n1_datafmt *fmt,
120 int n)
121 {
122 int i;
123 for (i = 0; i < n; i++)
124 if (fmt[i].code == code)
125 return fmt + i;
126
127 return NULL;
128 }
129
130 static const struct rj54n1_datafmt rj54n1_colour_fmts[] = {
131 {V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
132 {V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
133 {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
134 {V4L2_MBUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
135 {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
136 {V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE, V4L2_COLORSPACE_SRGB},
137 {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
138 {V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE, V4L2_COLORSPACE_SRGB},
139 {V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB},
140 };
141
142 struct rj54n1_clock_div {
143 u8 ratio_tg; /* can be 0 or an odd number */
144 u8 ratio_t;
145 u8 ratio_r;
146 u8 ratio_op;
147 u8 ratio_o;
148 };
149
150 struct rj54n1 {
151 struct v4l2_subdev subdev;
152 struct rj54n1_clock_div clk_div;
153 const struct rj54n1_datafmt *fmt;
154 struct v4l2_rect rect; /* Sensor window */
155 unsigned int tgclk_mhz;
156 bool auto_wb;
157 unsigned short width; /* Output window */
158 unsigned short height;
159 unsigned short resize; /* Sensor * 1024 / resize = Output */
160 unsigned short scale;
161 u8 bank;
162 };
163
164 struct rj54n1_reg_val {
165 u16 reg;
166 u8 val;
167 };
168
169 static const struct rj54n1_reg_val bank_4[] = {
170 {0x417, 0},
171 {0x42c, 0},
172 {0x42d, 0xf0},
173 {0x42e, 0},
174 {0x42f, 0x50},
175 {0x430, 0xf5},
176 {0x431, 0x16},
177 {0x432, 0x20},
178 {0x433, 0},
179 {0x434, 0xc8},
180 {0x43c, 8},
181 {0x43e, 0x90},
182 {0x445, 0x83},
183 {0x4ba, 0x58},
184 {0x4bb, 4},
185 {0x4bc, 0x20},
186 {0x4db, 4},
187 {0x4fe, 2},
188 };
189
190 static const struct rj54n1_reg_val bank_5[] = {
191 {0x514, 0},
192 {0x516, 0},
193 {0x518, 0},
194 {0x51a, 0},
195 {0x51d, 0xff},
196 {0x56f, 0x28},
197 {0x575, 0x40},
198 {0x5bc, 0x48},
199 {0x5c1, 6},
200 {0x5e5, 0x11},
201 {0x5e6, 0x43},
202 {0x5e7, 0x33},
203 {0x5e8, 0x21},
204 {0x5e9, 0x30},
205 {0x5ea, 0x0},
206 {0x5eb, 0xa5},
207 {0x5ec, 0xff},
208 {0x5fe, 2},
209 };
210
211 static const struct rj54n1_reg_val bank_7[] = {
212 {0x70a, 0},
213 {0x714, 0xff},
214 {0x715, 0xff},
215 {0x716, 0x1f},
216 {0x7FE, 2},
217 };
218
219 static const struct rj54n1_reg_val bank_8[] = {
220 {0x800, 0x00},
221 {0x801, 0x01},
222 {0x802, 0x61},
223 {0x805, 0x00},
224 {0x806, 0x00},
225 {0x807, 0x00},
226 {0x808, 0x00},
227 {0x809, 0x01},
228 {0x80A, 0x61},
229 {0x80B, 0x00},
230 {0x80C, 0x01},
231 {0x80D, 0x00},
232 {0x80E, 0x00},
233 {0x80F, 0x00},
234 {0x810, 0x00},
235 {0x811, 0x01},
236 {0x812, 0x61},
237 {0x813, 0x00},
238 {0x814, 0x11},
239 {0x815, 0x00},
240 {0x816, 0x41},
241 {0x817, 0x00},
242 {0x818, 0x51},
243 {0x819, 0x01},
244 {0x81A, 0x1F},
245 {0x81B, 0x00},
246 {0x81C, 0x01},
247 {0x81D, 0x00},
248 {0x81E, 0x11},
249 {0x81F, 0x00},
250 {0x820, 0x41},
251 {0x821, 0x00},
252 {0x822, 0x51},
253 {0x823, 0x00},
254 {0x824, 0x00},
255 {0x825, 0x00},
256 {0x826, 0x47},
257 {0x827, 0x01},
258 {0x828, 0x4F},
259 {0x829, 0x00},
260 {0x82A, 0x00},
261 {0x82B, 0x00},
262 {0x82C, 0x30},
263 {0x82D, 0x00},
264 {0x82E, 0x40},
265 {0x82F, 0x00},
266 {0x830, 0xB3},
267 {0x831, 0x00},
268 {0x832, 0xE3},
269 {0x833, 0x00},
270 {0x834, 0x00},
271 {0x835, 0x00},
272 {0x836, 0x00},
273 {0x837, 0x00},
274 {0x838, 0x00},
275 {0x839, 0x01},
276 {0x83A, 0x61},
277 {0x83B, 0x00},
278 {0x83C, 0x01},
279 {0x83D, 0x00},
280 {0x83E, 0x00},
281 {0x83F, 0x00},
282 {0x840, 0x00},
283 {0x841, 0x01},
284 {0x842, 0x61},
285 {0x843, 0x00},
286 {0x844, 0x1D},
287 {0x845, 0x00},
288 {0x846, 0x00},
289 {0x847, 0x00},
290 {0x848, 0x00},
291 {0x849, 0x01},
292 {0x84A, 0x1F},
293 {0x84B, 0x00},
294 {0x84C, 0x05},
295 {0x84D, 0x00},
296 {0x84E, 0x19},
297 {0x84F, 0x01},
298 {0x850, 0x21},
299 {0x851, 0x01},
300 {0x852, 0x5D},
301 {0x853, 0x00},
302 {0x854, 0x00},
303 {0x855, 0x00},
304 {0x856, 0x19},
305 {0x857, 0x01},
306 {0x858, 0x21},
307 {0x859, 0x00},
308 {0x85A, 0x00},
309 {0x85B, 0x00},
310 {0x85C, 0x00},
311 {0x85D, 0x00},
312 {0x85E, 0x00},
313 {0x85F, 0x00},
314 {0x860, 0xB3},
315 {0x861, 0x00},
316 {0x862, 0xE3},
317 {0x863, 0x00},
318 {0x864, 0x00},
319 {0x865, 0x00},
320 {0x866, 0x00},
321 {0x867, 0x00},
322 {0x868, 0x00},
323 {0x869, 0xE2},
324 {0x86A, 0x00},
325 {0x86B, 0x01},
326 {0x86C, 0x06},
327 {0x86D, 0x00},
328 {0x86E, 0x00},
329 {0x86F, 0x00},
330 {0x870, 0x60},
331 {0x871, 0x8C},
332 {0x872, 0x10},
333 {0x873, 0x00},
334 {0x874, 0xE0},
335 {0x875, 0x00},
336 {0x876, 0x27},
337 {0x877, 0x01},
338 {0x878, 0x00},
339 {0x879, 0x00},
340 {0x87A, 0x00},
341 {0x87B, 0x03},
342 {0x87C, 0x00},
343 {0x87D, 0x00},
344 {0x87E, 0x00},
345 {0x87F, 0x00},
346 {0x880, 0x00},
347 {0x881, 0x00},
348 {0x882, 0x00},
349 {0x883, 0x00},
350 {0x884, 0x00},
351 {0x885, 0x00},
352 {0x886, 0xF8},
353 {0x887, 0x00},
354 {0x888, 0x03},
355 {0x889, 0x00},
356 {0x88A, 0x64},
357 {0x88B, 0x00},
358 {0x88C, 0x03},
359 {0x88D, 0x00},
360 {0x88E, 0xB1},
361 {0x88F, 0x00},
362 {0x890, 0x03},
363 {0x891, 0x01},
364 {0x892, 0x1D},
365 {0x893, 0x00},
366 {0x894, 0x03},
367 {0x895, 0x01},
368 {0x896, 0x4B},
369 {0x897, 0x00},
370 {0x898, 0xE5},
371 {0x899, 0x00},
372 {0x89A, 0x01},
373 {0x89B, 0x00},
374 {0x89C, 0x01},
375 {0x89D, 0x04},
376 {0x89E, 0xC8},
377 {0x89F, 0x00},
378 {0x8A0, 0x01},
379 {0x8A1, 0x01},
380 {0x8A2, 0x61},
381 {0x8A3, 0x00},
382 {0x8A4, 0x01},
383 {0x8A5, 0x00},
384 {0x8A6, 0x00},
385 {0x8A7, 0x00},
386 {0x8A8, 0x00},
387 {0x8A9, 0x00},
388 {0x8AA, 0x7F},
389 {0x8AB, 0x03},
390 {0x8AC, 0x00},
391 {0x8AD, 0x00},
392 {0x8AE, 0x00},
393 {0x8AF, 0x00},
394 {0x8B0, 0x00},
395 {0x8B1, 0x00},
396 {0x8B6, 0x00},
397 {0x8B7, 0x01},
398 {0x8B8, 0x00},
399 {0x8B9, 0x00},
400 {0x8BA, 0x02},
401 {0x8BB, 0x00},
402 {0x8BC, 0xFF},
403 {0x8BD, 0x00},
404 {0x8FE, 2},
405 };
406
407 static const struct rj54n1_reg_val bank_10[] = {
408 {0x10bf, 0x69}
409 };
410
411 /* Clock dividers - these are default register values, divider = register + 1 */
412 static const struct rj54n1_clock_div clk_div = {
413 .ratio_tg = 3 /* default: 5 */,
414 .ratio_t = 4 /* default: 1 */,
415 .ratio_r = 4 /* default: 0 */,
416 .ratio_op = 1 /* default: 5 */,
417 .ratio_o = 9 /* default: 0 */,
418 };
419
420 static struct rj54n1 *to_rj54n1(const struct i2c_client *client)
421 {
422 return container_of(i2c_get_clientdata(client), struct rj54n1, subdev);
423 }
424
425 static int reg_read(struct i2c_client *client, const u16 reg)
426 {
427 struct rj54n1 *rj54n1 = to_rj54n1(client);
428 int ret;
429
430 /* set bank */
431 if (rj54n1->bank != reg >> 8) {
432 dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8);
433 ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8);
434 if (ret < 0)
435 return ret;
436 rj54n1->bank = reg >> 8;
437 }
438 return i2c_smbus_read_byte_data(client, reg & 0xff);
439 }
440
441 static int reg_write(struct i2c_client *client, const u16 reg,
442 const u8 data)
443 {
444 struct rj54n1 *rj54n1 = to_rj54n1(client);
445 int ret;
446
447 /* set bank */
448 if (rj54n1->bank != reg >> 8) {
449 dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8);
450 ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8);
451 if (ret < 0)
452 return ret;
453 rj54n1->bank = reg >> 8;
454 }
455 dev_dbg(&client->dev, "[0x%x] = 0x%x\n", reg & 0xff, data);
456 return i2c_smbus_write_byte_data(client, reg & 0xff, data);
457 }
458
459 static int reg_set(struct i2c_client *client, const u16 reg,
460 const u8 data, const u8 mask)
461 {
462 int ret;
463
464 ret = reg_read(client, reg);
465 if (ret < 0)
466 return ret;
467 return reg_write(client, reg, (ret & ~mask) | (data & mask));
468 }
469
470 static int reg_write_multiple(struct i2c_client *client,
471 const struct rj54n1_reg_val *rv, const int n)
472 {
473 int i, ret;
474
475 for (i = 0; i < n; i++) {
476 ret = reg_write(client, rv->reg, rv->val);
477 if (ret < 0)
478 return ret;
479 rv++;
480 }
481
482 return 0;
483 }
484
485 static int rj54n1_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
486 enum v4l2_mbus_pixelcode *code)
487 {
488 if (index >= ARRAY_SIZE(rj54n1_colour_fmts))
489 return -EINVAL;
490
491 *code = rj54n1_colour_fmts[index].code;
492 return 0;
493 }
494
495 static int rj54n1_s_stream(struct v4l2_subdev *sd, int enable)
496 {
497 struct i2c_client *client = v4l2_get_subdevdata(sd);
498
499 /* Switch between preview and still shot modes */
500 return reg_set(client, RJ54N1_STILL_CONTROL, (!enable) << 7, 0x80);
501 }
502
503 static int rj54n1_set_bus_param(struct soc_camera_device *icd,
504 unsigned long flags)
505 {
506 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
507 struct i2c_client *client = v4l2_get_subdevdata(sd);
508 /* Figures 2.5-1 to 2.5-3 - default falling pixclk edge */
509
510 if (flags & SOCAM_PCLK_SAMPLE_RISING)
511 return reg_write(client, RJ54N1_OUT_SIGPO, 1 << 4);
512 else
513 return reg_write(client, RJ54N1_OUT_SIGPO, 0);
514 }
515
516 static unsigned long rj54n1_query_bus_param(struct soc_camera_device *icd)
517 {
518 struct soc_camera_link *icl = to_soc_camera_link(icd);
519 const unsigned long flags =
520 SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING |
521 SOCAM_MASTER | SOCAM_DATAWIDTH_8 |
522 SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH |
523 SOCAM_DATA_ACTIVE_HIGH;
524
525 return soc_camera_apply_sensor_flags(icl, flags);
526 }
527
528 static int rj54n1_set_rect(struct i2c_client *client,
529 u16 reg_x, u16 reg_y, u16 reg_xy,
530 u32 width, u32 height)
531 {
532 int ret;
533
534 ret = reg_write(client, reg_xy,
535 ((width >> 4) & 0x70) |
536 ((height >> 8) & 7));
537
538 if (!ret)
539 ret = reg_write(client, reg_x, width & 0xff);
540 if (!ret)
541 ret = reg_write(client, reg_y, height & 0xff);
542
543 return ret;
544 }
545
546 /*
547 * Some commands, specifically certain initialisation sequences, require
548 * a commit operation.
549 */
550 static int rj54n1_commit(struct i2c_client *client)
551 {
552 int ret = reg_write(client, RJ54N1_INIT_START, 1);
553 msleep(10);
554 if (!ret)
555 ret = reg_write(client, RJ54N1_INIT_START, 0);
556 return ret;
557 }
558
559 static int rj54n1_sensor_scale(struct v4l2_subdev *sd, s32 *in_w, s32 *in_h,
560 s32 *out_w, s32 *out_h);
561
562 static int rj54n1_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
563 {
564 struct i2c_client *client = v4l2_get_subdevdata(sd);
565 struct rj54n1 *rj54n1 = to_rj54n1(client);
566 struct v4l2_rect *rect = &a->c;
567 int dummy = 0, output_w, output_h,
568 input_w = rect->width, input_h = rect->height;
569 int ret;
570
571 /* arbitrary minimum width and height, edges unimportant */
572 soc_camera_limit_side(&dummy, &input_w,
573 RJ54N1_COLUMN_SKIP, 8, RJ54N1_MAX_WIDTH);
574
575 soc_camera_limit_side(&dummy, &input_h,
576 RJ54N1_ROW_SKIP, 8, RJ54N1_MAX_HEIGHT);
577
578 output_w = (input_w * 1024 + rj54n1->resize / 2) / rj54n1->resize;
579 output_h = (input_h * 1024 + rj54n1->resize / 2) / rj54n1->resize;
580
581 dev_dbg(&client->dev, "Scaling for %dx%d : %u = %dx%d\n",
582 input_w, input_h, rj54n1->resize, output_w, output_h);
583
584 ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h);
585 if (ret < 0)
586 return ret;
587
588 rj54n1->width = output_w;
589 rj54n1->height = output_h;
590 rj54n1->resize = ret;
591 rj54n1->rect.width = input_w;
592 rj54n1->rect.height = input_h;
593
594 return 0;
595 }
596
597 static int rj54n1_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
598 {
599 struct i2c_client *client = v4l2_get_subdevdata(sd);
600 struct rj54n1 *rj54n1 = to_rj54n1(client);
601
602 a->c = rj54n1->rect;
603 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
604
605 return 0;
606 }
607
608 static int rj54n1_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
609 {
610 a->bounds.left = RJ54N1_COLUMN_SKIP;
611 a->bounds.top = RJ54N1_ROW_SKIP;
612 a->bounds.width = RJ54N1_MAX_WIDTH;
613 a->bounds.height = RJ54N1_MAX_HEIGHT;
614 a->defrect = a->bounds;
615 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
616 a->pixelaspect.numerator = 1;
617 a->pixelaspect.denominator = 1;
618
619 return 0;
620 }
621
622 static int rj54n1_g_fmt(struct v4l2_subdev *sd,
623 struct v4l2_mbus_framefmt *mf)
624 {
625 struct i2c_client *client = v4l2_get_subdevdata(sd);
626 struct rj54n1 *rj54n1 = to_rj54n1(client);
627
628 mf->code = rj54n1->fmt->code;
629 mf->colorspace = rj54n1->fmt->colorspace;
630 mf->field = V4L2_FIELD_NONE;
631 mf->width = rj54n1->width;
632 mf->height = rj54n1->height;
633
634 return 0;
635 }
636
637 /*
638 * The actual geometry configuration routine. It scales the input window into
639 * the output one, updates the window sizes and returns an error or the resize
640 * coefficient on success. Note: we only use the "Fixed Scaling" on this camera.
641 */
642 static int rj54n1_sensor_scale(struct v4l2_subdev *sd, s32 *in_w, s32 *in_h,
643 s32 *out_w, s32 *out_h)
644 {
645 struct i2c_client *client = v4l2_get_subdevdata(sd);
646 struct rj54n1 *rj54n1 = to_rj54n1(client);
647 unsigned int skip, resize, input_w = *in_w, input_h = *in_h,
648 output_w = *out_w, output_h = *out_h;
649 u16 inc_sel, wb_bit8, wb_left, wb_right, wb_top, wb_bottom;
650 unsigned int peak, peak_50, peak_60;
651 int ret;
652
653 /*
654 * We have a problem with crops, where the window is larger than 512x384
655 * and output window is larger than a half of the input one. In this
656 * case we have to either reduce the input window to equal or below
657 * 512x384 or the output window to equal or below 1/2 of the input.
658 */
659 if (output_w > max(512U, input_w / 2)) {
660 if (2 * output_w > RJ54N1_MAX_WIDTH) {
661 input_w = RJ54N1_MAX_WIDTH;
662 output_w = RJ54N1_MAX_WIDTH / 2;
663 } else {
664 input_w = output_w * 2;
665 }
666
667 dev_dbg(&client->dev, "Adjusted output width: in %u, out %u\n",
668 input_w, output_w);
669 }
670
671 if (output_h > max(384U, input_h / 2)) {
672 if (2 * output_h > RJ54N1_MAX_HEIGHT) {
673 input_h = RJ54N1_MAX_HEIGHT;
674 output_h = RJ54N1_MAX_HEIGHT / 2;
675 } else {
676 input_h = output_h * 2;
677 }
678
679 dev_dbg(&client->dev, "Adjusted output height: in %u, out %u\n",
680 input_h, output_h);
681 }
682
683 /* Idea: use the read mode for snapshots, handle separate geometries */
684 ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_S_L,
685 RJ54N1_Y_OUTPUT_SIZE_S_L,
686 RJ54N1_XY_OUTPUT_SIZE_S_H, output_w, output_h);
687 if (!ret)
688 ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_P_L,
689 RJ54N1_Y_OUTPUT_SIZE_P_L,
690 RJ54N1_XY_OUTPUT_SIZE_P_H, output_w, output_h);
691
692 if (ret < 0)
693 return ret;
694
695 if (output_w > input_w && output_h > input_h) {
696 input_w = output_w;
697 input_h = output_h;
698
699 resize = 1024;
700 } else {
701 unsigned int resize_x, resize_y;
702 resize_x = (input_w * 1024 + output_w / 2) / output_w;
703 resize_y = (input_h * 1024 + output_h / 2) / output_h;
704
705 /* We want max(resize_x, resize_y), check if it still fits */
706 if (resize_x > resize_y &&
707 (output_h * resize_x + 512) / 1024 > RJ54N1_MAX_HEIGHT)
708 resize = (RJ54N1_MAX_HEIGHT * 1024 + output_h / 2) /
709 output_h;
710 else if (resize_y > resize_x &&
711 (output_w * resize_y + 512) / 1024 > RJ54N1_MAX_WIDTH)
712 resize = (RJ54N1_MAX_WIDTH * 1024 + output_w / 2) /
713 output_w;
714 else
715 resize = max(resize_x, resize_y);
716
717 /* Prohibited value ranges */
718 switch (resize) {
719 case 2040 ... 2047:
720 resize = 2039;
721 break;
722 case 4080 ... 4095:
723 resize = 4079;
724 break;
725 case 8160 ... 8191:
726 resize = 8159;
727 break;
728 case 16320 ... 16384:
729 resize = 16319;
730 }
731 }
732
733 /* Set scaling */
734 ret = reg_write(client, RJ54N1_RESIZE_HOLD_L, resize & 0xff);
735 if (!ret)
736 ret = reg_write(client, RJ54N1_RESIZE_HOLD_H, resize >> 8);
737
738 if (ret < 0)
739 return ret;
740
741 /*
742 * Configure a skipping bitmask. The sensor will select a skipping value
743 * among set bits automatically. This is very unclear in the datasheet
744 * too. I was told, in this register one enables all skipping values,
745 * that are required for a specific resize, and the camera selects
746 * automatically, which ones to use. But it is unclear how to identify,
747 * which cropping values are needed. Secondly, why don't we just set all
748 * bits and let the camera choose? Would it increase processing time and
749 * reduce the framerate? Using 0xfffc for INC_USE_SEL doesn't seem to
750 * improve the image quality or stability for larger frames (see comment
751 * above), but I didn't check the framerate.
752 */
753 skip = min(resize / 1024, 15U);
754
755 inc_sel = 1 << skip;
756
757 if (inc_sel <= 2)
758 inc_sel = 0xc;
759 else if (resize & 1023 && skip < 15)
760 inc_sel |= 1 << (skip + 1);
761
762 ret = reg_write(client, RJ54N1_INC_USE_SEL_L, inc_sel & 0xfc);
763 if (!ret)
764 ret = reg_write(client, RJ54N1_INC_USE_SEL_H, inc_sel >> 8);
765
766 if (!rj54n1->auto_wb) {
767 /* Auto white balance window */
768 wb_left = output_w / 16;
769 wb_right = (3 * output_w / 4 - 3) / 4;
770 wb_top = output_h / 16;
771 wb_bottom = (3 * output_h / 4 - 3) / 4;
772 wb_bit8 = ((wb_left >> 2) & 0x40) | ((wb_top >> 4) & 0x10) |
773 ((wb_right >> 6) & 4) | ((wb_bottom >> 8) & 1);
774
775 if (!ret)
776 ret = reg_write(client, RJ54N1_BIT8_WB, wb_bit8);
777 if (!ret)
778 ret = reg_write(client, RJ54N1_HCAPS_WB, wb_left);
779 if (!ret)
780 ret = reg_write(client, RJ54N1_VCAPS_WB, wb_top);
781 if (!ret)
782 ret = reg_write(client, RJ54N1_HCAPE_WB, wb_right);
783 if (!ret)
784 ret = reg_write(client, RJ54N1_VCAPE_WB, wb_bottom);
785 }
786
787 /* Antiflicker */
788 peak = 12 * RJ54N1_MAX_WIDTH * (1 << 14) * resize / rj54n1->tgclk_mhz /
789 10000;
790 peak_50 = peak / 6;
791 peak_60 = peak / 5;
792
793 if (!ret)
794 ret = reg_write(client, RJ54N1_PEAK_H,
795 ((peak_50 >> 4) & 0xf0) | (peak_60 >> 8));
796 if (!ret)
797 ret = reg_write(client, RJ54N1_PEAK_50, peak_50);
798 if (!ret)
799 ret = reg_write(client, RJ54N1_PEAK_60, peak_60);
800 if (!ret)
801 ret = reg_write(client, RJ54N1_PEAK_DIFF, peak / 150);
802
803 /* Start resizing */
804 if (!ret)
805 ret = reg_write(client, RJ54N1_RESIZE_CONTROL,
806 RESIZE_HOLD_SEL | RESIZE_GO | 1);
807
808 if (ret < 0)
809 return ret;
810
811 /* Constant taken from manufacturer's example */
812 msleep(230);
813
814 ret = reg_write(client, RJ54N1_RESIZE_CONTROL, RESIZE_HOLD_SEL | 1);
815 if (ret < 0)
816 return ret;
817
818 *in_w = (output_w * resize + 512) / 1024;
819 *in_h = (output_h * resize + 512) / 1024;
820 *out_w = output_w;
821 *out_h = output_h;
822
823 dev_dbg(&client->dev, "Scaled for %dx%d : %u = %ux%u, skip %u\n",
824 *in_w, *in_h, resize, output_w, output_h, skip);
825
826 return resize;
827 }
828
829 static int rj54n1_set_clock(struct i2c_client *client)
830 {
831 struct rj54n1 *rj54n1 = to_rj54n1(client);
832 int ret;
833
834 /* Enable external clock */
835 ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK | SOFT_STDBY);
836 /* Leave stand-by. Note: use this when implementing suspend / resume */
837 if (!ret)
838 ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK);
839
840 if (!ret)
841 ret = reg_write(client, RJ54N1_PLL_L, PLL_L);
842 if (!ret)
843 ret = reg_write(client, RJ54N1_PLL_N, PLL_N);
844
845 /* TGCLK dividers */
846 if (!ret)
847 ret = reg_write(client, RJ54N1_RATIO_TG,
848 rj54n1->clk_div.ratio_tg);
849 if (!ret)
850 ret = reg_write(client, RJ54N1_RATIO_T,
851 rj54n1->clk_div.ratio_t);
852 if (!ret)
853 ret = reg_write(client, RJ54N1_RATIO_R,
854 rj54n1->clk_div.ratio_r);
855
856 /* Enable TGCLK & RAMP */
857 if (!ret)
858 ret = reg_write(client, RJ54N1_RAMP_TGCLK_EN, 3);
859
860 /* Disable clock output */
861 if (!ret)
862 ret = reg_write(client, RJ54N1_OCLK_DSP, 0);
863
864 /* Set divisors */
865 if (!ret)
866 ret = reg_write(client, RJ54N1_RATIO_OP,
867 rj54n1->clk_div.ratio_op);
868 if (!ret)
869 ret = reg_write(client, RJ54N1_RATIO_O,
870 rj54n1->clk_div.ratio_o);
871
872 /* Enable OCLK */
873 if (!ret)
874 ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1);
875
876 /* Use PLL for Timing Generator, write 2 to reserved bits */
877 if (!ret)
878 ret = reg_write(client, RJ54N1_TG_BYPASS, 2);
879
880 /* Take sensor out of reset */
881 if (!ret)
882 ret = reg_write(client, RJ54N1_RESET_STANDBY,
883 E_EXCLK | SEN_RSTX);
884 /* Enable PLL */
885 if (!ret)
886 ret = reg_write(client, RJ54N1_PLL_EN, 1);
887
888 /* Wait for PLL to stabilise */
889 msleep(10);
890
891 /* Enable clock to frequency divider */
892 if (!ret)
893 ret = reg_write(client, RJ54N1_CLK_RST, 1);
894
895 if (!ret)
896 ret = reg_read(client, RJ54N1_CLK_RST);
897 if (ret != 1) {
898 dev_err(&client->dev,
899 "Resetting RJ54N1CB0C clock failed: %d!\n", ret);
900 return -EIO;
901 }
902
903 /* Start the PLL */
904 ret = reg_set(client, RJ54N1_OCLK_DSP, 1, 1);
905
906 /* Enable OCLK */
907 if (!ret)
908 ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1);
909
910 return ret;
911 }
912
913 static int rj54n1_reg_init(struct i2c_client *client)
914 {
915 struct rj54n1 *rj54n1 = to_rj54n1(client);
916 int ret = rj54n1_set_clock(client);
917
918 if (!ret)
919 ret = reg_write_multiple(client, bank_7, ARRAY_SIZE(bank_7));
920 if (!ret)
921 ret = reg_write_multiple(client, bank_10, ARRAY_SIZE(bank_10));
922
923 /* Set binning divisors */
924 if (!ret)
925 ret = reg_write(client, RJ54N1_SCALE_1_2_LEV, 3 | (7 << 4));
926 if (!ret)
927 ret = reg_write(client, RJ54N1_SCALE_4_LEV, 0xf);
928
929 /* Switch to fixed resize mode */
930 if (!ret)
931 ret = reg_write(client, RJ54N1_RESIZE_CONTROL,
932 RESIZE_HOLD_SEL | 1);
933
934 /* Set gain */
935 if (!ret)
936 ret = reg_write(client, RJ54N1_Y_GAIN, 0x84);
937
938 /*
939 * Mirror the image back: default is upside down and left-to-right...
940 * Set manual preview / still shot switching
941 */
942 if (!ret)
943 ret = reg_write(client, RJ54N1_MIRROR_STILL_MODE, 0x27);
944
945 if (!ret)
946 ret = reg_write_multiple(client, bank_4, ARRAY_SIZE(bank_4));
947
948 /* Auto exposure area */
949 if (!ret)
950 ret = reg_write(client, RJ54N1_EXPOSURE_CONTROL, 0x80);
951 /* Check current auto WB config */
952 if (!ret)
953 ret = reg_read(client, RJ54N1_WB_SEL_WEIGHT_I);
954 if (ret >= 0) {
955 rj54n1->auto_wb = ret & 0x80;
956 ret = reg_write_multiple(client, bank_5, ARRAY_SIZE(bank_5));
957 }
958 if (!ret)
959 ret = reg_write_multiple(client, bank_8, ARRAY_SIZE(bank_8));
960
961 if (!ret)
962 ret = reg_write(client, RJ54N1_RESET_STANDBY,
963 E_EXCLK | DSP_RSTX | SEN_RSTX);
964
965 /* Commit init */
966 if (!ret)
967 ret = rj54n1_commit(client);
968
969 /* Take DSP, TG, sensor out of reset */
970 if (!ret)
971 ret = reg_write(client, RJ54N1_RESET_STANDBY,
972 E_EXCLK | DSP_RSTX | TG_RSTX | SEN_RSTX);
973
974 /* Start register update? Same register as 0x?FE in many bank_* sets */
975 if (!ret)
976 ret = reg_write(client, RJ54N1_FWFLG, 2);
977
978 /* Constant taken from manufacturer's example */
979 msleep(700);
980
981 return ret;
982 }
983
984 static int rj54n1_try_fmt(struct v4l2_subdev *sd,
985 struct v4l2_mbus_framefmt *mf)
986 {
987 struct i2c_client *client = v4l2_get_subdevdata(sd);
988 struct rj54n1 *rj54n1 = to_rj54n1(client);
989 const struct rj54n1_datafmt *fmt;
990 int align = mf->code == V4L2_MBUS_FMT_SBGGR10_1X10 ||
991 mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE ||
992 mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE ||
993 mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE ||
994 mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE;
995
996 dev_dbg(&client->dev, "%s: code = %d, width = %u, height = %u\n",
997 __func__, mf->code, mf->width, mf->height);
998
999 fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts,
1000 ARRAY_SIZE(rj54n1_colour_fmts));
1001 if (!fmt) {
1002 fmt = rj54n1->fmt;
1003 mf->code = fmt->code;
1004 }
1005
1006 mf->field = V4L2_FIELD_NONE;
1007 mf->colorspace = fmt->colorspace;
1008
1009 v4l_bound_align_image(&mf->width, 112, RJ54N1_MAX_WIDTH, align,
1010 &mf->height, 84, RJ54N1_MAX_HEIGHT, align, 0);
1011
1012 return 0;
1013 }
1014
1015 static int rj54n1_s_fmt(struct v4l2_subdev *sd,
1016 struct v4l2_mbus_framefmt *mf)
1017 {
1018 struct i2c_client *client = v4l2_get_subdevdata(sd);
1019 struct rj54n1 *rj54n1 = to_rj54n1(client);
1020 const struct rj54n1_datafmt *fmt;
1021 int output_w, output_h, max_w, max_h,
1022 input_w = rj54n1->rect.width, input_h = rj54n1->rect.height;
1023 int ret;
1024
1025 /*
1026 * The host driver can call us without .try_fmt(), so, we have to take
1027 * care ourseleves
1028 */
1029 rj54n1_try_fmt(sd, mf);
1030
1031 /*
1032 * Verify if the sensor has just been powered on. TODO: replace this
1033 * with proper PM, when a suitable API is available.
1034 */
1035 ret = reg_read(client, RJ54N1_RESET_STANDBY);
1036 if (ret < 0)
1037 return ret;
1038
1039 if (!(ret & E_EXCLK)) {
1040 ret = rj54n1_reg_init(client);
1041 if (ret < 0)
1042 return ret;
1043 }
1044
1045 dev_dbg(&client->dev, "%s: code = %d, width = %u, height = %u\n",
1046 __func__, mf->code, mf->width, mf->height);
1047
1048 /* RA_SEL_UL is only relevant for raw modes, ignored otherwise. */
1049 switch (mf->code) {
1050 case V4L2_MBUS_FMT_YUYV8_2X8:
1051 ret = reg_write(client, RJ54N1_OUT_SEL, 0);
1052 if (!ret)
1053 ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1054 break;
1055 case V4L2_MBUS_FMT_YVYU8_2X8:
1056 ret = reg_write(client, RJ54N1_OUT_SEL, 0);
1057 if (!ret)
1058 ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1059 break;
1060 case V4L2_MBUS_FMT_RGB565_2X8_LE:
1061 ret = reg_write(client, RJ54N1_OUT_SEL, 0x11);
1062 if (!ret)
1063 ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1064 break;
1065 case V4L2_MBUS_FMT_RGB565_2X8_BE:
1066 ret = reg_write(client, RJ54N1_OUT_SEL, 0x11);
1067 if (!ret)
1068 ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1069 break;
1070 case V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE:
1071 ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1072 if (!ret)
1073 ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1074 if (!ret)
1075 ret = reg_write(client, RJ54N1_RA_SEL_UL, 0);
1076 break;
1077 case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
1078 ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1079 if (!ret)
1080 ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1081 if (!ret)
1082 ret = reg_write(client, RJ54N1_RA_SEL_UL, 8);
1083 break;
1084 case V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE:
1085 ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1086 if (!ret)
1087 ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1088 if (!ret)
1089 ret = reg_write(client, RJ54N1_RA_SEL_UL, 0);
1090 break;
1091 case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE:
1092 ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1093 if (!ret)
1094 ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1095 if (!ret)
1096 ret = reg_write(client, RJ54N1_RA_SEL_UL, 8);
1097 break;
1098 case V4L2_MBUS_FMT_SBGGR10_1X10:
1099 ret = reg_write(client, RJ54N1_OUT_SEL, 5);
1100 break;
1101 default:
1102 ret = -EINVAL;
1103 }
1104
1105 /* Special case: a raw mode with 10 bits of data per clock tick */
1106 if (!ret)
1107 ret = reg_set(client, RJ54N1_OCLK_SEL_EN,
1108 (mf->code == V4L2_MBUS_FMT_SBGGR10_1X10) << 1, 2);
1109
1110 if (ret < 0)
1111 return ret;
1112
1113 /* Supported scales 1:1 >= scale > 1:16 */
1114 max_w = mf->width * (16 * 1024 - 1) / 1024;
1115 if (input_w > max_w)
1116 input_w = max_w;
1117 max_h = mf->height * (16 * 1024 - 1) / 1024;
1118 if (input_h > max_h)
1119 input_h = max_h;
1120
1121 output_w = mf->width;
1122 output_h = mf->height;
1123
1124 ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h);
1125 if (ret < 0)
1126 return ret;
1127
1128 fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts,
1129 ARRAY_SIZE(rj54n1_colour_fmts));
1130
1131 rj54n1->fmt = fmt;
1132 rj54n1->resize = ret;
1133 rj54n1->rect.width = input_w;
1134 rj54n1->rect.height = input_h;
1135 rj54n1->width = output_w;
1136 rj54n1->height = output_h;
1137
1138 mf->width = output_w;
1139 mf->height = output_h;
1140 mf->field = V4L2_FIELD_NONE;
1141 mf->colorspace = fmt->colorspace;
1142
1143 return 0;
1144 }
1145
1146 static int rj54n1_g_chip_ident(struct v4l2_subdev *sd,
1147 struct v4l2_dbg_chip_ident *id)
1148 {
1149 struct i2c_client *client = v4l2_get_subdevdata(sd);
1150
1151 if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR)
1152 return -EINVAL;
1153
1154 if (id->match.addr != client->addr)
1155 return -ENODEV;
1156
1157 id->ident = V4L2_IDENT_RJ54N1CB0C;
1158 id->revision = 0;
1159
1160 return 0;
1161 }
1162
1163 #ifdef CONFIG_VIDEO_ADV_DEBUG
1164 static int rj54n1_g_register(struct v4l2_subdev *sd,
1165 struct v4l2_dbg_register *reg)
1166 {
1167 struct i2c_client *client = v4l2_get_subdevdata(sd);
1168
1169 if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR ||
1170 reg->reg < 0x400 || reg->reg > 0x1fff)
1171 /* Registers > 0x0800 are only available from Sharp support */
1172 return -EINVAL;
1173
1174 if (reg->match.addr != client->addr)
1175 return -ENODEV;
1176
1177 reg->size = 1;
1178 reg->val = reg_read(client, reg->reg);
1179
1180 if (reg->val > 0xff)
1181 return -EIO;
1182
1183 return 0;
1184 }
1185
1186 static int rj54n1_s_register(struct v4l2_subdev *sd,
1187 struct v4l2_dbg_register *reg)
1188 {
1189 struct i2c_client *client = v4l2_get_subdevdata(sd);
1190
1191 if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR ||
1192 reg->reg < 0x400 || reg->reg > 0x1fff)
1193 /* Registers >= 0x0800 are only available from Sharp support */
1194 return -EINVAL;
1195
1196 if (reg->match.addr != client->addr)
1197 return -ENODEV;
1198
1199 if (reg_write(client, reg->reg, reg->val) < 0)
1200 return -EIO;
1201
1202 return 0;
1203 }
1204 #endif
1205
1206 static const struct v4l2_queryctrl rj54n1_controls[] = {
1207 {
1208 .id = V4L2_CID_VFLIP,
1209 .type = V4L2_CTRL_TYPE_BOOLEAN,
1210 .name = "Flip Vertically",
1211 .minimum = 0,
1212 .maximum = 1,
1213 .step = 1,
1214 .default_value = 0,
1215 }, {
1216 .id = V4L2_CID_HFLIP,
1217 .type = V4L2_CTRL_TYPE_BOOLEAN,
1218 .name = "Flip Horizontally",
1219 .minimum = 0,
1220 .maximum = 1,
1221 .step = 1,
1222 .default_value = 0,
1223 }, {
1224 .id = V4L2_CID_GAIN,
1225 .type = V4L2_CTRL_TYPE_INTEGER,
1226 .name = "Gain",
1227 .minimum = 0,
1228 .maximum = 127,
1229 .step = 1,
1230 .default_value = 66,
1231 .flags = V4L2_CTRL_FLAG_SLIDER,
1232 }, {
1233 .id = V4L2_CID_AUTO_WHITE_BALANCE,
1234 .type = V4L2_CTRL_TYPE_BOOLEAN,
1235 .name = "Auto white balance",
1236 .minimum = 0,
1237 .maximum = 1,
1238 .step = 1,
1239 .default_value = 1,
1240 },
1241 };
1242
1243 static struct soc_camera_ops rj54n1_ops = {
1244 .set_bus_param = rj54n1_set_bus_param,
1245 .query_bus_param = rj54n1_query_bus_param,
1246 .controls = rj54n1_controls,
1247 .num_controls = ARRAY_SIZE(rj54n1_controls),
1248 };
1249
1250 static int rj54n1_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
1251 {
1252 struct i2c_client *client = v4l2_get_subdevdata(sd);
1253 struct rj54n1 *rj54n1 = to_rj54n1(client);
1254 int data;
1255
1256 switch (ctrl->id) {
1257 case V4L2_CID_VFLIP:
1258 data = reg_read(client, RJ54N1_MIRROR_STILL_MODE);
1259 if (data < 0)
1260 return -EIO;
1261 ctrl->value = !(data & 1);
1262 break;
1263 case V4L2_CID_HFLIP:
1264 data = reg_read(client, RJ54N1_MIRROR_STILL_MODE);
1265 if (data < 0)
1266 return -EIO;
1267 ctrl->value = !(data & 2);
1268 break;
1269 case V4L2_CID_GAIN:
1270 data = reg_read(client, RJ54N1_Y_GAIN);
1271 if (data < 0)
1272 return -EIO;
1273
1274 ctrl->value = data / 2;
1275 break;
1276 case V4L2_CID_AUTO_WHITE_BALANCE:
1277 ctrl->value = rj54n1->auto_wb;
1278 break;
1279 }
1280
1281 return 0;
1282 }
1283
1284 static int rj54n1_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
1285 {
1286 int data;
1287 struct i2c_client *client = v4l2_get_subdevdata(sd);
1288 struct rj54n1 *rj54n1 = to_rj54n1(client);
1289 const struct v4l2_queryctrl *qctrl;
1290
1291 qctrl = soc_camera_find_qctrl(&rj54n1_ops, ctrl->id);
1292 if (!qctrl)
1293 return -EINVAL;
1294
1295 switch (ctrl->id) {
1296 case V4L2_CID_VFLIP:
1297 if (ctrl->value)
1298 data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 1);
1299 else
1300 data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 1, 1);
1301 if (data < 0)
1302 return -EIO;
1303 break;
1304 case V4L2_CID_HFLIP:
1305 if (ctrl->value)
1306 data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 2);
1307 else
1308 data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 2, 2);
1309 if (data < 0)
1310 return -EIO;
1311 break;
1312 case V4L2_CID_GAIN:
1313 if (ctrl->value > qctrl->maximum ||
1314 ctrl->value < qctrl->minimum)
1315 return -EINVAL;
1316 else if (reg_write(client, RJ54N1_Y_GAIN, ctrl->value * 2) < 0)
1317 return -EIO;
1318 break;
1319 case V4L2_CID_AUTO_WHITE_BALANCE:
1320 /* Auto WB area - whole image */
1321 if (reg_set(client, RJ54N1_WB_SEL_WEIGHT_I, ctrl->value << 7,
1322 0x80) < 0)
1323 return -EIO;
1324 rj54n1->auto_wb = ctrl->value;
1325 break;
1326 }
1327
1328 return 0;
1329 }
1330
1331 static struct v4l2_subdev_core_ops rj54n1_subdev_core_ops = {
1332 .g_ctrl = rj54n1_g_ctrl,
1333 .s_ctrl = rj54n1_s_ctrl,
1334 .g_chip_ident = rj54n1_g_chip_ident,
1335 #ifdef CONFIG_VIDEO_ADV_DEBUG
1336 .g_register = rj54n1_g_register,
1337 .s_register = rj54n1_s_register,
1338 #endif
1339 };
1340
1341 static struct v4l2_subdev_video_ops rj54n1_subdev_video_ops = {
1342 .s_stream = rj54n1_s_stream,
1343 .s_mbus_fmt = rj54n1_s_fmt,
1344 .g_mbus_fmt = rj54n1_g_fmt,
1345 .try_mbus_fmt = rj54n1_try_fmt,
1346 .enum_mbus_fmt = rj54n1_enum_fmt,
1347 .g_crop = rj54n1_g_crop,
1348 .s_crop = rj54n1_s_crop,
1349 .cropcap = rj54n1_cropcap,
1350 };
1351
1352 static struct v4l2_subdev_ops rj54n1_subdev_ops = {
1353 .core = &rj54n1_subdev_core_ops,
1354 .video = &rj54n1_subdev_video_ops,
1355 };
1356
1357 /*
1358 * Interface active, can use i2c. If it fails, it can indeed mean, that
1359 * this wasn't our capture interface, so, we wait for the right one
1360 */
1361 static int rj54n1_video_probe(struct soc_camera_device *icd,
1362 struct i2c_client *client,
1363 struct rj54n1_pdata *priv)
1364 {
1365 int data1, data2;
1366 int ret;
1367
1368 /* We must have a parent by now. And it cannot be a wrong one. */
1369 BUG_ON(!icd->parent ||
1370 to_soc_camera_host(icd->parent)->nr != icd->iface);
1371
1372 /* Read out the chip version register */
1373 data1 = reg_read(client, RJ54N1_DEV_CODE);
1374 data2 = reg_read(client, RJ54N1_DEV_CODE2);
1375
1376 if (data1 != 0x51 || data2 != 0x10) {
1377 ret = -ENODEV;
1378 dev_info(&client->dev, "No RJ54N1CB0C found, read 0x%x:0x%x\n",
1379 data1, data2);
1380 goto ei2c;
1381 }
1382
1383 /* Configure IOCTL polarity from the platform data: 0 or 1 << 7. */
1384 ret = reg_write(client, RJ54N1_IOC, priv->ioctl_high << 7);
1385 if (ret < 0)
1386 goto ei2c;
1387
1388 dev_info(&client->dev, "Detected a RJ54N1CB0C chip ID 0x%x:0x%x\n",
1389 data1, data2);
1390
1391 ei2c:
1392 return ret;
1393 }
1394
1395 static int rj54n1_probe(struct i2c_client *client,
1396 const struct i2c_device_id *did)
1397 {
1398 struct rj54n1 *rj54n1;
1399 struct soc_camera_device *icd = client->dev.platform_data;
1400 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
1401 struct soc_camera_link *icl;
1402 struct rj54n1_pdata *rj54n1_priv;
1403 int ret;
1404
1405 if (!icd) {
1406 dev_err(&client->dev, "RJ54N1CB0C: missing soc-camera data!\n");
1407 return -EINVAL;
1408 }
1409
1410 icl = to_soc_camera_link(icd);
1411 if (!icl || !icl->priv) {
1412 dev_err(&client->dev, "RJ54N1CB0C: missing platform data!\n");
1413 return -EINVAL;
1414 }
1415
1416 rj54n1_priv = icl->priv;
1417
1418 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1419 dev_warn(&adapter->dev,
1420 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE\n");
1421 return -EIO;
1422 }
1423
1424 rj54n1 = kzalloc(sizeof(struct rj54n1), GFP_KERNEL);
1425 if (!rj54n1)
1426 return -ENOMEM;
1427
1428 v4l2_i2c_subdev_init(&rj54n1->subdev, client, &rj54n1_subdev_ops);
1429
1430 icd->ops = &rj54n1_ops;
1431
1432 rj54n1->clk_div = clk_div;
1433 rj54n1->rect.left = RJ54N1_COLUMN_SKIP;
1434 rj54n1->rect.top = RJ54N1_ROW_SKIP;
1435 rj54n1->rect.width = RJ54N1_MAX_WIDTH;
1436 rj54n1->rect.height = RJ54N1_MAX_HEIGHT;
1437 rj54n1->width = RJ54N1_MAX_WIDTH;
1438 rj54n1->height = RJ54N1_MAX_HEIGHT;
1439 rj54n1->fmt = &rj54n1_colour_fmts[0];
1440 rj54n1->resize = 1024;
1441 rj54n1->tgclk_mhz = (rj54n1_priv->mclk_freq / PLL_L * PLL_N) /
1442 (clk_div.ratio_tg + 1) / (clk_div.ratio_t + 1);
1443
1444 ret = rj54n1_video_probe(icd, client, rj54n1_priv);
1445 if (ret < 0) {
1446 icd->ops = NULL;
1447 kfree(rj54n1);
1448 return ret;
1449 }
1450
1451 return ret;
1452 }
1453
1454 static int rj54n1_remove(struct i2c_client *client)
1455 {
1456 struct rj54n1 *rj54n1 = to_rj54n1(client);
1457 struct soc_camera_device *icd = client->dev.platform_data;
1458 struct soc_camera_link *icl = to_soc_camera_link(icd);
1459
1460 icd->ops = NULL;
1461 if (icl->free_bus)
1462 icl->free_bus(icl);
1463 kfree(rj54n1);
1464
1465 return 0;
1466 }
1467
1468 static const struct i2c_device_id rj54n1_id[] = {
1469 { "rj54n1cb0c", 0 },
1470 { }
1471 };
1472 MODULE_DEVICE_TABLE(i2c, rj54n1_id);
1473
1474 static struct i2c_driver rj54n1_i2c_driver = {
1475 .driver = {
1476 .name = "rj54n1cb0c",
1477 },
1478 .probe = rj54n1_probe,
1479 .remove = rj54n1_remove,
1480 .id_table = rj54n1_id,
1481 };
1482
1483 static int __init rj54n1_mod_init(void)
1484 {
1485 return i2c_add_driver(&rj54n1_i2c_driver);
1486 }
1487
1488 static void __exit rj54n1_mod_exit(void)
1489 {
1490 i2c_del_driver(&rj54n1_i2c_driver);
1491 }
1492
1493 module_init(rj54n1_mod_init);
1494 module_exit(rj54n1_mod_exit);
1495
1496 MODULE_DESCRIPTION("Sharp RJ54N1CB0C Camera driver");
1497 MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
1498 MODULE_LICENSE("GPL v2");
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