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Add linux-next specific files for 20110831
[linux-2.6/next.git] / drivers / mmc / host / sdhci-esdhc-imx.c
blob4557aa1567a596b417136c1e19f4ce81124da04d
1 /*
2 * Freescale eSDHC i.MX controller driver for the platform bus.
3 *
4 * derived from the OF-version.
5 *
6 * Copyright (c) 2010 Pengutronix e.K.
7 * Author: Wolfram Sang <w.sang@pengutronix.de>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
12 */
13
14 #include <linux/io.h>
15 #include <linux/delay.h>
16 #include <linux/err.h>
17 #include <linux/clk.h>
18 #include <linux/gpio.h>
19 #include <linux/module.h>
20 #include <linux/slab.h>
21 #include <linux/mmc/host.h>
22 #include <linux/mmc/mmc.h>
23 #include <linux/mmc/sdio.h>
24 #include <linux/of.h>
25 #include <linux/of_device.h>
26 #include <linux/of_gpio.h>
27 #include <mach/esdhc.h>
28 #include "sdhci-pltfm.h"
29 #include "sdhci-esdhc.h"
30
31 #define SDHCI_CTRL_D3CD 0x08
32 /* VENDOR SPEC register */
33 #define SDHCI_VENDOR_SPEC 0xC0
34 #define SDHCI_VENDOR_SPEC_SDIO_QUIRK 0x00000002
35
36 /*
37 * There is an INT DMA ERR mis-match between eSDHC and STD SDHC SPEC:
38 * Bit25 is used in STD SPEC, and is reserved in fsl eSDHC design,
39 * but bit28 is used as the INT DMA ERR in fsl eSDHC design.
40 * Define this macro DMA error INT for fsl eSDHC
41 */
42 #define SDHCI_INT_VENDOR_SPEC_DMA_ERR 0x10000000
43
44 /*
45 * The CMDTYPE of the CMD register (offset 0xE) should be set to
46 * "11" when the STOP CMD12 is issued on imx53 to abort one
47 * open ended multi-blk IO. Otherwise the TC INT wouldn't
48 * be generated.
49 * In exact block transfer, the controller doesn't complete the
50 * operations automatically as required at the end of the
51 * transfer and remains on hold if the abort command is not sent.
52 * As a result, the TC flag is not asserted and SW received timeout
53 * exeception. Bit1 of Vendor Spec registor is used to fix it.
54 */
55 #define ESDHC_FLAG_MULTIBLK_NO_INT (1 << 1)
56
57 enum imx_esdhc_type {
58 IMX25_ESDHC,
59 IMX35_ESDHC,
60 IMX51_ESDHC,
61 IMX53_ESDHC,
62 };
63
64 struct pltfm_imx_data {
65 int flags;
66 u32 scratchpad;
67 enum imx_esdhc_type devtype;
68 struct esdhc_platform_data boarddata;
69 };
70
71 static struct platform_device_id imx_esdhc_devtype[] = {
72 {
73 .name = "sdhci-esdhc-imx25",
74 .driver_data = IMX25_ESDHC,
75 }, {
76 .name = "sdhci-esdhc-imx35",
77 .driver_data = IMX35_ESDHC,
78 }, {
79 .name = "sdhci-esdhc-imx51",
80 .driver_data = IMX51_ESDHC,
81 }, {
82 .name = "sdhci-esdhc-imx53",
83 .driver_data = IMX53_ESDHC,
84 }, {
85 /* sentinel */
86 }
87 };
88 MODULE_DEVICE_TABLE(platform, imx_esdhc_devtype);
89
90 static const struct of_device_id imx_esdhc_dt_ids[] = {
91 { .compatible = "fsl,imx25-esdhc", .data = &imx_esdhc_devtype[IMX25_ESDHC], },
92 { .compatible = "fsl,imx35-esdhc", .data = &imx_esdhc_devtype[IMX35_ESDHC], },
93 { .compatible = "fsl,imx51-esdhc", .data = &imx_esdhc_devtype[IMX51_ESDHC], },
94 { .compatible = "fsl,imx53-esdhc", .data = &imx_esdhc_devtype[IMX53_ESDHC], },
95 { /* sentinel */ }
96 };
97 MODULE_DEVICE_TABLE(of, imx_esdhc_dt_ids);
98
99 static inline int is_imx25_esdhc(struct pltfm_imx_data *data)
100 {
101 return data->devtype == IMX25_ESDHC;
102 }
103
104 static inline int is_imx35_esdhc(struct pltfm_imx_data *data)
105 {
106 return data->devtype == IMX35_ESDHC;
107 }
108
109 static inline int is_imx51_esdhc(struct pltfm_imx_data *data)
110 {
111 return data->devtype == IMX51_ESDHC;
112 }
113
114 static inline int is_imx53_esdhc(struct pltfm_imx_data *data)
115 {
116 return data->devtype == IMX53_ESDHC;
117 }
118
119 static inline void esdhc_clrset_le(struct sdhci_host *host, u32 mask, u32 val, int reg)
120 {
121 void __iomem *base = host->ioaddr + (reg & ~0x3);
122 u32 shift = (reg & 0x3) * 8;
123
124 writel(((readl(base) & ~(mask << shift)) | (val << shift)), base);
125 }
126
127 static u32 esdhc_readl_le(struct sdhci_host *host, int reg)
128 {
129 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
130 struct pltfm_imx_data *imx_data = pltfm_host->priv;
131 struct esdhc_platform_data *boarddata = &imx_data->boarddata;
132
133 /* fake CARD_PRESENT flag */
134 u32 val = readl(host->ioaddr + reg);
135
136 if (unlikely((reg == SDHCI_PRESENT_STATE)
137 && gpio_is_valid(boarddata->cd_gpio))) {
138 if (gpio_get_value(boarddata->cd_gpio))
139 /* no card, if a valid gpio says so... */
140 val &= ~SDHCI_CARD_PRESENT;
141 else
142 /* ... in all other cases assume card is present */
143 val |= SDHCI_CARD_PRESENT;
144 }
145
146 if (unlikely(reg == SDHCI_CAPABILITIES)) {
147 /* In FSL esdhc IC module, only bit20 is used to indicate the
148 * ADMA2 capability of esdhc, but this bit is messed up on
149 * some SOCs (e.g. on MX25, MX35 this bit is set, but they
150 * don't actually support ADMA2). So set the BROKEN_ADMA
151 * uirk on MX25/35 platforms.
152 */
153
154 if (val & SDHCI_CAN_DO_ADMA1) {
155 val &= ~SDHCI_CAN_DO_ADMA1;
156 val |= SDHCI_CAN_DO_ADMA2;
157 }
158 }
159
160 if (unlikely(reg == SDHCI_INT_STATUS)) {
161 if (val & SDHCI_INT_VENDOR_SPEC_DMA_ERR) {
162 val &= ~SDHCI_INT_VENDOR_SPEC_DMA_ERR;
163 val |= SDHCI_INT_ADMA_ERROR;
164 }
165 }
166
167 return val;
168 }
169
170 static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)
171 {
172 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
173 struct pltfm_imx_data *imx_data = pltfm_host->priv;
174 struct esdhc_platform_data *boarddata = &imx_data->boarddata;
175 u32 data;
176
177 if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)) {
178 if (boarddata->cd_type == ESDHC_CD_GPIO)
179 /*
180 * These interrupts won't work with a custom
181 * card_detect gpio (only applied to mx25/35)
182 */
183 val &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT);
184
185 if (val & SDHCI_INT_CARD_INT) {
186 /*
187 * Clear and then set D3CD bit to avoid missing the
188 * card interrupt. This is a eSDHC controller problem
189 * so we need to apply the following workaround: clear
190 * and set D3CD bit will make eSDHC re-sample the card
191 * interrupt. In case a card interrupt was lost,
192 * re-sample it by the following steps.
193 */
194 data = readl(host->ioaddr + SDHCI_HOST_CONTROL);
195 data &= ~SDHCI_CTRL_D3CD;
196 writel(data, host->ioaddr + SDHCI_HOST_CONTROL);
197 data |= SDHCI_CTRL_D3CD;
198 writel(data, host->ioaddr + SDHCI_HOST_CONTROL);
199 }
200 }
201
202 if (unlikely((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)
203 && (reg == SDHCI_INT_STATUS)
204 && (val & SDHCI_INT_DATA_END))) {
205 u32 v;
206 v = readl(host->ioaddr + SDHCI_VENDOR_SPEC);
207 v &= ~SDHCI_VENDOR_SPEC_SDIO_QUIRK;
208 writel(v, host->ioaddr + SDHCI_VENDOR_SPEC);
209 }
210
211 if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)) {
212 if (val & SDHCI_INT_ADMA_ERROR) {
213 val &= ~SDHCI_INT_ADMA_ERROR;
214 val |= SDHCI_INT_VENDOR_SPEC_DMA_ERR;
215 }
216 }
217
218 writel(val, host->ioaddr + reg);
219 }
220
221 static u16 esdhc_readw_le(struct sdhci_host *host, int reg)
222 {
223 if (unlikely(reg == SDHCI_HOST_VERSION))
224 reg ^= 2;
225
226 return readw(host->ioaddr + reg);
227 }
228
229 static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
230 {
231 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
232 struct pltfm_imx_data *imx_data = pltfm_host->priv;
233
234 switch (reg) {
235 case SDHCI_TRANSFER_MODE:
236 /*
237 * Postpone this write, we must do it together with a
238 * command write that is down below.
239 */
240 if ((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)
241 && (host->cmd->opcode == SD_IO_RW_EXTENDED)
242 && (host->cmd->data->blocks > 1)
243 && (host->cmd->data->flags & MMC_DATA_READ)) {
244 u32 v;
245 v = readl(host->ioaddr + SDHCI_VENDOR_SPEC);
246 v |= SDHCI_VENDOR_SPEC_SDIO_QUIRK;
247 writel(v, host->ioaddr + SDHCI_VENDOR_SPEC);
248 }
249 imx_data->scratchpad = val;
250 return;
251 case SDHCI_COMMAND:
252 if ((host->cmd->opcode == MMC_STOP_TRANSMISSION)
253 && (imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT))
254 val |= SDHCI_CMD_ABORTCMD;
255 writel(val << 16 | imx_data->scratchpad,
256 host->ioaddr + SDHCI_TRANSFER_MODE);
257 return;
258 case SDHCI_BLOCK_SIZE:
259 val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
260 break;
261 }
262 esdhc_clrset_le(host, 0xffff, val, reg);
263 }
264
265 static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg)
266 {
267 u32 new_val;
268
269 switch (reg) {
270 case SDHCI_POWER_CONTROL:
271 /*
272 * FSL put some DMA bits here
273 * If your board has a regulator, code should be here
274 */
275 return;
276 case SDHCI_HOST_CONTROL:
277 /* FSL messed up here, so we can just keep those three */
278 new_val = val & (SDHCI_CTRL_LED | \
279 SDHCI_CTRL_4BITBUS | \
280 SDHCI_CTRL_D3CD);
281 /* ensure the endianess */
282 new_val |= ESDHC_HOST_CONTROL_LE;
283 /* DMA mode bits are shifted */
284 new_val |= (val & SDHCI_CTRL_DMA_MASK) << 5;
285
286 esdhc_clrset_le(host, 0xffff, new_val, reg);
287 return;
288 }
289 esdhc_clrset_le(host, 0xff, val, reg);
290
291 /*
292 * The esdhc has a design violation to SDHC spec which tells
293 * that software reset should not affect card detection circuit.
294 * But esdhc clears its SYSCTL register bits [0..2] during the
295 * software reset. This will stop those clocks that card detection
296 * circuit relies on. To work around it, we turn the clocks on back
297 * to keep card detection circuit functional.
298 */
299 if ((reg == SDHCI_SOFTWARE_RESET) && (val & 1))
300 esdhc_clrset_le(host, 0x7, 0x7, ESDHC_SYSTEM_CONTROL);
301 }
302
303 static unsigned int esdhc_pltfm_get_max_clock(struct sdhci_host *host)
304 {
305 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
306
307 return clk_get_rate(pltfm_host->clk);
308 }
309
310 static unsigned int esdhc_pltfm_get_min_clock(struct sdhci_host *host)
311 {
312 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
313
314 return clk_get_rate(pltfm_host->clk) / 256 / 16;
315 }
316
317 static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host)
318 {
319 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
320 struct pltfm_imx_data *imx_data = pltfm_host->priv;
321 struct esdhc_platform_data *boarddata = &imx_data->boarddata;
322
323 switch (boarddata->wp_type) {
324 case ESDHC_WP_GPIO:
325 if (gpio_is_valid(boarddata->wp_gpio))
326 return gpio_get_value(boarddata->wp_gpio);
327 case ESDHC_WP_CONTROLLER:
328 return !(readl(host->ioaddr + SDHCI_PRESENT_STATE) &
329 SDHCI_WRITE_PROTECT);
330 case ESDHC_WP_NONE:
331 break;
332 }
333
334 return -ENOSYS;
335 }
336
337 static struct sdhci_ops sdhci_esdhc_ops = {
338 .read_l = esdhc_readl_le,
339 .read_w = esdhc_readw_le,
340 .write_l = esdhc_writel_le,
341 .write_w = esdhc_writew_le,
342 .write_b = esdhc_writeb_le,
343 .set_clock = esdhc_set_clock,
344 .get_max_clock = esdhc_pltfm_get_max_clock,
345 .get_min_clock = esdhc_pltfm_get_min_clock,
346 .get_ro = esdhc_pltfm_get_ro,
347 };
348
349 static struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = {
350 .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_NO_HISPD_BIT
351 | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
352 | SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC
353 | SDHCI_QUIRK_BROKEN_CARD_DETECTION,
354 .ops = &sdhci_esdhc_ops,
355 };
356
357 static irqreturn_t cd_irq(int irq, void *data)
358 {
359 struct sdhci_host *sdhost = (struct sdhci_host *)data;
360
361 tasklet_schedule(&sdhost->card_tasklet);
362 return IRQ_HANDLED;
363 };
364
365 #ifdef CONFIG_OF
366 static int __devinit
367 sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
368 struct esdhc_platform_data *boarddata)
369 {
370 struct device_node *np = pdev->dev.of_node;
371
372 if (!np)
373 return -ENODEV;
374
375 if (of_get_property(np, "fsl,card-wired", NULL))
376 boarddata->cd_type = ESDHC_CD_PERMANENT;
377
378 if (of_get_property(np, "fsl,cd-controller", NULL))
379 boarddata->cd_type = ESDHC_CD_CONTROLLER;
380
381 if (of_get_property(np, "fsl,wp-controller", NULL))
382 boarddata->wp_type = ESDHC_WP_CONTROLLER;
383
384 boarddata->cd_gpio = of_get_named_gpio(np, "cd-gpios", 0);
385 if (gpio_is_valid(boarddata->cd_gpio))
386 boarddata->cd_type = ESDHC_CD_GPIO;
387
388 boarddata->wp_gpio = of_get_named_gpio(np, "wp-gpios", 0);
389 if (gpio_is_valid(boarddata->wp_gpio))
390 boarddata->wp_type = ESDHC_WP_GPIO;
391
392 return 0;
393 }
394 #else
395 static inline int
396 sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
397 struct esdhc_platform_data *boarddata)
398 {
399 return -ENODEV;
400 }
401 #endif
402
403 static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev)
404 {
405 const struct of_device_id *of_id =
406 of_match_device(imx_esdhc_dt_ids, &pdev->dev);
407 struct sdhci_pltfm_host *pltfm_host;
408 struct sdhci_host *host;
409 struct esdhc_platform_data *boarddata;
410 struct clk *clk;
411 int err;
412 struct pltfm_imx_data *imx_data;
413
414 host = sdhci_pltfm_init(pdev, &sdhci_esdhc_imx_pdata);
415 if (IS_ERR(host))
416 return PTR_ERR(host);
417
418 pltfm_host = sdhci_priv(host);
419
420 imx_data = kzalloc(sizeof(struct pltfm_imx_data), GFP_KERNEL);
421 if (!imx_data) {
422 err = -ENOMEM;
423 goto err_imx_data;
424 }
425
426 if (of_id)
427 pdev->id_entry = of_id->data;
428 imx_data->devtype = pdev->id_entry->driver_data;
429 pltfm_host->priv = imx_data;
430
431 clk = clk_get(mmc_dev(host->mmc), NULL);
432 if (IS_ERR(clk)) {
433 dev_err(mmc_dev(host->mmc), "clk err\n");
434 err = PTR_ERR(clk);
435 goto err_clk_get;
436 }
437 clk_enable(clk);
438 pltfm_host->clk = clk;
439
440 if (!is_imx25_esdhc(imx_data))
441 host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
442
443 if (is_imx25_esdhc(imx_data) || is_imx35_esdhc(imx_data))
444 /* Fix errata ENGcm07207 present on i.MX25 and i.MX35 */
445 host->quirks |= SDHCI_QUIRK_NO_MULTIBLOCK
446 | SDHCI_QUIRK_BROKEN_ADMA;
447
448 if (is_imx53_esdhc(imx_data))
449 imx_data->flags |= ESDHC_FLAG_MULTIBLK_NO_INT;
450
451 boarddata = &imx_data->boarddata;
452 if (sdhci_esdhc_imx_probe_dt(pdev, boarddata) < 0) {
453 if (!host->mmc->parent->platform_data) {
454 dev_err(mmc_dev(host->mmc), "no board data!\n");
455 err = -EINVAL;
456 goto no_board_data;
457 }
458 imx_data->boarddata = *((struct esdhc_platform_data *)
459 host->mmc->parent->platform_data);
460 }
461
462 /* write_protect */
463 if (boarddata->wp_type == ESDHC_WP_GPIO) {
464 err = gpio_request_one(boarddata->wp_gpio, GPIOF_IN, "ESDHC_WP");
465 if (err) {
466 dev_warn(mmc_dev(host->mmc),
467 "no write-protect pin available!\n");
468 boarddata->wp_gpio = -EINVAL;
469 }
470 } else {
471 boarddata->wp_gpio = -EINVAL;
472 }
473
474 /* card_detect */
475 if (boarddata->cd_type != ESDHC_CD_GPIO)
476 boarddata->cd_gpio = -EINVAL;
477
478 switch (boarddata->cd_type) {
479 case ESDHC_CD_GPIO:
480 err = gpio_request_one(boarddata->cd_gpio, GPIOF_IN, "ESDHC_CD");
481 if (err) {
482 dev_err(mmc_dev(host->mmc),
483 "no card-detect pin available!\n");
484 goto no_card_detect_pin;
485 }
486
487 err = request_irq(gpio_to_irq(boarddata->cd_gpio), cd_irq,
488 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
489 mmc_hostname(host->mmc), host);
490 if (err) {
491 dev_err(mmc_dev(host->mmc), "request irq error\n");
492 goto no_card_detect_irq;
493 }
494 /* fall through */
495
496 case ESDHC_CD_CONTROLLER:
497 /* we have a working card_detect back */
498 host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
499 break;
500
501 case ESDHC_CD_PERMANENT:
502 host->mmc->caps = MMC_CAP_NONREMOVABLE;
503 break;
504
505 case ESDHC_CD_NONE:
506 break;
507 }
508
509 err = sdhci_add_host(host);
510 if (err)
511 goto err_add_host;
512
513 return 0;
514
515 err_add_host:
516 if (gpio_is_valid(boarddata->cd_gpio))
517 free_irq(gpio_to_irq(boarddata->cd_gpio), host);
518 no_card_detect_irq:
519 if (gpio_is_valid(boarddata->cd_gpio))
520 gpio_free(boarddata->cd_gpio);
521 if (gpio_is_valid(boarddata->wp_gpio))
522 gpio_free(boarddata->wp_gpio);
523 no_card_detect_pin:
524 no_board_data:
525 clk_disable(pltfm_host->clk);
526 clk_put(pltfm_host->clk);
527 err_clk_get:
528 kfree(imx_data);
529 err_imx_data:
530 sdhci_pltfm_free(pdev);
531 return err;
532 }
533
534 static int __devexit sdhci_esdhc_imx_remove(struct platform_device *pdev)
535 {
536 struct sdhci_host *host = platform_get_drvdata(pdev);
537 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
538 struct pltfm_imx_data *imx_data = pltfm_host->priv;
539 struct esdhc_platform_data *boarddata = &imx_data->boarddata;
540 int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);
541
542 sdhci_remove_host(host, dead);
543
544 if (gpio_is_valid(boarddata->wp_gpio))
545 gpio_free(boarddata->wp_gpio);
546
547 if (gpio_is_valid(boarddata->cd_gpio)) {
548 free_irq(gpio_to_irq(boarddata->cd_gpio), host);
549 gpio_free(boarddata->cd_gpio);
550 }
551
552 clk_disable(pltfm_host->clk);
553 clk_put(pltfm_host->clk);
554 kfree(imx_data);
555
556 sdhci_pltfm_free(pdev);
557
558 return 0;
559 }
560
561 static struct platform_driver sdhci_esdhc_imx_driver = {
562 .driver = {
563 .name = "sdhci-esdhc-imx",
564 .owner = THIS_MODULE,
565 .of_match_table = imx_esdhc_dt_ids,
566 },
567 .id_table = imx_esdhc_devtype,
568 .probe = sdhci_esdhc_imx_probe,
569 .remove = __devexit_p(sdhci_esdhc_imx_remove),
570 #ifdef CONFIG_PM
571 .suspend = sdhci_pltfm_suspend,
572 .resume = sdhci_pltfm_resume,
573 #endif
574 };
575
576 static int __init sdhci_esdhc_imx_init(void)
577 {
578 return platform_driver_register(&sdhci_esdhc_imx_driver);
579 }
580 module_init(sdhci_esdhc_imx_init);
581
582 static void __exit sdhci_esdhc_imx_exit(void)
583 {
584 platform_driver_unregister(&sdhci_esdhc_imx_driver);
585 }
586 module_exit(sdhci_esdhc_imx_exit);
587
588 MODULE_DESCRIPTION("SDHCI driver for Freescale i.MX eSDHC");
589 MODULE_AUTHOR("Wolfram Sang <w.sang@pengutronix.de>");
590 MODULE_LICENSE("GPL v2");
linux-next