2 * BIOS Flash chip on Intel 440GX board.
4 * Bugs this currently does not work under linuxBIOS.
7 #include <linux/module.h>
9 #include <linux/kernel.h>
10 #include <linux/init.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/map.h>
15 #define PIIXE_IOBASE_RESOURCE 11
17 #define WINDOW_ADDR 0xfff00000
18 #define WINDOW_SIZE 0x00100000
23 #define TRIBUF_PORT (IOBASE+0x37)
24 #define VPP_PORT (IOBASE+0x28)
26 static struct mtd_info
*mymtd
;
29 /* Is this really the vpp port? */
30 static void l440gx_set_vpp(struct map_info
*map
, int vpp
)
43 static struct map_info l440gx_map
= {
44 .name
= "L440GX BIOS",
46 .bankwidth
= BUSWIDTH
,
49 /* FIXME verify that this is the
50 * appripriate code for vpp enable/disable
52 .set_vpp
= l440gx_set_vpp
56 static int __init
init_l440gx(void)
58 struct pci_dev
*dev
, *pm_dev
;
59 struct resource
*pm_iobase
;
62 dev
= pci_get_device(PCI_VENDOR_ID_INTEL
,
63 PCI_DEVICE_ID_INTEL_82371AB_0
, NULL
);
65 pm_dev
= pci_get_device(PCI_VENDOR_ID_INTEL
,
66 PCI_DEVICE_ID_INTEL_82371AB_3
, NULL
);
70 if (!dev
|| !pm_dev
) {
71 printk(KERN_NOTICE
"L440GX flash mapping: failed to find PIIX4 ISA bridge, cannot continue\n");
76 l440gx_map
.virt
= ioremap_nocache(WINDOW_ADDR
, WINDOW_SIZE
);
78 if (!l440gx_map
.virt
) {
79 printk(KERN_WARNING
"Failed to ioremap L440GX flash region\n");
83 simple_map_init(&l440gx_map
);
84 printk(KERN_NOTICE
"window_addr = 0x%08lx\n", (unsigned long)l440gx_map
.virt
);
86 /* Setup the pm iobase resource
87 * This code should move into some kind of generic bridge
88 * driver but for the moment I'm content with getting the
91 pm_iobase
= &pm_dev
->resource
[PIIXE_IOBASE_RESOURCE
];
92 if (!(pm_iobase
->flags
& IORESOURCE_IO
)) {
93 pm_iobase
->name
= "pm iobase";
96 pm_iobase
->flags
= IORESOURCE_IO
;
98 /* Put the current value in the resource */
99 pci_read_config_dword(pm_dev
, 0x40, &iobase
);
101 pm_iobase
->start
+= iobase
& ~1;
102 pm_iobase
->end
+= iobase
& ~1;
106 /* Allocate the resource region */
107 if (pci_assign_resource(pm_dev
, PIIXE_IOBASE_RESOURCE
) != 0) {
110 printk(KERN_WARNING
"Could not allocate pm iobase resource\n");
111 iounmap(l440gx_map
.virt
);
116 iobase
= pm_iobase
->start
;
117 pci_write_config_dword(pm_dev
, 0x40, iobase
| 1);
121 pci_read_config_word(dev
, 0x4e, &word
);
123 pci_write_config_word(dev
, 0x4e, word
);
125 /* Supply write voltage to the chip */
126 l440gx_set_vpp(&l440gx_map
, 1);
128 /* Enable the gate on the WE line */
129 outb(inb(TRIBUF_PORT
) & ~1, TRIBUF_PORT
);
131 printk(KERN_NOTICE
"Enabled WE line to L440GX BIOS flash chip.\n");
133 mymtd
= do_map_probe("jedec_probe", &l440gx_map
);
135 printk(KERN_NOTICE
"JEDEC probe on BIOS chip failed. Using ROM\n");
136 mymtd
= do_map_probe("map_rom", &l440gx_map
);
139 mymtd
->owner
= THIS_MODULE
;
141 mtd_device_register(mymtd
, NULL
, 0);
145 iounmap(l440gx_map
.virt
);
149 static void __exit
cleanup_l440gx(void)
151 mtd_device_unregister(mymtd
);
154 iounmap(l440gx_map
.virt
);
157 module_init(init_l440gx
);
158 module_exit(cleanup_l440gx
);
160 MODULE_LICENSE("GPL");
161 MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
162 MODULE_DESCRIPTION("MTD map driver for BIOS chips on Intel L440GX motherboards");