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Add linux-next specific files for 20110831
[linux-2.6/next.git] / drivers / net / ethernet / intel / ixgbe / ixgbe_dcb_nl.c
blob0422e356b6fc5ad64c0a8d85582ee32cd2bda95a
1 /*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2011 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "ixgbe.h"
30 #include <linux/dcbnl.h>
31 #include "ixgbe_dcb_82598.h"
32 #include "ixgbe_dcb_82599.h"
33
34 /* Callbacks for DCB netlink in the kernel */
35 #define BIT_DCB_MODE 0x01
36 #define BIT_PFC 0x02
37 #define BIT_PG_RX 0x04
38 #define BIT_PG_TX 0x08
39 #define BIT_APP_UPCHG 0x10
40 #define BIT_LINKSPEED 0x80
41
42 /* Responses for the DCB_C_SET_ALL command */
43 #define DCB_HW_CHG_RST 0 /* DCB configuration changed with reset */
44 #define DCB_NO_HW_CHG 1 /* DCB configuration did not change */
45 #define DCB_HW_CHG 2 /* DCB configuration changed, no reset */
46
47 int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg,
48 struct ixgbe_dcb_config *dst_dcb_cfg, int tc_max)
49 {
50 struct tc_configuration *src_tc_cfg = NULL;
51 struct tc_configuration *dst_tc_cfg = NULL;
52 int i;
53
54 if (!src_dcb_cfg || !dst_dcb_cfg)
55 return -EINVAL;
56
57 for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) {
58 src_tc_cfg = &src_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
59 dst_tc_cfg = &dst_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
60
61 dst_tc_cfg->path[DCB_TX_CONFIG].prio_type =
62 src_tc_cfg->path[DCB_TX_CONFIG].prio_type;
63
64 dst_tc_cfg->path[DCB_TX_CONFIG].bwg_id =
65 src_tc_cfg->path[DCB_TX_CONFIG].bwg_id;
66
67 dst_tc_cfg->path[DCB_TX_CONFIG].bwg_percent =
68 src_tc_cfg->path[DCB_TX_CONFIG].bwg_percent;
69
70 dst_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap =
71 src_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap;
72
73 dst_tc_cfg->path[DCB_RX_CONFIG].prio_type =
74 src_tc_cfg->path[DCB_RX_CONFIG].prio_type;
75
76 dst_tc_cfg->path[DCB_RX_CONFIG].bwg_id =
77 src_tc_cfg->path[DCB_RX_CONFIG].bwg_id;
78
79 dst_tc_cfg->path[DCB_RX_CONFIG].bwg_percent =
80 src_tc_cfg->path[DCB_RX_CONFIG].bwg_percent;
81
82 dst_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap =
83 src_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap;
84 }
85
86 for (i = DCB_PG_ATTR_BW_ID_0; i < DCB_PG_ATTR_BW_ID_MAX; i++) {
87 dst_dcb_cfg->bw_percentage[DCB_TX_CONFIG]
88 [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
89 [DCB_TX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
90 dst_dcb_cfg->bw_percentage[DCB_RX_CONFIG]
91 [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
92 [DCB_RX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
93 }
94
95 for (i = DCB_PFC_UP_ATTR_0; i < DCB_PFC_UP_ATTR_MAX; i++) {
96 dst_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc =
97 src_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc;
98 }
99
100 dst_dcb_cfg->pfc_mode_enable = src_dcb_cfg->pfc_mode_enable;
101
102 return 0;
103 }
104
105 static u8 ixgbe_dcbnl_get_state(struct net_device *netdev)
106 {
107 struct ixgbe_adapter *adapter = netdev_priv(netdev);
108
109 return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED);
110 }
111
112 static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
113 {
114 u8 err = 0;
115 struct ixgbe_adapter *adapter = netdev_priv(netdev);
116
117 /* verify there is something to do, if not then exit */
118 if (!!state != !(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
119 return err;
120
121 if (state > 0)
122 err = ixgbe_setup_tc(netdev, MAX_TRAFFIC_CLASS);
123 else
124 err = ixgbe_setup_tc(netdev, 0);
125
126 return err;
127 }
128
129 static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
130 u8 *perm_addr)
131 {
132 struct ixgbe_adapter *adapter = netdev_priv(netdev);
133 int i, j;
134
135 memset(perm_addr, 0xff, MAX_ADDR_LEN);
136
137 for (i = 0; i < netdev->addr_len; i++)
138 perm_addr[i] = adapter->hw.mac.perm_addr[i];
139
140 switch (adapter->hw.mac.type) {
141 case ixgbe_mac_82599EB:
142 case ixgbe_mac_X540:
143 for (j = 0; j < netdev->addr_len; j++, i++)
144 perm_addr[i] = adapter->hw.mac.san_addr[j];
145 break;
146 default:
147 break;
148 }
149 }
150
151 static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,
152 u8 prio, u8 bwg_id, u8 bw_pct,
153 u8 up_map)
154 {
155 struct ixgbe_adapter *adapter = netdev_priv(netdev);
156
157 if (prio != DCB_ATTR_VALUE_UNDEFINED)
158 adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio;
159 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
160 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id = bwg_id;
161 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
162 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent =
163 bw_pct;
164 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
165 adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap =
166 up_map;
167
168 if ((adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type !=
169 adapter->dcb_cfg.tc_config[tc].path[0].prio_type) ||
170 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id !=
171 adapter->dcb_cfg.tc_config[tc].path[0].bwg_id) ||
172 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent !=
173 adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent) ||
174 (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap !=
175 adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap))
176 adapter->dcb_set_bitmap |= BIT_PG_TX;
177 }
178
179 static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
180 u8 bw_pct)
181 {
182 struct ixgbe_adapter *adapter = netdev_priv(netdev);
183
184 adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct;
185
186 if (adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] !=
187 adapter->dcb_cfg.bw_percentage[0][bwg_id])
188 adapter->dcb_set_bitmap |= BIT_PG_TX;
189 }
190
191 static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,
192 u8 prio, u8 bwg_id, u8 bw_pct,
193 u8 up_map)
194 {
195 struct ixgbe_adapter *adapter = netdev_priv(netdev);
196
197 if (prio != DCB_ATTR_VALUE_UNDEFINED)
198 adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio;
199 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
200 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id = bwg_id;
201 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
202 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent =
203 bw_pct;
204 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
205 adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap =
206 up_map;
207
208 if ((adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type !=
209 adapter->dcb_cfg.tc_config[tc].path[1].prio_type) ||
210 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id !=
211 adapter->dcb_cfg.tc_config[tc].path[1].bwg_id) ||
212 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent !=
213 adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent) ||
214 (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap !=
215 adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap))
216 adapter->dcb_set_bitmap |= BIT_PG_RX;
217 }
218
219 static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
220 u8 bw_pct)
221 {
222 struct ixgbe_adapter *adapter = netdev_priv(netdev);
223
224 adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct;
225
226 if (adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] !=
227 adapter->dcb_cfg.bw_percentage[1][bwg_id])
228 adapter->dcb_set_bitmap |= BIT_PG_RX;
229 }
230
231 static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc,
232 u8 *prio, u8 *bwg_id, u8 *bw_pct,
233 u8 *up_map)
234 {
235 struct ixgbe_adapter *adapter = netdev_priv(netdev);
236
237 *prio = adapter->dcb_cfg.tc_config[tc].path[0].prio_type;
238 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id;
239 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent;
240 *up_map = adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap;
241 }
242
243 static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
244 u8 *bw_pct)
245 {
246 struct ixgbe_adapter *adapter = netdev_priv(netdev);
247
248 *bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id];
249 }
250
251 static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc,
252 u8 *prio, u8 *bwg_id, u8 *bw_pct,
253 u8 *up_map)
254 {
255 struct ixgbe_adapter *adapter = netdev_priv(netdev);
256
257 *prio = adapter->dcb_cfg.tc_config[tc].path[1].prio_type;
258 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id;
259 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent;
260 *up_map = adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap;
261 }
262
263 static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
264 u8 *bw_pct)
265 {
266 struct ixgbe_adapter *adapter = netdev_priv(netdev);
267
268 *bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id];
269 }
270
271 static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
272 u8 setting)
273 {
274 struct ixgbe_adapter *adapter = netdev_priv(netdev);
275
276 adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting;
277 if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc !=
278 adapter->dcb_cfg.tc_config[priority].dcb_pfc) {
279 adapter->dcb_set_bitmap |= BIT_PFC;
280 adapter->temp_dcb_cfg.pfc_mode_enable = true;
281 }
282 }
283
284 static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
285 u8 *setting)
286 {
287 struct ixgbe_adapter *adapter = netdev_priv(netdev);
288
289 *setting = adapter->dcb_cfg.tc_config[priority].dcb_pfc;
290 }
291
292 static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
293 {
294 struct ixgbe_adapter *adapter = netdev_priv(netdev);
295 int ret;
296 #ifdef IXGBE_FCOE
297 struct dcb_app app = {
298 .selector = DCB_APP_IDTYPE_ETHTYPE,
299 .protocol = ETH_P_FCOE,
300 };
301 u8 up = dcb_getapp(netdev, &app);
302 #endif
303
304 ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
305 MAX_TRAFFIC_CLASS);
306 if (ret)
307 return DCB_NO_HW_CHG;
308
309 #ifdef IXGBE_FCOE
310 if (up && (up != (1 << adapter->fcoe.up)))
311 adapter->dcb_set_bitmap |= BIT_APP_UPCHG;
312
313 /*
314 * Only take down the adapter if an app change occurred. FCoE
315 * may shuffle tx rings in this case and this can not be done
316 * without a reset currently.
317 */
318 if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) {
319 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
320 usleep_range(1000, 2000);
321
322 adapter->fcoe.up = ffs(up) - 1;
323
324 if (netif_running(netdev))
325 netdev->netdev_ops->ndo_stop(netdev);
326 ixgbe_clear_interrupt_scheme(adapter);
327 }
328 #endif
329
330 if (adapter->dcb_cfg.pfc_mode_enable) {
331 switch (adapter->hw.mac.type) {
332 case ixgbe_mac_82599EB:
333 case ixgbe_mac_X540:
334 if (adapter->hw.fc.current_mode != ixgbe_fc_pfc)
335 adapter->last_lfc_mode =
336 adapter->hw.fc.current_mode;
337 break;
338 default:
339 break;
340 }
341 adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
342 } else {
343 switch (adapter->hw.mac.type) {
344 case ixgbe_mac_82598EB:
345 adapter->hw.fc.requested_mode = ixgbe_fc_none;
346 break;
347 case ixgbe_mac_82599EB:
348 case ixgbe_mac_X540:
349 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
350 break;
351 default:
352 break;
353 }
354 }
355
356 #ifdef IXGBE_FCOE
357 if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) {
358 ixgbe_init_interrupt_scheme(adapter);
359 if (netif_running(netdev))
360 netdev->netdev_ops->ndo_open(netdev);
361 ret = DCB_HW_CHG_RST;
362 }
363 #endif
364
365 if (adapter->dcb_set_bitmap & BIT_PFC) {
366 u8 pfc_en;
367 ixgbe_dcb_unpack_pfc(&adapter->dcb_cfg, &pfc_en);
368 ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc_en);
369 ret = DCB_HW_CHG;
370 }
371
372 if (adapter->dcb_set_bitmap & (BIT_PG_TX|BIT_PG_RX)) {
373 u16 refill[MAX_TRAFFIC_CLASS], max[MAX_TRAFFIC_CLASS];
374 u8 bwg_id[MAX_TRAFFIC_CLASS], prio_type[MAX_TRAFFIC_CLASS];
375 /* Priority to TC mapping in CEE case default to 1:1 */
376 u8 prio_tc[MAX_TRAFFIC_CLASS] = {0, 1, 2, 3, 4, 5, 6, 7};
377 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
378
379 #ifdef IXGBE_FCOE
380 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
381 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
382 #endif
383
384 ixgbe_dcb_calculate_tc_credits(&adapter->hw, &adapter->dcb_cfg,
385 max_frame, DCB_TX_CONFIG);
386 ixgbe_dcb_calculate_tc_credits(&adapter->hw, &adapter->dcb_cfg,
387 max_frame, DCB_RX_CONFIG);
388
389 ixgbe_dcb_unpack_refill(&adapter->dcb_cfg,
390 DCB_TX_CONFIG, refill);
391 ixgbe_dcb_unpack_max(&adapter->dcb_cfg, max);
392 ixgbe_dcb_unpack_bwgid(&adapter->dcb_cfg,
393 DCB_TX_CONFIG, bwg_id);
394 ixgbe_dcb_unpack_prio(&adapter->dcb_cfg,
395 DCB_TX_CONFIG, prio_type);
396
397 ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max,
398 bwg_id, prio_type, prio_tc);
399 }
400
401 if (adapter->dcb_cfg.pfc_mode_enable)
402 adapter->hw.fc.current_mode = ixgbe_fc_pfc;
403
404 if (adapter->dcb_set_bitmap & BIT_APP_UPCHG)
405 clear_bit(__IXGBE_RESETTING, &adapter->state);
406 adapter->dcb_set_bitmap = 0x00;
407 return ret;
408 }
409
410 static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap)
411 {
412 struct ixgbe_adapter *adapter = netdev_priv(netdev);
413
414 switch (capid) {
415 case DCB_CAP_ATTR_PG:
416 *cap = true;
417 break;
418 case DCB_CAP_ATTR_PFC:
419 *cap = true;
420 break;
421 case DCB_CAP_ATTR_UP2TC:
422 *cap = false;
423 break;
424 case DCB_CAP_ATTR_PG_TCS:
425 *cap = 0x80;
426 break;
427 case DCB_CAP_ATTR_PFC_TCS:
428 *cap = 0x80;
429 break;
430 case DCB_CAP_ATTR_GSP:
431 *cap = true;
432 break;
433 case DCB_CAP_ATTR_BCN:
434 *cap = false;
435 break;
436 case DCB_CAP_ATTR_DCBX:
437 *cap = adapter->dcbx_cap;
438 break;
439 default:
440 *cap = false;
441 break;
442 }
443
444 return 0;
445 }
446
447 static u8 ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num)
448 {
449 struct ixgbe_adapter *adapter = netdev_priv(netdev);
450 u8 rval = 0;
451
452 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
453 switch (tcid) {
454 case DCB_NUMTCS_ATTR_PG:
455 *num = MAX_TRAFFIC_CLASS;
456 break;
457 case DCB_NUMTCS_ATTR_PFC:
458 *num = MAX_TRAFFIC_CLASS;
459 break;
460 default:
461 rval = -EINVAL;
462 break;
463 }
464 } else {
465 rval = -EINVAL;
466 }
467
468 return rval;
469 }
470
471 static u8 ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num)
472 {
473 return -EINVAL;
474 }
475
476 static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev)
477 {
478 struct ixgbe_adapter *adapter = netdev_priv(netdev);
479
480 return adapter->dcb_cfg.pfc_mode_enable;
481 }
482
483 static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
484 {
485 struct ixgbe_adapter *adapter = netdev_priv(netdev);
486
487 adapter->temp_dcb_cfg.pfc_mode_enable = state;
488 if (adapter->temp_dcb_cfg.pfc_mode_enable !=
489 adapter->dcb_cfg.pfc_mode_enable)
490 adapter->dcb_set_bitmap |= BIT_PFC;
491 }
492
493 /**
494 * ixgbe_dcbnl_getapp - retrieve the DCBX application user priority
495 * @netdev : the corresponding netdev
496 * @idtype : identifies the id as ether type or TCP/UDP port number
497 * @id: id is either ether type or TCP/UDP port number
498 *
499 * Returns : on success, returns a non-zero 802.1p user priority bitmap
500 * otherwise returns 0 as the invalid user priority bitmap to indicate an
501 * error.
502 */
503 static u8 ixgbe_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id)
504 {
505 struct ixgbe_adapter *adapter = netdev_priv(netdev);
506 struct dcb_app app = {
507 .selector = idtype,
508 .protocol = id,
509 };
510
511 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
512 return 0;
513
514 return dcb_getapp(netdev, &app);
515 }
516
517 static int ixgbe_dcbnl_ieee_getets(struct net_device *dev,
518 struct ieee_ets *ets)
519 {
520 struct ixgbe_adapter *adapter = netdev_priv(dev);
521 struct ieee_ets *my_ets = adapter->ixgbe_ieee_ets;
522
523 /* No IEEE PFC settings available */
524 if (!my_ets)
525 return -EINVAL;
526
527 ets->ets_cap = MAX_TRAFFIC_CLASS;
528 ets->cbs = my_ets->cbs;
529 memcpy(ets->tc_tx_bw, my_ets->tc_tx_bw, sizeof(ets->tc_tx_bw));
530 memcpy(ets->tc_rx_bw, my_ets->tc_rx_bw, sizeof(ets->tc_rx_bw));
531 memcpy(ets->tc_tsa, my_ets->tc_tsa, sizeof(ets->tc_tsa));
532 memcpy(ets->prio_tc, my_ets->prio_tc, sizeof(ets->prio_tc));
533 return 0;
534 }
535
536 static int ixgbe_dcbnl_ieee_setets(struct net_device *dev,
537 struct ieee_ets *ets)
538 {
539 struct ixgbe_adapter *adapter = netdev_priv(dev);
540 __u16 refill[IEEE_8021QAZ_MAX_TCS], max[IEEE_8021QAZ_MAX_TCS];
541 __u8 prio_type[IEEE_8021QAZ_MAX_TCS];
542 int max_frame = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
543 int i, err;
544 __u64 *p = (__u64 *) ets->prio_tc;
545 /* naively give each TC a bwg to map onto CEE hardware */
546 __u8 bwg_id[IEEE_8021QAZ_MAX_TCS] = {0, 1, 2, 3, 4, 5, 6, 7};
547
548 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
549 return -EINVAL;
550
551 if (!adapter->ixgbe_ieee_ets) {
552 adapter->ixgbe_ieee_ets = kmalloc(sizeof(struct ieee_ets),
553 GFP_KERNEL);
554 if (!adapter->ixgbe_ieee_ets)
555 return -ENOMEM;
556 }
557
558 memcpy(adapter->ixgbe_ieee_ets, ets, sizeof(*adapter->ixgbe_ieee_ets));
559
560 /* Map TSA onto CEE prio type */
561 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
562 switch (ets->tc_tsa[i]) {
563 case IEEE_8021QAZ_TSA_STRICT:
564 prio_type[i] = 2;
565 break;
566 case IEEE_8021QAZ_TSA_ETS:
567 prio_type[i] = 0;
568 break;
569 default:
570 /* Hardware only supports priority strict or
571 * ETS transmission selection algorithms if
572 * we receive some other value from dcbnl
573 * throw an error
574 */
575 return -EINVAL;
576 }
577 }
578
579 if (*p)
580 ixgbe_dcbnl_set_state(dev, 1);
581 else
582 ixgbe_dcbnl_set_state(dev, 0);
583
584 ixgbe_ieee_credits(ets->tc_tx_bw, refill, max, max_frame);
585 err = ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max,
586 bwg_id, prio_type, ets->prio_tc);
587 return err;
588 }
589
590 static int ixgbe_dcbnl_ieee_getpfc(struct net_device *dev,
591 struct ieee_pfc *pfc)
592 {
593 struct ixgbe_adapter *adapter = netdev_priv(dev);
594 struct ieee_pfc *my_pfc = adapter->ixgbe_ieee_pfc;
595 int i;
596
597 /* No IEEE PFC settings available */
598 if (!my_pfc)
599 return -EINVAL;
600
601 pfc->pfc_cap = MAX_TRAFFIC_CLASS;
602 pfc->pfc_en = my_pfc->pfc_en;
603 pfc->mbc = my_pfc->mbc;
604 pfc->delay = my_pfc->delay;
605
606 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
607 pfc->requests[i] = adapter->stats.pxoffrxc[i];
608 pfc->indications[i] = adapter->stats.pxofftxc[i];
609 }
610
611 return 0;
612 }
613
614 static int ixgbe_dcbnl_ieee_setpfc(struct net_device *dev,
615 struct ieee_pfc *pfc)
616 {
617 struct ixgbe_adapter *adapter = netdev_priv(dev);
618 int err;
619
620 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
621 return -EINVAL;
622
623 if (!adapter->ixgbe_ieee_pfc) {
624 adapter->ixgbe_ieee_pfc = kmalloc(sizeof(struct ieee_pfc),
625 GFP_KERNEL);
626 if (!adapter->ixgbe_ieee_pfc)
627 return -ENOMEM;
628 }
629
630 memcpy(adapter->ixgbe_ieee_pfc, pfc, sizeof(*adapter->ixgbe_ieee_pfc));
631 err = ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc->pfc_en);
632 return err;
633 }
634
635 #ifdef IXGBE_FCOE
636 static void ixgbe_dcbnl_devreset(struct net_device *dev)
637 {
638 struct ixgbe_adapter *adapter = netdev_priv(dev);
639
640 if (netif_running(dev))
641 dev->netdev_ops->ndo_stop(dev);
642
643 ixgbe_clear_interrupt_scheme(adapter);
644 ixgbe_init_interrupt_scheme(adapter);
645
646 if (netif_running(dev))
647 dev->netdev_ops->ndo_open(dev);
648 }
649 #endif
650
651 static int ixgbe_dcbnl_ieee_setapp(struct net_device *dev,
652 struct dcb_app *app)
653 {
654 struct ixgbe_adapter *adapter = netdev_priv(dev);
655 int err = -EINVAL;
656
657 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
658 return err;
659
660 err = dcb_ieee_setapp(dev, app);
661
662 #ifdef IXGBE_FCOE
663 if (!err && app->selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE &&
664 app->protocol == ETH_P_FCOE) {
665 u8 app_mask = dcb_ieee_getapp_mask(dev, app);
666
667 if (app_mask & (1 << adapter->fcoe.up))
668 return err;
669
670 adapter->fcoe.up = app->priority;
671 ixgbe_dcbnl_devreset(dev);
672 }
673 #endif
674 return 0;
675 }
676
677 static int ixgbe_dcbnl_ieee_delapp(struct net_device *dev,
678 struct dcb_app *app)
679 {
680 struct ixgbe_adapter *adapter = netdev_priv(dev);
681 int err;
682
683 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
684 return -EINVAL;
685
686 err = dcb_ieee_delapp(dev, app);
687
688 #ifdef IXGBE_FCOE
689 if (!err && app->selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE &&
690 app->protocol == ETH_P_FCOE) {
691 u8 app_mask = dcb_ieee_getapp_mask(dev, app);
692
693 if (app_mask & (1 << adapter->fcoe.up))
694 return err;
695
696 adapter->fcoe.up = app_mask ?
697 ffs(app_mask) - 1 : IXGBE_FCOE_DEFTC;
698 ixgbe_dcbnl_devreset(dev);
699 }
700 #endif
701 return err;
702 }
703
704 static u8 ixgbe_dcbnl_getdcbx(struct net_device *dev)
705 {
706 struct ixgbe_adapter *adapter = netdev_priv(dev);
707 return adapter->dcbx_cap;
708 }
709
710 static u8 ixgbe_dcbnl_setdcbx(struct net_device *dev, u8 mode)
711 {
712 struct ixgbe_adapter *adapter = netdev_priv(dev);
713 struct ieee_ets ets = {0};
714 struct ieee_pfc pfc = {0};
715
716 /* no support for LLD_MANAGED modes or CEE+IEEE */
717 if ((mode & DCB_CAP_DCBX_LLD_MANAGED) ||
718 ((mode & DCB_CAP_DCBX_VER_IEEE) && (mode & DCB_CAP_DCBX_VER_CEE)) ||
719 !(mode & DCB_CAP_DCBX_HOST))
720 return 1;
721
722 if (mode == adapter->dcbx_cap)
723 return 0;
724
725 adapter->dcbx_cap = mode;
726
727 /* ETS and PFC defaults */
728 ets.ets_cap = 8;
729 pfc.pfc_cap = 8;
730
731 if (mode & DCB_CAP_DCBX_VER_IEEE) {
732 ixgbe_dcbnl_ieee_setets(dev, &ets);
733 ixgbe_dcbnl_ieee_setpfc(dev, &pfc);
734 } else if (mode & DCB_CAP_DCBX_VER_CEE) {
735 adapter->dcb_set_bitmap |= (BIT_PFC & BIT_PG_TX & BIT_PG_RX);
736 ixgbe_dcbnl_set_all(dev);
737 } else {
738 /* Drop into single TC mode strict priority as this
739 * indicates CEE and IEEE versions are disabled
740 */
741 ixgbe_dcbnl_ieee_setets(dev, &ets);
742 ixgbe_dcbnl_ieee_setpfc(dev, &pfc);
743 ixgbe_dcbnl_set_state(dev, 0);
744 }
745
746 return 0;
747 }
748
749 const struct dcbnl_rtnl_ops dcbnl_ops = {
750 .ieee_getets = ixgbe_dcbnl_ieee_getets,
751 .ieee_setets = ixgbe_dcbnl_ieee_setets,
752 .ieee_getpfc = ixgbe_dcbnl_ieee_getpfc,
753 .ieee_setpfc = ixgbe_dcbnl_ieee_setpfc,
754 .ieee_setapp = ixgbe_dcbnl_ieee_setapp,
755 .ieee_delapp = ixgbe_dcbnl_ieee_delapp,
756 .getstate = ixgbe_dcbnl_get_state,
757 .setstate = ixgbe_dcbnl_set_state,
758 .getpermhwaddr = ixgbe_dcbnl_get_perm_hw_addr,
759 .setpgtccfgtx = ixgbe_dcbnl_set_pg_tc_cfg_tx,
760 .setpgbwgcfgtx = ixgbe_dcbnl_set_pg_bwg_cfg_tx,
761 .setpgtccfgrx = ixgbe_dcbnl_set_pg_tc_cfg_rx,
762 .setpgbwgcfgrx = ixgbe_dcbnl_set_pg_bwg_cfg_rx,
763 .getpgtccfgtx = ixgbe_dcbnl_get_pg_tc_cfg_tx,
764 .getpgbwgcfgtx = ixgbe_dcbnl_get_pg_bwg_cfg_tx,
765 .getpgtccfgrx = ixgbe_dcbnl_get_pg_tc_cfg_rx,
766 .getpgbwgcfgrx = ixgbe_dcbnl_get_pg_bwg_cfg_rx,
767 .setpfccfg = ixgbe_dcbnl_set_pfc_cfg,
768 .getpfccfg = ixgbe_dcbnl_get_pfc_cfg,
769 .setall = ixgbe_dcbnl_set_all,
770 .getcap = ixgbe_dcbnl_getcap,
771 .getnumtcs = ixgbe_dcbnl_getnumtcs,
772 .setnumtcs = ixgbe_dcbnl_setnumtcs,
773 .getpfcstate = ixgbe_dcbnl_getpfcstate,
774 .setpfcstate = ixgbe_dcbnl_setpfcstate,
775 .getapp = ixgbe_dcbnl_getapp,
776 .getdcbx = ixgbe_dcbnl_getdcbx,
777 .setdcbx = ixgbe_dcbnl_setdcbx,
778 };
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