2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/mlx4/cmd.h>
35 #include <linux/export.h>
36 #include <linux/gfp.h>
41 struct mlx4_srq_context
{
42 __be32 state_logsize_srqn
;
51 __be32 mtt_base_addr_l
;
53 __be16 limit_watermark
;
61 void mlx4_srq_event(struct mlx4_dev
*dev
, u32 srqn
, int event_type
)
63 struct mlx4_srq_table
*srq_table
= &mlx4_priv(dev
)->srq_table
;
66 spin_lock(&srq_table
->lock
);
68 srq
= radix_tree_lookup(&srq_table
->tree
, srqn
& (dev
->caps
.num_srqs
- 1));
70 atomic_inc(&srq
->refcount
);
72 spin_unlock(&srq_table
->lock
);
75 mlx4_warn(dev
, "Async event for bogus SRQ %08x\n", srqn
);
79 srq
->event(srq
, event_type
);
81 if (atomic_dec_and_test(&srq
->refcount
))
85 static int mlx4_SW2HW_SRQ(struct mlx4_dev
*dev
, struct mlx4_cmd_mailbox
*mailbox
,
88 return mlx4_cmd(dev
, mailbox
->dma
, srq_num
, 0, MLX4_CMD_SW2HW_SRQ
,
89 MLX4_CMD_TIME_CLASS_A
);
92 static int mlx4_HW2SW_SRQ(struct mlx4_dev
*dev
, struct mlx4_cmd_mailbox
*mailbox
,
95 return mlx4_cmd_box(dev
, 0, mailbox
? mailbox
->dma
: 0, srq_num
,
96 mailbox
? 0 : 1, MLX4_CMD_HW2SW_SRQ
,
97 MLX4_CMD_TIME_CLASS_A
);
100 static int mlx4_ARM_SRQ(struct mlx4_dev
*dev
, int srq_num
, int limit_watermark
)
102 return mlx4_cmd(dev
, limit_watermark
, srq_num
, 0, MLX4_CMD_ARM_SRQ
,
103 MLX4_CMD_TIME_CLASS_B
);
106 static int mlx4_QUERY_SRQ(struct mlx4_dev
*dev
, struct mlx4_cmd_mailbox
*mailbox
,
109 return mlx4_cmd_box(dev
, 0, mailbox
->dma
, srq_num
, 0, MLX4_CMD_QUERY_SRQ
,
110 MLX4_CMD_TIME_CLASS_A
);
113 int mlx4_srq_alloc(struct mlx4_dev
*dev
, u32 pdn
, struct mlx4_mtt
*mtt
,
114 u64 db_rec
, struct mlx4_srq
*srq
)
116 struct mlx4_srq_table
*srq_table
= &mlx4_priv(dev
)->srq_table
;
117 struct mlx4_cmd_mailbox
*mailbox
;
118 struct mlx4_srq_context
*srq_context
;
122 srq
->srqn
= mlx4_bitmap_alloc(&srq_table
->bitmap
);
126 err
= mlx4_table_get(dev
, &srq_table
->table
, srq
->srqn
);
130 err
= mlx4_table_get(dev
, &srq_table
->cmpt_table
, srq
->srqn
);
134 spin_lock_irq(&srq_table
->lock
);
135 err
= radix_tree_insert(&srq_table
->tree
, srq
->srqn
, srq
);
136 spin_unlock_irq(&srq_table
->lock
);
140 mailbox
= mlx4_alloc_cmd_mailbox(dev
);
141 if (IS_ERR(mailbox
)) {
142 err
= PTR_ERR(mailbox
);
146 srq_context
= mailbox
->buf
;
147 memset(srq_context
, 0, sizeof *srq_context
);
149 srq_context
->state_logsize_srqn
= cpu_to_be32((ilog2(srq
->max
) << 24) |
151 srq_context
->logstride
= srq
->wqe_shift
- 4;
152 srq_context
->log_page_size
= mtt
->page_shift
- MLX4_ICM_PAGE_SHIFT
;
154 mtt_addr
= mlx4_mtt_addr(dev
, mtt
);
155 srq_context
->mtt_base_addr_h
= mtt_addr
>> 32;
156 srq_context
->mtt_base_addr_l
= cpu_to_be32(mtt_addr
& 0xffffffff);
157 srq_context
->pd
= cpu_to_be32(pdn
);
158 srq_context
->db_rec_addr
= cpu_to_be64(db_rec
);
160 err
= mlx4_SW2HW_SRQ(dev
, mailbox
, srq
->srqn
);
161 mlx4_free_cmd_mailbox(dev
, mailbox
);
165 atomic_set(&srq
->refcount
, 1);
166 init_completion(&srq
->free
);
171 spin_lock_irq(&srq_table
->lock
);
172 radix_tree_delete(&srq_table
->tree
, srq
->srqn
);
173 spin_unlock_irq(&srq_table
->lock
);
176 mlx4_table_put(dev
, &srq_table
->cmpt_table
, srq
->srqn
);
179 mlx4_table_put(dev
, &srq_table
->table
, srq
->srqn
);
182 mlx4_bitmap_free(&srq_table
->bitmap
, srq
->srqn
);
186 EXPORT_SYMBOL_GPL(mlx4_srq_alloc
);
188 void mlx4_srq_free(struct mlx4_dev
*dev
, struct mlx4_srq
*srq
)
190 struct mlx4_srq_table
*srq_table
= &mlx4_priv(dev
)->srq_table
;
193 err
= mlx4_HW2SW_SRQ(dev
, NULL
, srq
->srqn
);
195 mlx4_warn(dev
, "HW2SW_SRQ failed (%d) for SRQN %06x\n", err
, srq
->srqn
);
197 spin_lock_irq(&srq_table
->lock
);
198 radix_tree_delete(&srq_table
->tree
, srq
->srqn
);
199 spin_unlock_irq(&srq_table
->lock
);
201 if (atomic_dec_and_test(&srq
->refcount
))
202 complete(&srq
->free
);
203 wait_for_completion(&srq
->free
);
205 mlx4_table_put(dev
, &srq_table
->table
, srq
->srqn
);
206 mlx4_bitmap_free(&srq_table
->bitmap
, srq
->srqn
);
208 EXPORT_SYMBOL_GPL(mlx4_srq_free
);
210 int mlx4_srq_arm(struct mlx4_dev
*dev
, struct mlx4_srq
*srq
, int limit_watermark
)
212 return mlx4_ARM_SRQ(dev
, srq
->srqn
, limit_watermark
);
214 EXPORT_SYMBOL_GPL(mlx4_srq_arm
);
216 int mlx4_srq_query(struct mlx4_dev
*dev
, struct mlx4_srq
*srq
, int *limit_watermark
)
218 struct mlx4_cmd_mailbox
*mailbox
;
219 struct mlx4_srq_context
*srq_context
;
222 mailbox
= mlx4_alloc_cmd_mailbox(dev
);
224 return PTR_ERR(mailbox
);
226 srq_context
= mailbox
->buf
;
228 err
= mlx4_QUERY_SRQ(dev
, mailbox
, srq
->srqn
);
231 *limit_watermark
= be16_to_cpu(srq_context
->limit_watermark
);
234 mlx4_free_cmd_mailbox(dev
, mailbox
);
237 EXPORT_SYMBOL_GPL(mlx4_srq_query
);
239 int mlx4_init_srq_table(struct mlx4_dev
*dev
)
241 struct mlx4_srq_table
*srq_table
= &mlx4_priv(dev
)->srq_table
;
244 spin_lock_init(&srq_table
->lock
);
245 INIT_RADIX_TREE(&srq_table
->tree
, GFP_ATOMIC
);
247 err
= mlx4_bitmap_init(&srq_table
->bitmap
, dev
->caps
.num_srqs
,
248 dev
->caps
.num_srqs
- 1, dev
->caps
.reserved_srqs
, 0);
255 void mlx4_cleanup_srq_table(struct mlx4_dev
*dev
)
257 mlx4_bitmap_cleanup(&mlx4_priv(dev
)->srq_table
.bitmap
);