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Add linux-next specific files for 20110831
[linux-2.6/next.git] / drivers / net / ethernet / via / via-velocity.c
blob086463b141b66194b1c51ad288cebf27dd03617e
1 /*
2 * This code is derived from the VIA reference driver (copyright message
3 * below) provided to Red Hat by VIA Networking Technologies, Inc. for
4 * addition to the Linux kernel.
5 *
6 * The code has been merged into one source file, cleaned up to follow
7 * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned
8 * for 64bit hardware platforms.
9 *
10 * TODO
11 * rx_copybreak/alignment
12 * More testing
13 *
14 * The changes are (c) Copyright 2004, Red Hat Inc. <alan@lxorguk.ukuu.org.uk>
15 * Additional fixes and clean up: Francois Romieu
16 *
17 * This source has not been verified for use in safety critical systems.
18 *
19 * Please direct queries about the revamped driver to the linux-kernel
20 * list not VIA.
21 *
22 * Original code:
23 *
24 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
25 * All rights reserved.
26 *
27 * This software may be redistributed and/or modified under
28 * the terms of the GNU General Public License as published by the Free
29 * Software Foundation; either version 2 of the License, or
30 * any later version.
31 *
32 * This program is distributed in the hope that it will be useful, but
33 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
34 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
35 * for more details.
36 *
37 * Author: Chuang Liang-Shing, AJ Jiang
38 *
39 * Date: Jan 24, 2003
40 *
41 * MODULE_LICENSE("GPL");
42 *
43 */
44
45 #include <linux/module.h>
46 #include <linux/types.h>
47 #include <linux/bitops.h>
48 #include <linux/init.h>
49 #include <linux/mm.h>
50 #include <linux/errno.h>
51 #include <linux/ioport.h>
52 #include <linux/pci.h>
53 #include <linux/kernel.h>
54 #include <linux/netdevice.h>
55 #include <linux/etherdevice.h>
56 #include <linux/skbuff.h>
57 #include <linux/delay.h>
58 #include <linux/timer.h>
59 #include <linux/slab.h>
60 #include <linux/interrupt.h>
61 #include <linux/string.h>
62 #include <linux/wait.h>
63 #include <linux/io.h>
64 #include <linux/if.h>
65 #include <linux/uaccess.h>
66 #include <linux/proc_fs.h>
67 #include <linux/inetdevice.h>
68 #include <linux/reboot.h>
69 #include <linux/ethtool.h>
70 #include <linux/mii.h>
71 #include <linux/in.h>
72 #include <linux/if_arp.h>
73 #include <linux/if_vlan.h>
74 #include <linux/ip.h>
75 #include <linux/tcp.h>
76 #include <linux/udp.h>
77 #include <linux/crc-ccitt.h>
78 #include <linux/crc32.h>
79
80 #include "via-velocity.h"
81
82
83 static int velocity_nics;
84 static int msglevel = MSG_LEVEL_INFO;
85
86 /**
87 * mac_get_cam_mask - Read a CAM mask
88 * @regs: register block for this velocity
89 * @mask: buffer to store mask
90 *
91 * Fetch the mask bits of the selected CAM and store them into the
92 * provided mask buffer.
93 */
94 static void mac_get_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
95 {
96 int i;
97
98 /* Select CAM mask */
99 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
100
101 writeb(0, &regs->CAMADDR);
102
103 /* read mask */
104 for (i = 0; i < 8; i++)
105 *mask++ = readb(&(regs->MARCAM[i]));
106
107 /* disable CAMEN */
108 writeb(0, &regs->CAMADDR);
109
110 /* Select mar */
111 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
112 }
113
114 /**
115 * mac_set_cam_mask - Set a CAM mask
116 * @regs: register block for this velocity
117 * @mask: CAM mask to load
118 *
119 * Store a new mask into a CAM
120 */
121 static void mac_set_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
122 {
123 int i;
124 /* Select CAM mask */
125 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
126
127 writeb(CAMADDR_CAMEN, &regs->CAMADDR);
128
129 for (i = 0; i < 8; i++)
130 writeb(*mask++, &(regs->MARCAM[i]));
131
132 /* disable CAMEN */
133 writeb(0, &regs->CAMADDR);
134
135 /* Select mar */
136 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
137 }
138
139 static void mac_set_vlan_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
140 {
141 int i;
142 /* Select CAM mask */
143 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
144
145 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, &regs->CAMADDR);
146
147 for (i = 0; i < 8; i++)
148 writeb(*mask++, &(regs->MARCAM[i]));
149
150 /* disable CAMEN */
151 writeb(0, &regs->CAMADDR);
152
153 /* Select mar */
154 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
155 }
156
157 /**
158 * mac_set_cam - set CAM data
159 * @regs: register block of this velocity
160 * @idx: Cam index
161 * @addr: 2 or 6 bytes of CAM data
162 *
163 * Load an address or vlan tag into a CAM
164 */
165 static void mac_set_cam(struct mac_regs __iomem *regs, int idx, const u8 *addr)
166 {
167 int i;
168
169 /* Select CAM mask */
170 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
171
172 idx &= (64 - 1);
173
174 writeb(CAMADDR_CAMEN | idx, &regs->CAMADDR);
175
176 for (i = 0; i < 6; i++)
177 writeb(*addr++, &(regs->MARCAM[i]));
178
179 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
180
181 udelay(10);
182
183 writeb(0, &regs->CAMADDR);
184
185 /* Select mar */
186 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
187 }
188
189 static void mac_set_vlan_cam(struct mac_regs __iomem *regs, int idx,
190 const u8 *addr)
191 {
192
193 /* Select CAM mask */
194 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
195
196 idx &= (64 - 1);
197
198 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, &regs->CAMADDR);
199 writew(*((u16 *) addr), &regs->MARCAM[0]);
200
201 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
202
203 udelay(10);
204
205 writeb(0, &regs->CAMADDR);
206
207 /* Select mar */
208 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
209 }
210
211
212 /**
213 * mac_wol_reset - reset WOL after exiting low power
214 * @regs: register block of this velocity
215 *
216 * Called after we drop out of wake on lan mode in order to
217 * reset the Wake on lan features. This function doesn't restore
218 * the rest of the logic from the result of sleep/wakeup
219 */
220 static void mac_wol_reset(struct mac_regs __iomem *regs)
221 {
222
223 /* Turn off SWPTAG right after leaving power mode */
224 BYTE_REG_BITS_OFF(STICKHW_SWPTAG, &regs->STICKHW);
225 /* clear sticky bits */
226 BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
227
228 BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, &regs->CHIPGCR);
229 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
230 /* disable force PME-enable */
231 writeb(WOLCFG_PMEOVR, &regs->WOLCFGClr);
232 /* disable power-event config bit */
233 writew(0xFFFF, &regs->WOLCRClr);
234 /* clear power status */
235 writew(0xFFFF, &regs->WOLSRClr);
236 }
237
238 static const struct ethtool_ops velocity_ethtool_ops;
239
240 /*
241 Define module options
242 */
243
244 MODULE_AUTHOR("VIA Networking Technologies, Inc.");
245 MODULE_LICENSE("GPL");
246 MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver");
247
248 #define VELOCITY_PARAM(N, D) \
249 static int N[MAX_UNITS] = OPTION_DEFAULT;\
250 module_param_array(N, int, NULL, 0); \
251 MODULE_PARM_DESC(N, D);
252
253 #define RX_DESC_MIN 64
254 #define RX_DESC_MAX 255
255 #define RX_DESC_DEF 64
256 VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors");
257
258 #define TX_DESC_MIN 16
259 #define TX_DESC_MAX 256
260 #define TX_DESC_DEF 64
261 VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors");
262
263 #define RX_THRESH_MIN 0
264 #define RX_THRESH_MAX 3
265 #define RX_THRESH_DEF 0
266 /* rx_thresh[] is used for controlling the receive fifo threshold.
267 0: indicate the rxfifo threshold is 128 bytes.
268 1: indicate the rxfifo threshold is 512 bytes.
269 2: indicate the rxfifo threshold is 1024 bytes.
270 3: indicate the rxfifo threshold is store & forward.
271 */
272 VELOCITY_PARAM(rx_thresh, "Receive fifo threshold");
273
274 #define DMA_LENGTH_MIN 0
275 #define DMA_LENGTH_MAX 7
276 #define DMA_LENGTH_DEF 6
277
278 /* DMA_length[] is used for controlling the DMA length
279 0: 8 DWORDs
280 1: 16 DWORDs
281 2: 32 DWORDs
282 3: 64 DWORDs
283 4: 128 DWORDs
284 5: 256 DWORDs
285 6: SF(flush till emply)
286 7: SF(flush till emply)
287 */
288 VELOCITY_PARAM(DMA_length, "DMA length");
289
290 #define IP_ALIG_DEF 0
291 /* IP_byte_align[] is used for IP header DWORD byte aligned
292 0: indicate the IP header won't be DWORD byte aligned.(Default) .
293 1: indicate the IP header will be DWORD byte aligned.
294 In some environment, the IP header should be DWORD byte aligned,
295 or the packet will be droped when we receive it. (eg: IPVS)
296 */
297 VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");
298
299 #define FLOW_CNTL_DEF 1
300 #define FLOW_CNTL_MIN 1
301 #define FLOW_CNTL_MAX 5
302
303 /* flow_control[] is used for setting the flow control ability of NIC.
304 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR.
305 2: enable TX flow control.
306 3: enable RX flow control.
307 4: enable RX/TX flow control.
308 5: disable
309 */
310 VELOCITY_PARAM(flow_control, "Enable flow control ability");
311
312 #define MED_LNK_DEF 0
313 #define MED_LNK_MIN 0
314 #define MED_LNK_MAX 5
315 /* speed_duplex[] is used for setting the speed and duplex mode of NIC.
316 0: indicate autonegotiation for both speed and duplex mode
317 1: indicate 100Mbps half duplex mode
318 2: indicate 100Mbps full duplex mode
319 3: indicate 10Mbps half duplex mode
320 4: indicate 10Mbps full duplex mode
321 5: indicate 1000Mbps full duplex mode
322
323 Note:
324 if EEPROM have been set to the force mode, this option is ignored
325 by driver.
326 */
327 VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode");
328
329 #define VAL_PKT_LEN_DEF 0
330 /* ValPktLen[] is used for setting the checksum offload ability of NIC.
331 0: Receive frame with invalid layer 2 length (Default)
332 1: Drop frame with invalid layer 2 length
333 */
334 VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame");
335
336 #define WOL_OPT_DEF 0
337 #define WOL_OPT_MIN 0
338 #define WOL_OPT_MAX 7
339 /* wol_opts[] is used for controlling wake on lan behavior.
340 0: Wake up if recevied a magic packet. (Default)
341 1: Wake up if link status is on/off.
342 2: Wake up if recevied an arp packet.
343 4: Wake up if recevied any unicast packet.
344 Those value can be sumed up to support more than one option.
345 */
346 VELOCITY_PARAM(wol_opts, "Wake On Lan options");
347
348 static int rx_copybreak = 200;
349 module_param(rx_copybreak, int, 0644);
350 MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
351
352 /*
353 * Internal board variants. At the moment we have only one
354 */
355 static struct velocity_info_tbl chip_info_table[] = {
356 {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL},
357 { }
358 };
359
360 /*
361 * Describe the PCI device identifiers that we support in this
362 * device driver. Used for hotplug autoloading.
363 */
364 static DEFINE_PCI_DEVICE_TABLE(velocity_id_table) = {
365 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) },
366 { }
367 };
368
369 MODULE_DEVICE_TABLE(pci, velocity_id_table);
370
371 /**
372 * get_chip_name - identifier to name
373 * @id: chip identifier
374 *
375 * Given a chip identifier return a suitable description. Returns
376 * a pointer a static string valid while the driver is loaded.
377 */
378 static const char __devinit *get_chip_name(enum chip_type chip_id)
379 {
380 int i;
381 for (i = 0; chip_info_table[i].name != NULL; i++)
382 if (chip_info_table[i].chip_id == chip_id)
383 break;
384 return chip_info_table[i].name;
385 }
386
387 /**
388 * velocity_remove1 - device unplug
389 * @pdev: PCI device being removed
390 *
391 * Device unload callback. Called on an unplug or on module
392 * unload for each active device that is present. Disconnects
393 * the device from the network layer and frees all the resources
394 */
395 static void __devexit velocity_remove1(struct pci_dev *pdev)
396 {
397 struct net_device *dev = pci_get_drvdata(pdev);
398 struct velocity_info *vptr = netdev_priv(dev);
399
400 unregister_netdev(dev);
401 iounmap(vptr->mac_regs);
402 pci_release_regions(pdev);
403 pci_disable_device(pdev);
404 pci_set_drvdata(pdev, NULL);
405 free_netdev(dev);
406
407 velocity_nics--;
408 }
409
410 /**
411 * velocity_set_int_opt - parser for integer options
412 * @opt: pointer to option value
413 * @val: value the user requested (or -1 for default)
414 * @min: lowest value allowed
415 * @max: highest value allowed
416 * @def: default value
417 * @name: property name
418 * @dev: device name
419 *
420 * Set an integer property in the module options. This function does
421 * all the verification and checking as well as reporting so that
422 * we don't duplicate code for each option.
423 */
424 static void __devinit velocity_set_int_opt(int *opt, int val, int min, int max, int def, char *name, const char *devname)
425 {
426 if (val == -1)
427 *opt = def;
428 else if (val < min || val > max) {
429 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",
430 devname, name, min, max);
431 *opt = def;
432 } else {
433 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n",
434 devname, name, val);
435 *opt = val;
436 }
437 }
438
439 /**
440 * velocity_set_bool_opt - parser for boolean options
441 * @opt: pointer to option value
442 * @val: value the user requested (or -1 for default)
443 * @def: default value (yes/no)
444 * @flag: numeric value to set for true.
445 * @name: property name
446 * @dev: device name
447 *
448 * Set a boolean property in the module options. This function does
449 * all the verification and checking as well as reporting so that
450 * we don't duplicate code for each option.
451 */
452 static void __devinit velocity_set_bool_opt(u32 *opt, int val, int def, u32 flag, char *name, const char *devname)
453 {
454 (*opt) &= (~flag);
455 if (val == -1)
456 *opt |= (def ? flag : 0);
457 else if (val < 0 || val > 1) {
458 printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n",
459 devname, name);
460 *opt |= (def ? flag : 0);
461 } else {
462 printk(KERN_INFO "%s: set parameter %s to %s\n",
463 devname, name, val ? "TRUE" : "FALSE");
464 *opt |= (val ? flag : 0);
465 }
466 }
467
468 /**
469 * velocity_get_options - set options on device
470 * @opts: option structure for the device
471 * @index: index of option to use in module options array
472 * @devname: device name
473 *
474 * Turn the module and command options into a single structure
475 * for the current device
476 */
477 static void __devinit velocity_get_options(struct velocity_opt *opts, int index, const char *devname)
478 {
479
480 velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname);
481 velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname);
482 velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname);
483 velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname);
484
485 velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname);
486 velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname);
487 velocity_set_bool_opt(&opts->flags, ValPktLen[index], VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN, "ValPktLen", devname);
488 velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname);
489 velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname);
490 opts->numrx = (opts->numrx & ~3);
491 }
492
493 /**
494 * velocity_init_cam_filter - initialise CAM
495 * @vptr: velocity to program
496 *
497 * Initialize the content addressable memory used for filters. Load
498 * appropriately according to the presence of VLAN
499 */
500 static void velocity_init_cam_filter(struct velocity_info *vptr)
501 {
502 struct mac_regs __iomem *regs = vptr->mac_regs;
503 unsigned int vid, i = 0;
504
505 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
506 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
507 WORD_REG_BITS_ON(MCFG_VIDFR, &regs->MCFG);
508
509 /* Disable all CAMs */
510 memset(vptr->vCAMmask, 0, sizeof(u8) * 8);
511 memset(vptr->mCAMmask, 0, sizeof(u8) * 8);
512 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
513 mac_set_cam_mask(regs, vptr->mCAMmask);
514
515 /* Enable VCAMs */
516 for_each_set_bit(vid, vptr->active_vlans, VLAN_N_VID) {
517 mac_set_vlan_cam(regs, i, (u8 *) &vid);
518 vptr->vCAMmask[i / 8] |= 0x1 << (i % 8);
519 if (++i >= VCAM_SIZE)
520 break;
521 }
522 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
523 }
524
525 static void velocity_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
526 {
527 struct velocity_info *vptr = netdev_priv(dev);
528
529 spin_lock_irq(&vptr->lock);
530 set_bit(vid, vptr->active_vlans);
531 velocity_init_cam_filter(vptr);
532 spin_unlock_irq(&vptr->lock);
533 }
534
535 static void velocity_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
536 {
537 struct velocity_info *vptr = netdev_priv(dev);
538
539 spin_lock_irq(&vptr->lock);
540 clear_bit(vid, vptr->active_vlans);
541 velocity_init_cam_filter(vptr);
542 spin_unlock_irq(&vptr->lock);
543 }
544
545 static void velocity_init_rx_ring_indexes(struct velocity_info *vptr)
546 {
547 vptr->rx.dirty = vptr->rx.filled = vptr->rx.curr = 0;
548 }
549
550 /**
551 * velocity_rx_reset - handle a receive reset
552 * @vptr: velocity we are resetting
553 *
554 * Reset the ownership and status for the receive ring side.
555 * Hand all the receive queue to the NIC.
556 */
557 static void velocity_rx_reset(struct velocity_info *vptr)
558 {
559
560 struct mac_regs __iomem *regs = vptr->mac_regs;
561 int i;
562
563 velocity_init_rx_ring_indexes(vptr);
564
565 /*
566 * Init state, all RD entries belong to the NIC
567 */
568 for (i = 0; i < vptr->options.numrx; ++i)
569 vptr->rx.ring[i].rdesc0.len |= OWNED_BY_NIC;
570
571 writew(vptr->options.numrx, &regs->RBRDU);
572 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
573 writew(0, &regs->RDIdx);
574 writew(vptr->options.numrx - 1, &regs->RDCSize);
575 }
576
577 /**
578 * velocity_get_opt_media_mode - get media selection
579 * @vptr: velocity adapter
580 *
581 * Get the media mode stored in EEPROM or module options and load
582 * mii_status accordingly. The requested link state information
583 * is also returned.
584 */
585 static u32 velocity_get_opt_media_mode(struct velocity_info *vptr)
586 {
587 u32 status = 0;
588
589 switch (vptr->options.spd_dpx) {
590 case SPD_DPX_AUTO:
591 status = VELOCITY_AUTONEG_ENABLE;
592 break;
593 case SPD_DPX_100_FULL:
594 status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL;
595 break;
596 case SPD_DPX_10_FULL:
597 status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL;
598 break;
599 case SPD_DPX_100_HALF:
600 status = VELOCITY_SPEED_100;
601 break;
602 case SPD_DPX_10_HALF:
603 status = VELOCITY_SPEED_10;
604 break;
605 case SPD_DPX_1000_FULL:
606 status = VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
607 break;
608 }
609 vptr->mii_status = status;
610 return status;
611 }
612
613 /**
614 * safe_disable_mii_autopoll - autopoll off
615 * @regs: velocity registers
616 *
617 * Turn off the autopoll and wait for it to disable on the chip
618 */
619 static void safe_disable_mii_autopoll(struct mac_regs __iomem *regs)
620 {
621 u16 ww;
622
623 /* turn off MAUTO */
624 writeb(0, &regs->MIICR);
625 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
626 udelay(1);
627 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
628 break;
629 }
630 }
631
632 /**
633 * enable_mii_autopoll - turn on autopolling
634 * @regs: velocity registers
635 *
636 * Enable the MII link status autopoll feature on the Velocity
637 * hardware. Wait for it to enable.
638 */
639 static void enable_mii_autopoll(struct mac_regs __iomem *regs)
640 {
641 int ii;
642
643 writeb(0, &(regs->MIICR));
644 writeb(MIIADR_SWMPL, &regs->MIIADR);
645
646 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
647 udelay(1);
648 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
649 break;
650 }
651
652 writeb(MIICR_MAUTO, &regs->MIICR);
653
654 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
655 udelay(1);
656 if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
657 break;
658 }
659
660 }
661
662 /**
663 * velocity_mii_read - read MII data
664 * @regs: velocity registers
665 * @index: MII register index
666 * @data: buffer for received data
667 *
668 * Perform a single read of an MII 16bit register. Returns zero
669 * on success or -ETIMEDOUT if the PHY did not respond.
670 */
671 static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
672 {
673 u16 ww;
674
675 /*
676 * Disable MIICR_MAUTO, so that mii addr can be set normally
677 */
678 safe_disable_mii_autopoll(regs);
679
680 writeb(index, &regs->MIIADR);
681
682 BYTE_REG_BITS_ON(MIICR_RCMD, &regs->MIICR);
683
684 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
685 if (!(readb(&regs->MIICR) & MIICR_RCMD))
686 break;
687 }
688
689 *data = readw(&regs->MIIDATA);
690
691 enable_mii_autopoll(regs);
692 if (ww == W_MAX_TIMEOUT)
693 return -ETIMEDOUT;
694 return 0;
695 }
696
697 /**
698 * mii_check_media_mode - check media state
699 * @regs: velocity registers
700 *
701 * Check the current MII status and determine the link status
702 * accordingly
703 */
704 static u32 mii_check_media_mode(struct mac_regs __iomem *regs)
705 {
706 u32 status = 0;
707 u16 ANAR;
708
709 if (!MII_REG_BITS_IS_ON(BMSR_LSTATUS, MII_BMSR, regs))
710 status |= VELOCITY_LINK_FAIL;
711
712 if (MII_REG_BITS_IS_ON(ADVERTISE_1000FULL, MII_CTRL1000, regs))
713 status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
714 else if (MII_REG_BITS_IS_ON(ADVERTISE_1000HALF, MII_CTRL1000, regs))
715 status |= (VELOCITY_SPEED_1000);
716 else {
717 velocity_mii_read(regs, MII_ADVERTISE, &ANAR);
718 if (ANAR & ADVERTISE_100FULL)
719 status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL);
720 else if (ANAR & ADVERTISE_100HALF)
721 status |= VELOCITY_SPEED_100;
722 else if (ANAR & ADVERTISE_10FULL)
723 status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL);
724 else
725 status |= (VELOCITY_SPEED_10);
726 }
727
728 if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, regs)) {
729 velocity_mii_read(regs, MII_ADVERTISE, &ANAR);
730 if ((ANAR & (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF))
731 == (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF)) {
732 if (MII_REG_BITS_IS_ON(ADVERTISE_1000HALF | ADVERTISE_1000FULL, MII_CTRL1000, regs))
733 status |= VELOCITY_AUTONEG_ENABLE;
734 }
735 }
736
737 return status;
738 }
739
740 /**
741 * velocity_mii_write - write MII data
742 * @regs: velocity registers
743 * @index: MII register index
744 * @data: 16bit data for the MII register
745 *
746 * Perform a single write to an MII 16bit register. Returns zero
747 * on success or -ETIMEDOUT if the PHY did not respond.
748 */
749 static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
750 {
751 u16 ww;
752
753 /*
754 * Disable MIICR_MAUTO, so that mii addr can be set normally
755 */
756 safe_disable_mii_autopoll(regs);
757
758 /* MII reg offset */
759 writeb(mii_addr, &regs->MIIADR);
760 /* set MII data */
761 writew(data, &regs->MIIDATA);
762
763 /* turn on MIICR_WCMD */
764 BYTE_REG_BITS_ON(MIICR_WCMD, &regs->MIICR);
765
766 /* W_MAX_TIMEOUT is the timeout period */
767 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
768 udelay(5);
769 if (!(readb(&regs->MIICR) & MIICR_WCMD))
770 break;
771 }
772 enable_mii_autopoll(regs);
773
774 if (ww == W_MAX_TIMEOUT)
775 return -ETIMEDOUT;
776 return 0;
777 }
778
779 /**
780 * set_mii_flow_control - flow control setup
781 * @vptr: velocity interface
782 *
783 * Set up the flow control on this interface according to
784 * the supplied user/eeprom options.
785 */
786 static void set_mii_flow_control(struct velocity_info *vptr)
787 {
788 /*Enable or Disable PAUSE in ANAR */
789 switch (vptr->options.flow_cntl) {
790 case FLOW_CNTL_TX:
791 MII_REG_BITS_OFF(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
792 MII_REG_BITS_ON(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
793 break;
794
795 case FLOW_CNTL_RX:
796 MII_REG_BITS_ON(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
797 MII_REG_BITS_ON(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
798 break;
799
800 case FLOW_CNTL_TX_RX:
801 MII_REG_BITS_ON(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
802 MII_REG_BITS_OFF(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
803 break;
804
805 case FLOW_CNTL_DISABLE:
806 MII_REG_BITS_OFF(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
807 MII_REG_BITS_OFF(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
808 break;
809 default:
810 break;
811 }
812 }
813
814 /**
815 * mii_set_auto_on - autonegotiate on
816 * @vptr: velocity
817 *
818 * Enable autonegotation on this interface
819 */
820 static void mii_set_auto_on(struct velocity_info *vptr)
821 {
822 if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs))
823 MII_REG_BITS_ON(BMCR_ANRESTART, MII_BMCR, vptr->mac_regs);
824 else
825 MII_REG_BITS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs);
826 }
827
828 static u32 check_connection_type(struct mac_regs __iomem *regs)
829 {
830 u32 status = 0;
831 u8 PHYSR0;
832 u16 ANAR;
833 PHYSR0 = readb(&regs->PHYSR0);
834
835 /*
836 if (!(PHYSR0 & PHYSR0_LINKGD))
837 status|=VELOCITY_LINK_FAIL;
838 */
839
840 if (PHYSR0 & PHYSR0_FDPX)
841 status |= VELOCITY_DUPLEX_FULL;
842
843 if (PHYSR0 & PHYSR0_SPDG)
844 status |= VELOCITY_SPEED_1000;
845 else if (PHYSR0 & PHYSR0_SPD10)
846 status |= VELOCITY_SPEED_10;
847 else
848 status |= VELOCITY_SPEED_100;
849
850 if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, regs)) {
851 velocity_mii_read(regs, MII_ADVERTISE, &ANAR);
852 if ((ANAR & (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF))
853 == (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF)) {
854 if (MII_REG_BITS_IS_ON(ADVERTISE_1000HALF | ADVERTISE_1000FULL, MII_CTRL1000, regs))
855 status |= VELOCITY_AUTONEG_ENABLE;
856 }
857 }
858
859 return status;
860 }
861
862 /**
863 * velocity_set_media_mode - set media mode
864 * @mii_status: old MII link state
865 *
866 * Check the media link state and configure the flow control
867 * PHY and also velocity hardware setup accordingly. In particular
868 * we need to set up CD polling and frame bursting.
869 */
870 static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status)
871 {
872 u32 curr_status;
873 struct mac_regs __iomem *regs = vptr->mac_regs;
874
875 vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
876 curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL);
877
878 /* Set mii link status */
879 set_mii_flow_control(vptr);
880
881 /*
882 Check if new status is consistent with current status
883 if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE) ||
884 (mii_status==curr_status)) {
885 vptr->mii_status=mii_check_media_mode(vptr->mac_regs);
886 vptr->mii_status=check_connection_type(vptr->mac_regs);
887 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n");
888 return 0;
889 }
890 */
891
892 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
893 MII_REG_BITS_ON(AUXCR_MDPPS, MII_NCONFIG, vptr->mac_regs);
894
895 /*
896 * If connection type is AUTO
897 */
898 if (mii_status & VELOCITY_AUTONEG_ENABLE) {
899 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n");
900 /* clear force MAC mode bit */
901 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
902 /* set duplex mode of MAC according to duplex mode of MII */
903 MII_REG_BITS_ON(ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF, MII_ADVERTISE, vptr->mac_regs);
904 MII_REG_BITS_ON(ADVERTISE_1000FULL | ADVERTISE_1000HALF, MII_CTRL1000, vptr->mac_regs);
905 MII_REG_BITS_ON(BMCR_SPEED1000, MII_BMCR, vptr->mac_regs);
906
907 /* enable AUTO-NEGO mode */
908 mii_set_auto_on(vptr);
909 } else {
910 u16 CTRL1000;
911 u16 ANAR;
912 u8 CHIPGCR;
913
914 /*
915 * 1. if it's 3119, disable frame bursting in halfduplex mode
916 * and enable it in fullduplex mode
917 * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR
918 * 3. only enable CD heart beat counter in 10HD mode
919 */
920
921 /* set force MAC mode bit */
922 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
923
924 CHIPGCR = readb(&regs->CHIPGCR);
925
926 if (mii_status & VELOCITY_SPEED_1000)
927 CHIPGCR |= CHIPGCR_FCGMII;
928 else
929 CHIPGCR &= ~CHIPGCR_FCGMII;
930
931 if (mii_status & VELOCITY_DUPLEX_FULL) {
932 CHIPGCR |= CHIPGCR_FCFDX;
933 writeb(CHIPGCR, &regs->CHIPGCR);
934 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n");
935 if (vptr->rev_id < REV_ID_VT3216_A0)
936 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
937 } else {
938 CHIPGCR &= ~CHIPGCR_FCFDX;
939 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n");
940 writeb(CHIPGCR, &regs->CHIPGCR);
941 if (vptr->rev_id < REV_ID_VT3216_A0)
942 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
943 }
944
945 velocity_mii_read(vptr->mac_regs, MII_CTRL1000, &CTRL1000);
946 CTRL1000 &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
947 if ((mii_status & VELOCITY_SPEED_1000) &&
948 (mii_status & VELOCITY_DUPLEX_FULL)) {
949 CTRL1000 |= ADVERTISE_1000FULL;
950 }
951 velocity_mii_write(vptr->mac_regs, MII_CTRL1000, CTRL1000);
952
953 if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10))
954 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
955 else
956 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
957
958 /* MII_REG_BITS_OFF(BMCR_SPEED1000, MII_BMCR, vptr->mac_regs); */
959 velocity_mii_read(vptr->mac_regs, MII_ADVERTISE, &ANAR);
960 ANAR &= (~(ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF));
961 if (mii_status & VELOCITY_SPEED_100) {
962 if (mii_status & VELOCITY_DUPLEX_FULL)
963 ANAR |= ADVERTISE_100FULL;
964 else
965 ANAR |= ADVERTISE_100HALF;
966 } else if (mii_status & VELOCITY_SPEED_10) {
967 if (mii_status & VELOCITY_DUPLEX_FULL)
968 ANAR |= ADVERTISE_10FULL;
969 else
970 ANAR |= ADVERTISE_10HALF;
971 }
972 velocity_mii_write(vptr->mac_regs, MII_ADVERTISE, ANAR);
973 /* enable AUTO-NEGO mode */
974 mii_set_auto_on(vptr);
975 /* MII_REG_BITS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs); */
976 }
977 /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
978 /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
979 return VELOCITY_LINK_CHANGE;
980 }
981
982 /**
983 * velocity_print_link_status - link status reporting
984 * @vptr: velocity to report on
985 *
986 * Turn the link status of the velocity card into a kernel log
987 * description of the new link state, detailing speed and duplex
988 * status
989 */
990 static void velocity_print_link_status(struct velocity_info *vptr)
991 {
992
993 if (vptr->mii_status & VELOCITY_LINK_FAIL) {
994 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->dev->name);
995 } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
996 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link auto-negotiation", vptr->dev->name);
997
998 if (vptr->mii_status & VELOCITY_SPEED_1000)
999 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps");
1000 else if (vptr->mii_status & VELOCITY_SPEED_100)
1001 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps");
1002 else
1003 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps");
1004
1005 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1006 VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n");
1007 else
1008 VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n");
1009 } else {
1010 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->dev->name);
1011 switch (vptr->options.spd_dpx) {
1012 case SPD_DPX_1000_FULL:
1013 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps full duplex\n");
1014 break;
1015 case SPD_DPX_100_HALF:
1016 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n");
1017 break;
1018 case SPD_DPX_100_FULL:
1019 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n");
1020 break;
1021 case SPD_DPX_10_HALF:
1022 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n");
1023 break;
1024 case SPD_DPX_10_FULL:
1025 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n");
1026 break;
1027 default:
1028 break;
1029 }
1030 }
1031 }
1032
1033 /**
1034 * enable_flow_control_ability - flow control
1035 * @vptr: veloity to configure
1036 *
1037 * Set up flow control according to the flow control options
1038 * determined by the eeprom/configuration.
1039 */
1040 static void enable_flow_control_ability(struct velocity_info *vptr)
1041 {
1042
1043 struct mac_regs __iomem *regs = vptr->mac_regs;
1044
1045 switch (vptr->options.flow_cntl) {
1046
1047 case FLOW_CNTL_DEFAULT:
1048 if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, &regs->PHYSR0))
1049 writel(CR0_FDXRFCEN, &regs->CR0Set);
1050 else
1051 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1052
1053 if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, &regs->PHYSR0))
1054 writel(CR0_FDXTFCEN, &regs->CR0Set);
1055 else
1056 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1057 break;
1058
1059 case FLOW_CNTL_TX:
1060 writel(CR0_FDXTFCEN, &regs->CR0Set);
1061 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1062 break;
1063
1064 case FLOW_CNTL_RX:
1065 writel(CR0_FDXRFCEN, &regs->CR0Set);
1066 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1067 break;
1068
1069 case FLOW_CNTL_TX_RX:
1070 writel(CR0_FDXTFCEN, &regs->CR0Set);
1071 writel(CR0_FDXRFCEN, &regs->CR0Set);
1072 break;
1073
1074 case FLOW_CNTL_DISABLE:
1075 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1076 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1077 break;
1078
1079 default:
1080 break;
1081 }
1082
1083 }
1084
1085 /**
1086 * velocity_soft_reset - soft reset
1087 * @vptr: velocity to reset
1088 *
1089 * Kick off a soft reset of the velocity adapter and then poll
1090 * until the reset sequence has completed before returning.
1091 */
1092 static int velocity_soft_reset(struct velocity_info *vptr)
1093 {
1094 struct mac_regs __iomem *regs = vptr->mac_regs;
1095 int i = 0;
1096
1097 writel(CR0_SFRST, &regs->CR0Set);
1098
1099 for (i = 0; i < W_MAX_TIMEOUT; i++) {
1100 udelay(5);
1101 if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, &regs->CR0Set))
1102 break;
1103 }
1104
1105 if (i == W_MAX_TIMEOUT) {
1106 writel(CR0_FORSRST, &regs->CR0Set);
1107 /* FIXME: PCI POSTING */
1108 /* delay 2ms */
1109 mdelay(2);
1110 }
1111 return 0;
1112 }
1113
1114 /**
1115 * velocity_set_multi - filter list change callback
1116 * @dev: network device
1117 *
1118 * Called by the network layer when the filter lists need to change
1119 * for a velocity adapter. Reload the CAMs with the new address
1120 * filter ruleset.
1121 */
1122 static void velocity_set_multi(struct net_device *dev)
1123 {
1124 struct velocity_info *vptr = netdev_priv(dev);
1125 struct mac_regs __iomem *regs = vptr->mac_regs;
1126 u8 rx_mode;
1127 int i;
1128 struct netdev_hw_addr *ha;
1129
1130 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1131 writel(0xffffffff, &regs->MARCAM[0]);
1132 writel(0xffffffff, &regs->MARCAM[4]);
1133 rx_mode = (RCR_AM | RCR_AB | RCR_PROM);
1134 } else if ((netdev_mc_count(dev) > vptr->multicast_limit) ||
1135 (dev->flags & IFF_ALLMULTI)) {
1136 writel(0xffffffff, &regs->MARCAM[0]);
1137 writel(0xffffffff, &regs->MARCAM[4]);
1138 rx_mode = (RCR_AM | RCR_AB);
1139 } else {
1140 int offset = MCAM_SIZE - vptr->multicast_limit;
1141 mac_get_cam_mask(regs, vptr->mCAMmask);
1142
1143 i = 0;
1144 netdev_for_each_mc_addr(ha, dev) {
1145 mac_set_cam(regs, i + offset, ha->addr);
1146 vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7);
1147 i++;
1148 }
1149
1150 mac_set_cam_mask(regs, vptr->mCAMmask);
1151 rx_mode = RCR_AM | RCR_AB | RCR_AP;
1152 }
1153 if (dev->mtu > 1500)
1154 rx_mode |= RCR_AL;
1155
1156 BYTE_REG_BITS_ON(rx_mode, &regs->RCR);
1157
1158 }
1159
1160 /*
1161 * MII access , media link mode setting functions
1162 */
1163
1164 /**
1165 * mii_init - set up MII
1166 * @vptr: velocity adapter
1167 * @mii_status: links tatus
1168 *
1169 * Set up the PHY for the current link state.
1170 */
1171 static void mii_init(struct velocity_info *vptr, u32 mii_status)
1172 {
1173 u16 BMCR;
1174
1175 switch (PHYID_GET_PHY_ID(vptr->phy_id)) {
1176 case PHYID_CICADA_CS8201:
1177 /*
1178 * Reset to hardware default
1179 */
1180 MII_REG_BITS_OFF((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
1181 /*
1182 * Turn on ECHODIS bit in NWay-forced full mode and turn it
1183 * off it in NWay-forced half mode for NWay-forced v.s.
1184 * legacy-forced issue.
1185 */
1186 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1187 MII_REG_BITS_ON(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
1188 else
1189 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
1190 /*
1191 * Turn on Link/Activity LED enable bit for CIS8201
1192 */
1193 MII_REG_BITS_ON(PLED_LALBE, MII_TPISTATUS, vptr->mac_regs);
1194 break;
1195 case PHYID_VT3216_32BIT:
1196 case PHYID_VT3216_64BIT:
1197 /*
1198 * Reset to hardware default
1199 */
1200 MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
1201 /*
1202 * Turn on ECHODIS bit in NWay-forced full mode and turn it
1203 * off it in NWay-forced half mode for NWay-forced v.s.
1204 * legacy-forced issue
1205 */
1206 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1207 MII_REG_BITS_ON(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
1208 else
1209 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
1210 break;
1211
1212 case PHYID_MARVELL_1000:
1213 case PHYID_MARVELL_1000S:
1214 /*
1215 * Assert CRS on Transmit
1216 */
1217 MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
1218 /*
1219 * Reset to hardware default
1220 */
1221 MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
1222 break;
1223 default:
1224 ;
1225 }
1226 velocity_mii_read(vptr->mac_regs, MII_BMCR, &BMCR);
1227 if (BMCR & BMCR_ISOLATE) {
1228 BMCR &= ~BMCR_ISOLATE;
1229 velocity_mii_write(vptr->mac_regs, MII_BMCR, BMCR);
1230 }
1231 }
1232
1233 /**
1234 * setup_queue_timers - Setup interrupt timers
1235 *
1236 * Setup interrupt frequency during suppression (timeout if the frame
1237 * count isn't filled).
1238 */
1239 static void setup_queue_timers(struct velocity_info *vptr)
1240 {
1241 /* Only for newer revisions */
1242 if (vptr->rev_id >= REV_ID_VT3216_A0) {
1243 u8 txqueue_timer = 0;
1244 u8 rxqueue_timer = 0;
1245
1246 if (vptr->mii_status & (VELOCITY_SPEED_1000 |
1247 VELOCITY_SPEED_100)) {
1248 txqueue_timer = vptr->options.txqueue_timer;
1249 rxqueue_timer = vptr->options.rxqueue_timer;
1250 }
1251
1252 writeb(txqueue_timer, &vptr->mac_regs->TQETMR);
1253 writeb(rxqueue_timer, &vptr->mac_regs->RQETMR);
1254 }
1255 }
1256
1257 /**
1258 * setup_adaptive_interrupts - Setup interrupt suppression
1259 *
1260 * @vptr velocity adapter
1261 *
1262 * The velocity is able to suppress interrupt during high interrupt load.
1263 * This function turns on that feature.
1264 */
1265 static void setup_adaptive_interrupts(struct velocity_info *vptr)
1266 {
1267 struct mac_regs __iomem *regs = vptr->mac_regs;
1268 u16 tx_intsup = vptr->options.tx_intsup;
1269 u16 rx_intsup = vptr->options.rx_intsup;
1270
1271 /* Setup default interrupt mask (will be changed below) */
1272 vptr->int_mask = INT_MASK_DEF;
1273
1274 /* Set Tx Interrupt Suppression Threshold */
1275 writeb(CAMCR_PS0, &regs->CAMCR);
1276 if (tx_intsup != 0) {
1277 vptr->int_mask &= ~(ISR_PTXI | ISR_PTX0I | ISR_PTX1I |
1278 ISR_PTX2I | ISR_PTX3I);
1279 writew(tx_intsup, &regs->ISRCTL);
1280 } else
1281 writew(ISRCTL_TSUPDIS, &regs->ISRCTL);
1282
1283 /* Set Rx Interrupt Suppression Threshold */
1284 writeb(CAMCR_PS1, &regs->CAMCR);
1285 if (rx_intsup != 0) {
1286 vptr->int_mask &= ~ISR_PRXI;
1287 writew(rx_intsup, &regs->ISRCTL);
1288 } else
1289 writew(ISRCTL_RSUPDIS, &regs->ISRCTL);
1290
1291 /* Select page to interrupt hold timer */
1292 writeb(0, &regs->CAMCR);
1293 }
1294
1295 /**
1296 * velocity_init_registers - initialise MAC registers
1297 * @vptr: velocity to init
1298 * @type: type of initialisation (hot or cold)
1299 *
1300 * Initialise the MAC on a reset or on first set up on the
1301 * hardware.
1302 */
1303 static void velocity_init_registers(struct velocity_info *vptr,
1304 enum velocity_init_type type)
1305 {
1306 struct mac_regs __iomem *regs = vptr->mac_regs;
1307 int i, mii_status;
1308
1309 mac_wol_reset(regs);
1310
1311 switch (type) {
1312 case VELOCITY_INIT_RESET:
1313 case VELOCITY_INIT_WOL:
1314
1315 netif_stop_queue(vptr->dev);
1316
1317 /*
1318 * Reset RX to prevent RX pointer not on the 4X location
1319 */
1320 velocity_rx_reset(vptr);
1321 mac_rx_queue_run(regs);
1322 mac_rx_queue_wake(regs);
1323
1324 mii_status = velocity_get_opt_media_mode(vptr);
1325 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
1326 velocity_print_link_status(vptr);
1327 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
1328 netif_wake_queue(vptr->dev);
1329 }
1330
1331 enable_flow_control_ability(vptr);
1332
1333 mac_clear_isr(regs);
1334 writel(CR0_STOP, &regs->CR0Clr);
1335 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
1336 &regs->CR0Set);
1337
1338 break;
1339
1340 case VELOCITY_INIT_COLD:
1341 default:
1342 /*
1343 * Do reset
1344 */
1345 velocity_soft_reset(vptr);
1346 mdelay(5);
1347
1348 mac_eeprom_reload(regs);
1349 for (i = 0; i < 6; i++)
1350 writeb(vptr->dev->dev_addr[i], &(regs->PAR[i]));
1351
1352 /*
1353 * clear Pre_ACPI bit.
1354 */
1355 BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA));
1356 mac_set_rx_thresh(regs, vptr->options.rx_thresh);
1357 mac_set_dma_length(regs, vptr->options.DMA_length);
1358
1359 writeb(WOLCFG_SAM | WOLCFG_SAB, &regs->WOLCFGSet);
1360 /*
1361 * Back off algorithm use original IEEE standard
1362 */
1363 BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), &regs->CFGB);
1364
1365 /*
1366 * Init CAM filter
1367 */
1368 velocity_init_cam_filter(vptr);
1369
1370 /*
1371 * Set packet filter: Receive directed and broadcast address
1372 */
1373 velocity_set_multi(vptr->dev);
1374
1375 /*
1376 * Enable MII auto-polling
1377 */
1378 enable_mii_autopoll(regs);
1379
1380 setup_adaptive_interrupts(vptr);
1381
1382 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
1383 writew(vptr->options.numrx - 1, &regs->RDCSize);
1384 mac_rx_queue_run(regs);
1385 mac_rx_queue_wake(regs);
1386
1387 writew(vptr->options.numtx - 1, &regs->TDCSize);
1388
1389 for (i = 0; i < vptr->tx.numq; i++) {
1390 writel(vptr->tx.pool_dma[i], &regs->TDBaseLo[i]);
1391 mac_tx_queue_run(regs, i);
1392 }
1393
1394 init_flow_control_register(vptr);
1395
1396 writel(CR0_STOP, &regs->CR0Clr);
1397 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), &regs->CR0Set);
1398
1399 mii_status = velocity_get_opt_media_mode(vptr);
1400 netif_stop_queue(vptr->dev);
1401
1402 mii_init(vptr, mii_status);
1403
1404 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
1405 velocity_print_link_status(vptr);
1406 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
1407 netif_wake_queue(vptr->dev);
1408 }
1409
1410 enable_flow_control_ability(vptr);
1411 mac_hw_mibs_init(regs);
1412 mac_write_int_mask(vptr->int_mask, regs);
1413 mac_clear_isr(regs);
1414
1415 }
1416 }
1417
1418 static void velocity_give_many_rx_descs(struct velocity_info *vptr)
1419 {
1420 struct mac_regs __iomem *regs = vptr->mac_regs;
1421 int avail, dirty, unusable;
1422
1423 /*
1424 * RD number must be equal to 4X per hardware spec
1425 * (programming guide rev 1.20, p.13)
1426 */
1427 if (vptr->rx.filled < 4)
1428 return;
1429
1430 wmb();
1431
1432 unusable = vptr->rx.filled & 0x0003;
1433 dirty = vptr->rx.dirty - unusable;
1434 for (avail = vptr->rx.filled & 0xfffc; avail; avail--) {
1435 dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
1436 vptr->rx.ring[dirty].rdesc0.len |= OWNED_BY_NIC;
1437 }
1438
1439 writew(vptr->rx.filled & 0xfffc, &regs->RBRDU);
1440 vptr->rx.filled = unusable;
1441 }
1442
1443 /**
1444 * velocity_init_dma_rings - set up DMA rings
1445 * @vptr: Velocity to set up
1446 *
1447 * Allocate PCI mapped DMA rings for the receive and transmit layer
1448 * to use.
1449 */
1450 static int velocity_init_dma_rings(struct velocity_info *vptr)
1451 {
1452 struct velocity_opt *opt = &vptr->options;
1453 const unsigned int rx_ring_size = opt->numrx * sizeof(struct rx_desc);
1454 const unsigned int tx_ring_size = opt->numtx * sizeof(struct tx_desc);
1455 struct pci_dev *pdev = vptr->pdev;
1456 dma_addr_t pool_dma;
1457 void *pool;
1458 unsigned int i;
1459
1460 /*
1461 * Allocate all RD/TD rings a single pool.
1462 *
1463 * pci_alloc_consistent() fulfills the requirement for 64 bytes
1464 * alignment
1465 */
1466 pool = pci_alloc_consistent(pdev, tx_ring_size * vptr->tx.numq +
1467 rx_ring_size, &pool_dma);
1468 if (!pool) {
1469 dev_err(&pdev->dev, "%s : DMA memory allocation failed.\n",
1470 vptr->dev->name);
1471 return -ENOMEM;
1472 }
1473
1474 vptr->rx.ring = pool;
1475 vptr->rx.pool_dma = pool_dma;
1476
1477 pool += rx_ring_size;
1478 pool_dma += rx_ring_size;
1479
1480 for (i = 0; i < vptr->tx.numq; i++) {
1481 vptr->tx.rings[i] = pool;
1482 vptr->tx.pool_dma[i] = pool_dma;
1483 pool += tx_ring_size;
1484 pool_dma += tx_ring_size;
1485 }
1486
1487 return 0;
1488 }
1489
1490 static void velocity_set_rxbufsize(struct velocity_info *vptr, int mtu)
1491 {
1492 vptr->rx.buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
1493 }
1494
1495 /**
1496 * velocity_alloc_rx_buf - allocate aligned receive buffer
1497 * @vptr: velocity
1498 * @idx: ring index
1499 *
1500 * Allocate a new full sized buffer for the reception of a frame and
1501 * map it into PCI space for the hardware to use. The hardware
1502 * requires *64* byte alignment of the buffer which makes life
1503 * less fun than would be ideal.
1504 */
1505 static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
1506 {
1507 struct rx_desc *rd = &(vptr->rx.ring[idx]);
1508 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
1509
1510 rd_info->skb = dev_alloc_skb(vptr->rx.buf_sz + 64);
1511 if (rd_info->skb == NULL)
1512 return -ENOMEM;
1513
1514 /*
1515 * Do the gymnastics to get the buffer head for data at
1516 * 64byte alignment.
1517 */
1518 skb_reserve(rd_info->skb,
1519 64 - ((unsigned long) rd_info->skb->data & 63));
1520 rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data,
1521 vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
1522
1523 /*
1524 * Fill in the descriptor to match
1525 */
1526
1527 *((u32 *) & (rd->rdesc0)) = 0;
1528 rd->size = cpu_to_le16(vptr->rx.buf_sz) | RX_INTEN;
1529 rd->pa_low = cpu_to_le32(rd_info->skb_dma);
1530 rd->pa_high = 0;
1531 return 0;
1532 }
1533
1534
1535 static int velocity_rx_refill(struct velocity_info *vptr)
1536 {
1537 int dirty = vptr->rx.dirty, done = 0;
1538
1539 do {
1540 struct rx_desc *rd = vptr->rx.ring + dirty;
1541
1542 /* Fine for an all zero Rx desc at init time as well */
1543 if (rd->rdesc0.len & OWNED_BY_NIC)
1544 break;
1545
1546 if (!vptr->rx.info[dirty].skb) {
1547 if (velocity_alloc_rx_buf(vptr, dirty) < 0)
1548 break;
1549 }
1550 done++;
1551 dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
1552 } while (dirty != vptr->rx.curr);
1553
1554 if (done) {
1555 vptr->rx.dirty = dirty;
1556 vptr->rx.filled += done;
1557 }
1558
1559 return done;
1560 }
1561
1562 /**
1563 * velocity_free_rd_ring - free receive ring
1564 * @vptr: velocity to clean up
1565 *
1566 * Free the receive buffers for each ring slot and any
1567 * attached socket buffers that need to go away.
1568 */
1569 static void velocity_free_rd_ring(struct velocity_info *vptr)
1570 {
1571 int i;
1572
1573 if (vptr->rx.info == NULL)
1574 return;
1575
1576 for (i = 0; i < vptr->options.numrx; i++) {
1577 struct velocity_rd_info *rd_info = &(vptr->rx.info[i]);
1578 struct rx_desc *rd = vptr->rx.ring + i;
1579
1580 memset(rd, 0, sizeof(*rd));
1581
1582 if (!rd_info->skb)
1583 continue;
1584 pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
1585 PCI_DMA_FROMDEVICE);
1586 rd_info->skb_dma = 0;
1587
1588 dev_kfree_skb(rd_info->skb);
1589 rd_info->skb = NULL;
1590 }
1591
1592 kfree(vptr->rx.info);
1593 vptr->rx.info = NULL;
1594 }
1595
1596 /**
1597 * velocity_init_rd_ring - set up receive ring
1598 * @vptr: velocity to configure
1599 *
1600 * Allocate and set up the receive buffers for each ring slot and
1601 * assign them to the network adapter.
1602 */
1603 static int velocity_init_rd_ring(struct velocity_info *vptr)
1604 {
1605 int ret = -ENOMEM;
1606
1607 vptr->rx.info = kcalloc(vptr->options.numrx,
1608 sizeof(struct velocity_rd_info), GFP_KERNEL);
1609 if (!vptr->rx.info)
1610 goto out;
1611
1612 velocity_init_rx_ring_indexes(vptr);
1613
1614 if (velocity_rx_refill(vptr) != vptr->options.numrx) {
1615 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1616 "%s: failed to allocate RX buffer.\n", vptr->dev->name);
1617 velocity_free_rd_ring(vptr);
1618 goto out;
1619 }
1620
1621 ret = 0;
1622 out:
1623 return ret;
1624 }
1625
1626 /**
1627 * velocity_init_td_ring - set up transmit ring
1628 * @vptr: velocity
1629 *
1630 * Set up the transmit ring and chain the ring pointers together.
1631 * Returns zero on success or a negative posix errno code for
1632 * failure.
1633 */
1634 static int velocity_init_td_ring(struct velocity_info *vptr)
1635 {
1636 int j;
1637
1638 /* Init the TD ring entries */
1639 for (j = 0; j < vptr->tx.numq; j++) {
1640
1641 vptr->tx.infos[j] = kcalloc(vptr->options.numtx,
1642 sizeof(struct velocity_td_info),
1643 GFP_KERNEL);
1644 if (!vptr->tx.infos[j]) {
1645 while (--j >= 0)
1646 kfree(vptr->tx.infos[j]);
1647 return -ENOMEM;
1648 }
1649
1650 vptr->tx.tail[j] = vptr->tx.curr[j] = vptr->tx.used[j] = 0;
1651 }
1652 return 0;
1653 }
1654
1655 /**
1656 * velocity_free_dma_rings - free PCI ring pointers
1657 * @vptr: Velocity to free from
1658 *
1659 * Clean up the PCI ring buffers allocated to this velocity.
1660 */
1661 static void velocity_free_dma_rings(struct velocity_info *vptr)
1662 {
1663 const int size = vptr->options.numrx * sizeof(struct rx_desc) +
1664 vptr->options.numtx * sizeof(struct tx_desc) * vptr->tx.numq;
1665
1666 pci_free_consistent(vptr->pdev, size, vptr->rx.ring, vptr->rx.pool_dma);
1667 }
1668
1669 static int velocity_init_rings(struct velocity_info *vptr, int mtu)
1670 {
1671 int ret;
1672
1673 velocity_set_rxbufsize(vptr, mtu);
1674
1675 ret = velocity_init_dma_rings(vptr);
1676 if (ret < 0)
1677 goto out;
1678
1679 ret = velocity_init_rd_ring(vptr);
1680 if (ret < 0)
1681 goto err_free_dma_rings_0;
1682
1683 ret = velocity_init_td_ring(vptr);
1684 if (ret < 0)
1685 goto err_free_rd_ring_1;
1686 out:
1687 return ret;
1688
1689 err_free_rd_ring_1:
1690 velocity_free_rd_ring(vptr);
1691 err_free_dma_rings_0:
1692 velocity_free_dma_rings(vptr);
1693 goto out;
1694 }
1695
1696 /**
1697 * velocity_free_tx_buf - free transmit buffer
1698 * @vptr: velocity
1699 * @tdinfo: buffer
1700 *
1701 * Release an transmit buffer. If the buffer was preallocated then
1702 * recycle it, if not then unmap the buffer.
1703 */
1704 static void velocity_free_tx_buf(struct velocity_info *vptr,
1705 struct velocity_td_info *tdinfo, struct tx_desc *td)
1706 {
1707 struct sk_buff *skb = tdinfo->skb;
1708
1709 /*
1710 * Don't unmap the pre-allocated tx_bufs
1711 */
1712 if (tdinfo->skb_dma) {
1713 int i;
1714
1715 for (i = 0; i < tdinfo->nskb_dma; i++) {
1716 size_t pktlen = max_t(size_t, skb->len, ETH_ZLEN);
1717
1718 /* For scatter-gather */
1719 if (skb_shinfo(skb)->nr_frags > 0)
1720 pktlen = max_t(size_t, pktlen,
1721 td->td_buf[i].size & ~TD_QUEUE);
1722
1723 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i],
1724 le16_to_cpu(pktlen), PCI_DMA_TODEVICE);
1725 }
1726 }
1727 dev_kfree_skb_irq(skb);
1728 tdinfo->skb = NULL;
1729 }
1730
1731 /*
1732 * FIXME: could we merge this with velocity_free_tx_buf ?
1733 */
1734 static void velocity_free_td_ring_entry(struct velocity_info *vptr,
1735 int q, int n)
1736 {
1737 struct velocity_td_info *td_info = &(vptr->tx.infos[q][n]);
1738 int i;
1739
1740 if (td_info == NULL)
1741 return;
1742
1743 if (td_info->skb) {
1744 for (i = 0; i < td_info->nskb_dma; i++) {
1745 if (td_info->skb_dma[i]) {
1746 pci_unmap_single(vptr->pdev, td_info->skb_dma[i],
1747 td_info->skb->len, PCI_DMA_TODEVICE);
1748 td_info->skb_dma[i] = 0;
1749 }
1750 }
1751 dev_kfree_skb(td_info->skb);
1752 td_info->skb = NULL;
1753 }
1754 }
1755
1756 /**
1757 * velocity_free_td_ring - free td ring
1758 * @vptr: velocity
1759 *
1760 * Free up the transmit ring for this particular velocity adapter.
1761 * We free the ring contents but not the ring itself.
1762 */
1763 static void velocity_free_td_ring(struct velocity_info *vptr)
1764 {
1765 int i, j;
1766
1767 for (j = 0; j < vptr->tx.numq; j++) {
1768 if (vptr->tx.infos[j] == NULL)
1769 continue;
1770 for (i = 0; i < vptr->options.numtx; i++)
1771 velocity_free_td_ring_entry(vptr, j, i);
1772
1773 kfree(vptr->tx.infos[j]);
1774 vptr->tx.infos[j] = NULL;
1775 }
1776 }
1777
1778 static void velocity_free_rings(struct velocity_info *vptr)
1779 {
1780 velocity_free_td_ring(vptr);
1781 velocity_free_rd_ring(vptr);
1782 velocity_free_dma_rings(vptr);
1783 }
1784
1785 /**
1786 * velocity_error - handle error from controller
1787 * @vptr: velocity
1788 * @status: card status
1789 *
1790 * Process an error report from the hardware and attempt to recover
1791 * the card itself. At the moment we cannot recover from some
1792 * theoretically impossible errors but this could be fixed using
1793 * the pci_device_failed logic to bounce the hardware
1794 *
1795 */
1796 static void velocity_error(struct velocity_info *vptr, int status)
1797 {
1798
1799 if (status & ISR_TXSTLI) {
1800 struct mac_regs __iomem *regs = vptr->mac_regs;
1801
1802 printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(&regs->TDIdx[0]));
1803 BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR);
1804 writew(TRDCSR_RUN, &regs->TDCSRClr);
1805 netif_stop_queue(vptr->dev);
1806
1807 /* FIXME: port over the pci_device_failed code and use it
1808 here */
1809 }
1810
1811 if (status & ISR_SRCI) {
1812 struct mac_regs __iomem *regs = vptr->mac_regs;
1813 int linked;
1814
1815 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1816 vptr->mii_status = check_connection_type(regs);
1817
1818 /*
1819 * If it is a 3119, disable frame bursting in
1820 * halfduplex mode and enable it in fullduplex
1821 * mode
1822 */
1823 if (vptr->rev_id < REV_ID_VT3216_A0) {
1824 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1825 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
1826 else
1827 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
1828 }
1829 /*
1830 * Only enable CD heart beat counter in 10HD mode
1831 */
1832 if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10))
1833 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
1834 else
1835 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
1836
1837 setup_queue_timers(vptr);
1838 }
1839 /*
1840 * Get link status from PHYSR0
1841 */
1842 linked = readb(&regs->PHYSR0) & PHYSR0_LINKGD;
1843
1844 if (linked) {
1845 vptr->mii_status &= ~VELOCITY_LINK_FAIL;
1846 netif_carrier_on(vptr->dev);
1847 } else {
1848 vptr->mii_status |= VELOCITY_LINK_FAIL;
1849 netif_carrier_off(vptr->dev);
1850 }
1851
1852 velocity_print_link_status(vptr);
1853 enable_flow_control_ability(vptr);
1854
1855 /*
1856 * Re-enable auto-polling because SRCI will disable
1857 * auto-polling
1858 */
1859
1860 enable_mii_autopoll(regs);
1861
1862 if (vptr->mii_status & VELOCITY_LINK_FAIL)
1863 netif_stop_queue(vptr->dev);
1864 else
1865 netif_wake_queue(vptr->dev);
1866
1867 }
1868 if (status & ISR_MIBFI)
1869 velocity_update_hw_mibs(vptr);
1870 if (status & ISR_LSTEI)
1871 mac_rx_queue_wake(vptr->mac_regs);
1872 }
1873
1874 /**
1875 * tx_srv - transmit interrupt service
1876 * @vptr; Velocity
1877 *
1878 * Scan the queues looking for transmitted packets that
1879 * we can complete and clean up. Update any statistics as
1880 * necessary/
1881 */
1882 static int velocity_tx_srv(struct velocity_info *vptr)
1883 {
1884 struct tx_desc *td;
1885 int qnum;
1886 int full = 0;
1887 int idx;
1888 int works = 0;
1889 struct velocity_td_info *tdinfo;
1890 struct net_device_stats *stats = &vptr->dev->stats;
1891
1892 for (qnum = 0; qnum < vptr->tx.numq; qnum++) {
1893 for (idx = vptr->tx.tail[qnum]; vptr->tx.used[qnum] > 0;
1894 idx = (idx + 1) % vptr->options.numtx) {
1895
1896 /*
1897 * Get Tx Descriptor
1898 */
1899 td = &(vptr->tx.rings[qnum][idx]);
1900 tdinfo = &(vptr->tx.infos[qnum][idx]);
1901
1902 if (td->tdesc0.len & OWNED_BY_NIC)
1903 break;
1904
1905 if ((works++ > 15))
1906 break;
1907
1908 if (td->tdesc0.TSR & TSR0_TERR) {
1909 stats->tx_errors++;
1910 stats->tx_dropped++;
1911 if (td->tdesc0.TSR & TSR0_CDH)
1912 stats->tx_heartbeat_errors++;
1913 if (td->tdesc0.TSR & TSR0_CRS)
1914 stats->tx_carrier_errors++;
1915 if (td->tdesc0.TSR & TSR0_ABT)
1916 stats->tx_aborted_errors++;
1917 if (td->tdesc0.TSR & TSR0_OWC)
1918 stats->tx_window_errors++;
1919 } else {
1920 stats->tx_packets++;
1921 stats->tx_bytes += tdinfo->skb->len;
1922 }
1923 velocity_free_tx_buf(vptr, tdinfo, td);
1924 vptr->tx.used[qnum]--;
1925 }
1926 vptr->tx.tail[qnum] = idx;
1927
1928 if (AVAIL_TD(vptr, qnum) < 1)
1929 full = 1;
1930 }
1931 /*
1932 * Look to see if we should kick the transmit network
1933 * layer for more work.
1934 */
1935 if (netif_queue_stopped(vptr->dev) && (full == 0) &&
1936 (!(vptr->mii_status & VELOCITY_LINK_FAIL))) {
1937 netif_wake_queue(vptr->dev);
1938 }
1939 return works;
1940 }
1941
1942 /**
1943 * velocity_rx_csum - checksum process
1944 * @rd: receive packet descriptor
1945 * @skb: network layer packet buffer
1946 *
1947 * Process the status bits for the received packet and determine
1948 * if the checksum was computed and verified by the hardware
1949 */
1950 static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb)
1951 {
1952 skb_checksum_none_assert(skb);
1953
1954 if (rd->rdesc1.CSM & CSM_IPKT) {
1955 if (rd->rdesc1.CSM & CSM_IPOK) {
1956 if ((rd->rdesc1.CSM & CSM_TCPKT) ||
1957 (rd->rdesc1.CSM & CSM_UDPKT)) {
1958 if (!(rd->rdesc1.CSM & CSM_TUPOK))
1959 return;
1960 }
1961 skb->ip_summed = CHECKSUM_UNNECESSARY;
1962 }
1963 }
1964 }
1965
1966 /**
1967 * velocity_rx_copy - in place Rx copy for small packets
1968 * @rx_skb: network layer packet buffer candidate
1969 * @pkt_size: received data size
1970 * @rd: receive packet descriptor
1971 * @dev: network device
1972 *
1973 * Replace the current skb that is scheduled for Rx processing by a
1974 * shorter, immediately allocated skb, if the received packet is small
1975 * enough. This function returns a negative value if the received
1976 * packet is too big or if memory is exhausted.
1977 */
1978 static int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size,
1979 struct velocity_info *vptr)
1980 {
1981 int ret = -1;
1982 if (pkt_size < rx_copybreak) {
1983 struct sk_buff *new_skb;
1984
1985 new_skb = netdev_alloc_skb_ip_align(vptr->dev, pkt_size);
1986 if (new_skb) {
1987 new_skb->ip_summed = rx_skb[0]->ip_summed;
1988 skb_copy_from_linear_data(*rx_skb, new_skb->data, pkt_size);
1989 *rx_skb = new_skb;
1990 ret = 0;
1991 }
1992
1993 }
1994 return ret;
1995 }
1996
1997 /**
1998 * velocity_iph_realign - IP header alignment
1999 * @vptr: velocity we are handling
2000 * @skb: network layer packet buffer
2001 * @pkt_size: received data size
2002 *
2003 * Align IP header on a 2 bytes boundary. This behavior can be
2004 * configured by the user.
2005 */
2006 static inline void velocity_iph_realign(struct velocity_info *vptr,
2007 struct sk_buff *skb, int pkt_size)
2008 {
2009 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) {
2010 memmove(skb->data + 2, skb->data, pkt_size);
2011 skb_reserve(skb, 2);
2012 }
2013 }
2014
2015 /**
2016 * velocity_receive_frame - received packet processor
2017 * @vptr: velocity we are handling
2018 * @idx: ring index
2019 *
2020 * A packet has arrived. We process the packet and if appropriate
2021 * pass the frame up the network stack
2022 */
2023 static int velocity_receive_frame(struct velocity_info *vptr, int idx)
2024 {
2025 void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int);
2026 struct net_device_stats *stats = &vptr->dev->stats;
2027 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
2028 struct rx_desc *rd = &(vptr->rx.ring[idx]);
2029 int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff;
2030 struct sk_buff *skb;
2031
2032 if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) {
2033 VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name);
2034 stats->rx_length_errors++;
2035 return -EINVAL;
2036 }
2037
2038 if (rd->rdesc0.RSR & RSR_MAR)
2039 stats->multicast++;
2040
2041 skb = rd_info->skb;
2042
2043 pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma,
2044 vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
2045
2046 /*
2047 * Drop frame not meeting IEEE 802.3
2048 */
2049
2050 if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) {
2051 if (rd->rdesc0.RSR & RSR_RL) {
2052 stats->rx_length_errors++;
2053 return -EINVAL;
2054 }
2055 }
2056
2057 pci_action = pci_dma_sync_single_for_device;
2058
2059 velocity_rx_csum(rd, skb);
2060
2061 if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) {
2062 velocity_iph_realign(vptr, skb, pkt_len);
2063 pci_action = pci_unmap_single;
2064 rd_info->skb = NULL;
2065 }
2066
2067 pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
2068 PCI_DMA_FROMDEVICE);
2069
2070 skb_put(skb, pkt_len - 4);
2071 skb->protocol = eth_type_trans(skb, vptr->dev);
2072
2073 if (rd->rdesc0.RSR & RSR_DETAG) {
2074 u16 vid = swab16(le16_to_cpu(rd->rdesc1.PQTAG));
2075
2076 __vlan_hwaccel_put_tag(skb, vid);
2077 }
2078 netif_rx(skb);
2079
2080 stats->rx_bytes += pkt_len;
2081 stats->rx_packets++;
2082
2083 return 0;
2084 }
2085
2086 /**
2087 * velocity_rx_srv - service RX interrupt
2088 * @vptr: velocity
2089 *
2090 * Walk the receive ring of the velocity adapter and remove
2091 * any received packets from the receive queue. Hand the ring
2092 * slots back to the adapter for reuse.
2093 */
2094 static int velocity_rx_srv(struct velocity_info *vptr, int budget_left)
2095 {
2096 struct net_device_stats *stats = &vptr->dev->stats;
2097 int rd_curr = vptr->rx.curr;
2098 int works = 0;
2099
2100 while (works < budget_left) {
2101 struct rx_desc *rd = vptr->rx.ring + rd_curr;
2102
2103 if (!vptr->rx.info[rd_curr].skb)
2104 break;
2105
2106 if (rd->rdesc0.len & OWNED_BY_NIC)
2107 break;
2108
2109 rmb();
2110
2111 /*
2112 * Don't drop CE or RL error frame although RXOK is off
2113 */
2114 if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) {
2115 if (velocity_receive_frame(vptr, rd_curr) < 0)
2116 stats->rx_dropped++;
2117 } else {
2118 if (rd->rdesc0.RSR & RSR_CRC)
2119 stats->rx_crc_errors++;
2120 if (rd->rdesc0.RSR & RSR_FAE)
2121 stats->rx_frame_errors++;
2122
2123 stats->rx_dropped++;
2124 }
2125
2126 rd->size |= RX_INTEN;
2127
2128 rd_curr++;
2129 if (rd_curr >= vptr->options.numrx)
2130 rd_curr = 0;
2131 works++;
2132 }
2133
2134 vptr->rx.curr = rd_curr;
2135
2136 if ((works > 0) && (velocity_rx_refill(vptr) > 0))
2137 velocity_give_many_rx_descs(vptr);
2138
2139 VAR_USED(stats);
2140 return works;
2141 }
2142
2143 static int velocity_poll(struct napi_struct *napi, int budget)
2144 {
2145 struct velocity_info *vptr = container_of(napi,
2146 struct velocity_info, napi);
2147 unsigned int rx_done;
2148 unsigned long flags;
2149
2150 spin_lock_irqsave(&vptr->lock, flags);
2151 /*
2152 * Do rx and tx twice for performance (taken from the VIA
2153 * out-of-tree driver).
2154 */
2155 rx_done = velocity_rx_srv(vptr, budget / 2);
2156 velocity_tx_srv(vptr);
2157 rx_done += velocity_rx_srv(vptr, budget - rx_done);
2158 velocity_tx_srv(vptr);
2159
2160 /* If budget not fully consumed, exit the polling mode */
2161 if (rx_done < budget) {
2162 napi_complete(napi);
2163 mac_enable_int(vptr->mac_regs);
2164 }
2165 spin_unlock_irqrestore(&vptr->lock, flags);
2166
2167 return rx_done;
2168 }
2169
2170 /**
2171 * velocity_intr - interrupt callback
2172 * @irq: interrupt number
2173 * @dev_instance: interrupting device
2174 *
2175 * Called whenever an interrupt is generated by the velocity
2176 * adapter IRQ line. We may not be the source of the interrupt
2177 * and need to identify initially if we are, and if not exit as
2178 * efficiently as possible.
2179 */
2180 static irqreturn_t velocity_intr(int irq, void *dev_instance)
2181 {
2182 struct net_device *dev = dev_instance;
2183 struct velocity_info *vptr = netdev_priv(dev);
2184 u32 isr_status;
2185
2186 spin_lock(&vptr->lock);
2187 isr_status = mac_read_isr(vptr->mac_regs);
2188
2189 /* Not us ? */
2190 if (isr_status == 0) {
2191 spin_unlock(&vptr->lock);
2192 return IRQ_NONE;
2193 }
2194
2195 /* Ack the interrupt */
2196 mac_write_isr(vptr->mac_regs, isr_status);
2197
2198 if (likely(napi_schedule_prep(&vptr->napi))) {
2199 mac_disable_int(vptr->mac_regs);
2200 __napi_schedule(&vptr->napi);
2201 }
2202
2203 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
2204 velocity_error(vptr, isr_status);
2205
2206 spin_unlock(&vptr->lock);
2207
2208 return IRQ_HANDLED;
2209 }
2210
2211 /**
2212 * velocity_open - interface activation callback
2213 * @dev: network layer device to open
2214 *
2215 * Called when the network layer brings the interface up. Returns
2216 * a negative posix error code on failure, or zero on success.
2217 *
2218 * All the ring allocation and set up is done on open for this
2219 * adapter to minimise memory usage when inactive
2220 */
2221 static int velocity_open(struct net_device *dev)
2222 {
2223 struct velocity_info *vptr = netdev_priv(dev);
2224 int ret;
2225
2226 ret = velocity_init_rings(vptr, dev->mtu);
2227 if (ret < 0)
2228 goto out;
2229
2230 /* Ensure chip is running */
2231 pci_set_power_state(vptr->pdev, PCI_D0);
2232
2233 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
2234
2235 ret = request_irq(vptr->pdev->irq, velocity_intr, IRQF_SHARED,
2236 dev->name, dev);
2237 if (ret < 0) {
2238 /* Power down the chip */
2239 pci_set_power_state(vptr->pdev, PCI_D3hot);
2240 velocity_free_rings(vptr);
2241 goto out;
2242 }
2243
2244 velocity_give_many_rx_descs(vptr);
2245
2246 mac_enable_int(vptr->mac_regs);
2247 netif_start_queue(dev);
2248 napi_enable(&vptr->napi);
2249 vptr->flags |= VELOCITY_FLAGS_OPENED;
2250 out:
2251 return ret;
2252 }
2253
2254 /**
2255 * velocity_shutdown - shut down the chip
2256 * @vptr: velocity to deactivate
2257 *
2258 * Shuts down the internal operations of the velocity and
2259 * disables interrupts, autopolling, transmit and receive
2260 */
2261 static void velocity_shutdown(struct velocity_info *vptr)
2262 {
2263 struct mac_regs __iomem *regs = vptr->mac_regs;
2264 mac_disable_int(regs);
2265 writel(CR0_STOP, &regs->CR0Set);
2266 writew(0xFFFF, &regs->TDCSRClr);
2267 writeb(0xFF, &regs->RDCSRClr);
2268 safe_disable_mii_autopoll(regs);
2269 mac_clear_isr(regs);
2270 }
2271
2272 /**
2273 * velocity_change_mtu - MTU change callback
2274 * @dev: network device
2275 * @new_mtu: desired MTU
2276 *
2277 * Handle requests from the networking layer for MTU change on
2278 * this interface. It gets called on a change by the network layer.
2279 * Return zero for success or negative posix error code.
2280 */
2281 static int velocity_change_mtu(struct net_device *dev, int new_mtu)
2282 {
2283 struct velocity_info *vptr = netdev_priv(dev);
2284 int ret = 0;
2285
2286 if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) {
2287 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n",
2288 vptr->dev->name);
2289 ret = -EINVAL;
2290 goto out_0;
2291 }
2292
2293 if (!netif_running(dev)) {
2294 dev->mtu = new_mtu;
2295 goto out_0;
2296 }
2297
2298 if (dev->mtu != new_mtu) {
2299 struct velocity_info *tmp_vptr;
2300 unsigned long flags;
2301 struct rx_info rx;
2302 struct tx_info tx;
2303
2304 tmp_vptr = kzalloc(sizeof(*tmp_vptr), GFP_KERNEL);
2305 if (!tmp_vptr) {
2306 ret = -ENOMEM;
2307 goto out_0;
2308 }
2309
2310 tmp_vptr->dev = dev;
2311 tmp_vptr->pdev = vptr->pdev;
2312 tmp_vptr->options = vptr->options;
2313 tmp_vptr->tx.numq = vptr->tx.numq;
2314
2315 ret = velocity_init_rings(tmp_vptr, new_mtu);
2316 if (ret < 0)
2317 goto out_free_tmp_vptr_1;
2318
2319 spin_lock_irqsave(&vptr->lock, flags);
2320
2321 netif_stop_queue(dev);
2322 velocity_shutdown(vptr);
2323
2324 rx = vptr->rx;
2325 tx = vptr->tx;
2326
2327 vptr->rx = tmp_vptr->rx;
2328 vptr->tx = tmp_vptr->tx;
2329
2330 tmp_vptr->rx = rx;
2331 tmp_vptr->tx = tx;
2332
2333 dev->mtu = new_mtu;
2334
2335 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
2336
2337 velocity_give_many_rx_descs(vptr);
2338
2339 mac_enable_int(vptr->mac_regs);
2340 netif_start_queue(dev);
2341
2342 spin_unlock_irqrestore(&vptr->lock, flags);
2343
2344 velocity_free_rings(tmp_vptr);
2345
2346 out_free_tmp_vptr_1:
2347 kfree(tmp_vptr);
2348 }
2349 out_0:
2350 return ret;
2351 }
2352
2353 /**
2354 * velocity_mii_ioctl - MII ioctl handler
2355 * @dev: network device
2356 * @ifr: the ifreq block for the ioctl
2357 * @cmd: the command
2358 *
2359 * Process MII requests made via ioctl from the network layer. These
2360 * are used by tools like kudzu to interrogate the link state of the
2361 * hardware
2362 */
2363 static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2364 {
2365 struct velocity_info *vptr = netdev_priv(dev);
2366 struct mac_regs __iomem *regs = vptr->mac_regs;
2367 unsigned long flags;
2368 struct mii_ioctl_data *miidata = if_mii(ifr);
2369 int err;
2370
2371 switch (cmd) {
2372 case SIOCGMIIPHY:
2373 miidata->phy_id = readb(&regs->MIIADR) & 0x1f;
2374 break;
2375 case SIOCGMIIREG:
2376 if (velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
2377 return -ETIMEDOUT;
2378 break;
2379 case SIOCSMIIREG:
2380 spin_lock_irqsave(&vptr->lock, flags);
2381 err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
2382 spin_unlock_irqrestore(&vptr->lock, flags);
2383 check_connection_type(vptr->mac_regs);
2384 if (err)
2385 return err;
2386 break;
2387 default:
2388 return -EOPNOTSUPP;
2389 }
2390 return 0;
2391 }
2392
2393 /**
2394 * velocity_ioctl - ioctl entry point
2395 * @dev: network device
2396 * @rq: interface request ioctl
2397 * @cmd: command code
2398 *
2399 * Called when the user issues an ioctl request to the network
2400 * device in question. The velocity interface supports MII.
2401 */
2402 static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2403 {
2404 struct velocity_info *vptr = netdev_priv(dev);
2405 int ret;
2406
2407 /* If we are asked for information and the device is power
2408 saving then we need to bring the device back up to talk to it */
2409
2410 if (!netif_running(dev))
2411 pci_set_power_state(vptr->pdev, PCI_D0);
2412
2413 switch (cmd) {
2414 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2415 case SIOCGMIIREG: /* Read MII PHY register. */
2416 case SIOCSMIIREG: /* Write to MII PHY register. */
2417 ret = velocity_mii_ioctl(dev, rq, cmd);
2418 break;
2419
2420 default:
2421 ret = -EOPNOTSUPP;
2422 }
2423 if (!netif_running(dev))
2424 pci_set_power_state(vptr->pdev, PCI_D3hot);
2425
2426
2427 return ret;
2428 }
2429
2430 /**
2431 * velocity_get_status - statistics callback
2432 * @dev: network device
2433 *
2434 * Callback from the network layer to allow driver statistics
2435 * to be resynchronized with hardware collected state. In the
2436 * case of the velocity we need to pull the MIB counters from
2437 * the hardware into the counters before letting the network
2438 * layer display them.
2439 */
2440 static struct net_device_stats *velocity_get_stats(struct net_device *dev)
2441 {
2442 struct velocity_info *vptr = netdev_priv(dev);
2443
2444 /* If the hardware is down, don't touch MII */
2445 if (!netif_running(dev))
2446 return &dev->stats;
2447
2448 spin_lock_irq(&vptr->lock);
2449 velocity_update_hw_mibs(vptr);
2450 spin_unlock_irq(&vptr->lock);
2451
2452 dev->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts];
2453 dev->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts];
2454 dev->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors];
2455
2456 // unsigned long rx_dropped; /* no space in linux buffers */
2457 dev->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions];
2458 /* detailed rx_errors: */
2459 // unsigned long rx_length_errors;
2460 // unsigned long rx_over_errors; /* receiver ring buff overflow */
2461 dev->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE];
2462 // unsigned long rx_frame_errors; /* recv'd frame alignment error */
2463 // unsigned long rx_fifo_errors; /* recv'r fifo overrun */
2464 // unsigned long rx_missed_errors; /* receiver missed packet */
2465
2466 /* detailed tx_errors */
2467 // unsigned long tx_fifo_errors;
2468
2469 return &dev->stats;
2470 }
2471
2472 /**
2473 * velocity_close - close adapter callback
2474 * @dev: network device
2475 *
2476 * Callback from the network layer when the velocity is being
2477 * deactivated by the network layer
2478 */
2479 static int velocity_close(struct net_device *dev)
2480 {
2481 struct velocity_info *vptr = netdev_priv(dev);
2482
2483 napi_disable(&vptr->napi);
2484 netif_stop_queue(dev);
2485 velocity_shutdown(vptr);
2486
2487 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED)
2488 velocity_get_ip(vptr);
2489 if (dev->irq != 0)
2490 free_irq(dev->irq, dev);
2491
2492 /* Power down the chip */
2493 pci_set_power_state(vptr->pdev, PCI_D3hot);
2494
2495 velocity_free_rings(vptr);
2496
2497 vptr->flags &= (~VELOCITY_FLAGS_OPENED);
2498 return 0;
2499 }
2500
2501 /**
2502 * velocity_xmit - transmit packet callback
2503 * @skb: buffer to transmit
2504 * @dev: network device
2505 *
2506 * Called by the networ layer to request a packet is queued to
2507 * the velocity. Returns zero on success.
2508 */
2509 static netdev_tx_t velocity_xmit(struct sk_buff *skb,
2510 struct net_device *dev)
2511 {
2512 struct velocity_info *vptr = netdev_priv(dev);
2513 int qnum = 0;
2514 struct tx_desc *td_ptr;
2515 struct velocity_td_info *tdinfo;
2516 unsigned long flags;
2517 int pktlen;
2518 int index, prev;
2519 int i = 0;
2520
2521 if (skb_padto(skb, ETH_ZLEN))
2522 goto out;
2523
2524 /* The hardware can handle at most 7 memory segments, so merge
2525 * the skb if there are more */
2526 if (skb_shinfo(skb)->nr_frags > 6 && __skb_linearize(skb)) {
2527 kfree_skb(skb);
2528 return NETDEV_TX_OK;
2529 }
2530
2531 pktlen = skb_shinfo(skb)->nr_frags == 0 ?
2532 max_t(unsigned int, skb->len, ETH_ZLEN) :
2533 skb_headlen(skb);
2534
2535 spin_lock_irqsave(&vptr->lock, flags);
2536
2537 index = vptr->tx.curr[qnum];
2538 td_ptr = &(vptr->tx.rings[qnum][index]);
2539 tdinfo = &(vptr->tx.infos[qnum][index]);
2540
2541 td_ptr->tdesc1.TCR = TCR0_TIC;
2542 td_ptr->td_buf[0].size &= ~TD_QUEUE;
2543
2544 /*
2545 * Map the linear network buffer into PCI space and
2546 * add it to the transmit ring.
2547 */
2548 tdinfo->skb = skb;
2549 tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE);
2550 td_ptr->tdesc0.len = cpu_to_le16(pktlen);
2551 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2552 td_ptr->td_buf[0].pa_high = 0;
2553 td_ptr->td_buf[0].size = cpu_to_le16(pktlen);
2554
2555 /* Handle fragments */
2556 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2557 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2558
2559 tdinfo->skb_dma[i + 1] = pci_map_page(vptr->pdev, frag->page,
2560 frag->page_offset, frag->size,
2561 PCI_DMA_TODEVICE);
2562
2563 td_ptr->td_buf[i + 1].pa_low = cpu_to_le32(tdinfo->skb_dma[i + 1]);
2564 td_ptr->td_buf[i + 1].pa_high = 0;
2565 td_ptr->td_buf[i + 1].size = cpu_to_le16(frag->size);
2566 }
2567 tdinfo->nskb_dma = i + 1;
2568
2569 td_ptr->tdesc1.cmd = TCPLS_NORMAL + (tdinfo->nskb_dma + 1) * 16;
2570
2571 if (vlan_tx_tag_present(skb)) {
2572 td_ptr->tdesc1.vlan = cpu_to_le16(vlan_tx_tag_get(skb));
2573 td_ptr->tdesc1.TCR |= TCR0_VETAG;
2574 }
2575
2576 /*
2577 * Handle hardware checksum
2578 */
2579 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2580 const struct iphdr *ip = ip_hdr(skb);
2581 if (ip->protocol == IPPROTO_TCP)
2582 td_ptr->tdesc1.TCR |= TCR0_TCPCK;
2583 else if (ip->protocol == IPPROTO_UDP)
2584 td_ptr->tdesc1.TCR |= (TCR0_UDPCK);
2585 td_ptr->tdesc1.TCR |= TCR0_IPCK;
2586 }
2587
2588 prev = index - 1;
2589 if (prev < 0)
2590 prev = vptr->options.numtx - 1;
2591 td_ptr->tdesc0.len |= OWNED_BY_NIC;
2592 vptr->tx.used[qnum]++;
2593 vptr->tx.curr[qnum] = (index + 1) % vptr->options.numtx;
2594
2595 if (AVAIL_TD(vptr, qnum) < 1)
2596 netif_stop_queue(dev);
2597
2598 td_ptr = &(vptr->tx.rings[qnum][prev]);
2599 td_ptr->td_buf[0].size |= TD_QUEUE;
2600 mac_tx_queue_wake(vptr->mac_regs, qnum);
2601
2602 spin_unlock_irqrestore(&vptr->lock, flags);
2603 out:
2604 return NETDEV_TX_OK;
2605 }
2606
2607 static const struct net_device_ops velocity_netdev_ops = {
2608 .ndo_open = velocity_open,
2609 .ndo_stop = velocity_close,
2610 .ndo_start_xmit = velocity_xmit,
2611 .ndo_get_stats = velocity_get_stats,
2612 .ndo_validate_addr = eth_validate_addr,
2613 .ndo_set_mac_address = eth_mac_addr,
2614 .ndo_set_rx_mode = velocity_set_multi,
2615 .ndo_change_mtu = velocity_change_mtu,
2616 .ndo_do_ioctl = velocity_ioctl,
2617 .ndo_vlan_rx_add_vid = velocity_vlan_rx_add_vid,
2618 .ndo_vlan_rx_kill_vid = velocity_vlan_rx_kill_vid,
2619 };
2620
2621 /**
2622 * velocity_init_info - init private data
2623 * @pdev: PCI device
2624 * @vptr: Velocity info
2625 * @info: Board type
2626 *
2627 * Set up the initial velocity_info struct for the device that has been
2628 * discovered.
2629 */
2630 static void __devinit velocity_init_info(struct pci_dev *pdev,
2631 struct velocity_info *vptr,
2632 const struct velocity_info_tbl *info)
2633 {
2634 memset(vptr, 0, sizeof(struct velocity_info));
2635
2636 vptr->pdev = pdev;
2637 vptr->chip_id = info->chip_id;
2638 vptr->tx.numq = info->txqueue;
2639 vptr->multicast_limit = MCAM_SIZE;
2640 spin_lock_init(&vptr->lock);
2641 }
2642
2643 /**
2644 * velocity_get_pci_info - retrieve PCI info for device
2645 * @vptr: velocity device
2646 * @pdev: PCI device it matches
2647 *
2648 * Retrieve the PCI configuration space data that interests us from
2649 * the kernel PCI layer
2650 */
2651 static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pci_dev *pdev)
2652 {
2653 vptr->rev_id = pdev->revision;
2654
2655 pci_set_master(pdev);
2656
2657 vptr->ioaddr = pci_resource_start(pdev, 0);
2658 vptr->memaddr = pci_resource_start(pdev, 1);
2659
2660 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) {
2661 dev_err(&pdev->dev,
2662 "region #0 is not an I/O resource, aborting.\n");
2663 return -EINVAL;
2664 }
2665
2666 if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) {
2667 dev_err(&pdev->dev,
2668 "region #1 is an I/O resource, aborting.\n");
2669 return -EINVAL;
2670 }
2671
2672 if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) {
2673 dev_err(&pdev->dev, "region #1 is too small.\n");
2674 return -EINVAL;
2675 }
2676 vptr->pdev = pdev;
2677
2678 return 0;
2679 }
2680
2681 /**
2682 * velocity_print_info - per driver data
2683 * @vptr: velocity
2684 *
2685 * Print per driver data as the kernel driver finds Velocity
2686 * hardware
2687 */
2688 static void __devinit velocity_print_info(struct velocity_info *vptr)
2689 {
2690 struct net_device *dev = vptr->dev;
2691
2692 printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id));
2693 printk(KERN_INFO "%s: Ethernet Address: %pM\n",
2694 dev->name, dev->dev_addr);
2695 }
2696
2697 static u32 velocity_get_link(struct net_device *dev)
2698 {
2699 struct velocity_info *vptr = netdev_priv(dev);
2700 struct mac_regs __iomem *regs = vptr->mac_regs;
2701 return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, &regs->PHYSR0) ? 1 : 0;
2702 }
2703
2704 /**
2705 * velocity_found1 - set up discovered velocity card
2706 * @pdev: PCI device
2707 * @ent: PCI device table entry that matched
2708 *
2709 * Configure a discovered adapter from scratch. Return a negative
2710 * errno error code on failure paths.
2711 */
2712 static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_device_id *ent)
2713 {
2714 static int first = 1;
2715 struct net_device *dev;
2716 int i;
2717 const char *drv_string;
2718 const struct velocity_info_tbl *info = &chip_info_table[ent->driver_data];
2719 struct velocity_info *vptr;
2720 struct mac_regs __iomem *regs;
2721 int ret = -ENOMEM;
2722
2723 /* FIXME: this driver, like almost all other ethernet drivers,
2724 * can support more than MAX_UNITS.
2725 */
2726 if (velocity_nics >= MAX_UNITS) {
2727 dev_notice(&pdev->dev, "already found %d NICs.\n",
2728 velocity_nics);
2729 return -ENODEV;
2730 }
2731
2732 dev = alloc_etherdev(sizeof(struct velocity_info));
2733 if (!dev) {
2734 dev_err(&pdev->dev, "allocate net device failed.\n");
2735 goto out;
2736 }
2737
2738 /* Chain it all together */
2739
2740 SET_NETDEV_DEV(dev, &pdev->dev);
2741 vptr = netdev_priv(dev);
2742
2743
2744 if (first) {
2745 printk(KERN_INFO "%s Ver. %s\n",
2746 VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION);
2747 printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n");
2748 printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n");
2749 first = 0;
2750 }
2751
2752 velocity_init_info(pdev, vptr, info);
2753
2754 vptr->dev = dev;
2755
2756 ret = pci_enable_device(pdev);
2757 if (ret < 0)
2758 goto err_free_dev;
2759
2760 dev->irq = pdev->irq;
2761
2762 ret = velocity_get_pci_info(vptr, pdev);
2763 if (ret < 0) {
2764 /* error message already printed */
2765 goto err_disable;
2766 }
2767
2768 ret = pci_request_regions(pdev, VELOCITY_NAME);
2769 if (ret < 0) {
2770 dev_err(&pdev->dev, "No PCI resources.\n");
2771 goto err_disable;
2772 }
2773
2774 regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE);
2775 if (regs == NULL) {
2776 ret = -EIO;
2777 goto err_release_res;
2778 }
2779
2780 vptr->mac_regs = regs;
2781
2782 mac_wol_reset(regs);
2783
2784 dev->base_addr = vptr->ioaddr;
2785
2786 for (i = 0; i < 6; i++)
2787 dev->dev_addr[i] = readb(&regs->PAR[i]);
2788
2789
2790 drv_string = dev_driver_string(&pdev->dev);
2791
2792 velocity_get_options(&vptr->options, velocity_nics, drv_string);
2793
2794 /*
2795 * Mask out the options cannot be set to the chip
2796 */
2797
2798 vptr->options.flags &= info->flags;
2799
2800 /*
2801 * Enable the chip specified capbilities
2802 */
2803
2804 vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL);
2805
2806 vptr->wol_opts = vptr->options.wol_opts;
2807 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
2808
2809 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
2810
2811 dev->irq = pdev->irq;
2812 dev->netdev_ops = &velocity_netdev_ops;
2813 dev->ethtool_ops = &velocity_ethtool_ops;
2814 netif_napi_add(dev, &vptr->napi, velocity_poll, VELOCITY_NAPI_WEIGHT);
2815
2816 dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_HW_VLAN_TX;
2817 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER |
2818 NETIF_F_HW_VLAN_RX | NETIF_F_IP_CSUM;
2819
2820 ret = register_netdev(dev);
2821 if (ret < 0)
2822 goto err_iounmap;
2823
2824 if (!velocity_get_link(dev)) {
2825 netif_carrier_off(dev);
2826 vptr->mii_status |= VELOCITY_LINK_FAIL;
2827 }
2828
2829 velocity_print_info(vptr);
2830 pci_set_drvdata(pdev, dev);
2831
2832 /* and leave the chip powered down */
2833
2834 pci_set_power_state(pdev, PCI_D3hot);
2835 velocity_nics++;
2836 out:
2837 return ret;
2838
2839 err_iounmap:
2840 iounmap(regs);
2841 err_release_res:
2842 pci_release_regions(pdev);
2843 err_disable:
2844 pci_disable_device(pdev);
2845 err_free_dev:
2846 free_netdev(dev);
2847 goto out;
2848 }
2849
2850 #ifdef CONFIG_PM
2851 /**
2852 * wol_calc_crc - WOL CRC
2853 * @pattern: data pattern
2854 * @mask_pattern: mask
2855 *
2856 * Compute the wake on lan crc hashes for the packet header
2857 * we are interested in.
2858 */
2859 static u16 wol_calc_crc(int size, u8 *pattern, u8 *mask_pattern)
2860 {
2861 u16 crc = 0xFFFF;
2862 u8 mask;
2863 int i, j;
2864
2865 for (i = 0; i < size; i++) {
2866 mask = mask_pattern[i];
2867
2868 /* Skip this loop if the mask equals to zero */
2869 if (mask == 0x00)
2870 continue;
2871
2872 for (j = 0; j < 8; j++) {
2873 if ((mask & 0x01) == 0) {
2874 mask >>= 1;
2875 continue;
2876 }
2877 mask >>= 1;
2878 crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1);
2879 }
2880 }
2881 /* Finally, invert the result once to get the correct data */
2882 crc = ~crc;
2883 return bitrev32(crc) >> 16;
2884 }
2885
2886 /**
2887 * velocity_set_wol - set up for wake on lan
2888 * @vptr: velocity to set WOL status on
2889 *
2890 * Set a card up for wake on lan either by unicast or by
2891 * ARP packet.
2892 *
2893 * FIXME: check static buffer is safe here
2894 */
2895 static int velocity_set_wol(struct velocity_info *vptr)
2896 {
2897 struct mac_regs __iomem *regs = vptr->mac_regs;
2898 enum speed_opt spd_dpx = vptr->options.spd_dpx;
2899 static u8 buf[256];
2900 int i;
2901
2902 static u32 mask_pattern[2][4] = {
2903 {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */
2904 {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */
2905 };
2906
2907 writew(0xFFFF, &regs->WOLCRClr);
2908 writeb(WOLCFG_SAB | WOLCFG_SAM, &regs->WOLCFGSet);
2909 writew(WOLCR_MAGIC_EN, &regs->WOLCRSet);
2910
2911 /*
2912 if (vptr->wol_opts & VELOCITY_WOL_PHY)
2913 writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), &regs->WOLCRSet);
2914 */
2915
2916 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
2917 writew(WOLCR_UNICAST_EN, &regs->WOLCRSet);
2918
2919 if (vptr->wol_opts & VELOCITY_WOL_ARP) {
2920 struct arp_packet *arp = (struct arp_packet *) buf;
2921 u16 crc;
2922 memset(buf, 0, sizeof(struct arp_packet) + 7);
2923
2924 for (i = 0; i < 4; i++)
2925 writel(mask_pattern[0][i], &regs->ByteMask[0][i]);
2926
2927 arp->type = htons(ETH_P_ARP);
2928 arp->ar_op = htons(1);
2929
2930 memcpy(arp->ar_tip, vptr->ip_addr, 4);
2931
2932 crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf,
2933 (u8 *) & mask_pattern[0][0]);
2934
2935 writew(crc, &regs->PatternCRC[0]);
2936 writew(WOLCR_ARP_EN, &regs->WOLCRSet);
2937 }
2938
2939 BYTE_REG_BITS_ON(PWCFG_WOLTYPE, &regs->PWCFGSet);
2940 BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, &regs->PWCFGSet);
2941
2942 writew(0x0FFF, &regs->WOLSRClr);
2943
2944 if (spd_dpx == SPD_DPX_1000_FULL)
2945 goto mac_done;
2946
2947 if (spd_dpx != SPD_DPX_AUTO)
2948 goto advertise_done;
2949
2950 if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) {
2951 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
2952 MII_REG_BITS_ON(AUXCR_MDPPS, MII_NCONFIG, vptr->mac_regs);
2953
2954 MII_REG_BITS_OFF(ADVERTISE_1000FULL | ADVERTISE_1000HALF, MII_CTRL1000, vptr->mac_regs);
2955 }
2956
2957 if (vptr->mii_status & VELOCITY_SPEED_1000)
2958 MII_REG_BITS_ON(BMCR_ANRESTART, MII_BMCR, vptr->mac_regs);
2959
2960 advertise_done:
2961 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
2962
2963 {
2964 u8 GCR;
2965 GCR = readb(&regs->CHIPGCR);
2966 GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX;
2967 writeb(GCR, &regs->CHIPGCR);
2968 }
2969
2970 mac_done:
2971 BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR);
2972 /* Turn on SWPTAG just before entering power mode */
2973 BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW);
2974 /* Go to bed ..... */
2975 BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
2976
2977 return 0;
2978 }
2979
2980 /**
2981 * velocity_save_context - save registers
2982 * @vptr: velocity
2983 * @context: buffer for stored context
2984 *
2985 * Retrieve the current configuration from the velocity hardware
2986 * and stash it in the context structure, for use by the context
2987 * restore functions. This allows us to save things we need across
2988 * power down states
2989 */
2990 static void velocity_save_context(struct velocity_info *vptr, struct velocity_context *context)
2991 {
2992 struct mac_regs __iomem *regs = vptr->mac_regs;
2993 u16 i;
2994 u8 __iomem *ptr = (u8 __iomem *)regs;
2995
2996 for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4)
2997 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
2998
2999 for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4)
3000 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3001
3002 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3003 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3004
3005 }
3006
3007 static int velocity_suspend(struct pci_dev *pdev, pm_message_t state)
3008 {
3009 struct net_device *dev = pci_get_drvdata(pdev);
3010 struct velocity_info *vptr = netdev_priv(dev);
3011 unsigned long flags;
3012
3013 if (!netif_running(vptr->dev))
3014 return 0;
3015
3016 netif_device_detach(vptr->dev);
3017
3018 spin_lock_irqsave(&vptr->lock, flags);
3019 pci_save_state(pdev);
3020
3021 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) {
3022 velocity_get_ip(vptr);
3023 velocity_save_context(vptr, &vptr->context);
3024 velocity_shutdown(vptr);
3025 velocity_set_wol(vptr);
3026 pci_enable_wake(pdev, PCI_D3hot, 1);
3027 pci_set_power_state(pdev, PCI_D3hot);
3028 } else {
3029 velocity_save_context(vptr, &vptr->context);
3030 velocity_shutdown(vptr);
3031 pci_disable_device(pdev);
3032 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3033 }
3034
3035 spin_unlock_irqrestore(&vptr->lock, flags);
3036 return 0;
3037 }
3038
3039 /**
3040 * velocity_restore_context - restore registers
3041 * @vptr: velocity
3042 * @context: buffer for stored context
3043 *
3044 * Reload the register configuration from the velocity context
3045 * created by velocity_save_context.
3046 */
3047 static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context)
3048 {
3049 struct mac_regs __iomem *regs = vptr->mac_regs;
3050 int i;
3051 u8 __iomem *ptr = (u8 __iomem *)regs;
3052
3053 for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4)
3054 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3055
3056 /* Just skip cr0 */
3057 for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) {
3058 /* Clear */
3059 writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4);
3060 /* Set */
3061 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3062 }
3063
3064 for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4)
3065 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3066
3067 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3068 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3069
3070 for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++)
3071 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3072 }
3073
3074 static int velocity_resume(struct pci_dev *pdev)
3075 {
3076 struct net_device *dev = pci_get_drvdata(pdev);
3077 struct velocity_info *vptr = netdev_priv(dev);
3078 unsigned long flags;
3079 int i;
3080
3081 if (!netif_running(vptr->dev))
3082 return 0;
3083
3084 pci_set_power_state(pdev, PCI_D0);
3085 pci_enable_wake(pdev, 0, 0);
3086 pci_restore_state(pdev);
3087
3088 mac_wol_reset(vptr->mac_regs);
3089
3090 spin_lock_irqsave(&vptr->lock, flags);
3091 velocity_restore_context(vptr, &vptr->context);
3092 velocity_init_registers(vptr, VELOCITY_INIT_WOL);
3093 mac_disable_int(vptr->mac_regs);
3094
3095 velocity_tx_srv(vptr);
3096
3097 for (i = 0; i < vptr->tx.numq; i++) {
3098 if (vptr->tx.used[i])
3099 mac_tx_queue_wake(vptr->mac_regs, i);
3100 }
3101
3102 mac_enable_int(vptr->mac_regs);
3103 spin_unlock_irqrestore(&vptr->lock, flags);
3104 netif_device_attach(vptr->dev);
3105
3106 return 0;
3107 }
3108 #endif
3109
3110 /*
3111 * Definition for our device driver. The PCI layer interface
3112 * uses this to handle all our card discover and plugging
3113 */
3114 static struct pci_driver velocity_driver = {
3115 .name = VELOCITY_NAME,
3116 .id_table = velocity_id_table,
3117 .probe = velocity_found1,
3118 .remove = __devexit_p(velocity_remove1),
3119 #ifdef CONFIG_PM
3120 .suspend = velocity_suspend,
3121 .resume = velocity_resume,
3122 #endif
3123 };
3124
3125
3126 /**
3127 * velocity_ethtool_up - pre hook for ethtool
3128 * @dev: network device
3129 *
3130 * Called before an ethtool operation. We need to make sure the
3131 * chip is out of D3 state before we poke at it.
3132 */
3133 static int velocity_ethtool_up(struct net_device *dev)
3134 {
3135 struct velocity_info *vptr = netdev_priv(dev);
3136 if (!netif_running(dev))
3137 pci_set_power_state(vptr->pdev, PCI_D0);
3138 return 0;
3139 }
3140
3141 /**
3142 * velocity_ethtool_down - post hook for ethtool
3143 * @dev: network device
3144 *
3145 * Called after an ethtool operation. Restore the chip back to D3
3146 * state if it isn't running.
3147 */
3148 static void velocity_ethtool_down(struct net_device *dev)
3149 {
3150 struct velocity_info *vptr = netdev_priv(dev);
3151 if (!netif_running(dev))
3152 pci_set_power_state(vptr->pdev, PCI_D3hot);
3153 }
3154
3155 static int velocity_get_settings(struct net_device *dev,
3156 struct ethtool_cmd *cmd)
3157 {
3158 struct velocity_info *vptr = netdev_priv(dev);
3159 struct mac_regs __iomem *regs = vptr->mac_regs;
3160 u32 status;
3161 status = check_connection_type(vptr->mac_regs);
3162
3163 cmd->supported = SUPPORTED_TP |
3164 SUPPORTED_Autoneg |
3165 SUPPORTED_10baseT_Half |
3166 SUPPORTED_10baseT_Full |
3167 SUPPORTED_100baseT_Half |
3168 SUPPORTED_100baseT_Full |
3169 SUPPORTED_1000baseT_Half |
3170 SUPPORTED_1000baseT_Full;
3171
3172 cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg;
3173 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
3174 cmd->advertising |=
3175 ADVERTISED_10baseT_Half |
3176 ADVERTISED_10baseT_Full |
3177 ADVERTISED_100baseT_Half |
3178 ADVERTISED_100baseT_Full |
3179 ADVERTISED_1000baseT_Half |
3180 ADVERTISED_1000baseT_Full;
3181 } else {
3182 switch (vptr->options.spd_dpx) {
3183 case SPD_DPX_1000_FULL:
3184 cmd->advertising |= ADVERTISED_1000baseT_Full;
3185 break;
3186 case SPD_DPX_100_HALF:
3187 cmd->advertising |= ADVERTISED_100baseT_Half;
3188 break;
3189 case SPD_DPX_100_FULL:
3190 cmd->advertising |= ADVERTISED_100baseT_Full;
3191 break;
3192 case SPD_DPX_10_HALF:
3193 cmd->advertising |= ADVERTISED_10baseT_Half;
3194 break;
3195 case SPD_DPX_10_FULL:
3196 cmd->advertising |= ADVERTISED_10baseT_Full;
3197 break;
3198 default:
3199 break;
3200 }
3201 }
3202
3203 if (status & VELOCITY_SPEED_1000)
3204 ethtool_cmd_speed_set(cmd, SPEED_1000);
3205 else if (status & VELOCITY_SPEED_100)
3206 ethtool_cmd_speed_set(cmd, SPEED_100);
3207 else
3208 ethtool_cmd_speed_set(cmd, SPEED_10);
3209
3210 cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
3211 cmd->port = PORT_TP;
3212 cmd->transceiver = XCVR_INTERNAL;
3213 cmd->phy_address = readb(&regs->MIIADR) & 0x1F;
3214
3215 if (status & VELOCITY_DUPLEX_FULL)
3216 cmd->duplex = DUPLEX_FULL;
3217 else
3218 cmd->duplex = DUPLEX_HALF;
3219
3220 return 0;
3221 }
3222
3223 static int velocity_set_settings(struct net_device *dev,
3224 struct ethtool_cmd *cmd)
3225 {
3226 struct velocity_info *vptr = netdev_priv(dev);
3227 u32 speed = ethtool_cmd_speed(cmd);
3228 u32 curr_status;
3229 u32 new_status = 0;
3230 int ret = 0;
3231
3232 curr_status = check_connection_type(vptr->mac_regs);
3233 curr_status &= (~VELOCITY_LINK_FAIL);
3234
3235 new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0);
3236 new_status |= ((speed == SPEED_1000) ? VELOCITY_SPEED_1000 : 0);
3237 new_status |= ((speed == SPEED_100) ? VELOCITY_SPEED_100 : 0);
3238 new_status |= ((speed == SPEED_10) ? VELOCITY_SPEED_10 : 0);
3239 new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0);
3240
3241 if ((new_status & VELOCITY_AUTONEG_ENABLE) &&
3242 (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE))) {
3243 ret = -EINVAL;
3244 } else {
3245 enum speed_opt spd_dpx;
3246
3247 if (new_status & VELOCITY_AUTONEG_ENABLE)
3248 spd_dpx = SPD_DPX_AUTO;
3249 else if ((new_status & VELOCITY_SPEED_1000) &&
3250 (new_status & VELOCITY_DUPLEX_FULL)) {
3251 spd_dpx = SPD_DPX_1000_FULL;
3252 } else if (new_status & VELOCITY_SPEED_100)
3253 spd_dpx = (new_status & VELOCITY_DUPLEX_FULL) ?
3254 SPD_DPX_100_FULL : SPD_DPX_100_HALF;
3255 else if (new_status & VELOCITY_SPEED_10)
3256 spd_dpx = (new_status & VELOCITY_DUPLEX_FULL) ?
3257 SPD_DPX_10_FULL : SPD_DPX_10_HALF;
3258 else
3259 return -EOPNOTSUPP;
3260
3261 vptr->options.spd_dpx = spd_dpx;
3262
3263 velocity_set_media_mode(vptr, new_status);
3264 }
3265
3266 return ret;
3267 }
3268
3269 static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
3270 {
3271 struct velocity_info *vptr = netdev_priv(dev);
3272 strcpy(info->driver, VELOCITY_NAME);
3273 strcpy(info->version, VELOCITY_VERSION);
3274 strcpy(info->bus_info, pci_name(vptr->pdev));
3275 }
3276
3277 static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3278 {
3279 struct velocity_info *vptr = netdev_priv(dev);
3280 wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP;
3281 wol->wolopts |= WAKE_MAGIC;
3282 /*
3283 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3284 wol.wolopts|=WAKE_PHY;
3285 */
3286 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
3287 wol->wolopts |= WAKE_UCAST;
3288 if (vptr->wol_opts & VELOCITY_WOL_ARP)
3289 wol->wolopts |= WAKE_ARP;
3290 memcpy(&wol->sopass, vptr->wol_passwd, 6);
3291 }
3292
3293 static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3294 {
3295 struct velocity_info *vptr = netdev_priv(dev);
3296
3297 if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP)))
3298 return -EFAULT;
3299 vptr->wol_opts = VELOCITY_WOL_MAGIC;
3300
3301 /*
3302 if (wol.wolopts & WAKE_PHY) {
3303 vptr->wol_opts|=VELOCITY_WOL_PHY;
3304 vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED;
3305 }
3306 */
3307
3308 if (wol->wolopts & WAKE_MAGIC) {
3309 vptr->wol_opts |= VELOCITY_WOL_MAGIC;
3310 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3311 }
3312 if (wol->wolopts & WAKE_UCAST) {
3313 vptr->wol_opts |= VELOCITY_WOL_UCAST;
3314 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3315 }
3316 if (wol->wolopts & WAKE_ARP) {
3317 vptr->wol_opts |= VELOCITY_WOL_ARP;
3318 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3319 }
3320 memcpy(vptr->wol_passwd, wol->sopass, 6);
3321 return 0;
3322 }
3323
3324 static u32 velocity_get_msglevel(struct net_device *dev)
3325 {
3326 return msglevel;
3327 }
3328
3329 static void velocity_set_msglevel(struct net_device *dev, u32 value)
3330 {
3331 msglevel = value;
3332 }
3333
3334 static int get_pending_timer_val(int val)
3335 {
3336 int mult_bits = val >> 6;
3337 int mult = 1;
3338
3339 switch (mult_bits)
3340 {
3341 case 1:
3342 mult = 4; break;
3343 case 2:
3344 mult = 16; break;
3345 case 3:
3346 mult = 64; break;
3347 case 0:
3348 default:
3349 break;
3350 }
3351
3352 return (val & 0x3f) * mult;
3353 }
3354
3355 static void set_pending_timer_val(int *val, u32 us)
3356 {
3357 u8 mult = 0;
3358 u8 shift = 0;
3359
3360 if (us >= 0x3f) {
3361 mult = 1; /* mult with 4 */
3362 shift = 2;
3363 }
3364 if (us >= 0x3f * 4) {
3365 mult = 2; /* mult with 16 */
3366 shift = 4;
3367 }
3368 if (us >= 0x3f * 16) {
3369 mult = 3; /* mult with 64 */
3370 shift = 6;
3371 }
3372
3373 *val = (mult << 6) | ((us >> shift) & 0x3f);
3374 }
3375
3376
3377 static int velocity_get_coalesce(struct net_device *dev,
3378 struct ethtool_coalesce *ecmd)
3379 {
3380 struct velocity_info *vptr = netdev_priv(dev);
3381
3382 ecmd->tx_max_coalesced_frames = vptr->options.tx_intsup;
3383 ecmd->rx_max_coalesced_frames = vptr->options.rx_intsup;
3384
3385 ecmd->rx_coalesce_usecs = get_pending_timer_val(vptr->options.rxqueue_timer);
3386 ecmd->tx_coalesce_usecs = get_pending_timer_val(vptr->options.txqueue_timer);
3387
3388 return 0;
3389 }
3390
3391 static int velocity_set_coalesce(struct net_device *dev,
3392 struct ethtool_coalesce *ecmd)
3393 {
3394 struct velocity_info *vptr = netdev_priv(dev);
3395 int max_us = 0x3f * 64;
3396 unsigned long flags;
3397
3398 /* 6 bits of */
3399 if (ecmd->tx_coalesce_usecs > max_us)
3400 return -EINVAL;
3401 if (ecmd->rx_coalesce_usecs > max_us)
3402 return -EINVAL;
3403
3404 if (ecmd->tx_max_coalesced_frames > 0xff)
3405 return -EINVAL;
3406 if (ecmd->rx_max_coalesced_frames > 0xff)
3407 return -EINVAL;
3408
3409 vptr->options.rx_intsup = ecmd->rx_max_coalesced_frames;
3410 vptr->options.tx_intsup = ecmd->tx_max_coalesced_frames;
3411
3412 set_pending_timer_val(&vptr->options.rxqueue_timer,
3413 ecmd->rx_coalesce_usecs);
3414 set_pending_timer_val(&vptr->options.txqueue_timer,
3415 ecmd->tx_coalesce_usecs);
3416
3417 /* Setup the interrupt suppression and queue timers */
3418 spin_lock_irqsave(&vptr->lock, flags);
3419 mac_disable_int(vptr->mac_regs);
3420 setup_adaptive_interrupts(vptr);
3421 setup_queue_timers(vptr);
3422
3423 mac_write_int_mask(vptr->int_mask, vptr->mac_regs);
3424 mac_clear_isr(vptr->mac_regs);
3425 mac_enable_int(vptr->mac_regs);
3426 spin_unlock_irqrestore(&vptr->lock, flags);
3427
3428 return 0;
3429 }
3430
3431 static const char velocity_gstrings[][ETH_GSTRING_LEN] = {
3432 "rx_all",
3433 "rx_ok",
3434 "tx_ok",
3435 "rx_error",
3436 "rx_runt_ok",
3437 "rx_runt_err",
3438 "rx_64",
3439 "tx_64",
3440 "rx_65_to_127",
3441 "tx_65_to_127",
3442 "rx_128_to_255",
3443 "tx_128_to_255",
3444 "rx_256_to_511",
3445 "tx_256_to_511",
3446 "rx_512_to_1023",
3447 "tx_512_to_1023",
3448 "rx_1024_to_1518",
3449 "tx_1024_to_1518",
3450 "tx_ether_collisions",
3451 "rx_crc_errors",
3452 "rx_jumbo",
3453 "tx_jumbo",
3454 "rx_mac_control_frames",
3455 "tx_mac_control_frames",
3456 "rx_frame_alignement_errors",
3457 "rx_long_ok",
3458 "rx_long_err",
3459 "tx_sqe_errors",
3460 "rx_no_buf",
3461 "rx_symbol_errors",
3462 "in_range_length_errors",
3463 "late_collisions"
3464 };
3465
3466 static void velocity_get_strings(struct net_device *dev, u32 sset, u8 *data)
3467 {
3468 switch (sset) {
3469 case ETH_SS_STATS:
3470 memcpy(data, *velocity_gstrings, sizeof(velocity_gstrings));
3471 break;
3472 }
3473 }
3474
3475 static int velocity_get_sset_count(struct net_device *dev, int sset)
3476 {
3477 switch (sset) {
3478 case ETH_SS_STATS:
3479 return ARRAY_SIZE(velocity_gstrings);
3480 default:
3481 return -EOPNOTSUPP;
3482 }
3483 }
3484
3485 static void velocity_get_ethtool_stats(struct net_device *dev,
3486 struct ethtool_stats *stats, u64 *data)
3487 {
3488 if (netif_running(dev)) {
3489 struct velocity_info *vptr = netdev_priv(dev);
3490 u32 *p = vptr->mib_counter;
3491 int i;
3492
3493 spin_lock_irq(&vptr->lock);
3494 velocity_update_hw_mibs(vptr);
3495 spin_unlock_irq(&vptr->lock);
3496
3497 for (i = 0; i < ARRAY_SIZE(velocity_gstrings); i++)
3498 *data++ = *p++;
3499 }
3500 }
3501
3502 static const struct ethtool_ops velocity_ethtool_ops = {
3503 .get_settings = velocity_get_settings,
3504 .set_settings = velocity_set_settings,
3505 .get_drvinfo = velocity_get_drvinfo,
3506 .get_wol = velocity_ethtool_get_wol,
3507 .set_wol = velocity_ethtool_set_wol,
3508 .get_msglevel = velocity_get_msglevel,
3509 .set_msglevel = velocity_set_msglevel,
3510 .get_link = velocity_get_link,
3511 .get_strings = velocity_get_strings,
3512 .get_sset_count = velocity_get_sset_count,
3513 .get_ethtool_stats = velocity_get_ethtool_stats,
3514 .get_coalesce = velocity_get_coalesce,
3515 .set_coalesce = velocity_set_coalesce,
3516 .begin = velocity_ethtool_up,
3517 .complete = velocity_ethtool_down
3518 };
3519
3520 #if defined(CONFIG_PM) && defined(CONFIG_INET)
3521 static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr)
3522 {
3523 struct in_ifaddr *ifa = ptr;
3524 struct net_device *dev = ifa->ifa_dev->dev;
3525
3526 if (dev_net(dev) == &init_net &&
3527 dev->netdev_ops == &velocity_netdev_ops)
3528 velocity_get_ip(netdev_priv(dev));
3529
3530 return NOTIFY_DONE;
3531 }
3532
3533 static struct notifier_block velocity_inetaddr_notifier = {
3534 .notifier_call = velocity_netdev_event,
3535 };
3536
3537 static void velocity_register_notifier(void)
3538 {
3539 register_inetaddr_notifier(&velocity_inetaddr_notifier);
3540 }
3541
3542 static void velocity_unregister_notifier(void)
3543 {
3544 unregister_inetaddr_notifier(&velocity_inetaddr_notifier);
3545 }
3546
3547 #else
3548
3549 #define velocity_register_notifier() do {} while (0)
3550 #define velocity_unregister_notifier() do {} while (0)
3551
3552 #endif /* defined(CONFIG_PM) && defined(CONFIG_INET) */
3553
3554 /**
3555 * velocity_init_module - load time function
3556 *
3557 * Called when the velocity module is loaded. The PCI driver
3558 * is registered with the PCI layer, and in turn will call
3559 * the probe functions for each velocity adapter installed
3560 * in the system.
3561 */
3562 static int __init velocity_init_module(void)
3563 {
3564 int ret;
3565
3566 velocity_register_notifier();
3567 ret = pci_register_driver(&velocity_driver);
3568 if (ret < 0)
3569 velocity_unregister_notifier();
3570 return ret;
3571 }
3572
3573 /**
3574 * velocity_cleanup - module unload
3575 *
3576 * When the velocity hardware is unloaded this function is called.
3577 * It will clean up the notifiers and the unregister the PCI
3578 * driver interface for this hardware. This in turn cleans up
3579 * all discovered interfaces before returning from the function
3580 */
3581 static void __exit velocity_cleanup_module(void)
3582 {
3583 velocity_unregister_notifier();
3584 pci_unregister_driver(&velocity_driver);
3585 }
3586
3587 module_init(velocity_init_module);
3588 module_exit(velocity_cleanup_module);
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