2 * This file is part of wl1271
4 * Copyright (C) 2008-2009 Nokia Corporation
6 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 #include <linux/interrupt.h>
25 #include <linux/irq.h>
26 #include <linux/module.h>
27 #include <linux/crc7.h>
28 #include <linux/spi/spi.h>
29 #include <linux/wl12xx.h>
30 #include <linux/slab.h>
33 #include "wl12xx_80211.h"
38 #define WSPI_CMD_READ 0x40000000
39 #define WSPI_CMD_WRITE 0x00000000
40 #define WSPI_CMD_FIXED 0x20000000
41 #define WSPI_CMD_BYTE_LENGTH 0x1FFE0000
42 #define WSPI_CMD_BYTE_LENGTH_OFFSET 17
43 #define WSPI_CMD_BYTE_ADDR 0x0001FFFF
45 #define WSPI_INIT_CMD_CRC_LEN 5
47 #define WSPI_INIT_CMD_START 0x00
48 #define WSPI_INIT_CMD_TX 0x40
49 /* the extra bypass bit is sampled by the TNET as '1' */
50 #define WSPI_INIT_CMD_BYPASS_BIT 0x80
51 #define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07
52 #define WSPI_INIT_CMD_EN_FIXEDBUSY 0x80
53 #define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00
54 #define WSPI_INIT_CMD_IOD 0x40
55 #define WSPI_INIT_CMD_IP 0x20
56 #define WSPI_INIT_CMD_CS 0x10
57 #define WSPI_INIT_CMD_WS 0x08
58 #define WSPI_INIT_CMD_WSPI 0x01
59 #define WSPI_INIT_CMD_END 0x01
61 #define WSPI_INIT_CMD_LEN 8
63 #define HW_ACCESS_WSPI_FIXED_BUSY_LEN \
64 ((WL1271_BUSY_WORD_LEN - 4) / sizeof(u32))
65 #define HW_ACCESS_WSPI_INIT_CMD_MASK 0
67 /* HW limitation: maximum possible chunk size is 4095 bytes */
68 #define WSPI_MAX_CHUNK_SIZE 4092
70 #define WSPI_MAX_NUM_OF_CHUNKS (WL1271_AGGR_BUFFER_SIZE / WSPI_MAX_CHUNK_SIZE)
72 static inline struct spi_device
*wl_to_spi(struct wl1271
*wl
)
77 static struct device
*wl1271_spi_wl_to_dev(struct wl1271
*wl
)
79 return &(wl_to_spi(wl
)->dev
);
82 static void wl1271_spi_disable_interrupts(struct wl1271
*wl
)
87 static void wl1271_spi_enable_interrupts(struct wl1271
*wl
)
92 static void wl1271_spi_reset(struct wl1271
*wl
)
95 struct spi_transfer t
;
98 cmd
= kzalloc(WSPI_INIT_CMD_LEN
, GFP_KERNEL
);
100 wl1271_error("could not allocate cmd for spi reset");
104 memset(&t
, 0, sizeof(t
));
105 spi_message_init(&m
);
107 memset(cmd
, 0xff, WSPI_INIT_CMD_LEN
);
110 t
.len
= WSPI_INIT_CMD_LEN
;
111 spi_message_add_tail(&t
, &m
);
113 spi_sync(wl_to_spi(wl
), &m
);
115 wl1271_dump(DEBUG_SPI
, "spi reset -> ", cmd
, WSPI_INIT_CMD_LEN
);
119 static void wl1271_spi_init(struct wl1271
*wl
)
121 u8 crc
[WSPI_INIT_CMD_CRC_LEN
], *cmd
;
122 struct spi_transfer t
;
123 struct spi_message m
;
125 cmd
= kzalloc(WSPI_INIT_CMD_LEN
, GFP_KERNEL
);
127 wl1271_error("could not allocate cmd for spi init");
131 memset(crc
, 0, sizeof(crc
));
132 memset(&t
, 0, sizeof(t
));
133 spi_message_init(&m
);
136 * Set WSPI_INIT_COMMAND
137 * the data is being send from the MSB to LSB
141 cmd
[1] = WSPI_INIT_CMD_START
| WSPI_INIT_CMD_TX
;
144 cmd
[6] |= HW_ACCESS_WSPI_INIT_CMD_MASK
<< 3;
145 cmd
[6] |= HW_ACCESS_WSPI_FIXED_BUSY_LEN
& WSPI_INIT_CMD_FIXEDBUSY_LEN
;
147 if (HW_ACCESS_WSPI_FIXED_BUSY_LEN
== 0)
148 cmd
[5] |= WSPI_INIT_CMD_DIS_FIXEDBUSY
;
150 cmd
[5] |= WSPI_INIT_CMD_EN_FIXEDBUSY
;
152 cmd
[5] |= WSPI_INIT_CMD_IOD
| WSPI_INIT_CMD_IP
| WSPI_INIT_CMD_CS
153 | WSPI_INIT_CMD_WSPI
| WSPI_INIT_CMD_WS
;
161 cmd
[4] |= crc7(0, crc
, WSPI_INIT_CMD_CRC_LEN
) << 1;
162 cmd
[4] |= WSPI_INIT_CMD_END
;
165 t
.len
= WSPI_INIT_CMD_LEN
;
166 spi_message_add_tail(&t
, &m
);
168 spi_sync(wl_to_spi(wl
), &m
);
169 wl1271_dump(DEBUG_SPI
, "spi init -> ", cmd
, WSPI_INIT_CMD_LEN
);
173 #define WL1271_BUSY_WORD_TIMEOUT 1000
175 static int wl1271_spi_read_busy(struct wl1271
*wl
)
177 struct spi_transfer t
[1];
178 struct spi_message m
;
180 int num_busy_bytes
= 0;
183 * Read further busy words from SPI until a non-busy word is
184 * encountered, then read the data itself into the buffer.
187 num_busy_bytes
= WL1271_BUSY_WORD_TIMEOUT
;
188 busy_buf
= wl
->buffer_busyword
;
189 while (num_busy_bytes
) {
191 spi_message_init(&m
);
192 memset(t
, 0, sizeof(t
));
193 t
[0].rx_buf
= busy_buf
;
194 t
[0].len
= sizeof(u32
);
195 t
[0].cs_change
= true;
196 spi_message_add_tail(&t
[0], &m
);
197 spi_sync(wl_to_spi(wl
), &m
);
203 /* The SPI bus is unresponsive, the read failed. */
204 wl1271_error("SPI read busy-word timeout!\n");
208 static void wl1271_spi_raw_read(struct wl1271
*wl
, int addr
, void *buf
,
209 size_t len
, bool fixed
)
211 struct spi_transfer t
[2];
212 struct spi_message m
;
218 chunk_len
= min((size_t)WSPI_MAX_CHUNK_SIZE
, len
);
220 cmd
= &wl
->buffer_cmd
;
221 busy_buf
= wl
->buffer_busyword
;
224 *cmd
|= WSPI_CMD_READ
;
225 *cmd
|= (chunk_len
<< WSPI_CMD_BYTE_LENGTH_OFFSET
) &
226 WSPI_CMD_BYTE_LENGTH
;
227 *cmd
|= addr
& WSPI_CMD_BYTE_ADDR
;
230 *cmd
|= WSPI_CMD_FIXED
;
232 spi_message_init(&m
);
233 memset(t
, 0, sizeof(t
));
237 t
[0].cs_change
= true;
238 spi_message_add_tail(&t
[0], &m
);
240 /* Busy and non busy words read */
241 t
[1].rx_buf
= busy_buf
;
242 t
[1].len
= WL1271_BUSY_WORD_LEN
;
243 t
[1].cs_change
= true;
244 spi_message_add_tail(&t
[1], &m
);
246 spi_sync(wl_to_spi(wl
), &m
);
248 if (!(busy_buf
[WL1271_BUSY_WORD_CNT
- 1] & 0x1) &&
249 wl1271_spi_read_busy(wl
)) {
250 memset(buf
, 0, chunk_len
);
254 spi_message_init(&m
);
255 memset(t
, 0, sizeof(t
));
258 t
[0].len
= chunk_len
;
259 t
[0].cs_change
= true;
260 spi_message_add_tail(&t
[0], &m
);
262 spi_sync(wl_to_spi(wl
), &m
);
264 wl1271_dump(DEBUG_SPI
, "spi_read cmd -> ", cmd
, sizeof(*cmd
));
265 wl1271_dump(DEBUG_SPI
, "spi_read buf <- ", buf
, chunk_len
);
274 static void wl1271_spi_raw_write(struct wl1271
*wl
, int addr
, void *buf
,
275 size_t len
, bool fixed
)
277 struct spi_transfer t
[2 * WSPI_MAX_NUM_OF_CHUNKS
];
278 struct spi_message m
;
279 u32 commands
[WSPI_MAX_NUM_OF_CHUNKS
];
284 WARN_ON(len
> WL1271_AGGR_BUFFER_SIZE
);
286 spi_message_init(&m
);
287 memset(t
, 0, sizeof(t
));
292 chunk_len
= min((size_t)WSPI_MAX_CHUNK_SIZE
, len
);
295 *cmd
|= WSPI_CMD_WRITE
;
296 *cmd
|= (chunk_len
<< WSPI_CMD_BYTE_LENGTH_OFFSET
) &
297 WSPI_CMD_BYTE_LENGTH
;
298 *cmd
|= addr
& WSPI_CMD_BYTE_ADDR
;
301 *cmd
|= WSPI_CMD_FIXED
;
304 t
[i
].len
= sizeof(*cmd
);
305 spi_message_add_tail(&t
[i
++], &m
);
308 t
[i
].len
= chunk_len
;
309 spi_message_add_tail(&t
[i
++], &m
);
311 wl1271_dump(DEBUG_SPI
, "spi_write cmd -> ", cmd
, sizeof(*cmd
));
312 wl1271_dump(DEBUG_SPI
, "spi_write buf -> ", buf
, chunk_len
);
321 spi_sync(wl_to_spi(wl
), &m
);
324 static irqreturn_t
wl1271_hardirq(int irq
, void *cookie
)
326 struct wl1271
*wl
= cookie
;
329 wl1271_debug(DEBUG_IRQ
, "IRQ");
331 /* complete the ELP completion */
332 spin_lock_irqsave(&wl
->wl_lock
, flags
);
333 set_bit(WL1271_FLAG_IRQ_RUNNING
, &wl
->flags
);
335 complete(wl
->elp_compl
);
336 wl
->elp_compl
= NULL
;
338 spin_unlock_irqrestore(&wl
->wl_lock
, flags
);
340 return IRQ_WAKE_THREAD
;
343 static int wl1271_spi_set_power(struct wl1271
*wl
, bool enable
)
346 wl
->set_power(enable
);
351 static struct wl1271_if_operations spi_ops
= {
352 .read
= wl1271_spi_raw_read
,
353 .write
= wl1271_spi_raw_write
,
354 .reset
= wl1271_spi_reset
,
355 .init
= wl1271_spi_init
,
356 .power
= wl1271_spi_set_power
,
357 .dev
= wl1271_spi_wl_to_dev
,
358 .enable_irq
= wl1271_spi_enable_interrupts
,
359 .disable_irq
= wl1271_spi_disable_interrupts
,
360 .set_block_size
= NULL
,
363 static int __devinit
wl1271_probe(struct spi_device
*spi
)
365 struct wl12xx_platform_data
*pdata
;
366 struct ieee80211_hw
*hw
;
368 unsigned long irqflags
;
371 pdata
= spi
->dev
.platform_data
;
373 wl1271_error("no platform data");
377 hw
= wl1271_alloc_hw();
383 dev_set_drvdata(&spi
->dev
, wl
);
386 wl
->if_ops
= &spi_ops
;
388 /* This is the only SPI value that we need to set here, the rest
389 * comes from the board-peripherals file */
390 spi
->bits_per_word
= 32;
392 ret
= spi_setup(spi
);
394 wl1271_error("spi_setup failed");
398 wl
->set_power
= pdata
->set_power
;
399 if (!wl
->set_power
) {
400 wl1271_error("set power function missing in platform data");
405 wl
->ref_clock
= pdata
->board_ref_clock
;
406 wl
->tcxo_clock
= pdata
->board_tcxo_clock
;
407 wl
->platform_quirks
= pdata
->platform_quirks
;
409 if (wl
->platform_quirks
& WL12XX_PLATFORM_QUIRK_EDGE_IRQ
)
410 irqflags
= IRQF_TRIGGER_RISING
;
412 irqflags
= IRQF_TRIGGER_HIGH
| IRQF_ONESHOT
;
416 wl1271_error("irq missing in platform data");
421 ret
= request_threaded_irq(wl
->irq
, wl1271_hardirq
, wl1271_irq
,
425 wl1271_error("request_irq() failed: %d", ret
);
429 disable_irq(wl
->irq
);
431 ret
= wl1271_init_ieee80211(wl
);
435 ret
= wl1271_register_hw(wl
);
442 free_irq(wl
->irq
, wl
);
450 static int __devexit
wl1271_remove(struct spi_device
*spi
)
452 struct wl1271
*wl
= dev_get_drvdata(&spi
->dev
);
454 wl1271_unregister_hw(wl
);
455 free_irq(wl
->irq
, wl
);
462 static struct spi_driver wl1271_spi_driver
= {
464 .name
= "wl1271_spi",
465 .bus
= &spi_bus_type
,
466 .owner
= THIS_MODULE
,
469 .probe
= wl1271_probe
,
470 .remove
= __devexit_p(wl1271_remove
),
473 static int __init
wl1271_init(void)
475 return spi_register_driver(&wl1271_spi_driver
);
478 static void __exit
wl1271_exit(void)
480 spi_unregister_driver(&wl1271_spi_driver
);
483 module_init(wl1271_init
);
484 module_exit(wl1271_exit
);
486 MODULE_LICENSE("GPL");
487 MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
488 MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");
489 MODULE_FIRMWARE(WL127X_FW_NAME
);
490 MODULE_FIRMWARE(WL128X_FW_NAME
);
491 MODULE_ALIAS("spi:wl1271");