Add linux-next specific files for 20110831
[linux-2.6/next.git] / drivers / staging / gma500 / gtt.c
bloba24623997e50bf8a4e2b3813fd188afb97e5e77d
1 /*
2 * Copyright (c) 2007, Intel Corporation.
3 * All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * Authors: Thomas Hellstrom <thomas-at-tungstengraphics.com>
19 * Alan Cox <alan@linux.intel.com>
22 #include <drm/drmP.h>
23 #include "psb_drv.h"
27 * GTT resource allocator - manage page mappings in GTT space
30 /**
31 * psb_gtt_mask_pte - generate GTT pte entry
32 * @pfn: page number to encode
33 * @type: type of memory in the GTT
35 * Set the GTT entry for the appropriate memory type.
37 static inline uint32_t psb_gtt_mask_pte(uint32_t pfn, int type)
39 uint32_t mask = PSB_PTE_VALID;
41 if (type & PSB_MMU_CACHED_MEMORY)
42 mask |= PSB_PTE_CACHED;
43 if (type & PSB_MMU_RO_MEMORY)
44 mask |= PSB_PTE_RO;
45 if (type & PSB_MMU_WO_MEMORY)
46 mask |= PSB_PTE_WO;
48 return (pfn << PAGE_SHIFT) | mask;
51 /**
52 * psb_gtt_entry - find the GTT entries for a gtt_range
53 * @dev: our DRM device
54 * @r: our GTT range
56 * Given a gtt_range object return the GTT offset of the page table
57 * entries for this gtt_range
59 u32 *psb_gtt_entry(struct drm_device *dev, struct gtt_range *r)
61 struct drm_psb_private *dev_priv = dev->dev_private;
62 unsigned long offset;
64 offset = r->resource.start - dev_priv->gtt_mem->start;
66 return dev_priv->gtt_map + (offset >> PAGE_SHIFT);
69 /**
70 * psb_gtt_insert - put an object into the GTT
71 * @dev: our DRM device
72 * @r: our GTT range
74 * Take our preallocated GTT range and insert the GEM object into
75 * the GTT. This is protected via the gtt mutex which the caller
76 * must hold.
78 static int psb_gtt_insert(struct drm_device *dev, struct gtt_range *r)
80 u32 *gtt_slot, pte;
81 struct page **pages;
82 int i;
84 if (r->pages == NULL) {
85 WARN_ON(1);
86 return -EINVAL;
89 WARN_ON(r->stolen); /* refcount these maybe ? */
91 gtt_slot = psb_gtt_entry(dev, r);
92 pages = r->pages;
94 /* Make sure changes are visible to the GPU */
95 set_pages_array_uc(pages, r->npage);
97 /* Write our page entries into the GTT itself */
98 for (i = 0; i < r->npage; i++) {
99 pte = psb_gtt_mask_pte(page_to_pfn(*pages++), 0/*type*/);
100 iowrite32(pte, gtt_slot++);
102 /* Make sure all the entries are set before we return */
103 ioread32(gtt_slot - 1);
104 return 0;
108 * psb_gtt_remove - remove an object from the GTT
109 * @dev: our DRM device
110 * @r: our GTT range
112 * Remove a preallocated GTT range from the GTT. Overwrite all the
113 * page table entries with the dummy page. This is protected via the gtt
114 * mutex which the caller must hold.
117 static void psb_gtt_remove(struct drm_device *dev, struct gtt_range *r)
119 struct drm_psb_private *dev_priv = dev->dev_private;
120 u32 *gtt_slot, pte;
121 int i;
123 WARN_ON(r->stolen);
125 gtt_slot = psb_gtt_entry(dev, r);
126 pte = psb_gtt_mask_pte(page_to_pfn(dev_priv->scratch_page), 0);
128 for (i = 0; i < r->npage; i++)
129 iowrite32(pte, gtt_slot++);
130 ioread32(gtt_slot - 1);
131 set_pages_array_wb(r->pages, r->npage);
135 * psb_gtt_attach_pages - attach and pin GEM pages
136 * @gt: the gtt range
138 * Pin and build an in kernel list of the pages that back our GEM object.
139 * While we hold this the pages cannot be swapped out. This is protected
140 * via the gtt mutex which the caller must hold.
142 static int psb_gtt_attach_pages(struct gtt_range *gt)
144 struct inode *inode;
145 struct address_space *mapping;
146 int i;
147 struct page *p;
148 int pages = gt->gem.size / PAGE_SIZE;
150 WARN_ON(gt->pages);
152 /* This is the shared memory object that backs the GEM resource */
153 inode = gt->gem.filp->f_path.dentry->d_inode;
154 mapping = inode->i_mapping;
156 gt->pages = kmalloc(pages * sizeof(struct page *), GFP_KERNEL);
157 if (gt->pages == NULL)
158 return -ENOMEM;
159 gt->npage = pages;
161 for (i = 0; i < pages; i++) {
162 /* FIXME: needs updating as per mail from Hugh Dickins */
163 p = read_cache_page_gfp(mapping, i,
164 __GFP_COLD | GFP_KERNEL);
165 if (IS_ERR(p))
166 goto err;
167 gt->pages[i] = p;
169 return 0;
171 err:
172 while (i--)
173 page_cache_release(gt->pages[i]);
174 kfree(gt->pages);
175 gt->pages = NULL;
176 return PTR_ERR(p);
180 * psb_gtt_detach_pages - attach and pin GEM pages
181 * @gt: the gtt range
183 * Undo the effect of psb_gtt_attach_pages. At this point the pages
184 * must have been removed from the GTT as they could now be paged out
185 * and move bus address. This is protected via the gtt mutex which the
186 * caller must hold.
188 static void psb_gtt_detach_pages(struct gtt_range *gt)
190 int i;
191 for (i = 0; i < gt->npage; i++) {
192 /* FIXME: do we need to force dirty */
193 set_page_dirty(gt->pages[i]);
194 page_cache_release(gt->pages[i]);
196 kfree(gt->pages);
197 gt->pages = NULL;
201 * psb_gtt_pin - pin pages into the GTT
202 * @gt: range to pin
204 * Pin a set of pages into the GTT. The pins are refcounted so that
205 * multiple pins need multiple unpins to undo.
207 * Non GEM backed objects treat this as a no-op as they are always GTT
208 * backed objects.
210 int psb_gtt_pin(struct gtt_range *gt)
212 int ret = 0;
213 struct drm_device *dev = gt->gem.dev;
214 struct drm_psb_private *dev_priv = dev->dev_private;
216 mutex_lock(&dev_priv->gtt_mutex);
218 if (gt->in_gart == 0 && gt->stolen == 0) {
219 ret = psb_gtt_attach_pages(gt);
220 if (ret < 0)
221 goto out;
222 ret = psb_gtt_insert(dev, gt);
223 if (ret < 0) {
224 psb_gtt_detach_pages(gt);
225 goto out;
228 gt->in_gart++;
229 out:
230 mutex_unlock(&dev_priv->gtt_mutex);
231 return ret;
235 * psb_gtt_unpin - Drop a GTT pin requirement
236 * @gt: range to pin
238 * Undoes the effect of psb_gtt_pin. On the last drop the GEM object
239 * will be removed from the GTT which will also drop the page references
240 * and allow the VM to clean up or page stuff.
242 * Non GEM backed objects treat this as a no-op as they are always GTT
243 * backed objects.
245 void psb_gtt_unpin(struct gtt_range *gt)
247 struct drm_device *dev = gt->gem.dev;
248 struct drm_psb_private *dev_priv = dev->dev_private;
250 mutex_lock(&dev_priv->gtt_mutex);
252 WARN_ON(!gt->in_gart);
254 gt->in_gart--;
255 if (gt->in_gart == 0 && gt->stolen == 0) {
256 psb_gtt_remove(dev, gt);
257 psb_gtt_detach_pages(gt);
259 mutex_unlock(&dev_priv->gtt_mutex);
263 * GTT resource allocator - allocate and manage GTT address space
267 * psb_gtt_alloc_range - allocate GTT address space
268 * @dev: Our DRM device
269 * @len: length (bytes) of address space required
270 * @name: resource name
271 * @backed: resource should be backed by stolen pages
273 * Ask the kernel core to find us a suitable range of addresses
274 * to use for a GTT mapping.
276 * Returns a gtt_range structure describing the object, or NULL on
277 * error. On successful return the resource is both allocated and marked
278 * as in use.
280 struct gtt_range *psb_gtt_alloc_range(struct drm_device *dev, int len,
281 const char *name, int backed)
283 struct drm_psb_private *dev_priv = dev->dev_private;
284 struct gtt_range *gt;
285 struct resource *r = dev_priv->gtt_mem;
286 int ret;
287 unsigned long start, end;
289 if (backed) {
290 /* The start of the GTT is the stolen pages */
291 start = r->start;
292 end = r->start + dev_priv->gtt.stolen_size - 1;
293 } else {
294 /* The rest we will use for GEM backed objects */
295 start = r->start + dev_priv->gtt.stolen_size;
296 end = r->end;
299 gt = kzalloc(sizeof(struct gtt_range), GFP_KERNEL);
300 if (gt == NULL)
301 return NULL;
302 gt->resource.name = name;
303 gt->stolen = backed;
304 gt->in_gart = backed;
305 /* Ensure this is set for non GEM objects */
306 gt->gem.dev = dev;
307 ret = allocate_resource(dev_priv->gtt_mem, &gt->resource,
308 len, start, end, PAGE_SIZE, NULL, NULL);
309 if (ret == 0) {
310 gt->offset = gt->resource.start - r->start;
311 return gt;
313 kfree(gt);
314 return NULL;
318 * psb_gtt_free_range - release GTT address space
319 * @dev: our DRM device
320 * @gt: a mapping created with psb_gtt_alloc_range
322 * Release a resource that was allocated with psb_gtt_alloc_range. If the
323 * object has been pinned by mmap users we clean this up here currently.
325 void psb_gtt_free_range(struct drm_device *dev, struct gtt_range *gt)
327 /* Undo the mmap pin if we are destroying the object */
328 if (gt->mmapping) {
329 psb_gtt_unpin(gt);
330 gt->mmapping = 0;
332 WARN_ON(gt->in_gart && !gt->stolen);
333 release_resource(&gt->resource);
334 kfree(gt);
337 void psb_gtt_alloc(struct drm_device *dev)
339 struct drm_psb_private *dev_priv = dev->dev_private;
340 init_rwsem(&dev_priv->gtt.sem);
343 void psb_gtt_takedown(struct drm_device *dev)
345 struct drm_psb_private *dev_priv = dev->dev_private;
347 if (dev_priv->gtt_map) {
348 iounmap(dev_priv->gtt_map);
349 dev_priv->gtt_map = NULL;
351 if (dev_priv->gtt_initialized) {
352 pci_write_config_word(dev->pdev, PSB_GMCH_CTRL,
353 dev_priv->gmch_ctrl);
354 PSB_WVDC32(dev_priv->pge_ctl, PSB_PGETBL_CTL);
355 (void) PSB_RVDC32(PSB_PGETBL_CTL);
357 if (dev_priv->vram_addr)
358 iounmap(dev_priv->gtt_map);
361 int psb_gtt_init(struct drm_device *dev, int resume)
363 struct drm_psb_private *dev_priv = dev->dev_private;
364 unsigned gtt_pages;
365 unsigned long stolen_size, vram_stolen_size;
366 unsigned i, num_pages;
367 unsigned pfn_base;
368 uint32_t vram_pages;
369 uint32_t dvmt_mode = 0;
370 struct psb_gtt *pg;
372 int ret = 0;
373 uint32_t pte;
375 mutex_init(&dev_priv->gtt_mutex);
377 psb_gtt_alloc(dev);
378 pg = &dev_priv->gtt;
380 /* Enable the GTT */
381 pci_read_config_word(dev->pdev, PSB_GMCH_CTRL, &dev_priv->gmch_ctrl);
382 pci_write_config_word(dev->pdev, PSB_GMCH_CTRL,
383 dev_priv->gmch_ctrl | _PSB_GMCH_ENABLED);
385 dev_priv->pge_ctl = PSB_RVDC32(PSB_PGETBL_CTL);
386 PSB_WVDC32(dev_priv->pge_ctl | _PSB_PGETBL_ENABLED, PSB_PGETBL_CTL);
387 (void) PSB_RVDC32(PSB_PGETBL_CTL);
389 /* The root resource we allocate address space from */
390 dev_priv->gtt_initialized = 1;
392 pg->gtt_phys_start = dev_priv->pge_ctl & PAGE_MASK;
395 * The video mmu has a hw bug when accessing 0x0D0000000.
396 * Make gatt start at 0x0e000,0000. This doesn't actually
397 * matter for us but may do if the video acceleration ever
398 * gets opened up.
400 pg->mmu_gatt_start = 0xE0000000;
402 pg->gtt_start = pci_resource_start(dev->pdev, PSB_GTT_RESOURCE);
403 gtt_pages = pci_resource_len(dev->pdev, PSB_GTT_RESOURCE)
404 >> PAGE_SHIFT;
405 /* Some CDV firmware doesn't report this currently. In which case the
406 system has 64 gtt pages */
407 if (pg->gtt_start == 0 || gtt_pages == 0) {
408 dev_err(dev->dev, "GTT PCI BAR not initialized.\n");
409 gtt_pages = 64;
410 pg->gtt_start = dev_priv->pge_ctl;
413 pg->gatt_start = pci_resource_start(dev->pdev, PSB_GATT_RESOURCE);
414 pg->gatt_pages = pci_resource_len(dev->pdev, PSB_GATT_RESOURCE)
415 >> PAGE_SHIFT;
416 dev_priv->gtt_mem = &dev->pdev->resource[PSB_GATT_RESOURCE];
418 if (pg->gatt_pages == 0 || pg->gatt_start == 0) {
419 static struct resource fudge; /* Preferably peppermint */
420 /* This can occur on CDV SDV systems. Fudge it in this case.
421 We really don't care what imaginary space is being allocated
422 at this point */
423 dev_err(dev->dev, "GATT PCI BAR not initialized.\n");
424 pg->gatt_start = 0x40000000;
425 pg->gatt_pages = (128 * 1024 * 1024) >> PAGE_SHIFT;
426 /* This is a little confusing but in fact the GTT is providing
427 a view from the GPU into memory and not vice versa. As such
428 this is really allocating space that is not the same as the
429 CPU address space on CDV */
430 fudge.start = 0x40000000;
431 fudge.end = 0x40000000 + 128 * 1024 * 1024 - 1;
432 fudge.name = "fudge";
433 fudge.flags = IORESOURCE_MEM;
434 dev_priv->gtt_mem = &fudge;
437 pci_read_config_dword(dev->pdev, PSB_BSM, &dev_priv->stolen_base);
438 vram_stolen_size = pg->gtt_phys_start - dev_priv->stolen_base
439 - PAGE_SIZE;
441 stolen_size = vram_stolen_size;
443 printk(KERN_INFO "Stolen memory information\n");
444 printk(KERN_INFO " base in RAM: 0x%x\n", dev_priv->stolen_base);
445 printk(KERN_INFO " size: %luK, calculated by (GTT RAM base) - (Stolen base), seems wrong\n",
446 vram_stolen_size/1024);
447 dvmt_mode = (dev_priv->gmch_ctrl >> 4) & 0x7;
448 printk(KERN_INFO " the correct size should be: %dM(dvmt mode=%d)\n",
449 (dvmt_mode == 1) ? 1 : (2 << (dvmt_mode - 1)), dvmt_mode);
451 if (resume && (gtt_pages != pg->gtt_pages) &&
452 (stolen_size != pg->stolen_size)) {
453 dev_err(dev->dev, "GTT resume error.\n");
454 ret = -EINVAL;
455 goto out_err;
458 pg->gtt_pages = gtt_pages;
459 pg->stolen_size = stolen_size;
460 dev_priv->vram_stolen_size = vram_stolen_size;
463 * Map the GTT and the stolen memory area
465 dev_priv->gtt_map = ioremap_nocache(pg->gtt_phys_start,
466 gtt_pages << PAGE_SHIFT);
467 if (!dev_priv->gtt_map) {
468 dev_err(dev->dev, "Failure to map gtt.\n");
469 ret = -ENOMEM;
470 goto out_err;
473 dev_priv->vram_addr = ioremap_wc(dev_priv->stolen_base, stolen_size);
474 if (!dev_priv->vram_addr) {
475 dev_err(dev->dev, "Failure to map stolen base.\n");
476 ret = -ENOMEM;
477 goto out_err;
481 * Insert vram stolen pages into the GTT
484 pfn_base = dev_priv->stolen_base >> PAGE_SHIFT;
485 vram_pages = num_pages = vram_stolen_size >> PAGE_SHIFT;
486 printk(KERN_INFO"Set up %d stolen pages starting at 0x%08x, GTT offset %dK\n",
487 num_pages, pfn_base << PAGE_SHIFT, 0);
488 for (i = 0; i < num_pages; ++i) {
489 pte = psb_gtt_mask_pte(pfn_base + i, 0);
490 iowrite32(pte, dev_priv->gtt_map + i);
494 * Init rest of GTT to the scratch page to avoid accidents or scribbles
497 pfn_base = page_to_pfn(dev_priv->scratch_page);
498 pte = psb_gtt_mask_pte(pfn_base, 0);
499 for (; i < gtt_pages; ++i)
500 iowrite32(pte, dev_priv->gtt_map + i);
502 (void) ioread32(dev_priv->gtt_map + i - 1);
503 return 0;
505 out_err:
506 psb_gtt_takedown(dev);
507 return ret;