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Add linux-next specific files for 20110831
[linux-2.6/next.git] / drivers / usb / gadget / pxa25x_udc.c
blob7862465291d11ba8946635d2efc371c72a99336c
1 /*
2 * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
3 *
4 * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
5 * Copyright (C) 2003 Robert Schwebel, Pengutronix
6 * Copyright (C) 2003 Benedikt Spranger, Pengutronix
7 * Copyright (C) 2003 David Brownell
8 * Copyright (C) 2003 Joshua Wise
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25
26 /* #define VERBOSE_DEBUG */
27
28 #include <linux/device.h>
29 #include <linux/module.h>
30 #include <linux/kernel.h>
31 #include <linux/ioport.h>
32 #include <linux/types.h>
33 #include <linux/errno.h>
34 #include <linux/delay.h>
35 #include <linux/slab.h>
36 #include <linux/init.h>
37 #include <linux/timer.h>
38 #include <linux/list.h>
39 #include <linux/interrupt.h>
40 #include <linux/mm.h>
41 #include <linux/platform_device.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/irq.h>
44 #include <linux/clk.h>
45 #include <linux/err.h>
46 #include <linux/seq_file.h>
47 #include <linux/debugfs.h>
48 #include <linux/io.h>
49 #include <linux/prefetch.h>
50
51 #include <asm/byteorder.h>
52 #include <asm/dma.h>
53 #include <asm/gpio.h>
54 #include <asm/system.h>
55 #include <asm/mach-types.h>
56 #include <asm/unaligned.h>
57
58 #include <linux/usb/ch9.h>
59 #include <linux/usb/gadget.h>
60 #include <linux/usb/otg.h>
61
62 /*
63 * This driver is PXA25x only. Grab the right register definitions.
64 */
65 #ifdef CONFIG_ARCH_PXA
66 #include <mach/pxa25x-udc.h>
67 #endif
68
69 #ifdef CONFIG_ARCH_LUBBOCK
70 #include <mach/lubbock.h>
71 #endif
72
73 #include <asm/mach/udc_pxa2xx.h>
74
75
76 /*
77 * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
78 * series processors. The UDC for the IXP 4xx series is very similar.
79 * There are fifteen endpoints, in addition to ep0.
80 *
81 * Such controller drivers work with a gadget driver. The gadget driver
82 * returns descriptors, implements configuration and data protocols used
83 * by the host to interact with this device, and allocates endpoints to
84 * the different protocol interfaces. The controller driver virtualizes
85 * usb hardware so that the gadget drivers will be more portable.
86 *
87 * This UDC hardware wants to implement a bit too much USB protocol, so
88 * it constrains the sorts of USB configuration change events that work.
89 * The errata for these chips are misleading; some "fixed" bugs from
90 * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
91 *
92 * Note that the UDC hardware supports DMA (except on IXP) but that's
93 * not used here. IN-DMA (to host) is simple enough, when the data is
94 * suitably aligned (16 bytes) ... the network stack doesn't do that,
95 * other software can. OUT-DMA is buggy in most chip versions, as well
96 * as poorly designed (data toggle not automatic). So this driver won't
97 * bother using DMA. (Mostly-working IN-DMA support was available in
98 * kernels before 2.6.23, but was never enabled or well tested.)
99 */
100
101 #define DRIVER_VERSION "30-June-2007"
102 #define DRIVER_DESC "PXA 25x USB Device Controller driver"
103
104
105 static const char driver_name [] = "pxa25x_udc";
106
107 static const char ep0name [] = "ep0";
108
109
110 #ifdef CONFIG_ARCH_IXP4XX
111
112 /* cpu-specific register addresses are compiled in to this code */
113 #ifdef CONFIG_ARCH_PXA
114 #error "Can't configure both IXP and PXA"
115 #endif
116
117 /* IXP doesn't yet support <linux/clk.h> */
118 #define clk_get(dev,name) NULL
119 #define clk_enable(clk) do { } while (0)
120 #define clk_disable(clk) do { } while (0)
121 #define clk_put(clk) do { } while (0)
122
123 #endif
124
125 #include "pxa25x_udc.h"
126
127
128 #ifdef CONFIG_USB_PXA25X_SMALL
129 #define SIZE_STR " (small)"
130 #else
131 #define SIZE_STR ""
132 #endif
133
134 /* ---------------------------------------------------------------------------
135 * endpoint related parts of the api to the usb controller hardware,
136 * used by gadget driver; and the inner talker-to-hardware core.
137 * ---------------------------------------------------------------------------
138 */
139
140 static void pxa25x_ep_fifo_flush (struct usb_ep *ep);
141 static void nuke (struct pxa25x_ep *, int status);
142
143 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
144 static void pullup_off(void)
145 {
146 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
147 int off_level = mach->gpio_pullup_inverted;
148
149 if (gpio_is_valid(mach->gpio_pullup))
150 gpio_set_value(mach->gpio_pullup, off_level);
151 else if (mach->udc_command)
152 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
153 }
154
155 static void pullup_on(void)
156 {
157 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
158 int on_level = !mach->gpio_pullup_inverted;
159
160 if (gpio_is_valid(mach->gpio_pullup))
161 gpio_set_value(mach->gpio_pullup, on_level);
162 else if (mach->udc_command)
163 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
164 }
165
166 static void pio_irq_enable(int bEndpointAddress)
167 {
168 bEndpointAddress &= 0xf;
169 if (bEndpointAddress < 8)
170 UICR0 &= ~(1 << bEndpointAddress);
171 else {
172 bEndpointAddress -= 8;
173 UICR1 &= ~(1 << bEndpointAddress);
174 }
175 }
176
177 static void pio_irq_disable(int bEndpointAddress)
178 {
179 bEndpointAddress &= 0xf;
180 if (bEndpointAddress < 8)
181 UICR0 |= 1 << bEndpointAddress;
182 else {
183 bEndpointAddress -= 8;
184 UICR1 |= 1 << bEndpointAddress;
185 }
186 }
187
188 /* The UDCCR reg contains mask and interrupt status bits,
189 * so using '|=' isn't safe as it may ack an interrupt.
190 */
191 #define UDCCR_MASK_BITS (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
192
193 static inline void udc_set_mask_UDCCR(int mask)
194 {
195 UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
196 }
197
198 static inline void udc_clear_mask_UDCCR(int mask)
199 {
200 UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
201 }
202
203 static inline void udc_ack_int_UDCCR(int mask)
204 {
205 /* udccr contains the bits we dont want to change */
206 __u32 udccr = UDCCR & UDCCR_MASK_BITS;
207
208 UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
209 }
210
211 /*
212 * endpoint enable/disable
213 *
214 * we need to verify the descriptors used to enable endpoints. since pxa25x
215 * endpoint configurations are fixed, and are pretty much always enabled,
216 * there's not a lot to manage here.
217 *
218 * because pxa25x can't selectively initialize bulk (or interrupt) endpoints,
219 * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
220 * for a single interface (with only the default altsetting) and for gadget
221 * drivers that don't halt endpoints (not reset by set_interface). that also
222 * means that if you use ISO, you must violate the USB spec rule that all
223 * iso endpoints must be in non-default altsettings.
224 */
225 static int pxa25x_ep_enable (struct usb_ep *_ep,
226 const struct usb_endpoint_descriptor *desc)
227 {
228 struct pxa25x_ep *ep;
229 struct pxa25x_udc *dev;
230
231 ep = container_of (_ep, struct pxa25x_ep, ep);
232 if (!_ep || !desc || ep->desc || _ep->name == ep0name
233 || desc->bDescriptorType != USB_DT_ENDPOINT
234 || ep->bEndpointAddress != desc->bEndpointAddress
235 || ep->fifo_size < usb_endpoint_maxp (desc)) {
236 DMSG("%s, bad ep or descriptor\n", __func__);
237 return -EINVAL;
238 }
239
240 /* xfer types must match, except that interrupt ~= bulk */
241 if (ep->bmAttributes != desc->bmAttributes
242 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
243 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
244 DMSG("%s, %s type mismatch\n", __func__, _ep->name);
245 return -EINVAL;
246 }
247
248 /* hardware _could_ do smaller, but driver doesn't */
249 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
250 && usb_endpoint_maxp (desc)
251 != BULK_FIFO_SIZE)
252 || !desc->wMaxPacketSize) {
253 DMSG("%s, bad %s maxpacket\n", __func__, _ep->name);
254 return -ERANGE;
255 }
256
257 dev = ep->dev;
258 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
259 DMSG("%s, bogus device state\n", __func__);
260 return -ESHUTDOWN;
261 }
262
263 ep->desc = desc;
264 ep->stopped = 0;
265 ep->pio_irqs = 0;
266 ep->ep.maxpacket = usb_endpoint_maxp (desc);
267
268 /* flush fifo (mostly for OUT buffers) */
269 pxa25x_ep_fifo_flush (_ep);
270
271 /* ... reset halt state too, if we could ... */
272
273 DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
274 return 0;
275 }
276
277 static int pxa25x_ep_disable (struct usb_ep *_ep)
278 {
279 struct pxa25x_ep *ep;
280 unsigned long flags;
281
282 ep = container_of (_ep, struct pxa25x_ep, ep);
283 if (!_ep || !ep->desc) {
284 DMSG("%s, %s not enabled\n", __func__,
285 _ep ? ep->ep.name : NULL);
286 return -EINVAL;
287 }
288 local_irq_save(flags);
289
290 nuke (ep, -ESHUTDOWN);
291
292 /* flush fifo (mostly for IN buffers) */
293 pxa25x_ep_fifo_flush (_ep);
294
295 ep->desc = NULL;
296 ep->stopped = 1;
297
298 local_irq_restore(flags);
299 DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
300 return 0;
301 }
302
303 /*-------------------------------------------------------------------------*/
304
305 /* for the pxa25x, these can just wrap kmalloc/kfree. gadget drivers
306 * must still pass correctly initialized endpoints, since other controller
307 * drivers may care about how it's currently set up (dma issues etc).
308 */
309
310 /*
311 * pxa25x_ep_alloc_request - allocate a request data structure
312 */
313 static struct usb_request *
314 pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
315 {
316 struct pxa25x_request *req;
317
318 req = kzalloc(sizeof(*req), gfp_flags);
319 if (!req)
320 return NULL;
321
322 INIT_LIST_HEAD (&req->queue);
323 return &req->req;
324 }
325
326
327 /*
328 * pxa25x_ep_free_request - deallocate a request data structure
329 */
330 static void
331 pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
332 {
333 struct pxa25x_request *req;
334
335 req = container_of (_req, struct pxa25x_request, req);
336 WARN_ON(!list_empty (&req->queue));
337 kfree(req);
338 }
339
340 /*-------------------------------------------------------------------------*/
341
342 /*
343 * done - retire a request; caller blocked irqs
344 */
345 static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)
346 {
347 unsigned stopped = ep->stopped;
348
349 list_del_init(&req->queue);
350
351 if (likely (req->req.status == -EINPROGRESS))
352 req->req.status = status;
353 else
354 status = req->req.status;
355
356 if (status && status != -ESHUTDOWN)
357 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
358 ep->ep.name, &req->req, status,
359 req->req.actual, req->req.length);
360
361 /* don't modify queue heads during completion callback */
362 ep->stopped = 1;
363 req->req.complete(&ep->ep, &req->req);
364 ep->stopped = stopped;
365 }
366
367
368 static inline void ep0_idle (struct pxa25x_udc *dev)
369 {
370 dev->ep0state = EP0_IDLE;
371 }
372
373 static int
374 write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)
375 {
376 u8 *buf;
377 unsigned length, count;
378
379 buf = req->req.buf + req->req.actual;
380 prefetch(buf);
381
382 /* how big will this packet be? */
383 length = min(req->req.length - req->req.actual, max);
384 req->req.actual += length;
385
386 count = length;
387 while (likely(count--))
388 *uddr = *buf++;
389
390 return length;
391 }
392
393 /*
394 * write to an IN endpoint fifo, as many packets as possible.
395 * irqs will use this to write the rest later.
396 * caller guarantees at least one packet buffer is ready (or a zlp).
397 */
398 static int
399 write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
400 {
401 unsigned max;
402
403 max = usb_endpoint_maxp(ep->desc);
404 do {
405 unsigned count;
406 int is_last, is_short;
407
408 count = write_packet(ep->reg_uddr, req, max);
409
410 /* last packet is usually short (or a zlp) */
411 if (unlikely (count != max))
412 is_last = is_short = 1;
413 else {
414 if (likely(req->req.length != req->req.actual)
415 || req->req.zero)
416 is_last = 0;
417 else
418 is_last = 1;
419 /* interrupt/iso maxpacket may not fill the fifo */
420 is_short = unlikely (max < ep->fifo_size);
421 }
422
423 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
424 ep->ep.name, count,
425 is_last ? "/L" : "", is_short ? "/S" : "",
426 req->req.length - req->req.actual, req);
427
428 /* let loose that packet. maybe try writing another one,
429 * double buffering might work. TSP, TPC, and TFS
430 * bit values are the same for all normal IN endpoints.
431 */
432 *ep->reg_udccs = UDCCS_BI_TPC;
433 if (is_short)
434 *ep->reg_udccs = UDCCS_BI_TSP;
435
436 /* requests complete when all IN data is in the FIFO */
437 if (is_last) {
438 done (ep, req, 0);
439 if (list_empty(&ep->queue))
440 pio_irq_disable (ep->bEndpointAddress);
441 return 1;
442 }
443
444 // TODO experiment: how robust can fifo mode tweaking be?
445 // double buffering is off in the default fifo mode, which
446 // prevents TFS from being set here.
447
448 } while (*ep->reg_udccs & UDCCS_BI_TFS);
449 return 0;
450 }
451
452 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
453 * ep0 data stage. these chips want very simple state transitions.
454 */
455 static inline
456 void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)
457 {
458 UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
459 USIR0 = USIR0_IR0;
460 dev->req_pending = 0;
461 DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
462 __func__, tag, UDCCS0, flags);
463 }
464
465 static int
466 write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
467 {
468 unsigned count;
469 int is_short;
470
471 count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
472 ep->dev->stats.write.bytes += count;
473
474 /* last packet "must be" short (or a zlp) */
475 is_short = (count != EP0_FIFO_SIZE);
476
477 DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
478 req->req.length - req->req.actual, req);
479
480 if (unlikely (is_short)) {
481 if (ep->dev->req_pending)
482 ep0start(ep->dev, UDCCS0_IPR, "short IN");
483 else
484 UDCCS0 = UDCCS0_IPR;
485
486 count = req->req.length;
487 done (ep, req, 0);
488 ep0_idle(ep->dev);
489 #ifndef CONFIG_ARCH_IXP4XX
490 #if 1
491 /* This seems to get rid of lost status irqs in some cases:
492 * host responds quickly, or next request involves config
493 * change automagic, or should have been hidden, or ...
494 *
495 * FIXME get rid of all udelays possible...
496 */
497 if (count >= EP0_FIFO_SIZE) {
498 count = 100;
499 do {
500 if ((UDCCS0 & UDCCS0_OPR) != 0) {
501 /* clear OPR, generate ack */
502 UDCCS0 = UDCCS0_OPR;
503 break;
504 }
505 count--;
506 udelay(1);
507 } while (count);
508 }
509 #endif
510 #endif
511 } else if (ep->dev->req_pending)
512 ep0start(ep->dev, 0, "IN");
513 return is_short;
514 }
515
516
517 /*
518 * read_fifo - unload packet(s) from the fifo we use for usb OUT
519 * transfers and put them into the request. caller should have made
520 * sure there's at least one packet ready.
521 *
522 * returns true if the request completed because of short packet or the
523 * request buffer having filled (and maybe overran till end-of-packet).
524 */
525 static int
526 read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
527 {
528 for (;;) {
529 u32 udccs;
530 u8 *buf;
531 unsigned bufferspace, count, is_short;
532
533 /* make sure there's a packet in the FIFO.
534 * UDCCS_{BO,IO}_RPC are all the same bit value.
535 * UDCCS_{BO,IO}_RNE are all the same bit value.
536 */
537 udccs = *ep->reg_udccs;
538 if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
539 break;
540 buf = req->req.buf + req->req.actual;
541 prefetchw(buf);
542 bufferspace = req->req.length - req->req.actual;
543
544 /* read all bytes from this packet */
545 if (likely (udccs & UDCCS_BO_RNE)) {
546 count = 1 + (0x0ff & *ep->reg_ubcr);
547 req->req.actual += min (count, bufferspace);
548 } else /* zlp */
549 count = 0;
550 is_short = (count < ep->ep.maxpacket);
551 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
552 ep->ep.name, udccs, count,
553 is_short ? "/S" : "",
554 req, req->req.actual, req->req.length);
555 while (likely (count-- != 0)) {
556 u8 byte = (u8) *ep->reg_uddr;
557
558 if (unlikely (bufferspace == 0)) {
559 /* this happens when the driver's buffer
560 * is smaller than what the host sent.
561 * discard the extra data.
562 */
563 if (req->req.status != -EOVERFLOW)
564 DMSG("%s overflow %d\n",
565 ep->ep.name, count);
566 req->req.status = -EOVERFLOW;
567 } else {
568 *buf++ = byte;
569 bufferspace--;
570 }
571 }
572 *ep->reg_udccs = UDCCS_BO_RPC;
573 /* RPC/RSP/RNE could now reflect the other packet buffer */
574
575 /* iso is one request per packet */
576 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
577 if (udccs & UDCCS_IO_ROF)
578 req->req.status = -EHOSTUNREACH;
579 /* more like "is_done" */
580 is_short = 1;
581 }
582
583 /* completion */
584 if (is_short || req->req.actual == req->req.length) {
585 done (ep, req, 0);
586 if (list_empty(&ep->queue))
587 pio_irq_disable (ep->bEndpointAddress);
588 return 1;
589 }
590
591 /* finished that packet. the next one may be waiting... */
592 }
593 return 0;
594 }
595
596 /*
597 * special ep0 version of the above. no UBCR0 or double buffering; status
598 * handshaking is magic. most device protocols don't need control-OUT.
599 * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
600 * protocols do use them.
601 */
602 static int
603 read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
604 {
605 u8 *buf, byte;
606 unsigned bufferspace;
607
608 buf = req->req.buf + req->req.actual;
609 bufferspace = req->req.length - req->req.actual;
610
611 while (UDCCS0 & UDCCS0_RNE) {
612 byte = (u8) UDDR0;
613
614 if (unlikely (bufferspace == 0)) {
615 /* this happens when the driver's buffer
616 * is smaller than what the host sent.
617 * discard the extra data.
618 */
619 if (req->req.status != -EOVERFLOW)
620 DMSG("%s overflow\n", ep->ep.name);
621 req->req.status = -EOVERFLOW;
622 } else {
623 *buf++ = byte;
624 req->req.actual++;
625 bufferspace--;
626 }
627 }
628
629 UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
630
631 /* completion */
632 if (req->req.actual >= req->req.length)
633 return 1;
634
635 /* finished that packet. the next one may be waiting... */
636 return 0;
637 }
638
639 /*-------------------------------------------------------------------------*/
640
641 static int
642 pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
643 {
644 struct pxa25x_request *req;
645 struct pxa25x_ep *ep;
646 struct pxa25x_udc *dev;
647 unsigned long flags;
648
649 req = container_of(_req, struct pxa25x_request, req);
650 if (unlikely (!_req || !_req->complete || !_req->buf
651 || !list_empty(&req->queue))) {
652 DMSG("%s, bad params\n", __func__);
653 return -EINVAL;
654 }
655
656 ep = container_of(_ep, struct pxa25x_ep, ep);
657 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
658 DMSG("%s, bad ep\n", __func__);
659 return -EINVAL;
660 }
661
662 dev = ep->dev;
663 if (unlikely (!dev->driver
664 || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
665 DMSG("%s, bogus device state\n", __func__);
666 return -ESHUTDOWN;
667 }
668
669 /* iso is always one packet per request, that's the only way
670 * we can report per-packet status. that also helps with dma.
671 */
672 if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
673 && req->req.length > usb_endpoint_maxp (ep->desc)))
674 return -EMSGSIZE;
675
676 DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
677 _ep->name, _req, _req->length, _req->buf);
678
679 local_irq_save(flags);
680
681 _req->status = -EINPROGRESS;
682 _req->actual = 0;
683
684 /* kickstart this i/o queue? */
685 if (list_empty(&ep->queue) && !ep->stopped) {
686 if (ep->desc == NULL/* ep0 */) {
687 unsigned length = _req->length;
688
689 switch (dev->ep0state) {
690 case EP0_IN_DATA_PHASE:
691 dev->stats.write.ops++;
692 if (write_ep0_fifo(ep, req))
693 req = NULL;
694 break;
695
696 case EP0_OUT_DATA_PHASE:
697 dev->stats.read.ops++;
698 /* messy ... */
699 if (dev->req_config) {
700 DBG(DBG_VERBOSE, "ep0 config ack%s\n",
701 dev->has_cfr ? "" : " raced");
702 if (dev->has_cfr)
703 UDCCFR = UDCCFR_AREN|UDCCFR_ACM
704 |UDCCFR_MB1;
705 done(ep, req, 0);
706 dev->ep0state = EP0_END_XFER;
707 local_irq_restore (flags);
708 return 0;
709 }
710 if (dev->req_pending)
711 ep0start(dev, UDCCS0_IPR, "OUT");
712 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
713 && read_ep0_fifo(ep, req))) {
714 ep0_idle(dev);
715 done(ep, req, 0);
716 req = NULL;
717 }
718 break;
719
720 default:
721 DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
722 local_irq_restore (flags);
723 return -EL2HLT;
724 }
725 /* can the FIFO can satisfy the request immediately? */
726 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
727 if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
728 && write_fifo(ep, req))
729 req = NULL;
730 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
731 && read_fifo(ep, req)) {
732 req = NULL;
733 }
734
735 if (likely (req && ep->desc))
736 pio_irq_enable(ep->bEndpointAddress);
737 }
738
739 /* pio or dma irq handler advances the queue. */
740 if (likely(req != NULL))
741 list_add_tail(&req->queue, &ep->queue);
742 local_irq_restore(flags);
743
744 return 0;
745 }
746
747
748 /*
749 * nuke - dequeue ALL requests
750 */
751 static void nuke(struct pxa25x_ep *ep, int status)
752 {
753 struct pxa25x_request *req;
754
755 /* called with irqs blocked */
756 while (!list_empty(&ep->queue)) {
757 req = list_entry(ep->queue.next,
758 struct pxa25x_request,
759 queue);
760 done(ep, req, status);
761 }
762 if (ep->desc)
763 pio_irq_disable (ep->bEndpointAddress);
764 }
765
766
767 /* dequeue JUST ONE request */
768 static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
769 {
770 struct pxa25x_ep *ep;
771 struct pxa25x_request *req;
772 unsigned long flags;
773
774 ep = container_of(_ep, struct pxa25x_ep, ep);
775 if (!_ep || ep->ep.name == ep0name)
776 return -EINVAL;
777
778 local_irq_save(flags);
779
780 /* make sure it's actually queued on this endpoint */
781 list_for_each_entry (req, &ep->queue, queue) {
782 if (&req->req == _req)
783 break;
784 }
785 if (&req->req != _req) {
786 local_irq_restore(flags);
787 return -EINVAL;
788 }
789
790 done(ep, req, -ECONNRESET);
791
792 local_irq_restore(flags);
793 return 0;
794 }
795
796 /*-------------------------------------------------------------------------*/
797
798 static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
799 {
800 struct pxa25x_ep *ep;
801 unsigned long flags;
802
803 ep = container_of(_ep, struct pxa25x_ep, ep);
804 if (unlikely (!_ep
805 || (!ep->desc && ep->ep.name != ep0name))
806 || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
807 DMSG("%s, bad ep\n", __func__);
808 return -EINVAL;
809 }
810 if (value == 0) {
811 /* this path (reset toggle+halt) is needed to implement
812 * SET_INTERFACE on normal hardware. but it can't be
813 * done from software on the PXA UDC, and the hardware
814 * forgets to do it as part of SET_INTERFACE automagic.
815 */
816 DMSG("only host can clear %s halt\n", _ep->name);
817 return -EROFS;
818 }
819
820 local_irq_save(flags);
821
822 if ((ep->bEndpointAddress & USB_DIR_IN) != 0
823 && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
824 || !list_empty(&ep->queue))) {
825 local_irq_restore(flags);
826 return -EAGAIN;
827 }
828
829 /* FST bit is the same for control, bulk in, bulk out, interrupt in */
830 *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
831
832 /* ep0 needs special care */
833 if (!ep->desc) {
834 start_watchdog(ep->dev);
835 ep->dev->req_pending = 0;
836 ep->dev->ep0state = EP0_STALL;
837
838 /* and bulk/intr endpoints like dropping stalls too */
839 } else {
840 unsigned i;
841 for (i = 0; i < 1000; i += 20) {
842 if (*ep->reg_udccs & UDCCS_BI_SST)
843 break;
844 udelay(20);
845 }
846 }
847 local_irq_restore(flags);
848
849 DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
850 return 0;
851 }
852
853 static int pxa25x_ep_fifo_status(struct usb_ep *_ep)
854 {
855 struct pxa25x_ep *ep;
856
857 ep = container_of(_ep, struct pxa25x_ep, ep);
858 if (!_ep) {
859 DMSG("%s, bad ep\n", __func__);
860 return -ENODEV;
861 }
862 /* pxa can't report unclaimed bytes from IN fifos */
863 if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
864 return -EOPNOTSUPP;
865 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
866 || (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
867 return 0;
868 else
869 return (*ep->reg_ubcr & 0xfff) + 1;
870 }
871
872 static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
873 {
874 struct pxa25x_ep *ep;
875
876 ep = container_of(_ep, struct pxa25x_ep, ep);
877 if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
878 DMSG("%s, bad ep\n", __func__);
879 return;
880 }
881
882 /* toggle and halt bits stay unchanged */
883
884 /* for OUT, just read and discard the FIFO contents. */
885 if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
886 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
887 (void) *ep->reg_uddr;
888 return;
889 }
890
891 /* most IN status is the same, but ISO can't stall */
892 *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
893 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
894 ? 0 : UDCCS_BI_SST);
895 }
896
897
898 static struct usb_ep_ops pxa25x_ep_ops = {
899 .enable = pxa25x_ep_enable,
900 .disable = pxa25x_ep_disable,
901
902 .alloc_request = pxa25x_ep_alloc_request,
903 .free_request = pxa25x_ep_free_request,
904
905 .queue = pxa25x_ep_queue,
906 .dequeue = pxa25x_ep_dequeue,
907
908 .set_halt = pxa25x_ep_set_halt,
909 .fifo_status = pxa25x_ep_fifo_status,
910 .fifo_flush = pxa25x_ep_fifo_flush,
911 };
912
913
914 /* ---------------------------------------------------------------------------
915 * device-scoped parts of the api to the usb controller hardware
916 * ---------------------------------------------------------------------------
917 */
918
919 static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)
920 {
921 return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
922 }
923
924 static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)
925 {
926 /* host may not have enabled remote wakeup */
927 if ((UDCCS0 & UDCCS0_DRWF) == 0)
928 return -EHOSTUNREACH;
929 udc_set_mask_UDCCR(UDCCR_RSM);
930 return 0;
931 }
932
933 static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);
934 static void udc_enable (struct pxa25x_udc *);
935 static void udc_disable(struct pxa25x_udc *);
936
937 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
938 * in active use.
939 */
940 static int pullup(struct pxa25x_udc *udc)
941 {
942 int is_active = udc->vbus && udc->pullup && !udc->suspended;
943 DMSG("%s\n", is_active ? "active" : "inactive");
944 if (is_active) {
945 if (!udc->active) {
946 udc->active = 1;
947 /* Enable clock for USB device */
948 clk_enable(udc->clk);
949 udc_enable(udc);
950 }
951 } else {
952 if (udc->active) {
953 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
954 DMSG("disconnect %s\n", udc->driver
955 ? udc->driver->driver.name
956 : "(no driver)");
957 stop_activity(udc, udc->driver);
958 }
959 udc_disable(udc);
960 /* Disable clock for USB device */
961 clk_disable(udc->clk);
962 udc->active = 0;
963 }
964
965 }
966 return 0;
967 }
968
969 /* VBUS reporting logically comes from a transceiver */
970 static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
971 {
972 struct pxa25x_udc *udc;
973
974 udc = container_of(_gadget, struct pxa25x_udc, gadget);
975 udc->vbus = is_active;
976 DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
977 pullup(udc);
978 return 0;
979 }
980
981 /* drivers may have software control over D+ pullup */
982 static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)
983 {
984 struct pxa25x_udc *udc;
985
986 udc = container_of(_gadget, struct pxa25x_udc, gadget);
987
988 /* not all boards support pullup control */
989 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
990 return -EOPNOTSUPP;
991
992 udc->pullup = (is_active != 0);
993 pullup(udc);
994 return 0;
995 }
996
997 /* boards may consume current from VBUS, up to 100-500mA based on config.
998 * the 500uA suspend ceiling means that exclusively vbus-powered PXA designs
999 * violate USB specs.
1000 */
1001 static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1002 {
1003 struct pxa25x_udc *udc;
1004
1005 udc = container_of(_gadget, struct pxa25x_udc, gadget);
1006
1007 if (udc->transceiver)
1008 return otg_set_power(udc->transceiver, mA);
1009 return -EOPNOTSUPP;
1010 }
1011
1012 static int pxa25x_start(struct usb_gadget_driver *driver,
1013 int (*bind)(struct usb_gadget *));
1014 static int pxa25x_stop(struct usb_gadget_driver *driver);
1015
1016 static const struct usb_gadget_ops pxa25x_udc_ops = {
1017 .get_frame = pxa25x_udc_get_frame,
1018 .wakeup = pxa25x_udc_wakeup,
1019 .vbus_session = pxa25x_udc_vbus_session,
1020 .pullup = pxa25x_udc_pullup,
1021 .vbus_draw = pxa25x_udc_vbus_draw,
1022 .start = pxa25x_start,
1023 .stop = pxa25x_stop,
1024 };
1025
1026 /*-------------------------------------------------------------------------*/
1027
1028 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1029
1030 static int
1031 udc_seq_show(struct seq_file *m, void *_d)
1032 {
1033 struct pxa25x_udc *dev = m->private;
1034 unsigned long flags;
1035 int i;
1036 u32 tmp;
1037
1038 local_irq_save(flags);
1039
1040 /* basic device status */
1041 seq_printf(m, DRIVER_DESC "\n"
1042 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1043 driver_name, DRIVER_VERSION SIZE_STR "(pio)",
1044 dev->driver ? dev->driver->driver.name : "(none)",
1045 dev->gadget.speed == USB_SPEED_FULL ? "full speed" : "disconnected");
1046
1047 /* registers for device and ep0 */
1048 seq_printf(m,
1049 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1050 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
1051
1052 tmp = UDCCR;
1053 seq_printf(m,
1054 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1055 (tmp & UDCCR_REM) ? " rem" : "",
1056 (tmp & UDCCR_RSTIR) ? " rstir" : "",
1057 (tmp & UDCCR_SRM) ? " srm" : "",
1058 (tmp & UDCCR_SUSIR) ? " susir" : "",
1059 (tmp & UDCCR_RESIR) ? " resir" : "",
1060 (tmp & UDCCR_RSM) ? " rsm" : "",
1061 (tmp & UDCCR_UDA) ? " uda" : "",
1062 (tmp & UDCCR_UDE) ? " ude" : "");
1063
1064 tmp = UDCCS0;
1065 seq_printf(m,
1066 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1067 (tmp & UDCCS0_SA) ? " sa" : "",
1068 (tmp & UDCCS0_RNE) ? " rne" : "",
1069 (tmp & UDCCS0_FST) ? " fst" : "",
1070 (tmp & UDCCS0_SST) ? " sst" : "",
1071 (tmp & UDCCS0_DRWF) ? " dwrf" : "",
1072 (tmp & UDCCS0_FTF) ? " ftf" : "",
1073 (tmp & UDCCS0_IPR) ? " ipr" : "",
1074 (tmp & UDCCS0_OPR) ? " opr" : "");
1075
1076 if (dev->has_cfr) {
1077 tmp = UDCCFR;
1078 seq_printf(m,
1079 "udccfr %02X =%s%s\n", tmp,
1080 (tmp & UDCCFR_AREN) ? " aren" : "",
1081 (tmp & UDCCFR_ACM) ? " acm" : "");
1082 }
1083
1084 if (dev->gadget.speed != USB_SPEED_FULL || !dev->driver)
1085 goto done;
1086
1087 seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1088 dev->stats.write.bytes, dev->stats.write.ops,
1089 dev->stats.read.bytes, dev->stats.read.ops,
1090 dev->stats.irqs);
1091
1092 /* dump endpoint queues */
1093 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1094 struct pxa25x_ep *ep = &dev->ep [i];
1095 struct pxa25x_request *req;
1096
1097 if (i != 0) {
1098 const struct usb_endpoint_descriptor *desc;
1099
1100 desc = ep->desc;
1101 if (!desc)
1102 continue;
1103 tmp = *dev->ep [i].reg_udccs;
1104 seq_printf(m,
1105 "%s max %d %s udccs %02x irqs %lu\n",
1106 ep->ep.name, usb_endpoint_maxp(desc),
1107 "pio", tmp, ep->pio_irqs);
1108 /* TODO translate all five groups of udccs bits! */
1109
1110 } else /* ep0 should only have one transfer queued */
1111 seq_printf(m, "ep0 max 16 pio irqs %lu\n",
1112 ep->pio_irqs);
1113
1114 if (list_empty(&ep->queue)) {
1115 seq_printf(m, "\t(nothing queued)\n");
1116 continue;
1117 }
1118 list_for_each_entry(req, &ep->queue, queue) {
1119 seq_printf(m,
1120 "\treq %p len %d/%d buf %p\n",
1121 &req->req, req->req.actual,
1122 req->req.length, req->req.buf);
1123 }
1124 }
1125
1126 done:
1127 local_irq_restore(flags);
1128 return 0;
1129 }
1130
1131 static int
1132 udc_debugfs_open(struct inode *inode, struct file *file)
1133 {
1134 return single_open(file, udc_seq_show, inode->i_private);
1135 }
1136
1137 static const struct file_operations debug_fops = {
1138 .open = udc_debugfs_open,
1139 .read = seq_read,
1140 .llseek = seq_lseek,
1141 .release = single_release,
1142 .owner = THIS_MODULE,
1143 };
1144
1145 #define create_debug_files(dev) \
1146 do { \
1147 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \
1148 S_IRUGO, NULL, dev, &debug_fops); \
1149 } while (0)
1150 #define remove_debug_files(dev) \
1151 do { \
1152 if (dev->debugfs_udc) \
1153 debugfs_remove(dev->debugfs_udc); \
1154 } while (0)
1155
1156 #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
1157
1158 #define create_debug_files(dev) do {} while (0)
1159 #define remove_debug_files(dev) do {} while (0)
1160
1161 #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
1162
1163 /*-------------------------------------------------------------------------*/
1164
1165 /*
1166 * udc_disable - disable USB device controller
1167 */
1168 static void udc_disable(struct pxa25x_udc *dev)
1169 {
1170 /* block all irqs */
1171 udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
1172 UICR0 = UICR1 = 0xff;
1173 UFNRH = UFNRH_SIM;
1174
1175 /* if hardware supports it, disconnect from usb */
1176 pullup_off();
1177
1178 udc_clear_mask_UDCCR(UDCCR_UDE);
1179
1180 ep0_idle (dev);
1181 dev->gadget.speed = USB_SPEED_UNKNOWN;
1182 }
1183
1184
1185 /*
1186 * udc_reinit - initialize software state
1187 */
1188 static void udc_reinit(struct pxa25x_udc *dev)
1189 {
1190 u32 i;
1191
1192 /* device/ep0 records init */
1193 INIT_LIST_HEAD (&dev->gadget.ep_list);
1194 INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1195 dev->ep0state = EP0_IDLE;
1196
1197 /* basic endpoint records init */
1198 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1199 struct pxa25x_ep *ep = &dev->ep[i];
1200
1201 if (i != 0)
1202 list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1203
1204 ep->desc = NULL;
1205 ep->stopped = 0;
1206 INIT_LIST_HEAD (&ep->queue);
1207 ep->pio_irqs = 0;
1208 }
1209
1210 /* the rest was statically initialized, and is read-only */
1211 }
1212
1213 /* until it's enabled, this UDC should be completely invisible
1214 * to any USB host.
1215 */
1216 static void udc_enable (struct pxa25x_udc *dev)
1217 {
1218 udc_clear_mask_UDCCR(UDCCR_UDE);
1219
1220 /* try to clear these bits before we enable the udc */
1221 udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1222
1223 ep0_idle(dev);
1224 dev->gadget.speed = USB_SPEED_UNKNOWN;
1225 dev->stats.irqs = 0;
1226
1227 /*
1228 * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1229 * - enable UDC
1230 * - if RESET is already in progress, ack interrupt
1231 * - unmask reset interrupt
1232 */
1233 udc_set_mask_UDCCR(UDCCR_UDE);
1234 if (!(UDCCR & UDCCR_UDA))
1235 udc_ack_int_UDCCR(UDCCR_RSTIR);
1236
1237 if (dev->has_cfr /* UDC_RES2 is defined */) {
1238 /* pxa255 (a0+) can avoid a set_config race that could
1239 * prevent gadget drivers from configuring correctly
1240 */
1241 UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
1242 } else {
1243 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1244 * which could result in missing packets and interrupts.
1245 * supposedly one bit per endpoint, controlling whether it
1246 * double buffers or not; ACM/AREN bits fit into the holes.
1247 * zero bits (like USIR0_IRx) disable double buffering.
1248 */
1249 UDC_RES1 = 0x00;
1250 UDC_RES2 = 0x00;
1251 }
1252
1253 /* enable suspend/resume and reset irqs */
1254 udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
1255
1256 /* enable ep0 irqs */
1257 UICR0 &= ~UICR0_IM0;
1258
1259 /* if hardware supports it, pullup D+ and wait for reset */
1260 pullup_on();
1261 }
1262
1263
1264 /* when a driver is successfully registered, it will receive
1265 * control requests including set_configuration(), which enables
1266 * non-control requests. then usb traffic follows until a
1267 * disconnect is reported. then a host may connect again, or
1268 * the driver might get unbound.
1269 */
1270 static int pxa25x_start(struct usb_gadget_driver *driver,
1271 int (*bind)(struct usb_gadget *))
1272 {
1273 struct pxa25x_udc *dev = the_controller;
1274 int retval;
1275
1276 if (!driver
1277 || driver->speed < USB_SPEED_FULL
1278 || !bind
1279 || !driver->disconnect
1280 || !driver->setup)
1281 return -EINVAL;
1282 if (!dev)
1283 return -ENODEV;
1284 if (dev->driver)
1285 return -EBUSY;
1286
1287 /* first hook up the driver ... */
1288 dev->driver = driver;
1289 dev->gadget.dev.driver = &driver->driver;
1290 dev->pullup = 1;
1291
1292 retval = device_add (&dev->gadget.dev);
1293 if (retval) {
1294 fail:
1295 dev->driver = NULL;
1296 dev->gadget.dev.driver = NULL;
1297 return retval;
1298 }
1299 retval = bind(&dev->gadget);
1300 if (retval) {
1301 DMSG("bind to driver %s --> error %d\n",
1302 driver->driver.name, retval);
1303 device_del (&dev->gadget.dev);
1304 goto fail;
1305 }
1306
1307 /* ... then enable host detection and ep0; and we're ready
1308 * for set_configuration as well as eventual disconnect.
1309 */
1310 DMSG("registered gadget driver '%s'\n", driver->driver.name);
1311
1312 /* connect to bus through transceiver */
1313 if (dev->transceiver) {
1314 retval = otg_set_peripheral(dev->transceiver, &dev->gadget);
1315 if (retval) {
1316 DMSG("can't bind to transceiver\n");
1317 if (driver->unbind)
1318 driver->unbind(&dev->gadget);
1319 goto bind_fail;
1320 }
1321 }
1322
1323 pullup(dev);
1324 dump_state(dev);
1325 return 0;
1326 bind_fail:
1327 return retval;
1328 }
1329
1330 static void
1331 stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
1332 {
1333 int i;
1334
1335 /* don't disconnect drivers more than once */
1336 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1337 driver = NULL;
1338 dev->gadget.speed = USB_SPEED_UNKNOWN;
1339
1340 /* prevent new request submissions, kill any outstanding requests */
1341 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1342 struct pxa25x_ep *ep = &dev->ep[i];
1343
1344 ep->stopped = 1;
1345 nuke(ep, -ESHUTDOWN);
1346 }
1347 del_timer_sync(&dev->timer);
1348
1349 /* report disconnect; the driver is already quiesced */
1350 if (driver)
1351 driver->disconnect(&dev->gadget);
1352
1353 /* re-init driver-visible data structures */
1354 udc_reinit(dev);
1355 }
1356
1357 static int pxa25x_stop(struct usb_gadget_driver *driver)
1358 {
1359 struct pxa25x_udc *dev = the_controller;
1360
1361 if (!dev)
1362 return -ENODEV;
1363 if (!driver || driver != dev->driver || !driver->unbind)
1364 return -EINVAL;
1365
1366 local_irq_disable();
1367 dev->pullup = 0;
1368 pullup(dev);
1369 stop_activity(dev, driver);
1370 local_irq_enable();
1371
1372 if (dev->transceiver)
1373 (void) otg_set_peripheral(dev->transceiver, NULL);
1374
1375 driver->unbind(&dev->gadget);
1376 dev->gadget.dev.driver = NULL;
1377 dev->driver = NULL;
1378
1379 device_del (&dev->gadget.dev);
1380
1381 DMSG("unregistered gadget driver '%s'\n", driver->driver.name);
1382 dump_state(dev);
1383 return 0;
1384 }
1385
1386 /*-------------------------------------------------------------------------*/
1387
1388 #ifdef CONFIG_ARCH_LUBBOCK
1389
1390 /* Lubbock has separate connect and disconnect irqs. More typical designs
1391 * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1392 */
1393
1394 static irqreturn_t
1395 lubbock_vbus_irq(int irq, void *_dev)
1396 {
1397 struct pxa25x_udc *dev = _dev;
1398 int vbus;
1399
1400 dev->stats.irqs++;
1401 switch (irq) {
1402 case LUBBOCK_USB_IRQ:
1403 vbus = 1;
1404 disable_irq(LUBBOCK_USB_IRQ);
1405 enable_irq(LUBBOCK_USB_DISC_IRQ);
1406 break;
1407 case LUBBOCK_USB_DISC_IRQ:
1408 vbus = 0;
1409 disable_irq(LUBBOCK_USB_DISC_IRQ);
1410 enable_irq(LUBBOCK_USB_IRQ);
1411 break;
1412 default:
1413 return IRQ_NONE;
1414 }
1415
1416 pxa25x_udc_vbus_session(&dev->gadget, vbus);
1417 return IRQ_HANDLED;
1418 }
1419
1420 #endif
1421
1422
1423 /*-------------------------------------------------------------------------*/
1424
1425 static inline void clear_ep_state (struct pxa25x_udc *dev)
1426 {
1427 unsigned i;
1428
1429 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1430 * fifos, and pending transactions mustn't be continued in any case.
1431 */
1432 for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
1433 nuke(&dev->ep[i], -ECONNABORTED);
1434 }
1435
1436 static void udc_watchdog(unsigned long _dev)
1437 {
1438 struct pxa25x_udc *dev = (void *)_dev;
1439
1440 local_irq_disable();
1441 if (dev->ep0state == EP0_STALL
1442 && (UDCCS0 & UDCCS0_FST) == 0
1443 && (UDCCS0 & UDCCS0_SST) == 0) {
1444 UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
1445 DBG(DBG_VERBOSE, "ep0 re-stall\n");
1446 start_watchdog(dev);
1447 }
1448 local_irq_enable();
1449 }
1450
1451 static void handle_ep0 (struct pxa25x_udc *dev)
1452 {
1453 u32 udccs0 = UDCCS0;
1454 struct pxa25x_ep *ep = &dev->ep [0];
1455 struct pxa25x_request *req;
1456 union {
1457 struct usb_ctrlrequest r;
1458 u8 raw [8];
1459 u32 word [2];
1460 } u;
1461
1462 if (list_empty(&ep->queue))
1463 req = NULL;
1464 else
1465 req = list_entry(ep->queue.next, struct pxa25x_request, queue);
1466
1467 /* clear stall status */
1468 if (udccs0 & UDCCS0_SST) {
1469 nuke(ep, -EPIPE);
1470 UDCCS0 = UDCCS0_SST;
1471 del_timer(&dev->timer);
1472 ep0_idle(dev);
1473 }
1474
1475 /* previous request unfinished? non-error iff back-to-back ... */
1476 if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
1477 nuke(ep, 0);
1478 del_timer(&dev->timer);
1479 ep0_idle(dev);
1480 }
1481
1482 switch (dev->ep0state) {
1483 case EP0_IDLE:
1484 /* late-breaking status? */
1485 udccs0 = UDCCS0;
1486
1487 /* start control request? */
1488 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1489 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
1490 int i;
1491
1492 nuke (ep, -EPROTO);
1493
1494 /* read SETUP packet */
1495 for (i = 0; i < 8; i++) {
1496 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
1497 bad_setup:
1498 DMSG("SETUP %d!\n", i);
1499 goto stall;
1500 }
1501 u.raw [i] = (u8) UDDR0;
1502 }
1503 if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
1504 goto bad_setup;
1505
1506 got_setup:
1507 DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1508 u.r.bRequestType, u.r.bRequest,
1509 le16_to_cpu(u.r.wValue),
1510 le16_to_cpu(u.r.wIndex),
1511 le16_to_cpu(u.r.wLength));
1512
1513 /* cope with automagic for some standard requests. */
1514 dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
1515 == USB_TYPE_STANDARD;
1516 dev->req_config = 0;
1517 dev->req_pending = 1;
1518 switch (u.r.bRequest) {
1519 /* hardware restricts gadget drivers here! */
1520 case USB_REQ_SET_CONFIGURATION:
1521 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1522 /* reflect hardware's automagic
1523 * up to the gadget driver.
1524 */
1525 config_change:
1526 dev->req_config = 1;
1527 clear_ep_state(dev);
1528 /* if !has_cfr, there's no synch
1529 * else use AREN (later) not SA|OPR
1530 * USIR0_IR0 acts edge sensitive
1531 */
1532 }
1533 break;
1534 /* ... and here, even more ... */
1535 case USB_REQ_SET_INTERFACE:
1536 if (u.r.bRequestType == USB_RECIP_INTERFACE) {
1537 /* udc hardware is broken by design:
1538 * - altsetting may only be zero;
1539 * - hw resets all interfaces' eps;
1540 * - ep reset doesn't include halt(?).
1541 */
1542 DMSG("broken set_interface (%d/%d)\n",
1543 le16_to_cpu(u.r.wIndex),
1544 le16_to_cpu(u.r.wValue));
1545 goto config_change;
1546 }
1547 break;
1548 /* hardware was supposed to hide this */
1549 case USB_REQ_SET_ADDRESS:
1550 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1551 ep0start(dev, 0, "address");
1552 return;
1553 }
1554 break;
1555 }
1556
1557 if (u.r.bRequestType & USB_DIR_IN)
1558 dev->ep0state = EP0_IN_DATA_PHASE;
1559 else
1560 dev->ep0state = EP0_OUT_DATA_PHASE;
1561
1562 i = dev->driver->setup(&dev->gadget, &u.r);
1563 if (i < 0) {
1564 /* hardware automagic preventing STALL... */
1565 if (dev->req_config) {
1566 /* hardware sometimes neglects to tell
1567 * tell us about config change events,
1568 * so later ones may fail...
1569 */
1570 WARNING("config change %02x fail %d?\n",
1571 u.r.bRequest, i);
1572 return;
1573 /* TODO experiment: if has_cfr,
1574 * hardware didn't ACK; maybe we
1575 * could actually STALL!
1576 */
1577 }
1578 DBG(DBG_VERBOSE, "protocol STALL, "
1579 "%02x err %d\n", UDCCS0, i);
1580 stall:
1581 /* the watchdog timer helps deal with cases
1582 * where udc seems to clear FST wrongly, and
1583 * then NAKs instead of STALLing.
1584 */
1585 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
1586 start_watchdog(dev);
1587 dev->ep0state = EP0_STALL;
1588
1589 /* deferred i/o == no response yet */
1590 } else if (dev->req_pending) {
1591 if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1592 || dev->req_std || u.r.wLength))
1593 ep0start(dev, 0, "defer");
1594 else
1595 ep0start(dev, UDCCS0_IPR, "defer/IPR");
1596 }
1597
1598 /* expect at least one data or status stage irq */
1599 return;
1600
1601 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1602 == (UDCCS0_OPR|UDCCS0_SA))) {
1603 unsigned i;
1604
1605 /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1606 * still observed on a pxa255 a0.
1607 */
1608 DBG(DBG_VERBOSE, "e131\n");
1609 nuke(ep, -EPROTO);
1610
1611 /* read SETUP data, but don't trust it too much */
1612 for (i = 0; i < 8; i++)
1613 u.raw [i] = (u8) UDDR0;
1614 if ((u.r.bRequestType & USB_RECIP_MASK)
1615 > USB_RECIP_OTHER)
1616 goto stall;
1617 if (u.word [0] == 0 && u.word [1] == 0)
1618 goto stall;
1619 goto got_setup;
1620 } else {
1621 /* some random early IRQ:
1622 * - we acked FST
1623 * - IPR cleared
1624 * - OPR got set, without SA (likely status stage)
1625 */
1626 UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
1627 }
1628 break;
1629 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
1630 if (udccs0 & UDCCS0_OPR) {
1631 UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
1632 DBG(DBG_VERBOSE, "ep0in premature status\n");
1633 if (req)
1634 done(ep, req, 0);
1635 ep0_idle(dev);
1636 } else /* irq was IPR clearing */ {
1637 if (req) {
1638 /* this IN packet might finish the request */
1639 (void) write_ep0_fifo(ep, req);
1640 } /* else IN token before response was written */
1641 }
1642 break;
1643 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
1644 if (udccs0 & UDCCS0_OPR) {
1645 if (req) {
1646 /* this OUT packet might finish the request */
1647 if (read_ep0_fifo(ep, req))
1648 done(ep, req, 0);
1649 /* else more OUT packets expected */
1650 } /* else OUT token before read was issued */
1651 } else /* irq was IPR clearing */ {
1652 DBG(DBG_VERBOSE, "ep0out premature status\n");
1653 if (req)
1654 done(ep, req, 0);
1655 ep0_idle(dev);
1656 }
1657 break;
1658 case EP0_END_XFER:
1659 if (req)
1660 done(ep, req, 0);
1661 /* ack control-IN status (maybe in-zlp was skipped)
1662 * also appears after some config change events.
1663 */
1664 if (udccs0 & UDCCS0_OPR)
1665 UDCCS0 = UDCCS0_OPR;
1666 ep0_idle(dev);
1667 break;
1668 case EP0_STALL:
1669 UDCCS0 = UDCCS0_FST;
1670 break;
1671 }
1672 USIR0 = USIR0_IR0;
1673 }
1674
1675 static void handle_ep(struct pxa25x_ep *ep)
1676 {
1677 struct pxa25x_request *req;
1678 int is_in = ep->bEndpointAddress & USB_DIR_IN;
1679 int completed;
1680 u32 udccs, tmp;
1681
1682 do {
1683 completed = 0;
1684 if (likely (!list_empty(&ep->queue)))
1685 req = list_entry(ep->queue.next,
1686 struct pxa25x_request, queue);
1687 else
1688 req = NULL;
1689
1690 // TODO check FST handling
1691
1692 udccs = *ep->reg_udccs;
1693 if (unlikely(is_in)) { /* irq from TPC, SST, or (ISO) TUR */
1694 tmp = UDCCS_BI_TUR;
1695 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1696 tmp |= UDCCS_BI_SST;
1697 tmp &= udccs;
1698 if (likely (tmp))
1699 *ep->reg_udccs = tmp;
1700 if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1701 completed = write_fifo(ep, req);
1702
1703 } else { /* irq from RPC (or for ISO, ROF) */
1704 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1705 tmp = UDCCS_BO_SST | UDCCS_BO_DME;
1706 else
1707 tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1708 tmp &= udccs;
1709 if (likely(tmp))
1710 *ep->reg_udccs = tmp;
1711
1712 /* fifos can hold packets, ready for reading... */
1713 if (likely(req)) {
1714 completed = read_fifo(ep, req);
1715 } else
1716 pio_irq_disable (ep->bEndpointAddress);
1717 }
1718 ep->pio_irqs++;
1719 } while (completed);
1720 }
1721
1722 /*
1723 * pxa25x_udc_irq - interrupt handler
1724 *
1725 * avoid delays in ep0 processing. the control handshaking isn't always
1726 * under software control (pxa250c0 and the pxa255 are better), and delays
1727 * could cause usb protocol errors.
1728 */
1729 static irqreturn_t
1730 pxa25x_udc_irq(int irq, void *_dev)
1731 {
1732 struct pxa25x_udc *dev = _dev;
1733 int handled;
1734
1735 dev->stats.irqs++;
1736 do {
1737 u32 udccr = UDCCR;
1738
1739 handled = 0;
1740
1741 /* SUSpend Interrupt Request */
1742 if (unlikely(udccr & UDCCR_SUSIR)) {
1743 udc_ack_int_UDCCR(UDCCR_SUSIR);
1744 handled = 1;
1745 DBG(DBG_VERBOSE, "USB suspend\n");
1746
1747 if (dev->gadget.speed != USB_SPEED_UNKNOWN
1748 && dev->driver
1749 && dev->driver->suspend)
1750 dev->driver->suspend(&dev->gadget);
1751 ep0_idle (dev);
1752 }
1753
1754 /* RESume Interrupt Request */
1755 if (unlikely(udccr & UDCCR_RESIR)) {
1756 udc_ack_int_UDCCR(UDCCR_RESIR);
1757 handled = 1;
1758 DBG(DBG_VERBOSE, "USB resume\n");
1759
1760 if (dev->gadget.speed != USB_SPEED_UNKNOWN
1761 && dev->driver
1762 && dev->driver->resume)
1763 dev->driver->resume(&dev->gadget);
1764 }
1765
1766 /* ReSeT Interrupt Request - USB reset */
1767 if (unlikely(udccr & UDCCR_RSTIR)) {
1768 udc_ack_int_UDCCR(UDCCR_RSTIR);
1769 handled = 1;
1770
1771 if ((UDCCR & UDCCR_UDA) == 0) {
1772 DBG(DBG_VERBOSE, "USB reset start\n");
1773
1774 /* reset driver and endpoints,
1775 * in case that's not yet done
1776 */
1777 stop_activity (dev, dev->driver);
1778
1779 } else {
1780 DBG(DBG_VERBOSE, "USB reset end\n");
1781 dev->gadget.speed = USB_SPEED_FULL;
1782 memset(&dev->stats, 0, sizeof dev->stats);
1783 /* driver and endpoints are still reset */
1784 }
1785
1786 } else {
1787 u32 usir0 = USIR0 & ~UICR0;
1788 u32 usir1 = USIR1 & ~UICR1;
1789 int i;
1790
1791 if (unlikely (!usir0 && !usir1))
1792 continue;
1793
1794 DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
1795
1796 /* control traffic */
1797 if (usir0 & USIR0_IR0) {
1798 dev->ep[0].pio_irqs++;
1799 handle_ep0(dev);
1800 handled = 1;
1801 }
1802
1803 /* endpoint data transfers */
1804 for (i = 0; i < 8; i++) {
1805 u32 tmp = 1 << i;
1806
1807 if (i && (usir0 & tmp)) {
1808 handle_ep(&dev->ep[i]);
1809 USIR0 |= tmp;
1810 handled = 1;
1811 }
1812 #ifndef CONFIG_USB_PXA25X_SMALL
1813 if (usir1 & tmp) {
1814 handle_ep(&dev->ep[i+8]);
1815 USIR1 |= tmp;
1816 handled = 1;
1817 }
1818 #endif
1819 }
1820 }
1821
1822 /* we could also ask for 1 msec SOF (SIR) interrupts */
1823
1824 } while (handled);
1825 return IRQ_HANDLED;
1826 }
1827
1828 /*-------------------------------------------------------------------------*/
1829
1830 static void nop_release (struct device *dev)
1831 {
1832 DMSG("%s %s\n", __func__, dev_name(dev));
1833 }
1834
1835 /* this uses load-time allocation and initialization (instead of
1836 * doing it at run-time) to save code, eliminate fault paths, and
1837 * be more obviously correct.
1838 */
1839 static struct pxa25x_udc memory = {
1840 .gadget = {
1841 .ops = &pxa25x_udc_ops,
1842 .ep0 = &memory.ep[0].ep,
1843 .name = driver_name,
1844 .dev = {
1845 .init_name = "gadget",
1846 .release = nop_release,
1847 },
1848 },
1849
1850 /* control endpoint */
1851 .ep[0] = {
1852 .ep = {
1853 .name = ep0name,
1854 .ops = &pxa25x_ep_ops,
1855 .maxpacket = EP0_FIFO_SIZE,
1856 },
1857 .dev = &memory,
1858 .reg_udccs = &UDCCS0,
1859 .reg_uddr = &UDDR0,
1860 },
1861
1862 /* first group of endpoints */
1863 .ep[1] = {
1864 .ep = {
1865 .name = "ep1in-bulk",
1866 .ops = &pxa25x_ep_ops,
1867 .maxpacket = BULK_FIFO_SIZE,
1868 },
1869 .dev = &memory,
1870 .fifo_size = BULK_FIFO_SIZE,
1871 .bEndpointAddress = USB_DIR_IN | 1,
1872 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1873 .reg_udccs = &UDCCS1,
1874 .reg_uddr = &UDDR1,
1875 },
1876 .ep[2] = {
1877 .ep = {
1878 .name = "ep2out-bulk",
1879 .ops = &pxa25x_ep_ops,
1880 .maxpacket = BULK_FIFO_SIZE,
1881 },
1882 .dev = &memory,
1883 .fifo_size = BULK_FIFO_SIZE,
1884 .bEndpointAddress = 2,
1885 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1886 .reg_udccs = &UDCCS2,
1887 .reg_ubcr = &UBCR2,
1888 .reg_uddr = &UDDR2,
1889 },
1890 #ifndef CONFIG_USB_PXA25X_SMALL
1891 .ep[3] = {
1892 .ep = {
1893 .name = "ep3in-iso",
1894 .ops = &pxa25x_ep_ops,
1895 .maxpacket = ISO_FIFO_SIZE,
1896 },
1897 .dev = &memory,
1898 .fifo_size = ISO_FIFO_SIZE,
1899 .bEndpointAddress = USB_DIR_IN | 3,
1900 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1901 .reg_udccs = &UDCCS3,
1902 .reg_uddr = &UDDR3,
1903 },
1904 .ep[4] = {
1905 .ep = {
1906 .name = "ep4out-iso",
1907 .ops = &pxa25x_ep_ops,
1908 .maxpacket = ISO_FIFO_SIZE,
1909 },
1910 .dev = &memory,
1911 .fifo_size = ISO_FIFO_SIZE,
1912 .bEndpointAddress = 4,
1913 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1914 .reg_udccs = &UDCCS4,
1915 .reg_ubcr = &UBCR4,
1916 .reg_uddr = &UDDR4,
1917 },
1918 .ep[5] = {
1919 .ep = {
1920 .name = "ep5in-int",
1921 .ops = &pxa25x_ep_ops,
1922 .maxpacket = INT_FIFO_SIZE,
1923 },
1924 .dev = &memory,
1925 .fifo_size = INT_FIFO_SIZE,
1926 .bEndpointAddress = USB_DIR_IN | 5,
1927 .bmAttributes = USB_ENDPOINT_XFER_INT,
1928 .reg_udccs = &UDCCS5,
1929 .reg_uddr = &UDDR5,
1930 },
1931
1932 /* second group of endpoints */
1933 .ep[6] = {
1934 .ep = {
1935 .name = "ep6in-bulk",
1936 .ops = &pxa25x_ep_ops,
1937 .maxpacket = BULK_FIFO_SIZE,
1938 },
1939 .dev = &memory,
1940 .fifo_size = BULK_FIFO_SIZE,
1941 .bEndpointAddress = USB_DIR_IN | 6,
1942 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1943 .reg_udccs = &UDCCS6,
1944 .reg_uddr = &UDDR6,
1945 },
1946 .ep[7] = {
1947 .ep = {
1948 .name = "ep7out-bulk",
1949 .ops = &pxa25x_ep_ops,
1950 .maxpacket = BULK_FIFO_SIZE,
1951 },
1952 .dev = &memory,
1953 .fifo_size = BULK_FIFO_SIZE,
1954 .bEndpointAddress = 7,
1955 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1956 .reg_udccs = &UDCCS7,
1957 .reg_ubcr = &UBCR7,
1958 .reg_uddr = &UDDR7,
1959 },
1960 .ep[8] = {
1961 .ep = {
1962 .name = "ep8in-iso",
1963 .ops = &pxa25x_ep_ops,
1964 .maxpacket = ISO_FIFO_SIZE,
1965 },
1966 .dev = &memory,
1967 .fifo_size = ISO_FIFO_SIZE,
1968 .bEndpointAddress = USB_DIR_IN | 8,
1969 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1970 .reg_udccs = &UDCCS8,
1971 .reg_uddr = &UDDR8,
1972 },
1973 .ep[9] = {
1974 .ep = {
1975 .name = "ep9out-iso",
1976 .ops = &pxa25x_ep_ops,
1977 .maxpacket = ISO_FIFO_SIZE,
1978 },
1979 .dev = &memory,
1980 .fifo_size = ISO_FIFO_SIZE,
1981 .bEndpointAddress = 9,
1982 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1983 .reg_udccs = &UDCCS9,
1984 .reg_ubcr = &UBCR9,
1985 .reg_uddr = &UDDR9,
1986 },
1987 .ep[10] = {
1988 .ep = {
1989 .name = "ep10in-int",
1990 .ops = &pxa25x_ep_ops,
1991 .maxpacket = INT_FIFO_SIZE,
1992 },
1993 .dev = &memory,
1994 .fifo_size = INT_FIFO_SIZE,
1995 .bEndpointAddress = USB_DIR_IN | 10,
1996 .bmAttributes = USB_ENDPOINT_XFER_INT,
1997 .reg_udccs = &UDCCS10,
1998 .reg_uddr = &UDDR10,
1999 },
2000
2001 /* third group of endpoints */
2002 .ep[11] = {
2003 .ep = {
2004 .name = "ep11in-bulk",
2005 .ops = &pxa25x_ep_ops,
2006 .maxpacket = BULK_FIFO_SIZE,
2007 },
2008 .dev = &memory,
2009 .fifo_size = BULK_FIFO_SIZE,
2010 .bEndpointAddress = USB_DIR_IN | 11,
2011 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2012 .reg_udccs = &UDCCS11,
2013 .reg_uddr = &UDDR11,
2014 },
2015 .ep[12] = {
2016 .ep = {
2017 .name = "ep12out-bulk",
2018 .ops = &pxa25x_ep_ops,
2019 .maxpacket = BULK_FIFO_SIZE,
2020 },
2021 .dev = &memory,
2022 .fifo_size = BULK_FIFO_SIZE,
2023 .bEndpointAddress = 12,
2024 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2025 .reg_udccs = &UDCCS12,
2026 .reg_ubcr = &UBCR12,
2027 .reg_uddr = &UDDR12,
2028 },
2029 .ep[13] = {
2030 .ep = {
2031 .name = "ep13in-iso",
2032 .ops = &pxa25x_ep_ops,
2033 .maxpacket = ISO_FIFO_SIZE,
2034 },
2035 .dev = &memory,
2036 .fifo_size = ISO_FIFO_SIZE,
2037 .bEndpointAddress = USB_DIR_IN | 13,
2038 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2039 .reg_udccs = &UDCCS13,
2040 .reg_uddr = &UDDR13,
2041 },
2042 .ep[14] = {
2043 .ep = {
2044 .name = "ep14out-iso",
2045 .ops = &pxa25x_ep_ops,
2046 .maxpacket = ISO_FIFO_SIZE,
2047 },
2048 .dev = &memory,
2049 .fifo_size = ISO_FIFO_SIZE,
2050 .bEndpointAddress = 14,
2051 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2052 .reg_udccs = &UDCCS14,
2053 .reg_ubcr = &UBCR14,
2054 .reg_uddr = &UDDR14,
2055 },
2056 .ep[15] = {
2057 .ep = {
2058 .name = "ep15in-int",
2059 .ops = &pxa25x_ep_ops,
2060 .maxpacket = INT_FIFO_SIZE,
2061 },
2062 .dev = &memory,
2063 .fifo_size = INT_FIFO_SIZE,
2064 .bEndpointAddress = USB_DIR_IN | 15,
2065 .bmAttributes = USB_ENDPOINT_XFER_INT,
2066 .reg_udccs = &UDCCS15,
2067 .reg_uddr = &UDDR15,
2068 },
2069 #endif /* !CONFIG_USB_PXA25X_SMALL */
2070 };
2071
2072 #define CP15R0_VENDOR_MASK 0xffffe000
2073
2074 #if defined(CONFIG_ARCH_PXA)
2075 #define CP15R0_XSCALE_VALUE 0x69052000 /* intel/arm/xscale */
2076
2077 #elif defined(CONFIG_ARCH_IXP4XX)
2078 #define CP15R0_XSCALE_VALUE 0x69054000 /* intel/arm/ixp4xx */
2079
2080 #endif
2081
2082 #define CP15R0_PROD_MASK 0x000003f0
2083 #define PXA25x 0x00000100 /* and PXA26x */
2084 #define PXA210 0x00000120
2085
2086 #define CP15R0_REV_MASK 0x0000000f
2087
2088 #define CP15R0_PRODREV_MASK (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2089
2090 #define PXA255_A0 0x00000106 /* or PXA260_B1 */
2091 #define PXA250_C0 0x00000105 /* or PXA26x_B0 */
2092 #define PXA250_B2 0x00000104
2093 #define PXA250_B1 0x00000103 /* or PXA260_A0 */
2094 #define PXA250_B0 0x00000102
2095 #define PXA250_A1 0x00000101
2096 #define PXA250_A0 0x00000100
2097
2098 #define PXA210_C0 0x00000125
2099 #define PXA210_B2 0x00000124
2100 #define PXA210_B1 0x00000123
2101 #define PXA210_B0 0x00000122
2102 #define IXP425_A0 0x000001c1
2103 #define IXP425_B0 0x000001f1
2104 #define IXP465_AD 0x00000200
2105
2106 /*
2107 * probe - binds to the platform device
2108 */
2109 static int __init pxa25x_udc_probe(struct platform_device *pdev)
2110 {
2111 struct pxa25x_udc *dev = &memory;
2112 int retval, irq;
2113 u32 chiprev;
2114
2115 /* insist on Intel/ARM/XScale */
2116 asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
2117 if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
2118 pr_err("%s: not XScale!\n", driver_name);
2119 return -ENODEV;
2120 }
2121
2122 /* trigger chiprev-specific logic */
2123 switch (chiprev & CP15R0_PRODREV_MASK) {
2124 #if defined(CONFIG_ARCH_PXA)
2125 case PXA255_A0:
2126 dev->has_cfr = 1;
2127 break;
2128 case PXA250_A0:
2129 case PXA250_A1:
2130 /* A0/A1 "not released"; ep 13, 15 unusable */
2131 /* fall through */
2132 case PXA250_B2: case PXA210_B2:
2133 case PXA250_B1: case PXA210_B1:
2134 case PXA250_B0: case PXA210_B0:
2135 /* OUT-DMA is broken ... */
2136 /* fall through */
2137 case PXA250_C0: case PXA210_C0:
2138 break;
2139 #elif defined(CONFIG_ARCH_IXP4XX)
2140 case IXP425_A0:
2141 case IXP425_B0:
2142 case IXP465_AD:
2143 dev->has_cfr = 1;
2144 break;
2145 #endif
2146 default:
2147 pr_err("%s: unrecognized processor: %08x\n",
2148 driver_name, chiprev);
2149 /* iop3xx, ixp4xx, ... */
2150 return -ENODEV;
2151 }
2152
2153 irq = platform_get_irq(pdev, 0);
2154 if (irq < 0)
2155 return -ENODEV;
2156
2157 dev->clk = clk_get(&pdev->dev, NULL);
2158 if (IS_ERR(dev->clk)) {
2159 retval = PTR_ERR(dev->clk);
2160 goto err_clk;
2161 }
2162
2163 pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
2164 dev->has_cfr ? "" : " (!cfr)",
2165 SIZE_STR "(pio)"
2166 );
2167
2168 /* other non-static parts of init */
2169 dev->dev = &pdev->dev;
2170 dev->mach = pdev->dev.platform_data;
2171
2172 dev->transceiver = otg_get_transceiver();
2173
2174 if (gpio_is_valid(dev->mach->gpio_pullup)) {
2175 if ((retval = gpio_request(dev->mach->gpio_pullup,
2176 "pca25x_udc GPIO PULLUP"))) {
2177 dev_dbg(&pdev->dev,
2178 "can't get pullup gpio %d, err: %d\n",
2179 dev->mach->gpio_pullup, retval);
2180 goto err_gpio_pullup;
2181 }
2182 gpio_direction_output(dev->mach->gpio_pullup, 0);
2183 }
2184
2185 init_timer(&dev->timer);
2186 dev->timer.function = udc_watchdog;
2187 dev->timer.data = (unsigned long) dev;
2188
2189 device_initialize(&dev->gadget.dev);
2190 dev->gadget.dev.parent = &pdev->dev;
2191 dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
2192
2193 the_controller = dev;
2194 platform_set_drvdata(pdev, dev);
2195
2196 udc_disable(dev);
2197 udc_reinit(dev);
2198
2199 dev->vbus = 0;
2200
2201 /* irq setup after old hardware state is cleaned up */
2202 retval = request_irq(irq, pxa25x_udc_irq,
2203 IRQF_DISABLED, driver_name, dev);
2204 if (retval != 0) {
2205 pr_err("%s: can't get irq %d, err %d\n",
2206 driver_name, irq, retval);
2207 goto err_irq1;
2208 }
2209 dev->got_irq = 1;
2210
2211 #ifdef CONFIG_ARCH_LUBBOCK
2212 if (machine_is_lubbock()) {
2213 retval = request_irq(LUBBOCK_USB_DISC_IRQ,
2214 lubbock_vbus_irq,
2215 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2216 driver_name, dev);
2217 if (retval != 0) {
2218 pr_err("%s: can't get irq %i, err %d\n",
2219 driver_name, LUBBOCK_USB_DISC_IRQ, retval);
2220 goto err_irq_lub;
2221 }
2222 retval = request_irq(LUBBOCK_USB_IRQ,
2223 lubbock_vbus_irq,
2224 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2225 driver_name, dev);
2226 if (retval != 0) {
2227 pr_err("%s: can't get irq %i, err %d\n",
2228 driver_name, LUBBOCK_USB_IRQ, retval);
2229 goto lubbock_fail0;
2230 }
2231 } else
2232 #endif
2233 create_debug_files(dev);
2234
2235 retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);
2236 if (!retval)
2237 return retval;
2238
2239 remove_debug_files(dev);
2240 #ifdef CONFIG_ARCH_LUBBOCK
2241 lubbock_fail0:
2242 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2243 err_irq_lub:
2244 free_irq(irq, dev);
2245 #endif
2246 err_irq1:
2247 if (gpio_is_valid(dev->mach->gpio_pullup))
2248 gpio_free(dev->mach->gpio_pullup);
2249 err_gpio_pullup:
2250 if (dev->transceiver) {
2251 otg_put_transceiver(dev->transceiver);
2252 dev->transceiver = NULL;
2253 }
2254 clk_put(dev->clk);
2255 err_clk:
2256 return retval;
2257 }
2258
2259 static void pxa25x_udc_shutdown(struct platform_device *_dev)
2260 {
2261 pullup_off();
2262 }
2263
2264 static int __exit pxa25x_udc_remove(struct platform_device *pdev)
2265 {
2266 struct pxa25x_udc *dev = platform_get_drvdata(pdev);
2267
2268 usb_del_gadget_udc(&dev->gadget);
2269 if (dev->driver)
2270 return -EBUSY;
2271
2272 dev->pullup = 0;
2273 pullup(dev);
2274
2275 remove_debug_files(dev);
2276
2277 if (dev->got_irq) {
2278 free_irq(platform_get_irq(pdev, 0), dev);
2279 dev->got_irq = 0;
2280 }
2281 #ifdef CONFIG_ARCH_LUBBOCK
2282 if (machine_is_lubbock()) {
2283 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2284 free_irq(LUBBOCK_USB_IRQ, dev);
2285 }
2286 #endif
2287 if (gpio_is_valid(dev->mach->gpio_pullup))
2288 gpio_free(dev->mach->gpio_pullup);
2289
2290 clk_put(dev->clk);
2291
2292 if (dev->transceiver) {
2293 otg_put_transceiver(dev->transceiver);
2294 dev->transceiver = NULL;
2295 }
2296
2297 platform_set_drvdata(pdev, NULL);
2298 the_controller = NULL;
2299 return 0;
2300 }
2301
2302 /*-------------------------------------------------------------------------*/
2303
2304 #ifdef CONFIG_PM
2305
2306 /* USB suspend (controlled by the host) and system suspend (controlled
2307 * by the PXA) don't necessarily work well together. If USB is active,
2308 * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2309 * mode, or any deeper PM saving state.
2310 *
2311 * For now, we punt and forcibly disconnect from the USB host when PXA
2312 * enters any suspend state. While we're disconnected, we always disable
2313 * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2314 * Boards without software pullup control shouldn't use those states.
2315 * VBUS IRQs should probably be ignored so that the PXA device just acts
2316 * "dead" to USB hosts until system resume.
2317 */
2318 static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)
2319 {
2320 struct pxa25x_udc *udc = platform_get_drvdata(dev);
2321 unsigned long flags;
2322
2323 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
2324 WARNING("USB host won't detect disconnect!\n");
2325 udc->suspended = 1;
2326
2327 local_irq_save(flags);
2328 pullup(udc);
2329 local_irq_restore(flags);
2330
2331 return 0;
2332 }
2333
2334 static int pxa25x_udc_resume(struct platform_device *dev)
2335 {
2336 struct pxa25x_udc *udc = platform_get_drvdata(dev);
2337 unsigned long flags;
2338
2339 udc->suspended = 0;
2340 local_irq_save(flags);
2341 pullup(udc);
2342 local_irq_restore(flags);
2343
2344 return 0;
2345 }
2346
2347 #else
2348 #define pxa25x_udc_suspend NULL
2349 #define pxa25x_udc_resume NULL
2350 #endif
2351
2352 /*-------------------------------------------------------------------------*/
2353
2354 static struct platform_driver udc_driver = {
2355 .shutdown = pxa25x_udc_shutdown,
2356 .remove = __exit_p(pxa25x_udc_remove),
2357 .suspend = pxa25x_udc_suspend,
2358 .resume = pxa25x_udc_resume,
2359 .driver = {
2360 .owner = THIS_MODULE,
2361 .name = "pxa25x-udc",
2362 },
2363 };
2364
2365 static int __init udc_init(void)
2366 {
2367 pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
2368 return platform_driver_probe(&udc_driver, pxa25x_udc_probe);
2369 }
2370 module_init(udc_init);
2371
2372 static void __exit udc_exit(void)
2373 {
2374 platform_driver_unregister(&udc_driver);
2375 }
2376 module_exit(udc_exit);
2377
2378 MODULE_DESCRIPTION(DRIVER_DESC);
2379 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2380 MODULE_LICENSE("GPL");
2381 MODULE_ALIAS("platform:pxa25x-udc");
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