2 * Handles the Intel 27x USB Device Controller (UDC)
4 * Inspired by original driver by Frank Becker, David Brownell, and others.
5 * Copyright (C) 2008 Robert Jarzmik
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/module.h>
23 #include <linux/kernel.h>
24 #include <linux/types.h>
25 #include <linux/errno.h>
26 #include <linux/platform_device.h>
27 #include <linux/delay.h>
28 #include <linux/list.h>
29 #include <linux/interrupt.h>
30 #include <linux/proc_fs.h>
31 #include <linux/clk.h>
32 #include <linux/irq.h>
33 #include <linux/gpio.h>
34 #include <linux/slab.h>
35 #include <linux/prefetch.h>
37 #include <asm/byteorder.h>
38 #include <mach/hardware.h>
40 #include <linux/usb.h>
41 #include <linux/usb/ch9.h>
42 #include <linux/usb/gadget.h>
45 #include "pxa27x_udc.h"
48 * This driver handles the USB Device Controller (UDC) in Intel's PXA 27x
51 * Such controller drivers work with a gadget driver. The gadget driver
52 * returns descriptors, implements configuration and data protocols used
53 * by the host to interact with this device, and allocates endpoints to
54 * the different protocol interfaces. The controller driver virtualizes
55 * usb hardware so that the gadget drivers will be more portable.
57 * This UDC hardware wants to implement a bit too much USB protocol. The
58 * biggest issues are: that the endpoints have to be set up before the
59 * controller can be enabled (minor, and not uncommon); and each endpoint
60 * can only have one configuration, interface and alternative interface
61 * number (major, and very unusual). Once set up, these cannot be changed
62 * without a controller reset.
64 * The workaround is to setup all combinations necessary for the gadgets which
65 * will work with this driver. This is done in pxa_udc structure, statically.
66 * See pxa_udc, udc_usb_ep versus pxa_ep, and matching function find_pxa_ep.
67 * (You could modify this if needed. Some drivers have a "fifo_mode" module
68 * parameter to facilitate such changes.)
70 * The combinations have been tested with these gadgets :
72 * - file storage gadget
75 * The driver doesn't use DMA, only IO access and IRQ callbacks. No use is
76 * made of UDC's double buffering either. USB "On-The-Go" is not implemented.
78 * All the requests are handled the same way :
79 * - the drivers tries to handle the request directly to the IO
80 * - if the IO fifo is not big enough, the remaining is send/received in
84 #define DRIVER_VERSION "2008-04-18"
85 #define DRIVER_DESC "PXA 27x USB Device Controller driver"
87 static const char driver_name
[] = "pxa27x_udc";
88 static struct pxa_udc
*the_controller
;
90 static void handle_ep(struct pxa_ep
*ep
);
95 #ifdef CONFIG_USB_GADGET_DEBUG_FS
97 #include <linux/debugfs.h>
98 #include <linux/uaccess.h>
99 #include <linux/seq_file.h>
101 static int state_dbg_show(struct seq_file
*s
, void *p
)
103 struct pxa_udc
*udc
= s
->private;
111 /* basic device status */
112 pos
+= seq_printf(s
, DRIVER_DESC
"\n"
113 "%s version: %s\nGadget driver: %s\n",
114 driver_name
, DRIVER_VERSION
,
115 udc
->driver
? udc
->driver
->driver
.name
: "(none)");
117 tmp
= udc_readl(udc
, UDCCR
);
119 "udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), "
120 "con=%d,inter=%d,altinter=%d\n", tmp
,
121 (tmp
& UDCCR_OEN
) ? " oen":"",
122 (tmp
& UDCCR_AALTHNP
) ? " aalthnp":"",
123 (tmp
& UDCCR_AHNP
) ? " rem" : "",
124 (tmp
& UDCCR_BHNP
) ? " rstir" : "",
125 (tmp
& UDCCR_DWRE
) ? " dwre" : "",
126 (tmp
& UDCCR_SMAC
) ? " smac" : "",
127 (tmp
& UDCCR_EMCE
) ? " emce" : "",
128 (tmp
& UDCCR_UDR
) ? " udr" : "",
129 (tmp
& UDCCR_UDA
) ? " uda" : "",
130 (tmp
& UDCCR_UDE
) ? " ude" : "",
131 (tmp
& UDCCR_ACN
) >> UDCCR_ACN_S
,
132 (tmp
& UDCCR_AIN
) >> UDCCR_AIN_S
,
133 (tmp
& UDCCR_AAISN
) >> UDCCR_AAISN_S
);
134 /* registers for device and ep0 */
135 pos
+= seq_printf(s
, "udcicr0=0x%08x udcicr1=0x%08x\n",
136 udc_readl(udc
, UDCICR0
), udc_readl(udc
, UDCICR1
));
137 pos
+= seq_printf(s
, "udcisr0=0x%08x udcisr1=0x%08x\n",
138 udc_readl(udc
, UDCISR0
), udc_readl(udc
, UDCISR1
));
139 pos
+= seq_printf(s
, "udcfnr=%d\n", udc_readl(udc
, UDCFNR
));
140 pos
+= seq_printf(s
, "irqs: reset=%lu, suspend=%lu, resume=%lu, "
142 udc
->stats
.irqs_reset
, udc
->stats
.irqs_suspend
,
143 udc
->stats
.irqs_resume
, udc
->stats
.irqs_reconfig
);
150 static int queues_dbg_show(struct seq_file
*s
, void *p
)
152 struct pxa_udc
*udc
= s
->private;
154 struct pxa27x_request
*req
;
155 int pos
= 0, i
, maxpkt
, ret
;
161 /* dump endpoint queues */
162 for (i
= 0; i
< NR_PXA_ENDPOINTS
; i
++) {
163 ep
= &udc
->pxa_ep
[i
];
164 maxpkt
= ep
->fifo_size
;
165 pos
+= seq_printf(s
, "%-12s max_pkt=%d %s\n",
166 EPNAME(ep
), maxpkt
, "pio");
168 if (list_empty(&ep
->queue
)) {
169 pos
+= seq_printf(s
, "\t(nothing queued)\n");
173 list_for_each_entry(req
, &ep
->queue
, queue
) {
174 pos
+= seq_printf(s
, "\treq %p len %d/%d buf %p\n",
175 &req
->req
, req
->req
.actual
,
176 req
->req
.length
, req
->req
.buf
);
185 static int eps_dbg_show(struct seq_file
*s
, void *p
)
187 struct pxa_udc
*udc
= s
->private;
196 ep
= &udc
->pxa_ep
[0];
197 tmp
= udc_ep_readl(ep
, UDCCSR
);
198 pos
+= seq_printf(s
, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n", tmp
,
199 (tmp
& UDCCSR0_SA
) ? " sa" : "",
200 (tmp
& UDCCSR0_RNE
) ? " rne" : "",
201 (tmp
& UDCCSR0_FST
) ? " fst" : "",
202 (tmp
& UDCCSR0_SST
) ? " sst" : "",
203 (tmp
& UDCCSR0_DME
) ? " dme" : "",
204 (tmp
& UDCCSR0_IPR
) ? " ipr" : "",
205 (tmp
& UDCCSR0_OPC
) ? " opc" : "");
206 for (i
= 0; i
< NR_PXA_ENDPOINTS
; i
++) {
207 ep
= &udc
->pxa_ep
[i
];
208 tmp
= i
? udc_ep_readl(ep
, UDCCR
) : udc_readl(udc
, UDCCR
);
209 pos
+= seq_printf(s
, "%-12s: "
210 "IN %lu(%lu reqs), OUT %lu(%lu reqs), "
211 "irqs=%lu, udccr=0x%08x, udccsr=0x%03x, "
214 ep
->stats
.in_bytes
, ep
->stats
.in_ops
,
215 ep
->stats
.out_bytes
, ep
->stats
.out_ops
,
217 tmp
, udc_ep_readl(ep
, UDCCSR
),
218 udc_ep_readl(ep
, UDCBCR
));
226 static int eps_dbg_open(struct inode
*inode
, struct file
*file
)
228 return single_open(file
, eps_dbg_show
, inode
->i_private
);
231 static int queues_dbg_open(struct inode
*inode
, struct file
*file
)
233 return single_open(file
, queues_dbg_show
, inode
->i_private
);
236 static int state_dbg_open(struct inode
*inode
, struct file
*file
)
238 return single_open(file
, state_dbg_show
, inode
->i_private
);
241 static const struct file_operations state_dbg_fops
= {
242 .owner
= THIS_MODULE
,
243 .open
= state_dbg_open
,
246 .release
= single_release
,
249 static const struct file_operations queues_dbg_fops
= {
250 .owner
= THIS_MODULE
,
251 .open
= queues_dbg_open
,
254 .release
= single_release
,
257 static const struct file_operations eps_dbg_fops
= {
258 .owner
= THIS_MODULE
,
259 .open
= eps_dbg_open
,
262 .release
= single_release
,
265 static void pxa_init_debugfs(struct pxa_udc
*udc
)
267 struct dentry
*root
, *state
, *queues
, *eps
;
269 root
= debugfs_create_dir(udc
->gadget
.name
, NULL
);
270 if (IS_ERR(root
) || !root
)
273 state
= debugfs_create_file("udcstate", 0400, root
, udc
,
277 queues
= debugfs_create_file("queues", 0400, root
, udc
,
281 eps
= debugfs_create_file("epstate", 0400, root
, udc
,
286 udc
->debugfs_root
= root
;
287 udc
->debugfs_state
= state
;
288 udc
->debugfs_queues
= queues
;
289 udc
->debugfs_eps
= eps
;
294 debugfs_remove(queues
);
296 debugfs_remove(root
);
298 dev_err(udc
->dev
, "debugfs is not available\n");
301 static void pxa_cleanup_debugfs(struct pxa_udc
*udc
)
303 debugfs_remove(udc
->debugfs_eps
);
304 debugfs_remove(udc
->debugfs_queues
);
305 debugfs_remove(udc
->debugfs_state
);
306 debugfs_remove(udc
->debugfs_root
);
307 udc
->debugfs_eps
= NULL
;
308 udc
->debugfs_queues
= NULL
;
309 udc
->debugfs_state
= NULL
;
310 udc
->debugfs_root
= NULL
;
314 static inline void pxa_init_debugfs(struct pxa_udc
*udc
)
318 static inline void pxa_cleanup_debugfs(struct pxa_udc
*udc
)
324 * is_match_usb_pxa - check if usb_ep and pxa_ep match
325 * @udc_usb_ep: usb endpoint
327 * @config: configuration required in pxa_ep
328 * @interface: interface required in pxa_ep
329 * @altsetting: altsetting required in pxa_ep
331 * Returns 1 if all criteria match between pxa and usb endpoint, 0 otherwise
333 static int is_match_usb_pxa(struct udc_usb_ep
*udc_usb_ep
, struct pxa_ep
*ep
,
334 int config
, int interface
, int altsetting
)
336 if (usb_endpoint_num(&udc_usb_ep
->desc
) != ep
->addr
)
338 if (usb_endpoint_dir_in(&udc_usb_ep
->desc
) != ep
->dir_in
)
340 if (usb_endpoint_type(&udc_usb_ep
->desc
) != ep
->type
)
342 if ((ep
->config
!= config
) || (ep
->interface
!= interface
)
343 || (ep
->alternate
!= altsetting
))
349 * find_pxa_ep - find pxa_ep structure matching udc_usb_ep
351 * @udc_usb_ep: udc_usb_ep structure
353 * Match udc_usb_ep and all pxa_ep available, to see if one matches.
354 * This is necessary because of the strong pxa hardware restriction requiring
355 * that once pxa endpoints are initialized, their configuration is freezed, and
356 * no change can be made to their address, direction, or in which configuration,
357 * interface or altsetting they are active ... which differs from more usual
358 * models which have endpoints be roughly just addressable fifos, and leave
359 * configuration events up to gadget drivers (like all control messages).
361 * Note that there is still a blurred point here :
362 * - we rely on UDCCR register "active interface" and "active altsetting".
363 * This is a nonsense in regard of USB spec, where multiple interfaces are
364 * active at the same time.
365 * - if we knew for sure that the pxa can handle multiple interface at the
366 * same time, assuming Intel's Developer Guide is wrong, this function
367 * should be reviewed, and a cache of couples (iface, altsetting) should
368 * be kept in the pxa_udc structure. In this case this function would match
369 * against the cache of couples instead of the "last altsetting" set up.
371 * Returns the matched pxa_ep structure or NULL if none found
373 static struct pxa_ep
*find_pxa_ep(struct pxa_udc
*udc
,
374 struct udc_usb_ep
*udc_usb_ep
)
378 int cfg
= udc
->config
;
379 int iface
= udc
->last_interface
;
380 int alt
= udc
->last_alternate
;
382 if (udc_usb_ep
== &udc
->udc_usb_ep
[0])
383 return &udc
->pxa_ep
[0];
385 for (i
= 1; i
< NR_PXA_ENDPOINTS
; i
++) {
386 ep
= &udc
->pxa_ep
[i
];
387 if (is_match_usb_pxa(udc_usb_ep
, ep
, cfg
, iface
, alt
))
394 * update_pxa_ep_matches - update pxa_ep cached values in all udc_usb_ep
397 * Context: in_interrupt()
399 * Updates all pxa_ep fields in udc_usb_ep structures, if this field was
400 * previously set up (and is not NULL). The update is necessary is a
401 * configuration change or altsetting change was issued by the USB host.
403 static void update_pxa_ep_matches(struct pxa_udc
*udc
)
406 struct udc_usb_ep
*udc_usb_ep
;
408 for (i
= 1; i
< NR_USB_ENDPOINTS
; i
++) {
409 udc_usb_ep
= &udc
->udc_usb_ep
[i
];
410 if (udc_usb_ep
->pxa_ep
)
411 udc_usb_ep
->pxa_ep
= find_pxa_ep(udc
, udc_usb_ep
);
416 * pio_irq_enable - Enables irq generation for one endpoint
419 static void pio_irq_enable(struct pxa_ep
*ep
)
421 struct pxa_udc
*udc
= ep
->dev
;
422 int index
= EPIDX(ep
);
423 u32 udcicr0
= udc_readl(udc
, UDCICR0
);
424 u32 udcicr1
= udc_readl(udc
, UDCICR1
);
427 udc_writel(udc
, UDCICR0
, udcicr0
| (3 << (index
* 2)));
429 udc_writel(udc
, UDCICR1
, udcicr1
| (3 << ((index
- 16) * 2)));
433 * pio_irq_disable - Disables irq generation for one endpoint
436 static void pio_irq_disable(struct pxa_ep
*ep
)
438 struct pxa_udc
*udc
= ep
->dev
;
439 int index
= EPIDX(ep
);
440 u32 udcicr0
= udc_readl(udc
, UDCICR0
);
441 u32 udcicr1
= udc_readl(udc
, UDCICR1
);
444 udc_writel(udc
, UDCICR0
, udcicr0
& ~(3 << (index
* 2)));
446 udc_writel(udc
, UDCICR1
, udcicr1
& ~(3 << ((index
- 16) * 2)));
450 * udc_set_mask_UDCCR - set bits in UDCCR
452 * @mask: bits to set in UDCCR
454 * Sets bits in UDCCR, leaving DME and FST bits as they were.
456 static inline void udc_set_mask_UDCCR(struct pxa_udc
*udc
, int mask
)
458 u32 udccr
= udc_readl(udc
, UDCCR
);
459 udc_writel(udc
, UDCCR
,
460 (udccr
& UDCCR_MASK_BITS
) | (mask
& UDCCR_MASK_BITS
));
464 * udc_clear_mask_UDCCR - clears bits in UDCCR
466 * @mask: bit to clear in UDCCR
468 * Clears bits in UDCCR, leaving DME and FST bits as they were.
470 static inline void udc_clear_mask_UDCCR(struct pxa_udc
*udc
, int mask
)
472 u32 udccr
= udc_readl(udc
, UDCCR
);
473 udc_writel(udc
, UDCCR
,
474 (udccr
& UDCCR_MASK_BITS
) & ~(mask
& UDCCR_MASK_BITS
));
478 * ep_write_UDCCSR - set bits in UDCCSR
480 * @mask: bits to set in UDCCR
482 * Sets bits in UDCCSR (UDCCSR0 and UDCCSR*).
484 * A specific case is applied to ep0 : the ACM bit is always set to 1, for
485 * SET_INTERFACE and SET_CONFIGURATION.
487 static inline void ep_write_UDCCSR(struct pxa_ep
*ep
, int mask
)
491 udc_ep_writel(ep
, UDCCSR
, mask
);
495 * ep_count_bytes_remain - get how many bytes in udc endpoint
498 * Returns number of bytes in OUT fifos. Broken for IN fifos (-EOPNOTSUPP)
500 static int ep_count_bytes_remain(struct pxa_ep
*ep
)
504 return udc_ep_readl(ep
, UDCBCR
) & 0x3ff;
508 * ep_is_empty - checks if ep has byte ready for reading
511 * If endpoint is the control endpoint, checks if there are bytes in the
512 * control endpoint fifo. If endpoint is a data endpoint, checks if bytes
513 * are ready for reading on OUT endpoint.
515 * Returns 0 if ep not empty, 1 if ep empty, -EOPNOTSUPP if IN endpoint
517 static int ep_is_empty(struct pxa_ep
*ep
)
521 if (!is_ep0(ep
) && ep
->dir_in
)
524 ret
= !(udc_ep_readl(ep
, UDCCSR
) & UDCCSR0_RNE
);
526 ret
= !(udc_ep_readl(ep
, UDCCSR
) & UDCCSR_BNE
);
531 * ep_is_full - checks if ep has place to write bytes
534 * If endpoint is not the control endpoint and is an IN endpoint, checks if
535 * there is place to write bytes into the endpoint.
537 * Returns 0 if ep not full, 1 if ep full, -EOPNOTSUPP if OUT endpoint
539 static int ep_is_full(struct pxa_ep
*ep
)
542 return (udc_ep_readl(ep
, UDCCSR
) & UDCCSR0_IPR
);
545 return (!(udc_ep_readl(ep
, UDCCSR
) & UDCCSR_BNF
));
549 * epout_has_pkt - checks if OUT endpoint fifo has a packet available
552 * Returns 1 if a complete packet is available, 0 if not, -EOPNOTSUPP for IN ep.
554 static int epout_has_pkt(struct pxa_ep
*ep
)
556 if (!is_ep0(ep
) && ep
->dir_in
)
559 return (udc_ep_readl(ep
, UDCCSR
) & UDCCSR0_OPC
);
560 return (udc_ep_readl(ep
, UDCCSR
) & UDCCSR_PC
);
564 * set_ep0state - Set ep0 automata state
568 static void set_ep0state(struct pxa_udc
*udc
, int state
)
570 struct pxa_ep
*ep
= &udc
->pxa_ep
[0];
571 char *old_stname
= EP0_STNAME(udc
);
573 udc
->ep0state
= state
;
574 ep_dbg(ep
, "state=%s->%s, udccsr0=0x%03x, udcbcr=%d\n", old_stname
,
575 EP0_STNAME(udc
), udc_ep_readl(ep
, UDCCSR
),
576 udc_ep_readl(ep
, UDCBCR
));
580 * ep0_idle - Put control endpoint into idle state
583 static void ep0_idle(struct pxa_udc
*dev
)
585 set_ep0state(dev
, WAIT_FOR_SETUP
);
589 * inc_ep_stats_reqs - Update ep stats counts
590 * @ep: physical endpoint
592 * @is_in: ep direction (USB_DIR_IN or 0)
595 static void inc_ep_stats_reqs(struct pxa_ep
*ep
, int is_in
)
604 * inc_ep_stats_bytes - Update ep stats counts
605 * @ep: physical endpoint
606 * @count: bytes transferred on endpoint
607 * @is_in: ep direction (USB_DIR_IN or 0)
609 static void inc_ep_stats_bytes(struct pxa_ep
*ep
, int count
, int is_in
)
612 ep
->stats
.in_bytes
+= count
;
614 ep
->stats
.out_bytes
+= count
;
618 * pxa_ep_setup - Sets up an usb physical endpoint
619 * @ep: pxa27x physical endpoint
621 * Find the physical pxa27x ep, and setup its UDCCR
623 static __init
void pxa_ep_setup(struct pxa_ep
*ep
)
627 new_udccr
= ((ep
->config
<< UDCCONR_CN_S
) & UDCCONR_CN
)
628 | ((ep
->interface
<< UDCCONR_IN_S
) & UDCCONR_IN
)
629 | ((ep
->alternate
<< UDCCONR_AISN_S
) & UDCCONR_AISN
)
630 | ((EPADDR(ep
) << UDCCONR_EN_S
) & UDCCONR_EN
)
631 | ((EPXFERTYPE(ep
) << UDCCONR_ET_S
) & UDCCONR_ET
)
632 | ((ep
->dir_in
) ? UDCCONR_ED
: 0)
633 | ((ep
->fifo_size
<< UDCCONR_MPS_S
) & UDCCONR_MPS
)
636 udc_ep_writel(ep
, UDCCR
, new_udccr
);
640 * pxa_eps_setup - Sets up all usb physical endpoints
643 * Setup all pxa physical endpoints, except ep0
645 static __init
void pxa_eps_setup(struct pxa_udc
*dev
)
649 dev_dbg(dev
->dev
, "%s: dev=%p\n", __func__
, dev
);
651 for (i
= 1; i
< NR_PXA_ENDPOINTS
; i
++)
652 pxa_ep_setup(&dev
->pxa_ep
[i
]);
656 * pxa_ep_alloc_request - Allocate usb request
660 * For the pxa27x, these can just wrap kmalloc/kfree. gadget drivers
661 * must still pass correctly initialized endpoints, since other controller
662 * drivers may care about how it's currently set up (dma issues etc).
664 static struct usb_request
*
665 pxa_ep_alloc_request(struct usb_ep
*_ep
, gfp_t gfp_flags
)
667 struct pxa27x_request
*req
;
669 req
= kzalloc(sizeof *req
, gfp_flags
);
673 INIT_LIST_HEAD(&req
->queue
);
675 req
->udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
681 * pxa_ep_free_request - Free usb request
685 * Wrapper around kfree to free _req
687 static void pxa_ep_free_request(struct usb_ep
*_ep
, struct usb_request
*_req
)
689 struct pxa27x_request
*req
;
691 req
= container_of(_req
, struct pxa27x_request
, req
);
692 WARN_ON(!list_empty(&req
->queue
));
697 * ep_add_request - add a request to the endpoint's queue
701 * Context: ep->lock held
703 * Queues the request in the endpoint's queue, and enables the interrupts
706 static void ep_add_request(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
710 ep_vdbg(ep
, "req:%p, lg=%d, udccsr=0x%03x\n", req
,
711 req
->req
.length
, udc_ep_readl(ep
, UDCCSR
));
714 list_add_tail(&req
->queue
, &ep
->queue
);
719 * ep_del_request - removes a request from the endpoint's queue
723 * Context: ep->lock held
725 * Unqueue the request from the endpoint's queue. If there are no more requests
726 * on the endpoint, and if it's not the control endpoint, interrupts are
727 * disabled on the endpoint.
729 static void ep_del_request(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
733 ep_vdbg(ep
, "req:%p, lg=%d, udccsr=0x%03x\n", req
,
734 req
->req
.length
, udc_ep_readl(ep
, UDCCSR
));
736 list_del_init(&req
->queue
);
738 if (!is_ep0(ep
) && list_empty(&ep
->queue
))
743 * req_done - Complete an usb request
744 * @ep: pxa physical endpoint
746 * @status: usb request status sent to gadget API
747 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
749 * Context: ep->lock held if flags not NULL, else ep->lock released
751 * Retire a pxa27x usb request. Endpoint must be locked.
753 static void req_done(struct pxa_ep
*ep
, struct pxa27x_request
*req
, int status
,
754 unsigned long *pflags
)
758 ep_del_request(ep
, req
);
759 if (likely(req
->req
.status
== -EINPROGRESS
))
760 req
->req
.status
= status
;
762 status
= req
->req
.status
;
764 if (status
&& status
!= -ESHUTDOWN
)
765 ep_dbg(ep
, "complete req %p stat %d len %u/%u\n",
767 req
->req
.actual
, req
->req
.length
);
770 spin_unlock_irqrestore(&ep
->lock
, *pflags
);
771 local_irq_save(flags
);
772 req
->req
.complete(&req
->udc_usb_ep
->usb_ep
, &req
->req
);
773 local_irq_restore(flags
);
775 spin_lock_irqsave(&ep
->lock
, *pflags
);
779 * ep_end_out_req - Ends endpoint OUT request
780 * @ep: physical endpoint
782 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
784 * Context: ep->lock held or released (see req_done())
786 * Ends endpoint OUT request (completes usb request).
788 static void ep_end_out_req(struct pxa_ep
*ep
, struct pxa27x_request
*req
,
789 unsigned long *pflags
)
791 inc_ep_stats_reqs(ep
, !USB_DIR_IN
);
792 req_done(ep
, req
, 0, pflags
);
796 * ep0_end_out_req - Ends control endpoint OUT request (ends data stage)
797 * @ep: physical endpoint
799 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
801 * Context: ep->lock held or released (see req_done())
803 * Ends control endpoint OUT request (completes usb request), and puts
804 * control endpoint into idle state
806 static void ep0_end_out_req(struct pxa_ep
*ep
, struct pxa27x_request
*req
,
807 unsigned long *pflags
)
809 set_ep0state(ep
->dev
, OUT_STATUS_STAGE
);
810 ep_end_out_req(ep
, req
, pflags
);
815 * ep_end_in_req - Ends endpoint IN request
816 * @ep: physical endpoint
818 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
820 * Context: ep->lock held or released (see req_done())
822 * Ends endpoint IN request (completes usb request).
824 static void ep_end_in_req(struct pxa_ep
*ep
, struct pxa27x_request
*req
,
825 unsigned long *pflags
)
827 inc_ep_stats_reqs(ep
, USB_DIR_IN
);
828 req_done(ep
, req
, 0, pflags
);
832 * ep0_end_in_req - Ends control endpoint IN request (ends data stage)
833 * @ep: physical endpoint
835 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
837 * Context: ep->lock held or released (see req_done())
839 * Ends control endpoint IN request (completes usb request), and puts
840 * control endpoint into status state
842 static void ep0_end_in_req(struct pxa_ep
*ep
, struct pxa27x_request
*req
,
843 unsigned long *pflags
)
845 set_ep0state(ep
->dev
, IN_STATUS_STAGE
);
846 ep_end_in_req(ep
, req
, pflags
);
850 * nuke - Dequeue all requests
852 * @status: usb request status
854 * Context: ep->lock released
856 * Dequeues all requests on an endpoint. As a side effect, interrupts will be
857 * disabled on that endpoint (because no more requests).
859 static void nuke(struct pxa_ep
*ep
, int status
)
861 struct pxa27x_request
*req
;
864 spin_lock_irqsave(&ep
->lock
, flags
);
865 while (!list_empty(&ep
->queue
)) {
866 req
= list_entry(ep
->queue
.next
, struct pxa27x_request
, queue
);
867 req_done(ep
, req
, status
, &flags
);
869 spin_unlock_irqrestore(&ep
->lock
, flags
);
873 * read_packet - transfer 1 packet from an OUT endpoint into request
874 * @ep: pxa physical endpoint
877 * Takes bytes from OUT endpoint and transfers them info the usb request.
878 * If there is less space in request than bytes received in OUT endpoint,
879 * bytes are left in the OUT endpoint.
881 * Returns how many bytes were actually transferred
883 static int read_packet(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
886 int bytes_ep
, bufferspace
, count
, i
;
888 bytes_ep
= ep_count_bytes_remain(ep
);
889 bufferspace
= req
->req
.length
- req
->req
.actual
;
891 buf
= (u32
*)(req
->req
.buf
+ req
->req
.actual
);
894 if (likely(!ep_is_empty(ep
)))
895 count
= min(bytes_ep
, bufferspace
);
899 for (i
= count
; i
> 0; i
-= 4)
900 *buf
++ = udc_ep_readl(ep
, UDCDR
);
901 req
->req
.actual
+= count
;
903 ep_write_UDCCSR(ep
, UDCCSR_PC
);
909 * write_packet - transfer 1 packet from request into an IN endpoint
910 * @ep: pxa physical endpoint
912 * @max: max bytes that fit into endpoint
914 * Takes bytes from usb request, and transfers them into the physical
915 * endpoint. If there are no bytes to transfer, doesn't write anything
916 * to physical endpoint.
918 * Returns how many bytes were actually transferred.
920 static int write_packet(struct pxa_ep
*ep
, struct pxa27x_request
*req
,
923 int length
, count
, remain
, i
;
927 buf
= (u32
*)(req
->req
.buf
+ req
->req
.actual
);
930 length
= min(req
->req
.length
- req
->req
.actual
, max
);
931 req
->req
.actual
+= length
;
933 remain
= length
& 0x3;
934 count
= length
& ~(0x3);
935 for (i
= count
; i
> 0 ; i
-= 4)
936 udc_ep_writel(ep
, UDCDR
, *buf
++);
939 for (i
= remain
; i
> 0; i
--)
940 udc_ep_writeb(ep
, UDCDR
, *buf_8
++);
942 ep_vdbg(ep
, "length=%d+%d, udccsr=0x%03x\n", count
, remain
,
943 udc_ep_readl(ep
, UDCCSR
));
949 * read_fifo - Transfer packets from OUT endpoint into usb request
950 * @ep: pxa physical endpoint
953 * Context: callable when in_interrupt()
955 * Unload as many packets as possible from the fifo we use for usb OUT
956 * transfers and put them into the request. Caller should have made sure
957 * there's at least one packet ready.
958 * Doesn't complete the request, that's the caller's job
960 * Returns 1 if the request completed, 0 otherwise
962 static int read_fifo(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
964 int count
, is_short
, completed
= 0;
966 while (epout_has_pkt(ep
)) {
967 count
= read_packet(ep
, req
);
968 inc_ep_stats_bytes(ep
, count
, !USB_DIR_IN
);
970 is_short
= (count
< ep
->fifo_size
);
971 ep_dbg(ep
, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
972 udc_ep_readl(ep
, UDCCSR
), count
, is_short
? "/S" : "",
973 &req
->req
, req
->req
.actual
, req
->req
.length
);
976 if (is_short
|| req
->req
.actual
== req
->req
.length
) {
980 /* finished that packet. the next one may be waiting... */
986 * write_fifo - transfer packets from usb request into an IN endpoint
987 * @ep: pxa physical endpoint
988 * @req: pxa usb request
990 * Write to an IN endpoint fifo, as many packets as possible.
991 * irqs will use this to write the rest later.
992 * caller guarantees at least one packet buffer is ready (or a zlp).
993 * Doesn't complete the request, that's the caller's job
995 * Returns 1 if request fully transferred, 0 if partial transfer
997 static int write_fifo(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
1000 int count
, is_short
, is_last
= 0, completed
= 0, totcount
= 0;
1003 max
= ep
->fifo_size
;
1007 udccsr
= udc_ep_readl(ep
, UDCCSR
);
1008 if (udccsr
& UDCCSR_PC
) {
1009 ep_vdbg(ep
, "Clearing Transmit Complete, udccsr=%x\n",
1011 ep_write_UDCCSR(ep
, UDCCSR_PC
);
1013 if (udccsr
& UDCCSR_TRN
) {
1014 ep_vdbg(ep
, "Clearing Underrun on, udccsr=%x\n",
1016 ep_write_UDCCSR(ep
, UDCCSR_TRN
);
1019 count
= write_packet(ep
, req
, max
);
1020 inc_ep_stats_bytes(ep
, count
, USB_DIR_IN
);
1023 /* last packet is usually short (or a zlp) */
1024 if (unlikely(count
< max
)) {
1028 if (likely(req
->req
.length
> req
->req
.actual
)
1033 /* interrupt/iso maxpacket may not fill the fifo */
1034 is_short
= unlikely(max
< ep
->fifo_size
);
1038 ep_write_UDCCSR(ep
, UDCCSR_SP
);
1040 /* requests complete when all IN data is in the FIFO */
1045 } while (!ep_is_full(ep
));
1047 ep_dbg(ep
, "wrote count:%d bytes%s%s, left:%d req=%p\n",
1048 totcount
, is_last
? "/L" : "", is_short
? "/S" : "",
1049 req
->req
.length
- req
->req
.actual
, &req
->req
);
1055 * read_ep0_fifo - Transfer packets from control endpoint into usb request
1056 * @ep: control endpoint
1057 * @req: pxa usb request
1059 * Special ep0 version of the above read_fifo. Reads as many bytes from control
1060 * endpoint as can be read, and stores them into usb request (limited by request
1063 * Returns 0 if usb request only partially filled, 1 if fully filled
1065 static int read_ep0_fifo(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
1067 int count
, is_short
, completed
= 0;
1069 while (epout_has_pkt(ep
)) {
1070 count
= read_packet(ep
, req
);
1071 ep_write_UDCCSR(ep
, UDCCSR0_OPC
);
1072 inc_ep_stats_bytes(ep
, count
, !USB_DIR_IN
);
1074 is_short
= (count
< ep
->fifo_size
);
1075 ep_dbg(ep
, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
1076 udc_ep_readl(ep
, UDCCSR
), count
, is_short
? "/S" : "",
1077 &req
->req
, req
->req
.actual
, req
->req
.length
);
1079 if (is_short
|| req
->req
.actual
>= req
->req
.length
) {
1089 * write_ep0_fifo - Send a request to control endpoint (ep0 in)
1090 * @ep: control endpoint
1093 * Context: callable when in_interrupt()
1095 * Sends a request (or a part of the request) to the control endpoint (ep0 in).
1096 * If the request doesn't fit, the remaining part will be sent from irq.
1097 * The request is considered fully written only if either :
1098 * - last write transferred all remaining bytes, but fifo was not fully filled
1099 * - last write was a 0 length write
1101 * Returns 1 if request fully written, 0 if request only partially sent
1103 static int write_ep0_fifo(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
1106 int is_last
, is_short
;
1108 count
= write_packet(ep
, req
, EP0_FIFO_SIZE
);
1109 inc_ep_stats_bytes(ep
, count
, USB_DIR_IN
);
1111 is_short
= (count
< EP0_FIFO_SIZE
);
1112 is_last
= ((count
== 0) || (count
< EP0_FIFO_SIZE
));
1114 /* Sends either a short packet or a 0 length packet */
1115 if (unlikely(is_short
))
1116 ep_write_UDCCSR(ep
, UDCCSR0_IPR
);
1118 ep_dbg(ep
, "in %d bytes%s%s, %d left, req=%p, udccsr0=0x%03x\n",
1119 count
, is_short
? "/S" : "", is_last
? "/L" : "",
1120 req
->req
.length
- req
->req
.actual
,
1121 &req
->req
, udc_ep_readl(ep
, UDCCSR
));
1127 * pxa_ep_queue - Queue a request into an IN endpoint
1128 * @_ep: usb endpoint
1129 * @_req: usb request
1132 * Context: normally called when !in_interrupt, but callable when in_interrupt()
1133 * in the special case of ep0 setup :
1134 * (irq->handle_ep0_ctrl_req->gadget_setup->pxa_ep_queue)
1136 * Returns 0 if succedeed, error otherwise
1138 static int pxa_ep_queue(struct usb_ep
*_ep
, struct usb_request
*_req
,
1141 struct udc_usb_ep
*udc_usb_ep
;
1143 struct pxa27x_request
*req
;
1144 struct pxa_udc
*dev
;
1145 unsigned long flags
;
1149 int recursion_detected
;
1151 req
= container_of(_req
, struct pxa27x_request
, req
);
1152 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1154 if (unlikely(!_req
|| !_req
->complete
|| !_req
->buf
))
1160 dev
= udc_usb_ep
->dev
;
1161 ep
= udc_usb_ep
->pxa_ep
;
1166 if (unlikely(!dev
->driver
|| dev
->gadget
.speed
== USB_SPEED_UNKNOWN
)) {
1167 ep_dbg(ep
, "bogus device state\n");
1171 /* iso is always one packet per request, that's the only way
1172 * we can report per-packet status. that also helps with dma.
1174 if (unlikely(EPXFERTYPE_is_ISO(ep
)
1175 && req
->req
.length
> ep
->fifo_size
))
1178 spin_lock_irqsave(&ep
->lock
, flags
);
1179 recursion_detected
= ep
->in_handle_ep
;
1181 is_first_req
= list_empty(&ep
->queue
);
1182 ep_dbg(ep
, "queue req %p(first=%s), len %d buf %p\n",
1183 _req
, is_first_req
? "yes" : "no",
1184 _req
->length
, _req
->buf
);
1187 _req
->status
= -ESHUTDOWN
;
1193 ep_err(ep
, "refusing to queue req %p (already queued)\n", req
);
1197 length
= _req
->length
;
1198 _req
->status
= -EINPROGRESS
;
1201 ep_add_request(ep
, req
);
1202 spin_unlock_irqrestore(&ep
->lock
, flags
);
1205 switch (dev
->ep0state
) {
1206 case WAIT_ACK_SET_CONF_INTERF
:
1208 ep_end_in_req(ep
, req
, NULL
);
1210 ep_err(ep
, "got a request of %d bytes while"
1211 "in state WAIT_ACK_SET_CONF_INTERF\n",
1213 ep_del_request(ep
, req
);
1219 if (!ep_is_full(ep
))
1220 if (write_ep0_fifo(ep
, req
))
1221 ep0_end_in_req(ep
, req
, NULL
);
1223 case OUT_DATA_STAGE
:
1224 if ((length
== 0) || !epout_has_pkt(ep
))
1225 if (read_ep0_fifo(ep
, req
))
1226 ep0_end_out_req(ep
, req
, NULL
);
1229 ep_err(ep
, "odd state %s to send me a request\n",
1230 EP0_STNAME(ep
->dev
));
1231 ep_del_request(ep
, req
);
1236 if (!recursion_detected
)
1243 spin_unlock_irqrestore(&ep
->lock
, flags
);
1248 * pxa_ep_dequeue - Dequeue one request
1249 * @_ep: usb endpoint
1250 * @_req: usb request
1252 * Return 0 if no error, -EINVAL or -ECONNRESET otherwise
1254 static int pxa_ep_dequeue(struct usb_ep
*_ep
, struct usb_request
*_req
)
1257 struct udc_usb_ep
*udc_usb_ep
;
1258 struct pxa27x_request
*req
;
1259 unsigned long flags
;
1264 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1265 ep
= udc_usb_ep
->pxa_ep
;
1266 if (!ep
|| is_ep0(ep
))
1269 spin_lock_irqsave(&ep
->lock
, flags
);
1271 /* make sure it's actually queued on this endpoint */
1272 list_for_each_entry(req
, &ep
->queue
, queue
) {
1273 if (&req
->req
== _req
) {
1279 spin_unlock_irqrestore(&ep
->lock
, flags
);
1281 req_done(ep
, req
, -ECONNRESET
, NULL
);
1286 * pxa_ep_set_halt - Halts operations on one endpoint
1287 * @_ep: usb endpoint
1290 * Returns 0 if no error, -EINVAL, -EROFS, -EAGAIN otherwise
1292 static int pxa_ep_set_halt(struct usb_ep
*_ep
, int value
)
1295 struct udc_usb_ep
*udc_usb_ep
;
1296 unsigned long flags
;
1302 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1303 ep
= udc_usb_ep
->pxa_ep
;
1304 if (!ep
|| is_ep0(ep
))
1309 * This path (reset toggle+halt) is needed to implement
1310 * SET_INTERFACE on normal hardware. but it can't be
1311 * done from software on the PXA UDC, and the hardware
1312 * forgets to do it as part of SET_INTERFACE automagic.
1314 ep_dbg(ep
, "only host can clear halt\n");
1318 spin_lock_irqsave(&ep
->lock
, flags
);
1321 if (ep
->dir_in
&& (ep_is_full(ep
) || !list_empty(&ep
->queue
)))
1324 /* FST, FEF bits are the same for control and non control endpoints */
1326 ep_write_UDCCSR(ep
, UDCCSR_FST
| UDCCSR_FEF
);
1328 set_ep0state(ep
->dev
, STALL
);
1331 spin_unlock_irqrestore(&ep
->lock
, flags
);
1336 * pxa_ep_fifo_status - Get how many bytes in physical endpoint
1337 * @_ep: usb endpoint
1339 * Returns number of bytes in OUT fifos. Broken for IN fifos.
1341 static int pxa_ep_fifo_status(struct usb_ep
*_ep
)
1344 struct udc_usb_ep
*udc_usb_ep
;
1348 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1349 ep
= udc_usb_ep
->pxa_ep
;
1350 if (!ep
|| is_ep0(ep
))
1355 if (ep
->dev
->gadget
.speed
== USB_SPEED_UNKNOWN
|| ep_is_empty(ep
))
1358 return ep_count_bytes_remain(ep
) + 1;
1362 * pxa_ep_fifo_flush - Flushes one endpoint
1363 * @_ep: usb endpoint
1365 * Discards all data in one endpoint(IN or OUT), except control endpoint.
1367 static void pxa_ep_fifo_flush(struct usb_ep
*_ep
)
1370 struct udc_usb_ep
*udc_usb_ep
;
1371 unsigned long flags
;
1375 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1376 ep
= udc_usb_ep
->pxa_ep
;
1377 if (!ep
|| is_ep0(ep
))
1380 spin_lock_irqsave(&ep
->lock
, flags
);
1382 if (unlikely(!list_empty(&ep
->queue
)))
1383 ep_dbg(ep
, "called while queue list not empty\n");
1384 ep_dbg(ep
, "called\n");
1386 /* for OUT, just read and discard the FIFO contents. */
1388 while (!ep_is_empty(ep
))
1389 udc_ep_readl(ep
, UDCDR
);
1391 /* most IN status is the same, but ISO can't stall */
1393 UDCCSR_PC
| UDCCSR_FEF
| UDCCSR_TRN
1394 | (EPXFERTYPE_is_ISO(ep
) ? 0 : UDCCSR_SST
));
1397 spin_unlock_irqrestore(&ep
->lock
, flags
);
1401 * pxa_ep_enable - Enables usb endpoint
1402 * @_ep: usb endpoint
1403 * @desc: usb endpoint descriptor
1405 * Nothing much to do here, as ep configuration is done once and for all
1406 * before udc is enabled. After udc enable, no physical endpoint configuration
1408 * Function makes sanity checks and flushes the endpoint.
1410 static int pxa_ep_enable(struct usb_ep
*_ep
,
1411 const struct usb_endpoint_descriptor
*desc
)
1414 struct udc_usb_ep
*udc_usb_ep
;
1415 struct pxa_udc
*udc
;
1420 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1421 if (udc_usb_ep
->pxa_ep
) {
1422 ep
= udc_usb_ep
->pxa_ep
;
1423 ep_warn(ep
, "usb_ep %s already enabled, doing nothing\n",
1426 ep
= find_pxa_ep(udc_usb_ep
->dev
, udc_usb_ep
);
1429 if (!ep
|| is_ep0(ep
)) {
1430 dev_err(udc_usb_ep
->dev
->dev
,
1431 "unable to match pxa_ep for ep %s\n",
1436 if ((desc
->bDescriptorType
!= USB_DT_ENDPOINT
)
1437 || (ep
->type
!= usb_endpoint_type(desc
))) {
1438 ep_err(ep
, "type mismatch\n");
1442 if (ep
->fifo_size
< usb_endpoint_maxp(desc
)) {
1443 ep_err(ep
, "bad maxpacket\n");
1447 udc_usb_ep
->pxa_ep
= ep
;
1450 if (!udc
->driver
|| udc
->gadget
.speed
== USB_SPEED_UNKNOWN
) {
1451 ep_err(ep
, "bogus device state\n");
1457 /* flush fifo (mostly for OUT buffers) */
1458 pxa_ep_fifo_flush(_ep
);
1460 ep_dbg(ep
, "enabled\n");
1465 * pxa_ep_disable - Disable usb endpoint
1466 * @_ep: usb endpoint
1468 * Same as for pxa_ep_enable, no physical endpoint configuration can be
1470 * Function flushes the endpoint and related requests.
1472 static int pxa_ep_disable(struct usb_ep
*_ep
)
1475 struct udc_usb_ep
*udc_usb_ep
;
1480 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1481 ep
= udc_usb_ep
->pxa_ep
;
1482 if (!ep
|| is_ep0(ep
) || !list_empty(&ep
->queue
))
1486 nuke(ep
, -ESHUTDOWN
);
1488 pxa_ep_fifo_flush(_ep
);
1489 udc_usb_ep
->pxa_ep
= NULL
;
1491 ep_dbg(ep
, "disabled\n");
1495 static struct usb_ep_ops pxa_ep_ops
= {
1496 .enable
= pxa_ep_enable
,
1497 .disable
= pxa_ep_disable
,
1499 .alloc_request
= pxa_ep_alloc_request
,
1500 .free_request
= pxa_ep_free_request
,
1502 .queue
= pxa_ep_queue
,
1503 .dequeue
= pxa_ep_dequeue
,
1505 .set_halt
= pxa_ep_set_halt
,
1506 .fifo_status
= pxa_ep_fifo_status
,
1507 .fifo_flush
= pxa_ep_fifo_flush
,
1511 * dplus_pullup - Connect or disconnect pullup resistor to D+ pin
1513 * @on: 0 if disconnect pullup resistor, 1 otherwise
1516 * Handle D+ pullup resistor, make the device visible to the usb bus, and
1517 * declare it as a full speed usb device
1519 static void dplus_pullup(struct pxa_udc
*udc
, int on
)
1522 if (gpio_is_valid(udc
->mach
->gpio_pullup
))
1523 gpio_set_value(udc
->mach
->gpio_pullup
,
1524 !udc
->mach
->gpio_pullup_inverted
);
1525 if (udc
->mach
->udc_command
)
1526 udc
->mach
->udc_command(PXA2XX_UDC_CMD_CONNECT
);
1528 if (gpio_is_valid(udc
->mach
->gpio_pullup
))
1529 gpio_set_value(udc
->mach
->gpio_pullup
,
1530 udc
->mach
->gpio_pullup_inverted
);
1531 if (udc
->mach
->udc_command
)
1532 udc
->mach
->udc_command(PXA2XX_UDC_CMD_DISCONNECT
);
1534 udc
->pullup_on
= on
;
1538 * pxa_udc_get_frame - Returns usb frame number
1539 * @_gadget: usb gadget
1541 static int pxa_udc_get_frame(struct usb_gadget
*_gadget
)
1543 struct pxa_udc
*udc
= to_gadget_udc(_gadget
);
1545 return (udc_readl(udc
, UDCFNR
) & 0x7ff);
1549 * pxa_udc_wakeup - Force udc device out of suspend
1550 * @_gadget: usb gadget
1552 * Returns 0 if successful, error code otherwise
1554 static int pxa_udc_wakeup(struct usb_gadget
*_gadget
)
1556 struct pxa_udc
*udc
= to_gadget_udc(_gadget
);
1558 /* host may not have enabled remote wakeup */
1559 if ((udc_readl(udc
, UDCCR
) & UDCCR_DWRE
) == 0)
1560 return -EHOSTUNREACH
;
1561 udc_set_mask_UDCCR(udc
, UDCCR_UDR
);
1565 static void udc_enable(struct pxa_udc
*udc
);
1566 static void udc_disable(struct pxa_udc
*udc
);
1569 * should_enable_udc - Tells if UDC should be enabled
1573 * The UDC should be enabled if :
1575 * - the pullup resistor is connected
1576 * - and a gadget driver is bound
1577 * - and vbus is sensed (or no vbus sense is available)
1579 * Returns 1 if UDC should be enabled, 0 otherwise
1581 static int should_enable_udc(struct pxa_udc
*udc
)
1585 put_on
= ((udc
->pullup_on
) && (udc
->driver
));
1586 put_on
&= ((udc
->vbus_sensed
) || (!udc
->transceiver
));
1591 * should_disable_udc - Tells if UDC should be disabled
1595 * The UDC should be disabled if :
1596 * - the pullup resistor is not connected
1597 * - or no gadget driver is bound
1598 * - or no vbus is sensed (when vbus sesing is available)
1600 * Returns 1 if UDC should be disabled
1602 static int should_disable_udc(struct pxa_udc
*udc
)
1606 put_off
= ((!udc
->pullup_on
) || (!udc
->driver
));
1607 put_off
|= ((!udc
->vbus_sensed
) && (udc
->transceiver
));
1612 * pxa_udc_pullup - Offer manual D+ pullup control
1613 * @_gadget: usb gadget using the control
1614 * @is_active: 0 if disconnect, else connect D+ pullup resistor
1615 * Context: !in_interrupt()
1617 * Returns 0 if OK, -EOPNOTSUPP if udc driver doesn't handle D+ pullup
1619 static int pxa_udc_pullup(struct usb_gadget
*_gadget
, int is_active
)
1621 struct pxa_udc
*udc
= to_gadget_udc(_gadget
);
1623 if (!gpio_is_valid(udc
->mach
->gpio_pullup
) && !udc
->mach
->udc_command
)
1626 dplus_pullup(udc
, is_active
);
1628 if (should_enable_udc(udc
))
1630 if (should_disable_udc(udc
))
1635 static void udc_enable(struct pxa_udc
*udc
);
1636 static void udc_disable(struct pxa_udc
*udc
);
1639 * pxa_udc_vbus_session - Called by external transceiver to enable/disable udc
1640 * @_gadget: usb gadget
1641 * @is_active: 0 if should disable the udc, 1 if should enable
1643 * Enables the udc, and optionnaly activates D+ pullup resistor. Or disables the
1644 * udc, and deactivates D+ pullup resistor.
1648 static int pxa_udc_vbus_session(struct usb_gadget
*_gadget
, int is_active
)
1650 struct pxa_udc
*udc
= to_gadget_udc(_gadget
);
1652 udc
->vbus_sensed
= is_active
;
1653 if (should_enable_udc(udc
))
1655 if (should_disable_udc(udc
))
1662 * pxa_udc_vbus_draw - Called by gadget driver after SET_CONFIGURATION completed
1663 * @_gadget: usb gadget
1664 * @mA: current drawn
1666 * Context: !in_interrupt()
1668 * Called after a configuration was chosen by a USB host, to inform how much
1669 * current can be drawn by the device from VBus line.
1671 * Returns 0 or -EOPNOTSUPP if no transceiver is handling the udc
1673 static int pxa_udc_vbus_draw(struct usb_gadget
*_gadget
, unsigned mA
)
1675 struct pxa_udc
*udc
;
1677 udc
= to_gadget_udc(_gadget
);
1678 if (udc
->transceiver
)
1679 return otg_set_power(udc
->transceiver
, mA
);
1683 static int pxa27x_udc_start(struct usb_gadget_driver
*driver
,
1684 int (*bind
)(struct usb_gadget
*));
1685 static int pxa27x_udc_stop(struct usb_gadget_driver
*driver
);
1687 static const struct usb_gadget_ops pxa_udc_ops
= {
1688 .get_frame
= pxa_udc_get_frame
,
1689 .wakeup
= pxa_udc_wakeup
,
1690 .pullup
= pxa_udc_pullup
,
1691 .vbus_session
= pxa_udc_vbus_session
,
1692 .vbus_draw
= pxa_udc_vbus_draw
,
1693 .start
= pxa27x_udc_start
,
1694 .stop
= pxa27x_udc_stop
,
1698 * udc_disable - disable udc device controller
1702 * Disables the udc device : disables clocks, udc interrupts, control endpoint
1705 static void udc_disable(struct pxa_udc
*udc
)
1710 udc_writel(udc
, UDCICR0
, 0);
1711 udc_writel(udc
, UDCICR1
, 0);
1713 udc_clear_mask_UDCCR(udc
, UDCCR_UDE
);
1714 clk_disable(udc
->clk
);
1717 udc
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1723 * udc_init_data - Initialize udc device data structures
1726 * Initializes gadget endpoint list, endpoints locks. No action is taken
1729 static __init
void udc_init_data(struct pxa_udc
*dev
)
1734 /* device/ep0 records init */
1735 INIT_LIST_HEAD(&dev
->gadget
.ep_list
);
1736 INIT_LIST_HEAD(&dev
->gadget
.ep0
->ep_list
);
1737 dev
->udc_usb_ep
[0].pxa_ep
= &dev
->pxa_ep
[0];
1740 /* PXA endpoints init */
1741 for (i
= 0; i
< NR_PXA_ENDPOINTS
; i
++) {
1742 ep
= &dev
->pxa_ep
[i
];
1744 ep
->enabled
= is_ep0(ep
);
1745 INIT_LIST_HEAD(&ep
->queue
);
1746 spin_lock_init(&ep
->lock
);
1749 /* USB endpoints init */
1750 for (i
= 1; i
< NR_USB_ENDPOINTS
; i
++)
1751 list_add_tail(&dev
->udc_usb_ep
[i
].usb_ep
.ep_list
,
1752 &dev
->gadget
.ep_list
);
1756 * udc_enable - Enables the udc device
1759 * Enables the udc device : enables clocks, udc interrupts, control endpoint
1760 * interrupts, sets usb as UDC client and setups endpoints.
1762 static void udc_enable(struct pxa_udc
*udc
)
1767 udc_writel(udc
, UDCICR0
, 0);
1768 udc_writel(udc
, UDCICR1
, 0);
1769 udc_clear_mask_UDCCR(udc
, UDCCR_UDE
);
1771 clk_enable(udc
->clk
);
1774 udc
->gadget
.speed
= USB_SPEED_FULL
;
1775 memset(&udc
->stats
, 0, sizeof(udc
->stats
));
1777 udc_set_mask_UDCCR(udc
, UDCCR_UDE
);
1778 ep_write_UDCCSR(&udc
->pxa_ep
[0], UDCCSR0_ACM
);
1780 if (udc_readl(udc
, UDCCR
) & UDCCR_EMCE
)
1781 dev_err(udc
->dev
, "Configuration errors, udc disabled\n");
1784 * Caller must be able to sleep in order to cope with startup transients
1788 /* enable suspend/resume and reset irqs */
1789 udc_writel(udc
, UDCICR1
,
1790 UDCICR1_IECC
| UDCICR1_IERU
1791 | UDCICR1_IESU
| UDCICR1_IERS
);
1793 /* enable ep0 irqs */
1794 pio_irq_enable(&udc
->pxa_ep
[0]);
1800 * pxa27x_start - Register gadget driver
1801 * @driver: gadget driver
1802 * @bind: bind function
1804 * When a driver is successfully registered, it will receive control requests
1805 * including set_configuration(), which enables non-control requests. Then
1806 * usb traffic follows until a disconnect is reported. Then a host may connect
1807 * again, or the driver might get unbound.
1809 * Note that the udc is not automatically enabled. Check function
1810 * should_enable_udc().
1812 * Returns 0 if no error, -EINVAL, -ENODEV, -EBUSY otherwise
1814 static int pxa27x_udc_start(struct usb_gadget_driver
*driver
,
1815 int (*bind
)(struct usb_gadget
*))
1817 struct pxa_udc
*udc
= the_controller
;
1820 if (!driver
|| driver
->speed
< USB_SPEED_FULL
|| !bind
1821 || !driver
->disconnect
|| !driver
->setup
)
1828 /* first hook up the driver ... */
1829 udc
->driver
= driver
;
1830 udc
->gadget
.dev
.driver
= &driver
->driver
;
1831 dplus_pullup(udc
, 1);
1833 retval
= device_add(&udc
->gadget
.dev
);
1835 dev_err(udc
->dev
, "device_add error %d\n", retval
);
1838 retval
= bind(&udc
->gadget
);
1840 dev_err(udc
->dev
, "bind to driver %s --> error %d\n",
1841 driver
->driver
.name
, retval
);
1844 dev_dbg(udc
->dev
, "registered gadget driver '%s'\n",
1845 driver
->driver
.name
);
1847 if (udc
->transceiver
) {
1848 retval
= otg_set_peripheral(udc
->transceiver
, &udc
->gadget
);
1850 dev_err(udc
->dev
, "can't bind to transceiver\n");
1851 goto transceiver_fail
;
1855 if (should_enable_udc(udc
))
1861 driver
->unbind(&udc
->gadget
);
1863 device_del(&udc
->gadget
.dev
);
1866 udc
->gadget
.dev
.driver
= NULL
;
1871 * stop_activity - Stops udc endpoints
1873 * @driver: gadget driver
1875 * Disables all udc endpoints (even control endpoint), report disconnect to
1878 static void stop_activity(struct pxa_udc
*udc
, struct usb_gadget_driver
*driver
)
1882 /* don't disconnect drivers more than once */
1883 if (udc
->gadget
.speed
== USB_SPEED_UNKNOWN
)
1885 udc
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1887 for (i
= 0; i
< NR_USB_ENDPOINTS
; i
++)
1888 pxa_ep_disable(&udc
->udc_usb_ep
[i
].usb_ep
);
1891 driver
->disconnect(&udc
->gadget
);
1895 * pxa27x_udc_stop - Unregister the gadget driver
1896 * @driver: gadget driver
1898 * Returns 0 if no error, -ENODEV, -EINVAL otherwise
1900 static int pxa27x_udc_stop(struct usb_gadget_driver
*driver
)
1902 struct pxa_udc
*udc
= the_controller
;
1906 if (!driver
|| driver
!= udc
->driver
|| !driver
->unbind
)
1909 stop_activity(udc
, driver
);
1911 dplus_pullup(udc
, 0);
1913 driver
->unbind(&udc
->gadget
);
1916 device_del(&udc
->gadget
.dev
);
1917 dev_info(udc
->dev
, "unregistered gadget driver '%s'\n",
1918 driver
->driver
.name
);
1920 if (udc
->transceiver
)
1921 return otg_set_peripheral(udc
->transceiver
, NULL
);
1926 * handle_ep0_ctrl_req - handle control endpoint control request
1928 * @req: control request
1930 static void handle_ep0_ctrl_req(struct pxa_udc
*udc
,
1931 struct pxa27x_request
*req
)
1933 struct pxa_ep
*ep
= &udc
->pxa_ep
[0];
1935 struct usb_ctrlrequest r
;
1939 int have_extrabytes
= 0;
1940 unsigned long flags
;
1943 spin_lock_irqsave(&ep
->lock
, flags
);
1946 * In the PXA320 manual, in the section about Back-to-Back setup
1947 * packets, it describes this situation. The solution is to set OPC to
1948 * get rid of the status packet, and then continue with the setup
1949 * packet. Generalize to pxa27x CPUs.
1951 if (epout_has_pkt(ep
) && (ep_count_bytes_remain(ep
) == 0))
1952 ep_write_UDCCSR(ep
, UDCCSR0_OPC
);
1954 /* read SETUP packet */
1955 for (i
= 0; i
< 2; i
++) {
1956 if (unlikely(ep_is_empty(ep
)))
1958 u
.word
[i
] = udc_ep_readl(ep
, UDCDR
);
1961 have_extrabytes
= !ep_is_empty(ep
);
1962 while (!ep_is_empty(ep
)) {
1963 i
= udc_ep_readl(ep
, UDCDR
);
1964 ep_err(ep
, "wrong to have extra bytes for setup : 0x%08x\n", i
);
1967 ep_dbg(ep
, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1968 u
.r
.bRequestType
, u
.r
.bRequest
,
1969 le16_to_cpu(u
.r
.wValue
), le16_to_cpu(u
.r
.wIndex
),
1970 le16_to_cpu(u
.r
.wLength
));
1971 if (unlikely(have_extrabytes
))
1974 if (u
.r
.bRequestType
& USB_DIR_IN
)
1975 set_ep0state(udc
, IN_DATA_STAGE
);
1977 set_ep0state(udc
, OUT_DATA_STAGE
);
1979 /* Tell UDC to enter Data Stage */
1980 ep_write_UDCCSR(ep
, UDCCSR0_SA
| UDCCSR0_OPC
);
1982 spin_unlock_irqrestore(&ep
->lock
, flags
);
1983 i
= udc
->driver
->setup(&udc
->gadget
, &u
.r
);
1984 spin_lock_irqsave(&ep
->lock
, flags
);
1988 spin_unlock_irqrestore(&ep
->lock
, flags
);
1991 ep_dbg(ep
, "protocol STALL, udccsr0=%03x err %d\n",
1992 udc_ep_readl(ep
, UDCCSR
), i
);
1993 ep_write_UDCCSR(ep
, UDCCSR0_FST
| UDCCSR0_FTF
);
1994 set_ep0state(udc
, STALL
);
1999 * handle_ep0 - Handle control endpoint data transfers
2001 * @fifo_irq: 1 if triggered by fifo service type irq
2002 * @opc_irq: 1 if triggered by output packet complete type irq
2004 * Context : when in_interrupt() or with ep->lock held
2006 * Tries to transfer all pending request data into the endpoint and/or
2007 * transfer all pending data in the endpoint into usb requests.
2008 * Handles states of ep0 automata.
2010 * PXA27x hardware handles several standard usb control requests without
2011 * driver notification. The requests fully handled by hardware are :
2012 * SET_ADDRESS, SET_FEATURE, CLEAR_FEATURE, GET_CONFIGURATION, GET_INTERFACE,
2014 * The requests handled by hardware, but with irq notification are :
2015 * SYNCH_FRAME, SET_CONFIGURATION, SET_INTERFACE
2016 * The remaining standard requests really handled by handle_ep0 are :
2017 * GET_DESCRIPTOR, SET_DESCRIPTOR, specific requests.
2018 * Requests standardized outside of USB 2.0 chapter 9 are handled more
2019 * uniformly, by gadget drivers.
2021 * The control endpoint state machine is _not_ USB spec compliant, it's even
2022 * hardly compliant with Intel PXA270 developers guide.
2023 * The key points which inferred this state machine are :
2024 * - on every setup token, bit UDCCSR0_SA is raised and held until cleared by
2026 * - on every OUT packet received, UDCCSR0_OPC is raised and held until
2027 * cleared by software.
2028 * - clearing UDCCSR0_OPC always flushes ep0. If in setup stage, never do it
2029 * before reading ep0.
2030 * This is true only for PXA27x. This is not true anymore for PXA3xx family
2031 * (check Back-to-Back setup packet in developers guide).
2032 * - irq can be called on a "packet complete" event (opc_irq=1), while
2033 * UDCCSR0_OPC is not yet raised (delta can be as big as 100ms
2034 * from experimentation).
2035 * - as UDCCSR0_SA can be activated while in irq handling, and clearing
2036 * UDCCSR0_OPC would flush the setup data, we almost never clear UDCCSR0_OPC
2037 * => we never actually read the "status stage" packet of an IN data stage
2038 * => this is not documented in Intel documentation
2039 * - hardware as no idea of STATUS STAGE, it only handle SETUP STAGE and DATA
2040 * STAGE. The driver add STATUS STAGE to send last zero length packet in
2042 * - special attention was needed for IN_STATUS_STAGE. If a packet complete
2043 * event is detected, we terminate the status stage without ackowledging the
2044 * packet (not to risk to loose a potential SETUP packet)
2046 static void handle_ep0(struct pxa_udc
*udc
, int fifo_irq
, int opc_irq
)
2049 struct pxa_ep
*ep
= &udc
->pxa_ep
[0];
2050 struct pxa27x_request
*req
= NULL
;
2053 if (!list_empty(&ep
->queue
))
2054 req
= list_entry(ep
->queue
.next
, struct pxa27x_request
, queue
);
2056 udccsr0
= udc_ep_readl(ep
, UDCCSR
);
2057 ep_dbg(ep
, "state=%s, req=%p, udccsr0=0x%03x, udcbcr=%d, irq_msk=%x\n",
2058 EP0_STNAME(udc
), req
, udccsr0
, udc_ep_readl(ep
, UDCBCR
),
2059 (fifo_irq
<< 1 | opc_irq
));
2061 if (udccsr0
& UDCCSR0_SST
) {
2062 ep_dbg(ep
, "clearing stall status\n");
2064 ep_write_UDCCSR(ep
, UDCCSR0_SST
);
2068 if (udccsr0
& UDCCSR0_SA
) {
2070 set_ep0state(udc
, SETUP_STAGE
);
2073 switch (udc
->ep0state
) {
2074 case WAIT_FOR_SETUP
:
2076 * Hardware bug : beware, we cannot clear OPC, since we would
2077 * miss a potential OPC irq for a setup packet.
2078 * So, we only do ... nothing, and hope for a next irq with
2083 udccsr0
&= UDCCSR0_CTRL_REQ_MASK
;
2084 if (likely(udccsr0
== UDCCSR0_CTRL_REQ_MASK
))
2085 handle_ep0_ctrl_req(udc
, req
);
2087 case IN_DATA_STAGE
: /* GET_DESCRIPTOR */
2088 if (epout_has_pkt(ep
))
2089 ep_write_UDCCSR(ep
, UDCCSR0_OPC
);
2090 if (req
&& !ep_is_full(ep
))
2091 completed
= write_ep0_fifo(ep
, req
);
2093 ep0_end_in_req(ep
, req
, NULL
);
2095 case OUT_DATA_STAGE
: /* SET_DESCRIPTOR */
2096 if (epout_has_pkt(ep
) && req
)
2097 completed
= read_ep0_fifo(ep
, req
);
2099 ep0_end_out_req(ep
, req
, NULL
);
2102 ep_write_UDCCSR(ep
, UDCCSR0_FST
);
2104 case IN_STATUS_STAGE
:
2106 * Hardware bug : beware, we cannot clear OPC, since we would
2107 * miss a potential PC irq for a setup packet.
2108 * So, we only put the ep0 into WAIT_FOR_SETUP state.
2113 case OUT_STATUS_STAGE
:
2114 case WAIT_ACK_SET_CONF_INTERF
:
2115 ep_warn(ep
, "should never get in %s state here!!!\n",
2116 EP0_STNAME(ep
->dev
));
2123 * handle_ep - Handle endpoint data tranfers
2124 * @ep: pxa physical endpoint
2126 * Tries to transfer all pending request data into the endpoint and/or
2127 * transfer all pending data in the endpoint into usb requests.
2129 * Is always called when in_interrupt() and with ep->lock released.
2131 static void handle_ep(struct pxa_ep
*ep
)
2133 struct pxa27x_request
*req
;
2136 int is_in
= ep
->dir_in
;
2138 unsigned long flags
;
2140 spin_lock_irqsave(&ep
->lock
, flags
);
2141 if (ep
->in_handle_ep
)
2142 goto recursion_detected
;
2143 ep
->in_handle_ep
= 1;
2147 udccsr
= udc_ep_readl(ep
, UDCCSR
);
2149 if (likely(!list_empty(&ep
->queue
)))
2150 req
= list_entry(ep
->queue
.next
,
2151 struct pxa27x_request
, queue
);
2155 ep_dbg(ep
, "req:%p, udccsr 0x%03x loop=%d\n",
2156 req
, udccsr
, loop
++);
2158 if (unlikely(udccsr
& (UDCCSR_SST
| UDCCSR_TRN
)))
2159 udc_ep_writel(ep
, UDCCSR
,
2160 udccsr
& (UDCCSR_SST
| UDCCSR_TRN
));
2164 if (unlikely(is_in
)) {
2165 if (likely(!ep_is_full(ep
)))
2166 completed
= write_fifo(ep
, req
);
2168 if (likely(epout_has_pkt(ep
)))
2169 completed
= read_fifo(ep
, req
);
2174 ep_end_in_req(ep
, req
, &flags
);
2176 ep_end_out_req(ep
, req
, &flags
);
2178 } while (completed
);
2180 ep
->in_handle_ep
= 0;
2182 spin_unlock_irqrestore(&ep
->lock
, flags
);
2186 * pxa27x_change_configuration - Handle SET_CONF usb request notification
2188 * @config: usb configuration
2190 * Post the request to upper level.
2191 * Don't use any pxa specific harware configuration capabilities
2193 static void pxa27x_change_configuration(struct pxa_udc
*udc
, int config
)
2195 struct usb_ctrlrequest req
;
2197 dev_dbg(udc
->dev
, "config=%d\n", config
);
2199 udc
->config
= config
;
2200 udc
->last_interface
= 0;
2201 udc
->last_alternate
= 0;
2203 req
.bRequestType
= 0;
2204 req
.bRequest
= USB_REQ_SET_CONFIGURATION
;
2205 req
.wValue
= config
;
2209 set_ep0state(udc
, WAIT_ACK_SET_CONF_INTERF
);
2210 udc
->driver
->setup(&udc
->gadget
, &req
);
2211 ep_write_UDCCSR(&udc
->pxa_ep
[0], UDCCSR0_AREN
);
2215 * pxa27x_change_interface - Handle SET_INTERF usb request notification
2217 * @iface: interface number
2218 * @alt: alternate setting number
2220 * Post the request to upper level.
2221 * Don't use any pxa specific harware configuration capabilities
2223 static void pxa27x_change_interface(struct pxa_udc
*udc
, int iface
, int alt
)
2225 struct usb_ctrlrequest req
;
2227 dev_dbg(udc
->dev
, "interface=%d, alternate setting=%d\n", iface
, alt
);
2229 udc
->last_interface
= iface
;
2230 udc
->last_alternate
= alt
;
2232 req
.bRequestType
= USB_RECIP_INTERFACE
;
2233 req
.bRequest
= USB_REQ_SET_INTERFACE
;
2238 set_ep0state(udc
, WAIT_ACK_SET_CONF_INTERF
);
2239 udc
->driver
->setup(&udc
->gadget
, &req
);
2240 ep_write_UDCCSR(&udc
->pxa_ep
[0], UDCCSR0_AREN
);
2244 * irq_handle_data - Handle data transfer
2245 * @irq: irq IRQ number
2246 * @udc: dev pxa_udc device structure
2248 * Called from irq handler, transferts data to or from endpoint to queue
2250 static void irq_handle_data(int irq
, struct pxa_udc
*udc
)
2254 u32 udcisr0
= udc_readl(udc
, UDCISR0
) & UDCCISR0_EP_MASK
;
2255 u32 udcisr1
= udc_readl(udc
, UDCISR1
) & UDCCISR1_EP_MASK
;
2257 if (udcisr0
& UDCISR_INT_MASK
) {
2258 udc
->pxa_ep
[0].stats
.irqs
++;
2259 udc_writel(udc
, UDCISR0
, UDCISR_INT(0, UDCISR_INT_MASK
));
2260 handle_ep0(udc
, !!(udcisr0
& UDCICR_FIFOERR
),
2261 !!(udcisr0
& UDCICR_PKTCOMPL
));
2265 for (i
= 1; udcisr0
!= 0 && i
< 16; udcisr0
>>= 2, i
++) {
2266 if (!(udcisr0
& UDCISR_INT_MASK
))
2269 udc_writel(udc
, UDCISR0
, UDCISR_INT(i
, UDCISR_INT_MASK
));
2271 WARN_ON(i
>= ARRAY_SIZE(udc
->pxa_ep
));
2272 if (i
< ARRAY_SIZE(udc
->pxa_ep
)) {
2273 ep
= &udc
->pxa_ep
[i
];
2279 for (i
= 16; udcisr1
!= 0 && i
< 24; udcisr1
>>= 2, i
++) {
2280 udc_writel(udc
, UDCISR1
, UDCISR_INT(i
- 16, UDCISR_INT_MASK
));
2281 if (!(udcisr1
& UDCISR_INT_MASK
))
2284 WARN_ON(i
>= ARRAY_SIZE(udc
->pxa_ep
));
2285 if (i
< ARRAY_SIZE(udc
->pxa_ep
)) {
2286 ep
= &udc
->pxa_ep
[i
];
2295 * irq_udc_suspend - Handle IRQ "UDC Suspend"
2298 static void irq_udc_suspend(struct pxa_udc
*udc
)
2300 udc_writel(udc
, UDCISR1
, UDCISR1_IRSU
);
2301 udc
->stats
.irqs_suspend
++;
2303 if (udc
->gadget
.speed
!= USB_SPEED_UNKNOWN
2304 && udc
->driver
&& udc
->driver
->suspend
)
2305 udc
->driver
->suspend(&udc
->gadget
);
2310 * irq_udc_resume - Handle IRQ "UDC Resume"
2313 static void irq_udc_resume(struct pxa_udc
*udc
)
2315 udc_writel(udc
, UDCISR1
, UDCISR1_IRRU
);
2316 udc
->stats
.irqs_resume
++;
2318 if (udc
->gadget
.speed
!= USB_SPEED_UNKNOWN
2319 && udc
->driver
&& udc
->driver
->resume
)
2320 udc
->driver
->resume(&udc
->gadget
);
2324 * irq_udc_reconfig - Handle IRQ "UDC Change Configuration"
2327 static void irq_udc_reconfig(struct pxa_udc
*udc
)
2329 unsigned config
, interface
, alternate
, config_change
;
2330 u32 udccr
= udc_readl(udc
, UDCCR
);
2332 udc_writel(udc
, UDCISR1
, UDCISR1_IRCC
);
2333 udc
->stats
.irqs_reconfig
++;
2335 config
= (udccr
& UDCCR_ACN
) >> UDCCR_ACN_S
;
2336 config_change
= (config
!= udc
->config
);
2337 pxa27x_change_configuration(udc
, config
);
2339 interface
= (udccr
& UDCCR_AIN
) >> UDCCR_AIN_S
;
2340 alternate
= (udccr
& UDCCR_AAISN
) >> UDCCR_AAISN_S
;
2341 pxa27x_change_interface(udc
, interface
, alternate
);
2344 update_pxa_ep_matches(udc
);
2345 udc_set_mask_UDCCR(udc
, UDCCR_SMAC
);
2349 * irq_udc_reset - Handle IRQ "UDC Reset"
2352 static void irq_udc_reset(struct pxa_udc
*udc
)
2354 u32 udccr
= udc_readl(udc
, UDCCR
);
2355 struct pxa_ep
*ep
= &udc
->pxa_ep
[0];
2357 dev_info(udc
->dev
, "USB reset\n");
2358 udc_writel(udc
, UDCISR1
, UDCISR1_IRRS
);
2359 udc
->stats
.irqs_reset
++;
2361 if ((udccr
& UDCCR_UDA
) == 0) {
2362 dev_dbg(udc
->dev
, "USB reset start\n");
2363 stop_activity(udc
, udc
->driver
);
2365 udc
->gadget
.speed
= USB_SPEED_FULL
;
2366 memset(&udc
->stats
, 0, sizeof udc
->stats
);
2369 ep_write_UDCCSR(ep
, UDCCSR0_FTF
| UDCCSR0_OPC
);
2374 * pxa_udc_irq - Main irq handler
2378 * Handles all udc interrupts
2380 static irqreturn_t
pxa_udc_irq(int irq
, void *_dev
)
2382 struct pxa_udc
*udc
= _dev
;
2383 u32 udcisr0
= udc_readl(udc
, UDCISR0
);
2384 u32 udcisr1
= udc_readl(udc
, UDCISR1
);
2385 u32 udccr
= udc_readl(udc
, UDCCR
);
2388 dev_vdbg(udc
->dev
, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, "
2389 "UDCCR:0x%08x\n", udcisr0
, udcisr1
, udccr
);
2391 udcisr1_spec
= udcisr1
& 0xf8000000;
2392 if (unlikely(udcisr1_spec
& UDCISR1_IRSU
))
2393 irq_udc_suspend(udc
);
2394 if (unlikely(udcisr1_spec
& UDCISR1_IRRU
))
2395 irq_udc_resume(udc
);
2396 if (unlikely(udcisr1_spec
& UDCISR1_IRCC
))
2397 irq_udc_reconfig(udc
);
2398 if (unlikely(udcisr1_spec
& UDCISR1_IRRS
))
2401 if ((udcisr0
& UDCCISR0_EP_MASK
) | (udcisr1
& UDCCISR1_EP_MASK
))
2402 irq_handle_data(irq
, udc
);
2407 static struct pxa_udc memory
= {
2409 .ops
= &pxa_udc_ops
,
2410 .ep0
= &memory
.udc_usb_ep
[0].usb_ep
,
2411 .name
= driver_name
,
2413 .init_name
= "gadget",
2428 /* Endpoints for gadget zero */
2429 PXA_EP_OUT_BULK(1, 1, 3, 0, 0),
2430 PXA_EP_IN_BULK(2, 2, 3, 0, 0),
2431 /* Endpoints for ether gadget, file storage gadget */
2432 PXA_EP_OUT_BULK(3, 1, 1, 0, 0),
2433 PXA_EP_IN_BULK(4, 2, 1, 0, 0),
2434 PXA_EP_IN_ISO(5, 3, 1, 0, 0),
2435 PXA_EP_OUT_ISO(6, 4, 1, 0, 0),
2436 PXA_EP_IN_INT(7, 5, 1, 0, 0),
2437 /* Endpoints for RNDIS, serial */
2438 PXA_EP_OUT_BULK(8, 1, 2, 0, 0),
2439 PXA_EP_IN_BULK(9, 2, 2, 0, 0),
2440 PXA_EP_IN_INT(10, 5, 2, 0, 0),
2442 * All the following endpoints are only for completion. They
2443 * won't never work, as multiple interfaces are really broken on
2446 PXA_EP_OUT_BULK(11, 1, 2, 1, 0),
2447 PXA_EP_IN_BULK(12, 2, 2, 1, 0),
2448 /* Endpoint for CDC Ether */
2449 PXA_EP_OUT_BULK(13, 1, 1, 1, 1),
2450 PXA_EP_IN_BULK(14, 2, 1, 1, 1),
2455 * pxa_udc_probe - probes the udc device
2456 * @_dev: platform device
2458 * Perform basic init : allocates udc clock, creates sysfs files, requests
2461 static int __init
pxa_udc_probe(struct platform_device
*pdev
)
2463 struct resource
*regs
;
2464 struct pxa_udc
*udc
= &memory
;
2465 int retval
= 0, gpio
;
2467 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
2470 udc
->irq
= platform_get_irq(pdev
, 0);
2474 udc
->dev
= &pdev
->dev
;
2475 udc
->mach
= pdev
->dev
.platform_data
;
2476 udc
->transceiver
= otg_get_transceiver();
2478 gpio
= udc
->mach
->gpio_pullup
;
2479 if (gpio_is_valid(gpio
)) {
2480 retval
= gpio_request(gpio
, "USB D+ pullup");
2482 gpio_direction_output(gpio
,
2483 udc
->mach
->gpio_pullup_inverted
);
2486 dev_err(&pdev
->dev
, "Couldn't request gpio %d : %d\n",
2491 udc
->clk
= clk_get(&pdev
->dev
, NULL
);
2492 if (IS_ERR(udc
->clk
)) {
2493 retval
= PTR_ERR(udc
->clk
);
2498 udc
->regs
= ioremap(regs
->start
, resource_size(regs
));
2500 dev_err(&pdev
->dev
, "Unable to map UDC I/O memory\n");
2504 device_initialize(&udc
->gadget
.dev
);
2505 udc
->gadget
.dev
.parent
= &pdev
->dev
;
2506 udc
->gadget
.dev
.dma_mask
= NULL
;
2507 udc
->vbus_sensed
= 0;
2509 the_controller
= udc
;
2510 platform_set_drvdata(pdev
, udc
);
2514 /* irq setup after old hardware state is cleaned up */
2515 retval
= request_irq(udc
->irq
, pxa_udc_irq
,
2516 IRQF_SHARED
, driver_name
, udc
);
2518 dev_err(udc
->dev
, "%s: can't get irq %i, err %d\n",
2519 driver_name
, IRQ_USB
, retval
);
2522 retval
= usb_add_gadget_udc(&pdev
->dev
, &udc
->gadget
);
2526 pxa_init_debugfs(udc
);
2529 free_irq(udc
->irq
, udc
);
2540 * pxa_udc_remove - removes the udc device driver
2541 * @_dev: platform device
2543 static int __exit
pxa_udc_remove(struct platform_device
*_dev
)
2545 struct pxa_udc
*udc
= platform_get_drvdata(_dev
);
2546 int gpio
= udc
->mach
->gpio_pullup
;
2548 usb_del_gadget_udc(&udc
->gadget
);
2549 usb_gadget_unregister_driver(udc
->driver
);
2550 free_irq(udc
->irq
, udc
);
2551 pxa_cleanup_debugfs(udc
);
2552 if (gpio_is_valid(gpio
))
2555 otg_put_transceiver(udc
->transceiver
);
2557 udc
->transceiver
= NULL
;
2558 platform_set_drvdata(_dev
, NULL
);
2559 the_controller
= NULL
;
2566 static void pxa_udc_shutdown(struct platform_device
*_dev
)
2568 struct pxa_udc
*udc
= platform_get_drvdata(_dev
);
2570 if (udc_readl(udc
, UDCCR
) & UDCCR_UDE
)
2574 #ifdef CONFIG_PXA27x
2575 extern void pxa27x_clear_otgph(void);
2577 #define pxa27x_clear_otgph() do {} while (0)
2582 * pxa_udc_suspend - Suspend udc device
2583 * @_dev: platform device
2584 * @state: suspend state
2586 * Suspends udc : saves configuration registers (UDCCR*), then disables the udc
2589 static int pxa_udc_suspend(struct platform_device
*_dev
, pm_message_t state
)
2592 struct pxa_udc
*udc
= platform_get_drvdata(_dev
);
2595 ep
= &udc
->pxa_ep
[0];
2596 udc
->udccsr0
= udc_ep_readl(ep
, UDCCSR
);
2597 for (i
= 1; i
< NR_PXA_ENDPOINTS
; i
++) {
2598 ep
= &udc
->pxa_ep
[i
];
2599 ep
->udccsr_value
= udc_ep_readl(ep
, UDCCSR
);
2600 ep
->udccr_value
= udc_ep_readl(ep
, UDCCR
);
2601 ep_dbg(ep
, "udccsr:0x%03x, udccr:0x%x\n",
2602 ep
->udccsr_value
, ep
->udccr_value
);
2606 udc
->pullup_resume
= udc
->pullup_on
;
2607 dplus_pullup(udc
, 0);
2613 * pxa_udc_resume - Resume udc device
2614 * @_dev: platform device
2616 * Resumes udc : restores configuration registers (UDCCR*), then enables the udc
2619 static int pxa_udc_resume(struct platform_device
*_dev
)
2622 struct pxa_udc
*udc
= platform_get_drvdata(_dev
);
2625 ep
= &udc
->pxa_ep
[0];
2626 udc_ep_writel(ep
, UDCCSR
, udc
->udccsr0
& (UDCCSR0_FST
| UDCCSR0_DME
));
2627 for (i
= 1; i
< NR_PXA_ENDPOINTS
; i
++) {
2628 ep
= &udc
->pxa_ep
[i
];
2629 udc_ep_writel(ep
, UDCCSR
, ep
->udccsr_value
);
2630 udc_ep_writel(ep
, UDCCR
, ep
->udccr_value
);
2631 ep_dbg(ep
, "udccsr:0x%03x, udccr:0x%x\n",
2632 ep
->udccsr_value
, ep
->udccr_value
);
2635 dplus_pullup(udc
, udc
->pullup_resume
);
2636 if (should_enable_udc(udc
))
2639 * We do not handle OTG yet.
2641 * OTGPH bit is set when sleep mode is entered.
2642 * it indicates that OTG pad is retaining its state.
2643 * Upon exit from sleep mode and before clearing OTGPH,
2644 * Software must configure the USB OTG pad, UDC, and UHC
2645 * to the state they were in before entering sleep mode.
2647 pxa27x_clear_otgph();
2653 /* work with hotplug and coldplug */
2654 MODULE_ALIAS("platform:pxa27x-udc");
2656 static struct platform_driver udc_driver
= {
2658 .name
= "pxa27x-udc",
2659 .owner
= THIS_MODULE
,
2661 .remove
= __exit_p(pxa_udc_remove
),
2662 .shutdown
= pxa_udc_shutdown
,
2664 .suspend
= pxa_udc_suspend
,
2665 .resume
= pxa_udc_resume
2669 static int __init
udc_init(void)
2671 if (!cpu_is_pxa27x() && !cpu_is_pxa3xx())
2674 printk(KERN_INFO
"%s: version %s\n", driver_name
, DRIVER_VERSION
);
2675 return platform_driver_probe(&udc_driver
, pxa_udc_probe
);
2677 module_init(udc_init
);
2680 static void __exit
udc_exit(void)
2682 platform_driver_unregister(&udc_driver
);
2684 module_exit(udc_exit
);
2686 MODULE_DESCRIPTION(DRIVER_DESC
);
2687 MODULE_AUTHOR("Robert Jarzmik");
2688 MODULE_LICENSE("GPL");