5 #include <linux/mod_devicetable.h>
7 #include <linux/bcma/bcma_driver_chipcommon.h>
8 #include <linux/bcma/bcma_driver_pci.h>
9 #include <linux/bcma/bcma_driver_mips.h>
10 #include <linux/ssb/ssb.h> /* SPROM sharing */
12 #include "bcma_regs.h"
23 struct bcma_chipinfo
{
34 struct bcma_host_ops
{
35 u8 (*read8
)(struct bcma_device
*core
, u16 offset
);
36 u16 (*read16
)(struct bcma_device
*core
, u16 offset
);
37 u32 (*read32
)(struct bcma_device
*core
, u16 offset
);
38 void (*write8
)(struct bcma_device
*core
, u16 offset
, u8 value
);
39 void (*write16
)(struct bcma_device
*core
, u16 offset
, u16 value
);
40 void (*write32
)(struct bcma_device
*core
, u16 offset
, u32 value
);
41 #ifdef CONFIG_BCMA_BLOCKIO
42 void (*block_read
)(struct bcma_device
*core
, void *buffer
,
43 size_t count
, u16 offset
, u8 reg_width
);
44 void (*block_write
)(struct bcma_device
*core
, const void *buffer
,
45 size_t count
, u16 offset
, u8 reg_width
);
48 u32 (*aread32
)(struct bcma_device
*core
, u16 offset
);
49 void (*awrite32
)(struct bcma_device
*core
, u16 offset
, u32 value
);
52 /* Core manufacturers */
53 #define BCMA_MANUF_ARM 0x43B
54 #define BCMA_MANUF_MIPS 0x4A7
55 #define BCMA_MANUF_BCM 0x4BF
57 /* Core class values. */
58 #define BCMA_CL_SIM 0x0
59 #define BCMA_CL_EROM 0x1
60 #define BCMA_CL_CORESIGHT 0x9
61 #define BCMA_CL_VERIF 0xB
62 #define BCMA_CL_OPTIMO 0xD
63 #define BCMA_CL_GEN 0xE
64 #define BCMA_CL_PRIMECELL 0xF
67 #define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */
68 #define BCMA_CORE_INVALID 0x700
69 #define BCMA_CORE_CHIPCOMMON 0x800
70 #define BCMA_CORE_ILINE20 0x801
71 #define BCMA_CORE_SRAM 0x802
72 #define BCMA_CORE_SDRAM 0x803
73 #define BCMA_CORE_PCI 0x804
74 #define BCMA_CORE_MIPS 0x805
75 #define BCMA_CORE_ETHERNET 0x806
76 #define BCMA_CORE_V90 0x807
77 #define BCMA_CORE_USB11_HOSTDEV 0x808
78 #define BCMA_CORE_ADSL 0x809
79 #define BCMA_CORE_ILINE100 0x80A
80 #define BCMA_CORE_IPSEC 0x80B
81 #define BCMA_CORE_UTOPIA 0x80C
82 #define BCMA_CORE_PCMCIA 0x80D
83 #define BCMA_CORE_INTERNAL_MEM 0x80E
84 #define BCMA_CORE_MEMC_SDRAM 0x80F
85 #define BCMA_CORE_OFDM 0x810
86 #define BCMA_CORE_EXTIF 0x811
87 #define BCMA_CORE_80211 0x812
88 #define BCMA_CORE_PHY_A 0x813
89 #define BCMA_CORE_PHY_B 0x814
90 #define BCMA_CORE_PHY_G 0x815
91 #define BCMA_CORE_MIPS_3302 0x816
92 #define BCMA_CORE_USB11_HOST 0x817
93 #define BCMA_CORE_USB11_DEV 0x818
94 #define BCMA_CORE_USB20_HOST 0x819
95 #define BCMA_CORE_USB20_DEV 0x81A
96 #define BCMA_CORE_SDIO_HOST 0x81B
97 #define BCMA_CORE_ROBOSWITCH 0x81C
98 #define BCMA_CORE_PARA_ATA 0x81D
99 #define BCMA_CORE_SATA_XORDMA 0x81E
100 #define BCMA_CORE_ETHERNET_GBIT 0x81F
101 #define BCMA_CORE_PCIE 0x820
102 #define BCMA_CORE_PHY_N 0x821
103 #define BCMA_CORE_SRAM_CTL 0x822
104 #define BCMA_CORE_MINI_MACPHY 0x823
105 #define BCMA_CORE_ARM_1176 0x824
106 #define BCMA_CORE_ARM_7TDMI 0x825
107 #define BCMA_CORE_PHY_LP 0x826
108 #define BCMA_CORE_PMU 0x827
109 #define BCMA_CORE_PHY_SSN 0x828
110 #define BCMA_CORE_SDIO_DEV 0x829
111 #define BCMA_CORE_ARM_CM3 0x82A
112 #define BCMA_CORE_PHY_HT 0x82B
113 #define BCMA_CORE_MIPS_74K 0x82C
114 #define BCMA_CORE_MAC_GBIT 0x82D
115 #define BCMA_CORE_DDR12_MEM_CTL 0x82E
116 #define BCMA_CORE_PCIE_RC 0x82F /* PCIe Root Complex */
117 #define BCMA_CORE_OCP_OCP_BRIDGE 0x830
118 #define BCMA_CORE_SHARED_COMMON 0x831
119 #define BCMA_CORE_OCP_AHB_BRIDGE 0x832
120 #define BCMA_CORE_SPI_HOST 0x833
121 #define BCMA_CORE_I2S 0x834
122 #define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */
123 #define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */
124 #define BCMA_CORE_DEFAULT 0xFFF
126 #define BCMA_MAX_NR_CORES 16
129 struct bcma_bus
*bus
;
130 struct bcma_device_id id
;
133 struct device
*dma_dev
;
143 void __iomem
*io_addr
;
144 void __iomem
*io_wrap
;
147 struct list_head list
;
150 static inline void *bcma_get_drvdata(struct bcma_device
*core
)
152 return core
->drvdata
;
154 static inline void bcma_set_drvdata(struct bcma_device
*core
, void *drvdata
)
156 core
->drvdata
= drvdata
;
161 const struct bcma_device_id
*id_table
;
163 int (*probe
)(struct bcma_device
*dev
);
164 void (*remove
)(struct bcma_device
*dev
);
165 int (*suspend
)(struct bcma_device
*dev
, pm_message_t state
);
166 int (*resume
)(struct bcma_device
*dev
);
167 void (*shutdown
)(struct bcma_device
*dev
);
169 struct device_driver drv
;
172 int __bcma_driver_register(struct bcma_driver
*drv
, struct module
*owner
);
173 #define bcma_driver_register(drv) \
174 __bcma_driver_register(drv, THIS_MODULE)
176 extern void bcma_driver_unregister(struct bcma_driver
*drv
);
182 const struct bcma_host_ops
*ops
;
184 enum bcma_hosttype hosttype
;
186 /* Pointer to the PCI bus (only for BCMA_HOSTTYPE_PCI) */
187 struct pci_dev
*host_pci
;
188 /* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */
189 struct sdio_func
*host_sdio
;
192 struct bcma_chipinfo chipinfo
;
194 struct bcma_device
*mapped_core
;
195 struct list_head cores
;
199 struct bcma_drv_cc drv_cc
;
200 struct bcma_drv_pci drv_pci
;
201 struct bcma_drv_mips drv_mips
;
203 /* We decided to share SPROM struct with SSB as long as we do not need
204 * any hacks for BCMA. This simplifies drivers code. */
205 struct ssb_sprom sprom
;
208 extern inline u32
bcma_read8(struct bcma_device
*core
, u16 offset
)
210 return core
->bus
->ops
->read8(core
, offset
);
212 extern inline u32
bcma_read16(struct bcma_device
*core
, u16 offset
)
214 return core
->bus
->ops
->read16(core
, offset
);
216 extern inline u32
bcma_read32(struct bcma_device
*core
, u16 offset
)
218 return core
->bus
->ops
->read32(core
, offset
);
221 void bcma_write8(struct bcma_device
*core
, u16 offset
, u32 value
)
223 core
->bus
->ops
->write8(core
, offset
, value
);
226 void bcma_write16(struct bcma_device
*core
, u16 offset
, u32 value
)
228 core
->bus
->ops
->write16(core
, offset
, value
);
231 void bcma_write32(struct bcma_device
*core
, u16 offset
, u32 value
)
233 core
->bus
->ops
->write32(core
, offset
, value
);
235 #ifdef CONFIG_BCMA_BLOCKIO
236 extern inline void bcma_block_read(struct bcma_device
*core
, void *buffer
,
237 size_t count
, u16 offset
, u8 reg_width
)
239 core
->bus
->ops
->block_read(core
, buffer
, count
, offset
, reg_width
);
241 extern inline void bcma_block_write(struct bcma_device
*core
, const void *buffer
,
242 size_t count
, u16 offset
, u8 reg_width
)
244 core
->bus
->ops
->block_write(core
, buffer
, count
, offset
, reg_width
);
247 extern inline u32
bcma_aread32(struct bcma_device
*core
, u16 offset
)
249 return core
->bus
->ops
->aread32(core
, offset
);
252 void bcma_awrite32(struct bcma_device
*core
, u16 offset
, u32 value
)
254 core
->bus
->ops
->awrite32(core
, offset
, value
);
257 #define bcma_mask32(cc, offset, mask) \
258 bcma_write32(cc, offset, bcma_read32(cc, offset) & (mask))
259 #define bcma_set32(cc, offset, set) \
260 bcma_write32(cc, offset, bcma_read32(cc, offset) | (set))
261 #define bcma_maskset32(cc, offset, mask, set) \
262 bcma_write32(cc, offset, (bcma_read32(cc, offset) & (mask)) | (set))
264 extern bool bcma_core_is_enabled(struct bcma_device
*core
);
265 extern void bcma_core_disable(struct bcma_device
*core
, u32 flags
);
266 extern int bcma_core_enable(struct bcma_device
*core
, u32 flags
);
267 extern void bcma_core_set_clockmode(struct bcma_device
*core
,
268 enum bcma_clkmode clkmode
);
269 extern void bcma_core_pll_ctl(struct bcma_device
*core
, u32 req
, u32 status
,
271 #define BCMA_DMA_TRANSLATION_MASK 0xC0000000
272 #define BCMA_DMA_TRANSLATION_NONE 0x00000000
273 #define BCMA_DMA_TRANSLATION_DMA32_CMT 0x40000000 /* Client Mode Translation for 32-bit DMA */
274 #define BCMA_DMA_TRANSLATION_DMA64_CMT 0x80000000 /* Client Mode Translation for 64-bit DMA */
275 extern u32
bcma_core_dma_translation(struct bcma_device
*core
);
277 #endif /* LINUX_BCMA_H_ */