include/linux/sdla.h

   1 /*
   2  * INET         An implementation of the TCP/IP protocol suite for the LINUX
   3  *              operating system.  INET is implemented using the  BSD Socket
   4  *              interface as the means of communication with the user level.
   5  *
   6  *              Global definitions for the Frame relay interface.
   7  *
   8  * Version:     @(#)if_ifrad.h  0.20    13 Apr 96
   9  *
  10  * Author:      Mike McLagan <mike.mclagan@linux.org>
  11  *
  12  * Changes:
  13  *              0.15    Mike McLagan    Structure packing
  14  *
  15  *              0.20    Mike McLagan    New flags for S508 buffer handling
  16  *
  17  *              This program is free software; you can redistribute it and/or
  18  *              modify it under the terms of the GNU General Public License
  19  *              as published by the Free Software Foundation; either version
  20  *              2 of the License, or (at your option) any later version.
  21  */
  22
  23 #ifndef SDLA_H
  24 #define SDLA_H
  25
  26 /* adapter type */
  27 #define SDLA_TYPES
  28 #define SDLA_S502A                      5020
  29 #define SDLA_S502E                      5021
  30 #define SDLA_S503                       5030
  31 #define SDLA_S507                       5070
  32 #define SDLA_S508                       5080
  33 #define SDLA_S509                       5090
  34 #define SDLA_UNKNOWN                    -1
  35
  36 /* port selection flags for the S508 */
  37 #define SDLA_S508_PORT_V35              0x00
  38 #define SDLA_S508_PORT_RS232            0x02
  39
  40 /* Z80 CPU speeds */
  41 #define SDLA_CPU_3M                     0x00
  42 #define SDLA_CPU_5M                     0x01
  43 #define SDLA_CPU_7M                     0x02
  44 #define SDLA_CPU_8M                     0x03
  45 #define SDLA_CPU_10M                    0x04
  46 #define SDLA_CPU_16M                    0x05
  47 #define SDLA_CPU_12M                    0x06
  48
  49 /* some private IOCTLs */
  50 #define SDLA_IDENTIFY                   (FRAD_LAST_IOCTL + 1)
  51 #define SDLA_CPUSPEED                   (FRAD_LAST_IOCTL + 2)
  52 #define SDLA_PROTOCOL                   (FRAD_LAST_IOCTL + 3)
  53
  54 #define SDLA_CLEARMEM                   (FRAD_LAST_IOCTL + 4)
  55 #define SDLA_WRITEMEM                   (FRAD_LAST_IOCTL + 5)
  56 #define SDLA_READMEM                    (FRAD_LAST_IOCTL + 6)
  57
  58 struct sdla_mem {
  59    int  addr;
  60    int  len;
  61    void __user *data;
  62 };
  63
  64 #define SDLA_START                      (FRAD_LAST_IOCTL + 7)
  65 #define SDLA_STOP                       (FRAD_LAST_IOCTL + 8)
  66
  67 /* some offsets in the Z80's memory space */
  68 #define SDLA_NMIADDR                    0x0000
  69 #define SDLA_CONF_ADDR                  0x0010
  70 #define SDLA_S502A_NMIADDR              0x0066
  71 #define SDLA_CODE_BASEADDR              0x0100
  72 #define SDLA_WINDOW_SIZE                0x2000
  73 #define SDLA_ADDR_MASK                  0x1FFF
  74
  75 /* largest handleable block of data */
  76 #define SDLA_MAX_DATA                   4080
  77 #define SDLA_MAX_MTU                    4072    /* MAX_DATA - sizeof(fradhdr) */
  78 #define SDLA_MAX_DLCI                   24
  79
  80 /* this should be the same as frad_conf */
  81 struct sdla_conf {
  82    short station;
  83    short config;
  84    short kbaud;
  85    short clocking;
  86    short max_frm;
  87    short T391;
  88    short T392;
  89    short N391;
  90    short N392;
  91    short N393;
  92    short CIR_fwd;
  93    short Bc_fwd;
  94    short Be_fwd;
  95    short CIR_bwd;
  96    short Bc_bwd;
  97    short Be_bwd;
  98 };
  99
 100 /* this should be the same as dlci_conf */
 101 struct sdla_dlci_conf {
 102    short config;
 103    short CIR_fwd;
 104    short Bc_fwd;
 105    short Be_fwd;
 106    short CIR_bwd;
 107    short Bc_bwd;
 108    short Be_bwd;
 109    short Tc_fwd;
 110    short Tc_bwd;
 111    short Tf_max;
 112    short Tb_max;
 113 };
 114
 115 #ifdef __KERNEL__
 116
 117 /* important Z80 window addresses */
 118 #define SDLA_CONTROL_WND                0xE000
 119
 120 #define SDLA_502_CMD_BUF                0xEF60
 121 #define SDLA_502_RCV_BUF                0xA900
 122 #define SDLA_502_TXN_AVAIL              0xFFF1
 123 #define SDLA_502_RCV_AVAIL              0xFFF2
 124 #define SDLA_502_EVENT_FLAGS            0xFFF3
 125 #define SDLA_502_MDM_STATUS             0xFFF4
 126 #define SDLA_502_IRQ_INTERFACE          0xFFFD
 127 #define SDLA_502_IRQ_PERMISSION         0xFFFE
 128 #define SDLA_502_DATA_OFS               0x0010
 129
 130 #define SDLA_508_CMD_BUF                0xE000
 131 #define SDLA_508_TXBUF_INFO             0xF100
 132 #define SDLA_508_RXBUF_INFO             0xF120
 133 #define SDLA_508_EVENT_FLAGS            0xF003
 134 #define SDLA_508_MDM_STATUS             0xF004
 135 #define SDLA_508_IRQ_INTERFACE          0xF010
 136 #define SDLA_508_IRQ_PERMISSION         0xF011
 137 #define SDLA_508_TSE_OFFSET             0xF012
 138
 139 /* Event flags */
 140 #define SDLA_EVENT_STATUS               0x01
 141 #define SDLA_EVENT_DLCI_STATUS          0x02
 142 #define SDLA_EVENT_BAD_DLCI             0x04
 143 #define SDLA_EVENT_LINK_DOWN            0x40
 144
 145 /* IRQ Trigger flags */
 146 #define SDLA_INTR_RX                    0x01
 147 #define SDLA_INTR_TX                    0x02
 148 #define SDLA_INTR_MODEM                 0x04
 149 #define SDLA_INTR_COMPLETE              0x08
 150 #define SDLA_INTR_STATUS                0x10
 151 #define SDLA_INTR_TIMER                 0x20
 152
 153 /* DLCI status bits */
 154 #define SDLA_DLCI_DELETED               0x01
 155 #define SDLA_DLCI_ACTIVE                0x02
 156 #define SDLA_DLCI_WAITING               0x04
 157 #define SDLA_DLCI_NEW                   0x08
 158 #define SDLA_DLCI_INCLUDED              0x40
 159
 160 /* valid command codes */
 161 #define SDLA_INFORMATION_WRITE          0x01
 162 #define SDLA_INFORMATION_READ           0x02
 163 #define SDLA_ISSUE_IN_CHANNEL_SIGNAL    0x03
 164 #define SDLA_SET_DLCI_CONFIGURATION     0x10
 165 #define SDLA_READ_DLCI_CONFIGURATION    0x11
 166 #define SDLA_DISABLE_COMMUNICATIONS     0x12
 167 #define SDLA_ENABLE_COMMUNICATIONS      0x13
 168 #define SDLA_READ_DLC_STATUS            0x14
 169 #define SDLA_READ_DLC_STATISTICS        0x15
 170 #define SDLA_FLUSH_DLC_STATISTICS       0x16
 171 #define SDLA_LIST_ACTIVE_DLCI           0x17
 172 #define SDLA_FLUSH_INFORMATION_BUFFERS  0x18
 173 #define SDLA_ADD_DLCI                   0x20
 174 #define SDLA_DELETE_DLCI                0x21
 175 #define SDLA_ACTIVATE_DLCI              0x22
 176 #define SDLA_DEACTIVATE_DLCI            0x23
 177 #define SDLA_READ_MODEM_STATUS          0x30
 178 #define SDLA_SET_MODEM_STATUS           0x31
 179 #define SDLA_READ_COMMS_ERR_STATS       0x32
 180 #define SDLA_FLUSH_COMMS_ERR_STATS      0x33
 181 #define SDLA_READ_CODE_VERSION          0x40
 182 #define SDLA_SET_IRQ_TRIGGER            0x50
 183 #define SDLA_GET_IRQ_TRIGGER            0x51
 184
 185 /* In channel signal types */
 186 #define SDLA_ICS_LINK_VERIFY            0x02
 187 #define SDLA_ICS_STATUS_ENQ             0x03
 188
 189 /* modem status flags */
 190 #define SDLA_MODEM_DTR_HIGH             0x01
 191 #define SDLA_MODEM_RTS_HIGH             0x02
 192 #define SDLA_MODEM_DCD_HIGH             0x08
 193 #define SDLA_MODEM_CTS_HIGH             0x20
 194
 195 /* used for RET_MODEM interpretation */
 196 #define SDLA_MODEM_DCD_LOW              0x01
 197 #define SDLA_MODEM_CTS_LOW              0x02
 198
 199 /* return codes */
 200 #define SDLA_RET_OK                     0x00
 201 #define SDLA_RET_COMMUNICATIONS         0x01
 202 #define SDLA_RET_CHANNEL_INACTIVE       0x02
 203 #define SDLA_RET_DLCI_INACTIVE          0x03
 204 #define SDLA_RET_DLCI_CONFIG            0x04
 205 #define SDLA_RET_BUF_TOO_BIG            0x05
 206 #define SDLA_RET_NO_DATA                0x05
 207 #define SDLA_RET_BUF_OVERSIZE           0x06
 208 #define SDLA_RET_CIR_OVERFLOW           0x07
 209 #define SDLA_RET_NO_BUFS                0x08
 210 #define SDLA_RET_TIMEOUT                0x0A
 211 #define SDLA_RET_MODEM                  0x10
 212 #define SDLA_RET_CHANNEL_OFF            0x11
 213 #define SDLA_RET_CHANNEL_ON             0x12
 214 #define SDLA_RET_DLCI_STATUS            0x13
 215 #define SDLA_RET_DLCI_UNKNOWN           0x14
 216 #define SDLA_RET_COMMAND_INVALID        0x1F
 217
 218 /* Configuration flags */
 219 #define SDLA_DIRECT_RECV                0x0080
 220 #define SDLA_TX_NO_EXCEPT               0x0020
 221 #define SDLA_NO_ICF_MSGS                0x1000
 222 #define SDLA_TX50_RX50                  0x0000
 223 #define SDLA_TX70_RX30                  0x2000
 224 #define SDLA_TX30_RX70                  0x4000
 225
 226 /* IRQ selection flags */
 227 #define SDLA_IRQ_RECEIVE                0x01
 228 #define SDLA_IRQ_TRANSMIT               0x02
 229 #define SDLA_IRQ_MODEM_STAT             0x04
 230 #define SDLA_IRQ_COMMAND                0x08
 231 #define SDLA_IRQ_CHANNEL                0x10
 232 #define SDLA_IRQ_TIMER                  0x20
 233
 234 /* definitions for PC memory mapping */
 235 #define SDLA_8K_WINDOW                  0x01
 236 #define SDLA_S502_SEG_A                 0x10
 237 #define SDLA_S502_SEG_C                 0x20
 238 #define SDLA_S502_SEG_D                 0x00
 239 #define SDLA_S502_SEG_E                 0x30
 240 #define SDLA_S507_SEG_A                 0x00
 241 #define SDLA_S507_SEG_B                 0x40
 242 #define SDLA_S507_SEG_C                 0x80
 243 #define SDLA_S507_SEG_E                 0xC0
 244 #define SDLA_S508_SEG_A                 0x00
 245 #define SDLA_S508_SEG_C                 0x10
 246 #define SDLA_S508_SEG_D                 0x08
 247 #define SDLA_S508_SEG_E                 0x18
 248
 249 /* SDLA adapter port constants */
 250 #define SDLA_IO_EXTENTS                 0x04
 251
 252 #define SDLA_REG_CONTROL                0x00
 253 #define SDLA_REG_PC_WINDOW              0x01    /* offset for PC window select latch */
 254 #define SDLA_REG_Z80_WINDOW             0x02    /* offset for Z80 window select latch */
 255 #define SDLA_REG_Z80_CONTROL            0x03    /* offset for Z80 control latch */
 256
 257 #define SDLA_S502_STS                   0x00    /* status reg for 502, 502E, 507 */
 258 #define SDLA_S508_GNRL                  0x00    /* general purp. reg for 508 */
 259 #define SDLA_S508_STS                   0x01    /* status reg for 508 */
 260 #define SDLA_S508_IDR                   0x02    /* ID reg for 508 */
 261
 262 /* control register flags */
 263 #define SDLA_S502A_START                0x00    /* start the CPU */
 264 #define SDLA_S502A_INTREQ               0x02
 265 #define SDLA_S502A_INTEN                0x04
 266 #define SDLA_S502A_HALT                 0x08    /* halt the CPU */
 267 #define SDLA_S502A_NMI                  0x10    /* issue an NMI to the CPU */
 268
 269 #define SDLA_S502E_CPUEN                0x01
 270 #define SDLA_S502E_ENABLE               0x02
 271 #define SDLA_S502E_INTACK               0x04
 272
 273 #define SDLA_S507_ENABLE                0x01
 274 #define SDLA_S507_IRQ3                  0x00
 275 #define SDLA_S507_IRQ4                  0x20
 276 #define SDLA_S507_IRQ5                  0x40
 277 #define SDLA_S507_IRQ7                  0x60
 278 #define SDLA_S507_IRQ10                 0x80
 279 #define SDLA_S507_IRQ11                 0xA0
 280 #define SDLA_S507_IRQ12                 0xC0
 281 #define SDLA_S507_IRQ15                 0xE0
 282
 283 #define SDLA_HALT                       0x00
 284 #define SDLA_CPUEN                      0x02
 285 #define SDLA_MEMEN                      0x04
 286 #define SDLA_S507_EPROMWR               0x08
 287 #define SDLA_S507_EPROMCLK              0x10
 288 #define SDLA_S508_INTRQ                 0x08
 289 #define SDLA_S508_INTEN                 0x10
 290
 291 struct sdla_cmd {
 292    char  opp_flag;
 293    char  cmd;
 294    short length;
 295    char  retval;
 296    short dlci;
 297    char  flags;
 298    short rxlost_int;
 299    long  rxlost_app;
 300    char  reserve[2];
 301    char  data[SDLA_MAX_DATA];   /* transfer data buffer */
 302 } __attribute__((packed));
 303
 304 struct intr_info {
 305    char  flags;
 306    short txlen;
 307    char  irq;
 308    char  flags2;
 309    short timeout;
 310 } __attribute__((packed));
 311
 312 /* found in the 508's control window at RXBUF_INFO */
 313 struct buf_info {
 314    unsigned short rse_num;
 315    unsigned long  rse_base;
 316    unsigned long  rse_next;
 317    unsigned long  buf_base;
 318    unsigned short reserved;
 319    unsigned long  buf_top;
 320 } __attribute__((packed));
 321
 322 /* structure pointed to by rse_base in RXBUF_INFO struct */
 323 struct buf_entry {
 324    char  opp_flag;
 325    short length;
 326    short dlci;
 327    char  flags;
 328    short timestamp;
 329    short reserved[2];
 330    long  buf_addr;
 331 } __attribute__((packed));
 332
 333 #endif
 334
 335 #endif